Program Listing for File usbctrl_regs.h#
↰ Return to documentation for file (src/generated/structs/usbctrl_regs.h)
#pragma once
#include "../ifgen/common.h"
namespace RP2040
{
struct [[gnu::packed]] usbctrl_regs
{
/* Constant attributes. */
static constexpr std::size_t size =
156;
/* Fields. */
uint32_t
ADDR_ENDP;
uint32_t ADDR_ENDP1;
uint32_t ADDR_ENDP2;
uint32_t ADDR_ENDP3;
uint32_t ADDR_ENDP4;
uint32_t ADDR_ENDP5;
uint32_t ADDR_ENDP6;
uint32_t ADDR_ENDP7;
uint32_t ADDR_ENDP8;
uint32_t ADDR_ENDP9;
uint32_t ADDR_ENDP10;
uint32_t ADDR_ENDP11;
uint32_t ADDR_ENDP12;
uint32_t ADDR_ENDP13;
uint32_t ADDR_ENDP14;
uint32_t ADDR_ENDP15;
uint32_t MAIN_CTRL;
uint32_t
SOF_WR;
const uint32_t SOF_RD =
{};
uint32_t SIE_CTRL;
uint32_t SIE_STATUS;
uint32_t
INT_EP_CTRL;
uint32_t BUFF_STATUS;
const uint32_t BUFF_CPU_SHOULD_HANDLE =
{};
uint32_t
EP_ABORT;
uint32_t EP_ABORT_DONE;
uint32_t
EP_STALL_ARM;
uint32_t NAK_POLL;
uint32_t
EP_STATUS_STALL_NAK;
uint32_t USB_MUXING;
uint32_t USB_PWR;
uint32_t USBPHY_DIRECT;
uint32_t USBPHY_DIRECT_OVERRIDE;
uint32_t USBPHY_TRIM;
const uint32_t reserved_padding0 = {};
const uint32_t INTR = {};
uint32_t INTE;
uint32_t INTF;
const uint32_t INTS =
{};
/* Methods. */
inline uint8_t get_ADDR_ENDP_ADDRESS() volatile
{
return (ADDR_ENDP >> 0u) & 0b1111111u;
}
inline void set_ADDR_ENDP_ADDRESS(uint8_t value) volatile
{
uint32_t curr = ADDR_ENDP;
curr &= ~(0b1111111u << 0u);
curr |= (value & 0b1111111u) << 0u;
ADDR_ENDP = curr;
}
inline uint8_t get_ADDR_ENDP_ENDPOINT() volatile
{
return (ADDR_ENDP >> 16u) & 0b1111u;
}
inline void set_ADDR_ENDP_ENDPOINT(uint8_t value) volatile
{
uint32_t curr = ADDR_ENDP;
curr &= ~(0b1111u << 16u);
curr |= (value & 0b1111u) << 16u;
ADDR_ENDP = curr;
}
inline void get_ADDR_ENDP(uint8_t &ADDRESS, uint8_t &ENDPOINT) volatile
{
uint32_t curr = ADDR_ENDP;
ADDRESS = (curr >> 0u) & 0b1111111u;
ENDPOINT = (curr >> 16u) & 0b1111u;
}
inline void set_ADDR_ENDP(uint8_t ADDRESS, uint8_t ENDPOINT) volatile
{
uint32_t curr = ADDR_ENDP;
curr &= ~(0b1111111u << 0u);
curr |= (ADDRESS & 0b1111111u) << 0u;
curr &= ~(0b1111u << 16u);
curr |= (ENDPOINT & 0b1111u) << 16u;
ADDR_ENDP = curr;
}
inline uint8_t get_ADDR_ENDP1_ADDRESS() volatile
{
return (ADDR_ENDP1 >> 0u) & 0b1111111u;
}
inline void set_ADDR_ENDP1_ADDRESS(uint8_t value) volatile
{
uint32_t curr = ADDR_ENDP1;
curr &= ~(0b1111111u << 0u);
curr |= (value & 0b1111111u) << 0u;
ADDR_ENDP1 = curr;
}
inline uint8_t get_ADDR_ENDP1_ENDPOINT() volatile
{
return (ADDR_ENDP1 >> 16u) & 0b1111u;
}
inline void set_ADDR_ENDP1_ENDPOINT(uint8_t value) volatile
{
uint32_t curr = ADDR_ENDP1;
curr &= ~(0b1111u << 16u);
curr |= (value & 0b1111u) << 16u;
ADDR_ENDP1 = curr;
}
inline bool get_ADDR_ENDP1_INTEP_DIR() volatile
{
return ADDR_ENDP1 & (1u << 25u);
}
inline void set_ADDR_ENDP1_INTEP_DIR() volatile
{
ADDR_ENDP1 |= 1u << 25u;
}
inline void clear_ADDR_ENDP1_INTEP_DIR() volatile
{
ADDR_ENDP1 &= ~(1u << 25u);
}
inline void toggle_ADDR_ENDP1_INTEP_DIR() volatile
{
ADDR_ENDP1 ^= 1u << 25u;
}
inline bool get_ADDR_ENDP1_INTEP_PREAMBLE() volatile
{
return ADDR_ENDP1 & (1u << 26u);
}
inline void set_ADDR_ENDP1_INTEP_PREAMBLE() volatile
{
ADDR_ENDP1 |= 1u << 26u;
}
inline void clear_ADDR_ENDP1_INTEP_PREAMBLE() volatile
{
ADDR_ENDP1 &= ~(1u << 26u);
}
inline void toggle_ADDR_ENDP1_INTEP_PREAMBLE() volatile
{
ADDR_ENDP1 ^= 1u << 26u;
}
inline void get_ADDR_ENDP1(uint8_t &ADDRESS, uint8_t &ENDPOINT,
bool &INTEP_DIR, bool &INTEP_PREAMBLE) volatile
{
uint32_t curr = ADDR_ENDP1;
ADDRESS = (curr >> 0u) & 0b1111111u;
ENDPOINT = (curr >> 16u) & 0b1111u;
INTEP_DIR = curr & (1u << 25u);
INTEP_PREAMBLE = curr & (1u << 26u);
}
inline void set_ADDR_ENDP1(uint8_t ADDRESS, uint8_t ENDPOINT,
bool INTEP_DIR, bool INTEP_PREAMBLE) volatile
{
uint32_t curr = ADDR_ENDP1;
curr &= ~(0b1111111u << 0u);
curr |= (ADDRESS & 0b1111111u) << 0u;
curr &= ~(0b1111u << 16u);
curr |= (ENDPOINT & 0b1111u) << 16u;
curr &= ~(0b1u << 25u);
curr |= (INTEP_DIR & 0b1u) << 25u;
curr &= ~(0b1u << 26u);
curr |= (INTEP_PREAMBLE & 0b1u) << 26u;
ADDR_ENDP1 = curr;
}
inline uint8_t get_ADDR_ENDP2_ADDRESS() volatile
{
return (ADDR_ENDP2 >> 0u) & 0b1111111u;
}
inline void set_ADDR_ENDP2_ADDRESS(uint8_t value) volatile
{
uint32_t curr = ADDR_ENDP2;
curr &= ~(0b1111111u << 0u);
curr |= (value & 0b1111111u) << 0u;
ADDR_ENDP2 = curr;
}
inline uint8_t get_ADDR_ENDP2_ENDPOINT() volatile
{
return (ADDR_ENDP2 >> 16u) & 0b1111u;
}
inline void set_ADDR_ENDP2_ENDPOINT(uint8_t value) volatile
{
uint32_t curr = ADDR_ENDP2;
curr &= ~(0b1111u << 16u);
curr |= (value & 0b1111u) << 16u;
ADDR_ENDP2 = curr;
}
inline bool get_ADDR_ENDP2_INTEP_DIR() volatile
{
return ADDR_ENDP2 & (1u << 25u);
}
inline void set_ADDR_ENDP2_INTEP_DIR() volatile
{
ADDR_ENDP2 |= 1u << 25u;
}
inline void clear_ADDR_ENDP2_INTEP_DIR() volatile
{
ADDR_ENDP2 &= ~(1u << 25u);
}
inline void toggle_ADDR_ENDP2_INTEP_DIR() volatile
{
ADDR_ENDP2 ^= 1u << 25u;
}
inline bool get_ADDR_ENDP2_INTEP_PREAMBLE() volatile
{
return ADDR_ENDP2 & (1u << 26u);
}
inline void set_ADDR_ENDP2_INTEP_PREAMBLE() volatile
{
ADDR_ENDP2 |= 1u << 26u;
}
inline void clear_ADDR_ENDP2_INTEP_PREAMBLE() volatile
{
ADDR_ENDP2 &= ~(1u << 26u);
}
inline void toggle_ADDR_ENDP2_INTEP_PREAMBLE() volatile
{
ADDR_ENDP2 ^= 1u << 26u;
}
inline void get_ADDR_ENDP2(uint8_t &ADDRESS, uint8_t &ENDPOINT,
bool &INTEP_DIR, bool &INTEP_PREAMBLE) volatile
{
uint32_t curr = ADDR_ENDP2;
ADDRESS = (curr >> 0u) & 0b1111111u;
ENDPOINT = (curr >> 16u) & 0b1111u;
INTEP_DIR = curr & (1u << 25u);
INTEP_PREAMBLE = curr & (1u << 26u);
}
inline void set_ADDR_ENDP2(uint8_t ADDRESS, uint8_t ENDPOINT,
bool INTEP_DIR, bool INTEP_PREAMBLE) volatile
{
uint32_t curr = ADDR_ENDP2;
curr &= ~(0b1111111u << 0u);
curr |= (ADDRESS & 0b1111111u) << 0u;
curr &= ~(0b1111u << 16u);
curr |= (ENDPOINT & 0b1111u) << 16u;
curr &= ~(0b1u << 25u);
curr |= (INTEP_DIR & 0b1u) << 25u;
curr &= ~(0b1u << 26u);
curr |= (INTEP_PREAMBLE & 0b1u) << 26u;
ADDR_ENDP2 = curr;
}
inline uint8_t get_ADDR_ENDP3_ADDRESS() volatile
{
return (ADDR_ENDP3 >> 0u) & 0b1111111u;
}
inline void set_ADDR_ENDP3_ADDRESS(uint8_t value) volatile
{
uint32_t curr = ADDR_ENDP3;
curr &= ~(0b1111111u << 0u);
curr |= (value & 0b1111111u) << 0u;
ADDR_ENDP3 = curr;
}
inline uint8_t get_ADDR_ENDP3_ENDPOINT() volatile
{
return (ADDR_ENDP3 >> 16u) & 0b1111u;
}
inline void set_ADDR_ENDP3_ENDPOINT(uint8_t value) volatile
{
uint32_t curr = ADDR_ENDP3;
curr &= ~(0b1111u << 16u);
curr |= (value & 0b1111u) << 16u;
ADDR_ENDP3 = curr;
}
inline bool get_ADDR_ENDP3_INTEP_DIR() volatile
{
return ADDR_ENDP3 & (1u << 25u);
}
inline void set_ADDR_ENDP3_INTEP_DIR() volatile
{
ADDR_ENDP3 |= 1u << 25u;
}
inline void clear_ADDR_ENDP3_INTEP_DIR() volatile
{
ADDR_ENDP3 &= ~(1u << 25u);
}
inline void toggle_ADDR_ENDP3_INTEP_DIR() volatile
{
ADDR_ENDP3 ^= 1u << 25u;
}
inline bool get_ADDR_ENDP3_INTEP_PREAMBLE() volatile
{
return ADDR_ENDP3 & (1u << 26u);
}
inline void set_ADDR_ENDP3_INTEP_PREAMBLE() volatile
{
ADDR_ENDP3 |= 1u << 26u;
}
inline void clear_ADDR_ENDP3_INTEP_PREAMBLE() volatile
{
ADDR_ENDP3 &= ~(1u << 26u);
}
inline void toggle_ADDR_ENDP3_INTEP_PREAMBLE() volatile
{
ADDR_ENDP3 ^= 1u << 26u;
}
inline void get_ADDR_ENDP3(uint8_t &ADDRESS, uint8_t &ENDPOINT,
bool &INTEP_DIR, bool &INTEP_PREAMBLE) volatile
{
uint32_t curr = ADDR_ENDP3;
ADDRESS = (curr >> 0u) & 0b1111111u;
ENDPOINT = (curr >> 16u) & 0b1111u;
INTEP_DIR = curr & (1u << 25u);
INTEP_PREAMBLE = curr & (1u << 26u);
}
inline void set_ADDR_ENDP3(uint8_t ADDRESS, uint8_t ENDPOINT,
bool INTEP_DIR, bool INTEP_PREAMBLE) volatile
{
uint32_t curr = ADDR_ENDP3;
curr &= ~(0b1111111u << 0u);
curr |= (ADDRESS & 0b1111111u) << 0u;
curr &= ~(0b1111u << 16u);
curr |= (ENDPOINT & 0b1111u) << 16u;
curr &= ~(0b1u << 25u);
curr |= (INTEP_DIR & 0b1u) << 25u;
curr &= ~(0b1u << 26u);
curr |= (INTEP_PREAMBLE & 0b1u) << 26u;
ADDR_ENDP3 = curr;
}
inline uint8_t get_ADDR_ENDP4_ADDRESS() volatile
{
return (ADDR_ENDP4 >> 0u) & 0b1111111u;
}
inline void set_ADDR_ENDP4_ADDRESS(uint8_t value) volatile
{
uint32_t curr = ADDR_ENDP4;
curr &= ~(0b1111111u << 0u);
curr |= (value & 0b1111111u) << 0u;
ADDR_ENDP4 = curr;
}
inline uint8_t get_ADDR_ENDP4_ENDPOINT() volatile
{
return (ADDR_ENDP4 >> 16u) & 0b1111u;
}
inline void set_ADDR_ENDP4_ENDPOINT(uint8_t value) volatile
{
uint32_t curr = ADDR_ENDP4;
curr &= ~(0b1111u << 16u);
curr |= (value & 0b1111u) << 16u;
ADDR_ENDP4 = curr;
}
inline bool get_ADDR_ENDP4_INTEP_DIR() volatile
{
return ADDR_ENDP4 & (1u << 25u);
}
inline void set_ADDR_ENDP4_INTEP_DIR() volatile
{
ADDR_ENDP4 |= 1u << 25u;
}
inline void clear_ADDR_ENDP4_INTEP_DIR() volatile
{
ADDR_ENDP4 &= ~(1u << 25u);
}
inline void toggle_ADDR_ENDP4_INTEP_DIR() volatile
{
ADDR_ENDP4 ^= 1u << 25u;
}
inline bool get_ADDR_ENDP4_INTEP_PREAMBLE() volatile
{
return ADDR_ENDP4 & (1u << 26u);
}
inline void set_ADDR_ENDP4_INTEP_PREAMBLE() volatile
{
ADDR_ENDP4 |= 1u << 26u;
}
inline void clear_ADDR_ENDP4_INTEP_PREAMBLE() volatile
{
ADDR_ENDP4 &= ~(1u << 26u);
}
inline void toggle_ADDR_ENDP4_INTEP_PREAMBLE() volatile
{
ADDR_ENDP4 ^= 1u << 26u;
}
inline void get_ADDR_ENDP4(uint8_t &ADDRESS, uint8_t &ENDPOINT,
bool &INTEP_DIR, bool &INTEP_PREAMBLE) volatile
{
uint32_t curr = ADDR_ENDP4;
ADDRESS = (curr >> 0u) & 0b1111111u;
ENDPOINT = (curr >> 16u) & 0b1111u;
INTEP_DIR = curr & (1u << 25u);
INTEP_PREAMBLE = curr & (1u << 26u);
}
inline void set_ADDR_ENDP4(uint8_t ADDRESS, uint8_t ENDPOINT,
bool INTEP_DIR, bool INTEP_PREAMBLE) volatile
{
uint32_t curr = ADDR_ENDP4;
curr &= ~(0b1111111u << 0u);
curr |= (ADDRESS & 0b1111111u) << 0u;
curr &= ~(0b1111u << 16u);
curr |= (ENDPOINT & 0b1111u) << 16u;
curr &= ~(0b1u << 25u);
curr |= (INTEP_DIR & 0b1u) << 25u;
curr &= ~(0b1u << 26u);
curr |= (INTEP_PREAMBLE & 0b1u) << 26u;
ADDR_ENDP4 = curr;
}
inline uint8_t get_ADDR_ENDP5_ADDRESS() volatile
{
return (ADDR_ENDP5 >> 0u) & 0b1111111u;
}
inline void set_ADDR_ENDP5_ADDRESS(uint8_t value) volatile
{
uint32_t curr = ADDR_ENDP5;
curr &= ~(0b1111111u << 0u);
curr |= (value & 0b1111111u) << 0u;
ADDR_ENDP5 = curr;
}
inline uint8_t get_ADDR_ENDP5_ENDPOINT() volatile
{
return (ADDR_ENDP5 >> 16u) & 0b1111u;
}
inline void set_ADDR_ENDP5_ENDPOINT(uint8_t value) volatile
{
uint32_t curr = ADDR_ENDP5;
curr &= ~(0b1111u << 16u);
curr |= (value & 0b1111u) << 16u;
ADDR_ENDP5 = curr;
}
inline bool get_ADDR_ENDP5_INTEP_DIR() volatile
{
return ADDR_ENDP5 & (1u << 25u);
}
inline void set_ADDR_ENDP5_INTEP_DIR() volatile
{
ADDR_ENDP5 |= 1u << 25u;
}
inline void clear_ADDR_ENDP5_INTEP_DIR() volatile
{
ADDR_ENDP5 &= ~(1u << 25u);
}
inline void toggle_ADDR_ENDP5_INTEP_DIR() volatile
{
ADDR_ENDP5 ^= 1u << 25u;
}
inline bool get_ADDR_ENDP5_INTEP_PREAMBLE() volatile
{
return ADDR_ENDP5 & (1u << 26u);
}
inline void set_ADDR_ENDP5_INTEP_PREAMBLE() volatile
{
ADDR_ENDP5 |= 1u << 26u;
}
inline void clear_ADDR_ENDP5_INTEP_PREAMBLE() volatile
{
ADDR_ENDP5 &= ~(1u << 26u);
}
inline void toggle_ADDR_ENDP5_INTEP_PREAMBLE() volatile
{
ADDR_ENDP5 ^= 1u << 26u;
}
inline void get_ADDR_ENDP5(uint8_t &ADDRESS, uint8_t &ENDPOINT,
bool &INTEP_DIR, bool &INTEP_PREAMBLE) volatile
{
uint32_t curr = ADDR_ENDP5;
ADDRESS = (curr >> 0u) & 0b1111111u;
ENDPOINT = (curr >> 16u) & 0b1111u;
INTEP_DIR = curr & (1u << 25u);
INTEP_PREAMBLE = curr & (1u << 26u);
}
inline void set_ADDR_ENDP5(uint8_t ADDRESS, uint8_t ENDPOINT,
bool INTEP_DIR, bool INTEP_PREAMBLE) volatile
{
uint32_t curr = ADDR_ENDP5;
curr &= ~(0b1111111u << 0u);
curr |= (ADDRESS & 0b1111111u) << 0u;
curr &= ~(0b1111u << 16u);
curr |= (ENDPOINT & 0b1111u) << 16u;
curr &= ~(0b1u << 25u);
curr |= (INTEP_DIR & 0b1u) << 25u;
curr &= ~(0b1u << 26u);
curr |= (INTEP_PREAMBLE & 0b1u) << 26u;
ADDR_ENDP5 = curr;
}
inline uint8_t get_ADDR_ENDP6_ADDRESS() volatile
{
return (ADDR_ENDP6 >> 0u) & 0b1111111u;
}
inline void set_ADDR_ENDP6_ADDRESS(uint8_t value) volatile
{
uint32_t curr = ADDR_ENDP6;
curr &= ~(0b1111111u << 0u);
curr |= (value & 0b1111111u) << 0u;
ADDR_ENDP6 = curr;
}
inline uint8_t get_ADDR_ENDP6_ENDPOINT() volatile
{
return (ADDR_ENDP6 >> 16u) & 0b1111u;
}
inline void set_ADDR_ENDP6_ENDPOINT(uint8_t value) volatile
{
uint32_t curr = ADDR_ENDP6;
curr &= ~(0b1111u << 16u);
curr |= (value & 0b1111u) << 16u;
ADDR_ENDP6 = curr;
}
inline bool get_ADDR_ENDP6_INTEP_DIR() volatile
{
return ADDR_ENDP6 & (1u << 25u);
}
inline void set_ADDR_ENDP6_INTEP_DIR() volatile
{
ADDR_ENDP6 |= 1u << 25u;
}
inline void clear_ADDR_ENDP6_INTEP_DIR() volatile
{
ADDR_ENDP6 &= ~(1u << 25u);
}
inline void toggle_ADDR_ENDP6_INTEP_DIR() volatile
{
ADDR_ENDP6 ^= 1u << 25u;
}
inline bool get_ADDR_ENDP6_INTEP_PREAMBLE() volatile
{
return ADDR_ENDP6 & (1u << 26u);
}
inline void set_ADDR_ENDP6_INTEP_PREAMBLE() volatile
{
ADDR_ENDP6 |= 1u << 26u;
}
inline void clear_ADDR_ENDP6_INTEP_PREAMBLE() volatile
{
ADDR_ENDP6 &= ~(1u << 26u);
}
inline void toggle_ADDR_ENDP6_INTEP_PREAMBLE() volatile
{
ADDR_ENDP6 ^= 1u << 26u;
}
inline void get_ADDR_ENDP6(uint8_t &ADDRESS, uint8_t &ENDPOINT,
bool &INTEP_DIR, bool &INTEP_PREAMBLE) volatile
{
uint32_t curr = ADDR_ENDP6;
ADDRESS = (curr >> 0u) & 0b1111111u;
ENDPOINT = (curr >> 16u) & 0b1111u;
INTEP_DIR = curr & (1u << 25u);
INTEP_PREAMBLE = curr & (1u << 26u);
}
inline void set_ADDR_ENDP6(uint8_t ADDRESS, uint8_t ENDPOINT,
bool INTEP_DIR, bool INTEP_PREAMBLE) volatile
{
uint32_t curr = ADDR_ENDP6;
curr &= ~(0b1111111u << 0u);
curr |= (ADDRESS & 0b1111111u) << 0u;
curr &= ~(0b1111u << 16u);
curr |= (ENDPOINT & 0b1111u) << 16u;
curr &= ~(0b1u << 25u);
curr |= (INTEP_DIR & 0b1u) << 25u;
curr &= ~(0b1u << 26u);
curr |= (INTEP_PREAMBLE & 0b1u) << 26u;
ADDR_ENDP6 = curr;
}
inline uint8_t get_ADDR_ENDP7_ADDRESS() volatile
{
return (ADDR_ENDP7 >> 0u) & 0b1111111u;
}
inline void set_ADDR_ENDP7_ADDRESS(uint8_t value) volatile
{
uint32_t curr = ADDR_ENDP7;
curr &= ~(0b1111111u << 0u);
curr |= (value & 0b1111111u) << 0u;
ADDR_ENDP7 = curr;
}
inline uint8_t get_ADDR_ENDP7_ENDPOINT() volatile
{
return (ADDR_ENDP7 >> 16u) & 0b1111u;
}
inline void set_ADDR_ENDP7_ENDPOINT(uint8_t value) volatile
{
uint32_t curr = ADDR_ENDP7;
curr &= ~(0b1111u << 16u);
curr |= (value & 0b1111u) << 16u;
ADDR_ENDP7 = curr;
}
inline bool get_ADDR_ENDP7_INTEP_DIR() volatile
{
return ADDR_ENDP7 & (1u << 25u);
}
inline void set_ADDR_ENDP7_INTEP_DIR() volatile
{
ADDR_ENDP7 |= 1u << 25u;
}
inline void clear_ADDR_ENDP7_INTEP_DIR() volatile
{
ADDR_ENDP7 &= ~(1u << 25u);
}
inline void toggle_ADDR_ENDP7_INTEP_DIR() volatile
{
ADDR_ENDP7 ^= 1u << 25u;
}
inline bool get_ADDR_ENDP7_INTEP_PREAMBLE() volatile
{
return ADDR_ENDP7 & (1u << 26u);
}
inline void set_ADDR_ENDP7_INTEP_PREAMBLE() volatile
{
ADDR_ENDP7 |= 1u << 26u;
}
inline void clear_ADDR_ENDP7_INTEP_PREAMBLE() volatile
{
ADDR_ENDP7 &= ~(1u << 26u);
}
inline void toggle_ADDR_ENDP7_INTEP_PREAMBLE() volatile
{
ADDR_ENDP7 ^= 1u << 26u;
}
inline void get_ADDR_ENDP7(uint8_t &ADDRESS, uint8_t &ENDPOINT,
bool &INTEP_DIR, bool &INTEP_PREAMBLE) volatile
{
uint32_t curr = ADDR_ENDP7;
ADDRESS = (curr >> 0u) & 0b1111111u;
ENDPOINT = (curr >> 16u) & 0b1111u;
INTEP_DIR = curr & (1u << 25u);
INTEP_PREAMBLE = curr & (1u << 26u);
}
inline void set_ADDR_ENDP7(uint8_t ADDRESS, uint8_t ENDPOINT,
bool INTEP_DIR, bool INTEP_PREAMBLE) volatile
{
uint32_t curr = ADDR_ENDP7;
curr &= ~(0b1111111u << 0u);
curr |= (ADDRESS & 0b1111111u) << 0u;
curr &= ~(0b1111u << 16u);
curr |= (ENDPOINT & 0b1111u) << 16u;
curr &= ~(0b1u << 25u);
curr |= (INTEP_DIR & 0b1u) << 25u;
curr &= ~(0b1u << 26u);
curr |= (INTEP_PREAMBLE & 0b1u) << 26u;
ADDR_ENDP7 = curr;
}
inline uint8_t get_ADDR_ENDP8_ADDRESS() volatile
{
return (ADDR_ENDP8 >> 0u) & 0b1111111u;
}
inline void set_ADDR_ENDP8_ADDRESS(uint8_t value) volatile
{
uint32_t curr = ADDR_ENDP8;
curr &= ~(0b1111111u << 0u);
curr |= (value & 0b1111111u) << 0u;
ADDR_ENDP8 = curr;
}
inline uint8_t get_ADDR_ENDP8_ENDPOINT() volatile
{
return (ADDR_ENDP8 >> 16u) & 0b1111u;
}
inline void set_ADDR_ENDP8_ENDPOINT(uint8_t value) volatile
{
uint32_t curr = ADDR_ENDP8;
curr &= ~(0b1111u << 16u);
curr |= (value & 0b1111u) << 16u;
ADDR_ENDP8 = curr;
}
inline bool get_ADDR_ENDP8_INTEP_DIR() volatile
{
return ADDR_ENDP8 & (1u << 25u);
}
inline void set_ADDR_ENDP8_INTEP_DIR() volatile
{
ADDR_ENDP8 |= 1u << 25u;
}
inline void clear_ADDR_ENDP8_INTEP_DIR() volatile
{
ADDR_ENDP8 &= ~(1u << 25u);
}
inline void toggle_ADDR_ENDP8_INTEP_DIR() volatile
{
ADDR_ENDP8 ^= 1u << 25u;
}
inline bool get_ADDR_ENDP8_INTEP_PREAMBLE() volatile
{
return ADDR_ENDP8 & (1u << 26u);
}
inline void set_ADDR_ENDP8_INTEP_PREAMBLE() volatile
{
ADDR_ENDP8 |= 1u << 26u;
}
inline void clear_ADDR_ENDP8_INTEP_PREAMBLE() volatile
{
ADDR_ENDP8 &= ~(1u << 26u);
}
inline void toggle_ADDR_ENDP8_INTEP_PREAMBLE() volatile
{
ADDR_ENDP8 ^= 1u << 26u;
}
inline void get_ADDR_ENDP8(uint8_t &ADDRESS, uint8_t &ENDPOINT,
bool &INTEP_DIR, bool &INTEP_PREAMBLE) volatile
{
uint32_t curr = ADDR_ENDP8;
ADDRESS = (curr >> 0u) & 0b1111111u;
ENDPOINT = (curr >> 16u) & 0b1111u;
INTEP_DIR = curr & (1u << 25u);
INTEP_PREAMBLE = curr & (1u << 26u);
}
inline void set_ADDR_ENDP8(uint8_t ADDRESS, uint8_t ENDPOINT,
bool INTEP_DIR, bool INTEP_PREAMBLE) volatile
{
uint32_t curr = ADDR_ENDP8;
curr &= ~(0b1111111u << 0u);
curr |= (ADDRESS & 0b1111111u) << 0u;
curr &= ~(0b1111u << 16u);
curr |= (ENDPOINT & 0b1111u) << 16u;
curr &= ~(0b1u << 25u);
curr |= (INTEP_DIR & 0b1u) << 25u;
curr &= ~(0b1u << 26u);
curr |= (INTEP_PREAMBLE & 0b1u) << 26u;
ADDR_ENDP8 = curr;
}
inline uint8_t get_ADDR_ENDP9_ADDRESS() volatile
{
return (ADDR_ENDP9 >> 0u) & 0b1111111u;
}
inline void set_ADDR_ENDP9_ADDRESS(uint8_t value) volatile
{
uint32_t curr = ADDR_ENDP9;
curr &= ~(0b1111111u << 0u);
curr |= (value & 0b1111111u) << 0u;
ADDR_ENDP9 = curr;
}
inline uint8_t get_ADDR_ENDP9_ENDPOINT() volatile
{
return (ADDR_ENDP9 >> 16u) & 0b1111u;
}
inline void set_ADDR_ENDP9_ENDPOINT(uint8_t value) volatile
{
uint32_t curr = ADDR_ENDP9;
curr &= ~(0b1111u << 16u);
curr |= (value & 0b1111u) << 16u;
ADDR_ENDP9 = curr;
}
inline bool get_ADDR_ENDP9_INTEP_DIR() volatile
{
return ADDR_ENDP9 & (1u << 25u);
}
inline void set_ADDR_ENDP9_INTEP_DIR() volatile
{
ADDR_ENDP9 |= 1u << 25u;
}
inline void clear_ADDR_ENDP9_INTEP_DIR() volatile
{
ADDR_ENDP9 &= ~(1u << 25u);
}
inline void toggle_ADDR_ENDP9_INTEP_DIR() volatile
{
ADDR_ENDP9 ^= 1u << 25u;
}
inline bool get_ADDR_ENDP9_INTEP_PREAMBLE() volatile
{
return ADDR_ENDP9 & (1u << 26u);
}
inline void set_ADDR_ENDP9_INTEP_PREAMBLE() volatile
{
ADDR_ENDP9 |= 1u << 26u;
}
inline void clear_ADDR_ENDP9_INTEP_PREAMBLE() volatile
{
ADDR_ENDP9 &= ~(1u << 26u);
}
inline void toggle_ADDR_ENDP9_INTEP_PREAMBLE() volatile
{
ADDR_ENDP9 ^= 1u << 26u;
}
inline void get_ADDR_ENDP9(uint8_t &ADDRESS, uint8_t &ENDPOINT,
bool &INTEP_DIR, bool &INTEP_PREAMBLE) volatile
{
uint32_t curr = ADDR_ENDP9;
ADDRESS = (curr >> 0u) & 0b1111111u;
ENDPOINT = (curr >> 16u) & 0b1111u;
INTEP_DIR = curr & (1u << 25u);
INTEP_PREAMBLE = curr & (1u << 26u);
}
inline void set_ADDR_ENDP9(uint8_t ADDRESS, uint8_t ENDPOINT,
bool INTEP_DIR, bool INTEP_PREAMBLE) volatile
{
uint32_t curr = ADDR_ENDP9;
curr &= ~(0b1111111u << 0u);
curr |= (ADDRESS & 0b1111111u) << 0u;
curr &= ~(0b1111u << 16u);
curr |= (ENDPOINT & 0b1111u) << 16u;
curr &= ~(0b1u << 25u);
curr |= (INTEP_DIR & 0b1u) << 25u;
curr &= ~(0b1u << 26u);
curr |= (INTEP_PREAMBLE & 0b1u) << 26u;
ADDR_ENDP9 = curr;
}
inline uint8_t get_ADDR_ENDP10_ADDRESS() volatile
{
return (ADDR_ENDP10 >> 0u) & 0b1111111u;
}
inline void set_ADDR_ENDP10_ADDRESS(uint8_t value) volatile
{
uint32_t curr = ADDR_ENDP10;
curr &= ~(0b1111111u << 0u);
curr |= (value & 0b1111111u) << 0u;
ADDR_ENDP10 = curr;
}
inline uint8_t get_ADDR_ENDP10_ENDPOINT() volatile
{
return (ADDR_ENDP10 >> 16u) & 0b1111u;
}
inline void set_ADDR_ENDP10_ENDPOINT(uint8_t value) volatile
{
uint32_t curr = ADDR_ENDP10;
curr &= ~(0b1111u << 16u);
curr |= (value & 0b1111u) << 16u;
ADDR_ENDP10 = curr;
}
inline bool get_ADDR_ENDP10_INTEP_DIR() volatile
{
return ADDR_ENDP10 & (1u << 25u);
}
inline void set_ADDR_ENDP10_INTEP_DIR() volatile
{
ADDR_ENDP10 |= 1u << 25u;
}
inline void clear_ADDR_ENDP10_INTEP_DIR() volatile
{
ADDR_ENDP10 &= ~(1u << 25u);
}
inline void toggle_ADDR_ENDP10_INTEP_DIR() volatile
{
ADDR_ENDP10 ^= 1u << 25u;
}
inline bool get_ADDR_ENDP10_INTEP_PREAMBLE() volatile
{
return ADDR_ENDP10 & (1u << 26u);
}
inline void set_ADDR_ENDP10_INTEP_PREAMBLE() volatile
{
ADDR_ENDP10 |= 1u << 26u;
}
inline void clear_ADDR_ENDP10_INTEP_PREAMBLE() volatile
{
ADDR_ENDP10 &= ~(1u << 26u);
}
inline void toggle_ADDR_ENDP10_INTEP_PREAMBLE() volatile
{
ADDR_ENDP10 ^= 1u << 26u;
}
inline void get_ADDR_ENDP10(uint8_t &ADDRESS, uint8_t &ENDPOINT,
bool &INTEP_DIR, bool &INTEP_PREAMBLE) volatile
{
uint32_t curr = ADDR_ENDP10;
ADDRESS = (curr >> 0u) & 0b1111111u;
ENDPOINT = (curr >> 16u) & 0b1111u;
INTEP_DIR = curr & (1u << 25u);
INTEP_PREAMBLE = curr & (1u << 26u);
}
inline void set_ADDR_ENDP10(uint8_t ADDRESS, uint8_t ENDPOINT,
bool INTEP_DIR, bool INTEP_PREAMBLE) volatile
{
uint32_t curr = ADDR_ENDP10;
curr &= ~(0b1111111u << 0u);
curr |= (ADDRESS & 0b1111111u) << 0u;
curr &= ~(0b1111u << 16u);
curr |= (ENDPOINT & 0b1111u) << 16u;
curr &= ~(0b1u << 25u);
curr |= (INTEP_DIR & 0b1u) << 25u;
curr &= ~(0b1u << 26u);
curr |= (INTEP_PREAMBLE & 0b1u) << 26u;
ADDR_ENDP10 = curr;
}
inline uint8_t get_ADDR_ENDP11_ADDRESS() volatile
{
return (ADDR_ENDP11 >> 0u) & 0b1111111u;
}
inline void set_ADDR_ENDP11_ADDRESS(uint8_t value) volatile
{
uint32_t curr = ADDR_ENDP11;
curr &= ~(0b1111111u << 0u);
curr |= (value & 0b1111111u) << 0u;
ADDR_ENDP11 = curr;
}
inline uint8_t get_ADDR_ENDP11_ENDPOINT() volatile
{
return (ADDR_ENDP11 >> 16u) & 0b1111u;
}
inline void set_ADDR_ENDP11_ENDPOINT(uint8_t value) volatile
{
uint32_t curr = ADDR_ENDP11;
curr &= ~(0b1111u << 16u);
curr |= (value & 0b1111u) << 16u;
ADDR_ENDP11 = curr;
}
inline bool get_ADDR_ENDP11_INTEP_DIR() volatile
{
return ADDR_ENDP11 & (1u << 25u);
}
inline void set_ADDR_ENDP11_INTEP_DIR() volatile
{
ADDR_ENDP11 |= 1u << 25u;
}
inline void clear_ADDR_ENDP11_INTEP_DIR() volatile
{
ADDR_ENDP11 &= ~(1u << 25u);
}
inline void toggle_ADDR_ENDP11_INTEP_DIR() volatile
{
ADDR_ENDP11 ^= 1u << 25u;
}
inline bool get_ADDR_ENDP11_INTEP_PREAMBLE() volatile
{
return ADDR_ENDP11 & (1u << 26u);
}
inline void set_ADDR_ENDP11_INTEP_PREAMBLE() volatile
{
ADDR_ENDP11 |= 1u << 26u;
}
inline void clear_ADDR_ENDP11_INTEP_PREAMBLE() volatile
{
ADDR_ENDP11 &= ~(1u << 26u);
}
inline void toggle_ADDR_ENDP11_INTEP_PREAMBLE() volatile
{
ADDR_ENDP11 ^= 1u << 26u;
}
inline void get_ADDR_ENDP11(uint8_t &ADDRESS, uint8_t &ENDPOINT,
bool &INTEP_DIR, bool &INTEP_PREAMBLE) volatile
{
uint32_t curr = ADDR_ENDP11;
ADDRESS = (curr >> 0u) & 0b1111111u;
ENDPOINT = (curr >> 16u) & 0b1111u;
INTEP_DIR = curr & (1u << 25u);
INTEP_PREAMBLE = curr & (1u << 26u);
}
inline void set_ADDR_ENDP11(uint8_t ADDRESS, uint8_t ENDPOINT,
bool INTEP_DIR, bool INTEP_PREAMBLE) volatile
{
uint32_t curr = ADDR_ENDP11;
curr &= ~(0b1111111u << 0u);
curr |= (ADDRESS & 0b1111111u) << 0u;
curr &= ~(0b1111u << 16u);
curr |= (ENDPOINT & 0b1111u) << 16u;
curr &= ~(0b1u << 25u);
curr |= (INTEP_DIR & 0b1u) << 25u;
curr &= ~(0b1u << 26u);
curr |= (INTEP_PREAMBLE & 0b1u) << 26u;
ADDR_ENDP11 = curr;
}
inline uint8_t get_ADDR_ENDP12_ADDRESS() volatile
{
return (ADDR_ENDP12 >> 0u) & 0b1111111u;
}
inline void set_ADDR_ENDP12_ADDRESS(uint8_t value) volatile
{
uint32_t curr = ADDR_ENDP12;
curr &= ~(0b1111111u << 0u);
curr |= (value & 0b1111111u) << 0u;
ADDR_ENDP12 = curr;
}
inline uint8_t get_ADDR_ENDP12_ENDPOINT() volatile
{
return (ADDR_ENDP12 >> 16u) & 0b1111u;
}
inline void set_ADDR_ENDP12_ENDPOINT(uint8_t value) volatile
{
uint32_t curr = ADDR_ENDP12;
curr &= ~(0b1111u << 16u);
curr |= (value & 0b1111u) << 16u;
ADDR_ENDP12 = curr;
}
inline bool get_ADDR_ENDP12_INTEP_DIR() volatile
{
return ADDR_ENDP12 & (1u << 25u);
}
inline void set_ADDR_ENDP12_INTEP_DIR() volatile
{
ADDR_ENDP12 |= 1u << 25u;
}
inline void clear_ADDR_ENDP12_INTEP_DIR() volatile
{
ADDR_ENDP12 &= ~(1u << 25u);
}
inline void toggle_ADDR_ENDP12_INTEP_DIR() volatile
{
ADDR_ENDP12 ^= 1u << 25u;
}
inline bool get_ADDR_ENDP12_INTEP_PREAMBLE() volatile
{
return ADDR_ENDP12 & (1u << 26u);
}
inline void set_ADDR_ENDP12_INTEP_PREAMBLE() volatile
{
ADDR_ENDP12 |= 1u << 26u;
}
inline void clear_ADDR_ENDP12_INTEP_PREAMBLE() volatile
{
ADDR_ENDP12 &= ~(1u << 26u);
}
inline void toggle_ADDR_ENDP12_INTEP_PREAMBLE() volatile
{
ADDR_ENDP12 ^= 1u << 26u;
}
inline void get_ADDR_ENDP12(uint8_t &ADDRESS, uint8_t &ENDPOINT,
bool &INTEP_DIR, bool &INTEP_PREAMBLE) volatile
{
uint32_t curr = ADDR_ENDP12;
ADDRESS = (curr >> 0u) & 0b1111111u;
ENDPOINT = (curr >> 16u) & 0b1111u;
INTEP_DIR = curr & (1u << 25u);
INTEP_PREAMBLE = curr & (1u << 26u);
}
inline void set_ADDR_ENDP12(uint8_t ADDRESS, uint8_t ENDPOINT,
bool INTEP_DIR, bool INTEP_PREAMBLE) volatile
{
uint32_t curr = ADDR_ENDP12;
curr &= ~(0b1111111u << 0u);
curr |= (ADDRESS & 0b1111111u) << 0u;
curr &= ~(0b1111u << 16u);
curr |= (ENDPOINT & 0b1111u) << 16u;
curr &= ~(0b1u << 25u);
curr |= (INTEP_DIR & 0b1u) << 25u;
curr &= ~(0b1u << 26u);
curr |= (INTEP_PREAMBLE & 0b1u) << 26u;
ADDR_ENDP12 = curr;
}
inline uint8_t get_ADDR_ENDP13_ADDRESS() volatile
{
return (ADDR_ENDP13 >> 0u) & 0b1111111u;
}
inline void set_ADDR_ENDP13_ADDRESS(uint8_t value) volatile
{
uint32_t curr = ADDR_ENDP13;
curr &= ~(0b1111111u << 0u);
curr |= (value & 0b1111111u) << 0u;
ADDR_ENDP13 = curr;
}
inline uint8_t get_ADDR_ENDP13_ENDPOINT() volatile
{
return (ADDR_ENDP13 >> 16u) & 0b1111u;
}
inline void set_ADDR_ENDP13_ENDPOINT(uint8_t value) volatile
{
uint32_t curr = ADDR_ENDP13;
curr &= ~(0b1111u << 16u);
curr |= (value & 0b1111u) << 16u;
ADDR_ENDP13 = curr;
}
inline bool get_ADDR_ENDP13_INTEP_DIR() volatile
{
return ADDR_ENDP13 & (1u << 25u);
}
inline void set_ADDR_ENDP13_INTEP_DIR() volatile
{
ADDR_ENDP13 |= 1u << 25u;
}
inline void clear_ADDR_ENDP13_INTEP_DIR() volatile
{
ADDR_ENDP13 &= ~(1u << 25u);
}
inline void toggle_ADDR_ENDP13_INTEP_DIR() volatile
{
ADDR_ENDP13 ^= 1u << 25u;
}
inline bool get_ADDR_ENDP13_INTEP_PREAMBLE() volatile
{
return ADDR_ENDP13 & (1u << 26u);
}
inline void set_ADDR_ENDP13_INTEP_PREAMBLE() volatile
{
ADDR_ENDP13 |= 1u << 26u;
}
inline void clear_ADDR_ENDP13_INTEP_PREAMBLE() volatile
{
ADDR_ENDP13 &= ~(1u << 26u);
}
inline void toggle_ADDR_ENDP13_INTEP_PREAMBLE() volatile
{
ADDR_ENDP13 ^= 1u << 26u;
}
inline void get_ADDR_ENDP13(uint8_t &ADDRESS, uint8_t &ENDPOINT,
bool &INTEP_DIR, bool &INTEP_PREAMBLE) volatile
{
uint32_t curr = ADDR_ENDP13;
ADDRESS = (curr >> 0u) & 0b1111111u;
ENDPOINT = (curr >> 16u) & 0b1111u;
INTEP_DIR = curr & (1u << 25u);
INTEP_PREAMBLE = curr & (1u << 26u);
}
inline void set_ADDR_ENDP13(uint8_t ADDRESS, uint8_t ENDPOINT,
bool INTEP_DIR, bool INTEP_PREAMBLE) volatile
{
uint32_t curr = ADDR_ENDP13;
curr &= ~(0b1111111u << 0u);
curr |= (ADDRESS & 0b1111111u) << 0u;
curr &= ~(0b1111u << 16u);
curr |= (ENDPOINT & 0b1111u) << 16u;
curr &= ~(0b1u << 25u);
curr |= (INTEP_DIR & 0b1u) << 25u;
curr &= ~(0b1u << 26u);
curr |= (INTEP_PREAMBLE & 0b1u) << 26u;
ADDR_ENDP13 = curr;
}
inline uint8_t get_ADDR_ENDP14_ADDRESS() volatile
{
return (ADDR_ENDP14 >> 0u) & 0b1111111u;
}
inline void set_ADDR_ENDP14_ADDRESS(uint8_t value) volatile
{
uint32_t curr = ADDR_ENDP14;
curr &= ~(0b1111111u << 0u);
curr |= (value & 0b1111111u) << 0u;
ADDR_ENDP14 = curr;
}
inline uint8_t get_ADDR_ENDP14_ENDPOINT() volatile
{
return (ADDR_ENDP14 >> 16u) & 0b1111u;
}
inline void set_ADDR_ENDP14_ENDPOINT(uint8_t value) volatile
{
uint32_t curr = ADDR_ENDP14;
curr &= ~(0b1111u << 16u);
curr |= (value & 0b1111u) << 16u;
ADDR_ENDP14 = curr;
}
inline bool get_ADDR_ENDP14_INTEP_DIR() volatile
{
return ADDR_ENDP14 & (1u << 25u);
}
inline void set_ADDR_ENDP14_INTEP_DIR() volatile
{
ADDR_ENDP14 |= 1u << 25u;
}
inline void clear_ADDR_ENDP14_INTEP_DIR() volatile
{
ADDR_ENDP14 &= ~(1u << 25u);
}
inline void toggle_ADDR_ENDP14_INTEP_DIR() volatile
{
ADDR_ENDP14 ^= 1u << 25u;
}
inline bool get_ADDR_ENDP14_INTEP_PREAMBLE() volatile
{
return ADDR_ENDP14 & (1u << 26u);
}
inline void set_ADDR_ENDP14_INTEP_PREAMBLE() volatile
{
ADDR_ENDP14 |= 1u << 26u;
}
inline void clear_ADDR_ENDP14_INTEP_PREAMBLE() volatile
{
ADDR_ENDP14 &= ~(1u << 26u);
}
inline void toggle_ADDR_ENDP14_INTEP_PREAMBLE() volatile
{
ADDR_ENDP14 ^= 1u << 26u;
}
inline void get_ADDR_ENDP14(uint8_t &ADDRESS, uint8_t &ENDPOINT,
bool &INTEP_DIR, bool &INTEP_PREAMBLE) volatile
{
uint32_t curr = ADDR_ENDP14;
ADDRESS = (curr >> 0u) & 0b1111111u;
ENDPOINT = (curr >> 16u) & 0b1111u;
INTEP_DIR = curr & (1u << 25u);
INTEP_PREAMBLE = curr & (1u << 26u);
}
inline void set_ADDR_ENDP14(uint8_t ADDRESS, uint8_t ENDPOINT,
bool INTEP_DIR, bool INTEP_PREAMBLE) volatile
{
uint32_t curr = ADDR_ENDP14;
curr &= ~(0b1111111u << 0u);
curr |= (ADDRESS & 0b1111111u) << 0u;
curr &= ~(0b1111u << 16u);
curr |= (ENDPOINT & 0b1111u) << 16u;
curr &= ~(0b1u << 25u);
curr |= (INTEP_DIR & 0b1u) << 25u;
curr &= ~(0b1u << 26u);
curr |= (INTEP_PREAMBLE & 0b1u) << 26u;
ADDR_ENDP14 = curr;
}
inline uint8_t get_ADDR_ENDP15_ADDRESS() volatile
{
return (ADDR_ENDP15 >> 0u) & 0b1111111u;
}
inline void set_ADDR_ENDP15_ADDRESS(uint8_t value) volatile
{
uint32_t curr = ADDR_ENDP15;
curr &= ~(0b1111111u << 0u);
curr |= (value & 0b1111111u) << 0u;
ADDR_ENDP15 = curr;
}
inline uint8_t get_ADDR_ENDP15_ENDPOINT() volatile
{
return (ADDR_ENDP15 >> 16u) & 0b1111u;
}
inline void set_ADDR_ENDP15_ENDPOINT(uint8_t value) volatile
{
uint32_t curr = ADDR_ENDP15;
curr &= ~(0b1111u << 16u);
curr |= (value & 0b1111u) << 16u;
ADDR_ENDP15 = curr;
}
inline bool get_ADDR_ENDP15_INTEP_DIR() volatile
{
return ADDR_ENDP15 & (1u << 25u);
}
inline void set_ADDR_ENDP15_INTEP_DIR() volatile
{
ADDR_ENDP15 |= 1u << 25u;
}
inline void clear_ADDR_ENDP15_INTEP_DIR() volatile
{
ADDR_ENDP15 &= ~(1u << 25u);
}
inline void toggle_ADDR_ENDP15_INTEP_DIR() volatile
{
ADDR_ENDP15 ^= 1u << 25u;
}
inline bool get_ADDR_ENDP15_INTEP_PREAMBLE() volatile
{
return ADDR_ENDP15 & (1u << 26u);
}
inline void set_ADDR_ENDP15_INTEP_PREAMBLE() volatile
{
ADDR_ENDP15 |= 1u << 26u;
}
inline void clear_ADDR_ENDP15_INTEP_PREAMBLE() volatile
{
ADDR_ENDP15 &= ~(1u << 26u);
}
inline void toggle_ADDR_ENDP15_INTEP_PREAMBLE() volatile
{
ADDR_ENDP15 ^= 1u << 26u;
}
inline void get_ADDR_ENDP15(uint8_t &ADDRESS, uint8_t &ENDPOINT,
bool &INTEP_DIR, bool &INTEP_PREAMBLE) volatile
{
uint32_t curr = ADDR_ENDP15;
ADDRESS = (curr >> 0u) & 0b1111111u;
ENDPOINT = (curr >> 16u) & 0b1111u;
INTEP_DIR = curr & (1u << 25u);
INTEP_PREAMBLE = curr & (1u << 26u);
}
inline void set_ADDR_ENDP15(uint8_t ADDRESS, uint8_t ENDPOINT,
bool INTEP_DIR, bool INTEP_PREAMBLE) volatile
{
uint32_t curr = ADDR_ENDP15;
curr &= ~(0b1111111u << 0u);
curr |= (ADDRESS & 0b1111111u) << 0u;
curr &= ~(0b1111u << 16u);
curr |= (ENDPOINT & 0b1111u) << 16u;
curr &= ~(0b1u << 25u);
curr |= (INTEP_DIR & 0b1u) << 25u;
curr &= ~(0b1u << 26u);
curr |= (INTEP_PREAMBLE & 0b1u) << 26u;
ADDR_ENDP15 = curr;
}
inline bool get_MAIN_CTRL_CONTROLLER_EN() volatile
{
return MAIN_CTRL & (1u << 0u);
}
inline void set_MAIN_CTRL_CONTROLLER_EN() volatile
{
MAIN_CTRL |= 1u << 0u;
}
inline void clear_MAIN_CTRL_CONTROLLER_EN() volatile
{
MAIN_CTRL &= ~(1u << 0u);
}
inline void toggle_MAIN_CTRL_CONTROLLER_EN() volatile
{
MAIN_CTRL ^= 1u << 0u;
}
inline bool get_MAIN_CTRL_HOST_NDEVICE() volatile
{
return MAIN_CTRL & (1u << 1u);
}
inline void set_MAIN_CTRL_HOST_NDEVICE() volatile
{
MAIN_CTRL |= 1u << 1u;
}
inline void clear_MAIN_CTRL_HOST_NDEVICE() volatile
{
MAIN_CTRL &= ~(1u << 1u);
}
inline void toggle_MAIN_CTRL_HOST_NDEVICE() volatile
{
MAIN_CTRL ^= 1u << 1u;
}
inline bool get_MAIN_CTRL_SIM_TIMING() volatile
{
return MAIN_CTRL & (1u << 31u);
}
inline void set_MAIN_CTRL_SIM_TIMING() volatile
{
MAIN_CTRL |= 1u << 31u;
}
inline void clear_MAIN_CTRL_SIM_TIMING() volatile
{
MAIN_CTRL &= ~(1u << 31u);
}
inline void toggle_MAIN_CTRL_SIM_TIMING() volatile
{
MAIN_CTRL ^= 1u << 31u;
}
inline void get_MAIN_CTRL(bool &CONTROLLER_EN, bool &HOST_NDEVICE,
bool &SIM_TIMING) volatile
{
uint32_t curr = MAIN_CTRL;
CONTROLLER_EN = curr & (1u << 0u);
HOST_NDEVICE = curr & (1u << 1u);
SIM_TIMING = curr & (1u << 31u);
}
inline void set_MAIN_CTRL(bool CONTROLLER_EN, bool HOST_NDEVICE,
bool SIM_TIMING) volatile
{
uint32_t curr = MAIN_CTRL;
curr &= ~(0b1u << 0u);
curr |= (CONTROLLER_EN & 0b1u) << 0u;
curr &= ~(0b1u << 1u);
curr |= (HOST_NDEVICE & 0b1u) << 1u;
curr &= ~(0b1u << 31u);
curr |= (SIM_TIMING & 0b1u) << 31u;
MAIN_CTRL = curr;
}
inline void set_SOF_WR_COUNT(uint16_t value) volatile
{
uint32_t curr = SOF_WR;
curr &= ~(0b11111111111u << 0u);
curr |= (value & 0b11111111111u) << 0u;
SOF_WR = curr;
}
inline uint16_t get_SOF_RD_COUNT() volatile
{
return (SOF_RD >> 0u) & 0b11111111111u;
}
inline bool get_SIE_CTRL_START_TRANS() volatile
{
return SIE_CTRL & (1u << 0u);
}
inline void set_SIE_CTRL_START_TRANS() volatile
{
SIE_CTRL |= 1u << 0u;
}
inline void clear_SIE_CTRL_START_TRANS() volatile
{
SIE_CTRL &= ~(1u << 0u);
}
inline void toggle_SIE_CTRL_START_TRANS() volatile
{
SIE_CTRL ^= 1u << 0u;
}
inline bool get_SIE_CTRL_SEND_SETUP() volatile
{
return SIE_CTRL & (1u << 1u);
}
inline void set_SIE_CTRL_SEND_SETUP() volatile
{
SIE_CTRL |= 1u << 1u;
}
inline void clear_SIE_CTRL_SEND_SETUP() volatile
{
SIE_CTRL &= ~(1u << 1u);
}
inline void toggle_SIE_CTRL_SEND_SETUP() volatile
{
SIE_CTRL ^= 1u << 1u;
}
inline bool get_SIE_CTRL_SEND_DATA() volatile
{
return SIE_CTRL & (1u << 2u);
}
inline void set_SIE_CTRL_SEND_DATA() volatile
{
SIE_CTRL |= 1u << 2u;
}
inline void clear_SIE_CTRL_SEND_DATA() volatile
{
SIE_CTRL &= ~(1u << 2u);
}
inline void toggle_SIE_CTRL_SEND_DATA() volatile
{
SIE_CTRL ^= 1u << 2u;
}
inline bool get_SIE_CTRL_RECEIVE_DATA() volatile
{
return SIE_CTRL & (1u << 3u);
}
inline void set_SIE_CTRL_RECEIVE_DATA() volatile
{
SIE_CTRL |= 1u << 3u;
}
inline void clear_SIE_CTRL_RECEIVE_DATA() volatile
{
SIE_CTRL &= ~(1u << 3u);
}
inline void toggle_SIE_CTRL_RECEIVE_DATA() volatile
{
SIE_CTRL ^= 1u << 3u;
}
inline bool get_SIE_CTRL_STOP_TRANS() volatile
{
return SIE_CTRL & (1u << 4u);
}
inline void set_SIE_CTRL_STOP_TRANS() volatile
{
SIE_CTRL |= 1u << 4u;
}
inline void clear_SIE_CTRL_STOP_TRANS() volatile
{
SIE_CTRL &= ~(1u << 4u);
}
inline void toggle_SIE_CTRL_STOP_TRANS() volatile
{
SIE_CTRL ^= 1u << 4u;
}
inline bool get_SIE_CTRL_PREAMBLE_EN() volatile
{
return SIE_CTRL & (1u << 6u);
}
inline void set_SIE_CTRL_PREAMBLE_EN() volatile
{
SIE_CTRL |= 1u << 6u;
}
inline void clear_SIE_CTRL_PREAMBLE_EN() volatile
{
SIE_CTRL &= ~(1u << 6u);
}
inline void toggle_SIE_CTRL_PREAMBLE_EN() volatile
{
SIE_CTRL ^= 1u << 6u;
}
inline bool get_SIE_CTRL_SOF_SYNC() volatile
{
return SIE_CTRL & (1u << 8u);
}
inline void set_SIE_CTRL_SOF_SYNC() volatile
{
SIE_CTRL |= 1u << 8u;
}
inline void clear_SIE_CTRL_SOF_SYNC() volatile
{
SIE_CTRL &= ~(1u << 8u);
}
inline void toggle_SIE_CTRL_SOF_SYNC() volatile
{
SIE_CTRL ^= 1u << 8u;
}
inline bool get_SIE_CTRL_SOF_EN() volatile
{
return SIE_CTRL & (1u << 9u);
}
inline void set_SIE_CTRL_SOF_EN() volatile
{
SIE_CTRL |= 1u << 9u;
}
inline void clear_SIE_CTRL_SOF_EN() volatile
{
SIE_CTRL &= ~(1u << 9u);
}
inline void toggle_SIE_CTRL_SOF_EN() volatile
{
SIE_CTRL ^= 1u << 9u;
}
inline bool get_SIE_CTRL_KEEP_ALIVE_EN() volatile
{
return SIE_CTRL & (1u << 10u);
}
inline void set_SIE_CTRL_KEEP_ALIVE_EN() volatile
{
SIE_CTRL |= 1u << 10u;
}
inline void clear_SIE_CTRL_KEEP_ALIVE_EN() volatile
{
SIE_CTRL &= ~(1u << 10u);
}
inline void toggle_SIE_CTRL_KEEP_ALIVE_EN() volatile
{
SIE_CTRL ^= 1u << 10u;
}
inline bool get_SIE_CTRL_VBUS_EN() volatile
{
return SIE_CTRL & (1u << 11u);
}
inline void set_SIE_CTRL_VBUS_EN() volatile
{
SIE_CTRL |= 1u << 11u;
}
inline void clear_SIE_CTRL_VBUS_EN() volatile
{
SIE_CTRL &= ~(1u << 11u);
}
inline void toggle_SIE_CTRL_VBUS_EN() volatile
{
SIE_CTRL ^= 1u << 11u;
}
inline bool get_SIE_CTRL_RESUME() volatile
{
return SIE_CTRL & (1u << 12u);
}
inline void set_SIE_CTRL_RESUME() volatile
{
SIE_CTRL |= 1u << 12u;
}
inline void clear_SIE_CTRL_RESUME() volatile
{
SIE_CTRL &= ~(1u << 12u);
}
inline void toggle_SIE_CTRL_RESUME() volatile
{
SIE_CTRL ^= 1u << 12u;
}
inline bool get_SIE_CTRL_RESET_BUS() volatile
{
return SIE_CTRL & (1u << 13u);
}
inline void set_SIE_CTRL_RESET_BUS() volatile
{
SIE_CTRL |= 1u << 13u;
}
inline void clear_SIE_CTRL_RESET_BUS() volatile
{
SIE_CTRL &= ~(1u << 13u);
}
inline void toggle_SIE_CTRL_RESET_BUS() volatile
{
SIE_CTRL ^= 1u << 13u;
}
inline bool get_SIE_CTRL_PULLDOWN_EN() volatile
{
return SIE_CTRL & (1u << 15u);
}
inline void set_SIE_CTRL_PULLDOWN_EN() volatile
{
SIE_CTRL |= 1u << 15u;
}
inline void clear_SIE_CTRL_PULLDOWN_EN() volatile
{
SIE_CTRL &= ~(1u << 15u);
}
inline void toggle_SIE_CTRL_PULLDOWN_EN() volatile
{
SIE_CTRL ^= 1u << 15u;
}
inline bool get_SIE_CTRL_PULLUP_EN() volatile
{
return SIE_CTRL & (1u << 16u);
}
inline void set_SIE_CTRL_PULLUP_EN() volatile
{
SIE_CTRL |= 1u << 16u;
}
inline void clear_SIE_CTRL_PULLUP_EN() volatile
{
SIE_CTRL &= ~(1u << 16u);
}
inline void toggle_SIE_CTRL_PULLUP_EN() volatile
{
SIE_CTRL ^= 1u << 16u;
}
inline bool get_SIE_CTRL_RPU_OPT() volatile
{
return SIE_CTRL & (1u << 17u);
}
inline void set_SIE_CTRL_RPU_OPT() volatile
{
SIE_CTRL |= 1u << 17u;
}
inline void clear_SIE_CTRL_RPU_OPT() volatile
{
SIE_CTRL &= ~(1u << 17u);
}
inline void toggle_SIE_CTRL_RPU_OPT() volatile
{
SIE_CTRL ^= 1u << 17u;
}
inline bool get_SIE_CTRL_TRANSCEIVER_PD() volatile
{
return SIE_CTRL & (1u << 18u);
}
inline void set_SIE_CTRL_TRANSCEIVER_PD() volatile
{
SIE_CTRL |= 1u << 18u;
}
inline void clear_SIE_CTRL_TRANSCEIVER_PD() volatile
{
SIE_CTRL &= ~(1u << 18u);
}
inline void toggle_SIE_CTRL_TRANSCEIVER_PD() volatile
{
SIE_CTRL ^= 1u << 18u;
}
inline bool get_SIE_CTRL_DIRECT_DM() volatile
{
return SIE_CTRL & (1u << 24u);
}
inline void set_SIE_CTRL_DIRECT_DM() volatile
{
SIE_CTRL |= 1u << 24u;
}
inline void clear_SIE_CTRL_DIRECT_DM() volatile
{
SIE_CTRL &= ~(1u << 24u);
}
inline void toggle_SIE_CTRL_DIRECT_DM() volatile
{
SIE_CTRL ^= 1u << 24u;
}
inline bool get_SIE_CTRL_DIRECT_DP() volatile
{
return SIE_CTRL & (1u << 25u);
}
inline void set_SIE_CTRL_DIRECT_DP() volatile
{
SIE_CTRL |= 1u << 25u;
}
inline void clear_SIE_CTRL_DIRECT_DP() volatile
{
SIE_CTRL &= ~(1u << 25u);
}
inline void toggle_SIE_CTRL_DIRECT_DP() volatile
{
SIE_CTRL ^= 1u << 25u;
}
inline bool get_SIE_CTRL_DIRECT_EN() volatile
{
return SIE_CTRL & (1u << 26u);
}
inline void set_SIE_CTRL_DIRECT_EN() volatile
{
SIE_CTRL |= 1u << 26u;
}
inline void clear_SIE_CTRL_DIRECT_EN() volatile
{
SIE_CTRL &= ~(1u << 26u);
}
inline void toggle_SIE_CTRL_DIRECT_EN() volatile
{
SIE_CTRL ^= 1u << 26u;
}
inline bool get_SIE_CTRL_EP0_INT_NAK() volatile
{
return SIE_CTRL & (1u << 27u);
}
inline void set_SIE_CTRL_EP0_INT_NAK() volatile
{
SIE_CTRL |= 1u << 27u;
}
inline void clear_SIE_CTRL_EP0_INT_NAK() volatile
{
SIE_CTRL &= ~(1u << 27u);
}
inline void toggle_SIE_CTRL_EP0_INT_NAK() volatile
{
SIE_CTRL ^= 1u << 27u;
}
inline bool get_SIE_CTRL_EP0_INT_2BUF() volatile
{
return SIE_CTRL & (1u << 28u);
}
inline void set_SIE_CTRL_EP0_INT_2BUF() volatile
{
SIE_CTRL |= 1u << 28u;
}
inline void clear_SIE_CTRL_EP0_INT_2BUF() volatile
{
SIE_CTRL &= ~(1u << 28u);
}
inline void toggle_SIE_CTRL_EP0_INT_2BUF() volatile
{
SIE_CTRL ^= 1u << 28u;
}
inline bool get_SIE_CTRL_EP0_INT_1BUF() volatile
{
return SIE_CTRL & (1u << 29u);
}
inline void set_SIE_CTRL_EP0_INT_1BUF() volatile
{
SIE_CTRL |= 1u << 29u;
}
inline void clear_SIE_CTRL_EP0_INT_1BUF() volatile
{
SIE_CTRL &= ~(1u << 29u);
}
inline void toggle_SIE_CTRL_EP0_INT_1BUF() volatile
{
SIE_CTRL ^= 1u << 29u;
}
inline bool get_SIE_CTRL_EP0_DOUBLE_BUF() volatile
{
return SIE_CTRL & (1u << 30u);
}
inline void set_SIE_CTRL_EP0_DOUBLE_BUF() volatile
{
SIE_CTRL |= 1u << 30u;
}
inline void clear_SIE_CTRL_EP0_DOUBLE_BUF() volatile
{
SIE_CTRL &= ~(1u << 30u);
}
inline void toggle_SIE_CTRL_EP0_DOUBLE_BUF() volatile
{
SIE_CTRL ^= 1u << 30u;
}
inline bool get_SIE_CTRL_EP0_INT_STALL() volatile
{
return SIE_CTRL & (1u << 31u);
}
inline void set_SIE_CTRL_EP0_INT_STALL() volatile
{
SIE_CTRL |= 1u << 31u;
}
inline void clear_SIE_CTRL_EP0_INT_STALL() volatile
{
SIE_CTRL &= ~(1u << 31u);
}
inline void toggle_SIE_CTRL_EP0_INT_STALL() volatile
{
SIE_CTRL ^= 1u << 31u;
}
inline void get_SIE_CTRL(
bool &START_TRANS, bool &SEND_SETUP, bool &SEND_DATA,
bool &RECEIVE_DATA, bool &STOP_TRANS, bool &PREAMBLE_EN,
bool &SOF_SYNC, bool &SOF_EN, bool &KEEP_ALIVE_EN, bool &VBUS_EN,
bool &RESUME, bool &RESET_BUS, bool &PULLDOWN_EN, bool &PULLUP_EN,
bool &RPU_OPT, bool &TRANSCEIVER_PD, bool &DIRECT_DM, bool &DIRECT_DP,
bool &DIRECT_EN, bool &EP0_INT_NAK, bool &EP0_INT_2BUF,
bool &EP0_INT_1BUF, bool &EP0_DOUBLE_BUF, bool &EP0_INT_STALL) volatile
{
uint32_t curr = SIE_CTRL;
START_TRANS = curr & (1u << 0u);
SEND_SETUP = curr & (1u << 1u);
SEND_DATA = curr & (1u << 2u);
RECEIVE_DATA = curr & (1u << 3u);
STOP_TRANS = curr & (1u << 4u);
PREAMBLE_EN = curr & (1u << 6u);
SOF_SYNC = curr & (1u << 8u);
SOF_EN = curr & (1u << 9u);
KEEP_ALIVE_EN = curr & (1u << 10u);
VBUS_EN = curr & (1u << 11u);
RESUME = curr & (1u << 12u);
RESET_BUS = curr & (1u << 13u);
PULLDOWN_EN = curr & (1u << 15u);
PULLUP_EN = curr & (1u << 16u);
RPU_OPT = curr & (1u << 17u);
TRANSCEIVER_PD = curr & (1u << 18u);
DIRECT_DM = curr & (1u << 24u);
DIRECT_DP = curr & (1u << 25u);
DIRECT_EN = curr & (1u << 26u);
EP0_INT_NAK = curr & (1u << 27u);
EP0_INT_2BUF = curr & (1u << 28u);
EP0_INT_1BUF = curr & (1u << 29u);
EP0_DOUBLE_BUF = curr & (1u << 30u);
EP0_INT_STALL = curr & (1u << 31u);
}
inline void set_SIE_CTRL(bool START_TRANS, bool SEND_SETUP, bool SEND_DATA,
bool RECEIVE_DATA, bool STOP_TRANS,
bool PREAMBLE_EN, bool SOF_SYNC, bool SOF_EN,
bool KEEP_ALIVE_EN, bool VBUS_EN, bool RESUME,
bool RESET_BUS, bool PULLDOWN_EN, bool PULLUP_EN,
bool RPU_OPT, bool TRANSCEIVER_PD, bool DIRECT_DM,
bool DIRECT_DP, bool DIRECT_EN, bool EP0_INT_NAK,
bool EP0_INT_2BUF, bool EP0_INT_1BUF,
bool EP0_DOUBLE_BUF, bool EP0_INT_STALL) volatile
{
uint32_t curr = SIE_CTRL;
curr &= ~(0b1u << 0u);
curr |= (START_TRANS & 0b1u) << 0u;
curr &= ~(0b1u << 1u);
curr |= (SEND_SETUP & 0b1u) << 1u;
curr &= ~(0b1u << 2u);
curr |= (SEND_DATA & 0b1u) << 2u;
curr &= ~(0b1u << 3u);
curr |= (RECEIVE_DATA & 0b1u) << 3u;
curr &= ~(0b1u << 4u);
curr |= (STOP_TRANS & 0b1u) << 4u;
curr &= ~(0b1u << 6u);
curr |= (PREAMBLE_EN & 0b1u) << 6u;
curr &= ~(0b1u << 8u);
curr |= (SOF_SYNC & 0b1u) << 8u;
curr &= ~(0b1u << 9u);
curr |= (SOF_EN & 0b1u) << 9u;
curr &= ~(0b1u << 10u);
curr |= (KEEP_ALIVE_EN & 0b1u) << 10u;
curr &= ~(0b1u << 11u);
curr |= (VBUS_EN & 0b1u) << 11u;
curr &= ~(0b1u << 12u);
curr |= (RESUME & 0b1u) << 12u;
curr &= ~(0b1u << 13u);
curr |= (RESET_BUS & 0b1u) << 13u;
curr &= ~(0b1u << 15u);
curr |= (PULLDOWN_EN & 0b1u) << 15u;
curr &= ~(0b1u << 16u);
curr |= (PULLUP_EN & 0b1u) << 16u;
curr &= ~(0b1u << 17u);
curr |= (RPU_OPT & 0b1u) << 17u;
curr &= ~(0b1u << 18u);
curr |= (TRANSCEIVER_PD & 0b1u) << 18u;
curr &= ~(0b1u << 24u);
curr |= (DIRECT_DM & 0b1u) << 24u;
curr &= ~(0b1u << 25u);
curr |= (DIRECT_DP & 0b1u) << 25u;
curr &= ~(0b1u << 26u);
curr |= (DIRECT_EN & 0b1u) << 26u;
curr &= ~(0b1u << 27u);
curr |= (EP0_INT_NAK & 0b1u) << 27u;
curr &= ~(0b1u << 28u);
curr |= (EP0_INT_2BUF & 0b1u) << 28u;
curr &= ~(0b1u << 29u);
curr |= (EP0_INT_1BUF & 0b1u) << 29u;
curr &= ~(0b1u << 30u);
curr |= (EP0_DOUBLE_BUF & 0b1u) << 30u;
curr &= ~(0b1u << 31u);
curr |= (EP0_INT_STALL & 0b1u) << 31u;
SIE_CTRL = curr;
}
inline bool get_SIE_STATUS_VBUS_DETECTED() volatile
{
return SIE_STATUS & (1u << 0u);
}
inline uint8_t get_SIE_STATUS_LINE_STATE() volatile
{
return (SIE_STATUS >> 2u) & 0b11u;
}
inline bool get_SIE_STATUS_SUSPENDED() volatile
{
return SIE_STATUS & (1u << 4u);
}
inline void set_SIE_STATUS_SUSPENDED() volatile
{
SIE_STATUS |= 1u << 4u;
}
inline void clear_SIE_STATUS_SUSPENDED() volatile
{
SIE_STATUS &= ~(1u << 4u);
}
inline void toggle_SIE_STATUS_SUSPENDED() volatile
{
SIE_STATUS ^= 1u << 4u;
}
inline uint8_t get_SIE_STATUS_SPEED() volatile
{
return (SIE_STATUS >> 8u) & 0b11u;
}
inline void set_SIE_STATUS_SPEED(uint8_t value) volatile
{
uint32_t curr = SIE_STATUS;
curr &= ~(0b11u << 8u);
curr |= (value & 0b11u) << 8u;
SIE_STATUS = curr;
}
inline bool get_SIE_STATUS_VBUS_OVER_CURR() volatile
{
return SIE_STATUS & (1u << 10u);
}
inline bool get_SIE_STATUS_RESUME() volatile
{
return SIE_STATUS & (1u << 11u);
}
inline void set_SIE_STATUS_RESUME() volatile
{
SIE_STATUS |= 1u << 11u;
}
inline void clear_SIE_STATUS_RESUME() volatile
{
SIE_STATUS &= ~(1u << 11u);
}
inline void toggle_SIE_STATUS_RESUME() volatile
{
SIE_STATUS ^= 1u << 11u;
}
inline bool get_SIE_STATUS_CONNECTED() volatile
{
return SIE_STATUS & (1u << 16u);
}
inline void set_SIE_STATUS_CONNECTED() volatile
{
SIE_STATUS |= 1u << 16u;
}
inline void clear_SIE_STATUS_CONNECTED() volatile
{
SIE_STATUS &= ~(1u << 16u);
}
inline void toggle_SIE_STATUS_CONNECTED() volatile
{
SIE_STATUS ^= 1u << 16u;
}
inline bool get_SIE_STATUS_SETUP_REC() volatile
{
return SIE_STATUS & (1u << 17u);
}
inline void set_SIE_STATUS_SETUP_REC() volatile
{
SIE_STATUS |= 1u << 17u;
}
inline void clear_SIE_STATUS_SETUP_REC() volatile
{
SIE_STATUS &= ~(1u << 17u);
}
inline void toggle_SIE_STATUS_SETUP_REC() volatile
{
SIE_STATUS ^= 1u << 17u;
}
inline bool get_SIE_STATUS_TRANS_COMPLETE() volatile
{
return SIE_STATUS & (1u << 18u);
}
inline void set_SIE_STATUS_TRANS_COMPLETE() volatile
{
SIE_STATUS |= 1u << 18u;
}
inline void clear_SIE_STATUS_TRANS_COMPLETE() volatile
{
SIE_STATUS &= ~(1u << 18u);
}
inline void toggle_SIE_STATUS_TRANS_COMPLETE() volatile
{
SIE_STATUS ^= 1u << 18u;
}
inline bool get_SIE_STATUS_BUS_RESET() volatile
{
return SIE_STATUS & (1u << 19u);
}
inline void set_SIE_STATUS_BUS_RESET() volatile
{
SIE_STATUS |= 1u << 19u;
}
inline void clear_SIE_STATUS_BUS_RESET() volatile
{
SIE_STATUS &= ~(1u << 19u);
}
inline void toggle_SIE_STATUS_BUS_RESET() volatile
{
SIE_STATUS ^= 1u << 19u;
}
inline bool get_SIE_STATUS_CRC_ERROR() volatile
{
return SIE_STATUS & (1u << 24u);
}
inline void set_SIE_STATUS_CRC_ERROR() volatile
{
SIE_STATUS |= 1u << 24u;
}
inline void clear_SIE_STATUS_CRC_ERROR() volatile
{
SIE_STATUS &= ~(1u << 24u);
}
inline void toggle_SIE_STATUS_CRC_ERROR() volatile
{
SIE_STATUS ^= 1u << 24u;
}
inline bool get_SIE_STATUS_BIT_STUFF_ERROR() volatile
{
return SIE_STATUS & (1u << 25u);
}
inline void set_SIE_STATUS_BIT_STUFF_ERROR() volatile
{
SIE_STATUS |= 1u << 25u;
}
inline void clear_SIE_STATUS_BIT_STUFF_ERROR() volatile
{
SIE_STATUS &= ~(1u << 25u);
}
inline void toggle_SIE_STATUS_BIT_STUFF_ERROR() volatile
{
SIE_STATUS ^= 1u << 25u;
}
inline bool get_SIE_STATUS_RX_OVERFLOW() volatile
{
return SIE_STATUS & (1u << 26u);
}
inline void set_SIE_STATUS_RX_OVERFLOW() volatile
{
SIE_STATUS |= 1u << 26u;
}
inline void clear_SIE_STATUS_RX_OVERFLOW() volatile
{
SIE_STATUS &= ~(1u << 26u);
}
inline void toggle_SIE_STATUS_RX_OVERFLOW() volatile
{
SIE_STATUS ^= 1u << 26u;
}
inline bool get_SIE_STATUS_RX_TIMEOUT() volatile
{
return SIE_STATUS & (1u << 27u);
}
inline void set_SIE_STATUS_RX_TIMEOUT() volatile
{
SIE_STATUS |= 1u << 27u;
}
inline void clear_SIE_STATUS_RX_TIMEOUT() volatile
{
SIE_STATUS &= ~(1u << 27u);
}
inline void toggle_SIE_STATUS_RX_TIMEOUT() volatile
{
SIE_STATUS ^= 1u << 27u;
}
inline bool get_SIE_STATUS_NAK_REC() volatile
{
return SIE_STATUS & (1u << 28u);
}
inline void set_SIE_STATUS_NAK_REC() volatile
{
SIE_STATUS |= 1u << 28u;
}
inline void clear_SIE_STATUS_NAK_REC() volatile
{
SIE_STATUS &= ~(1u << 28u);
}
inline void toggle_SIE_STATUS_NAK_REC() volatile
{
SIE_STATUS ^= 1u << 28u;
}
inline bool get_SIE_STATUS_STALL_REC() volatile
{
return SIE_STATUS & (1u << 29u);
}
inline void set_SIE_STATUS_STALL_REC() volatile
{
SIE_STATUS |= 1u << 29u;
}
inline void clear_SIE_STATUS_STALL_REC() volatile
{
SIE_STATUS &= ~(1u << 29u);
}
inline void toggle_SIE_STATUS_STALL_REC() volatile
{
SIE_STATUS ^= 1u << 29u;
}
inline bool get_SIE_STATUS_ACK_REC() volatile
{
return SIE_STATUS & (1u << 30u);
}
inline void set_SIE_STATUS_ACK_REC() volatile
{
SIE_STATUS |= 1u << 30u;
}
inline void clear_SIE_STATUS_ACK_REC() volatile
{
SIE_STATUS &= ~(1u << 30u);
}
inline void toggle_SIE_STATUS_ACK_REC() volatile
{
SIE_STATUS ^= 1u << 30u;
}
inline bool get_SIE_STATUS_DATA_SEQ_ERROR() volatile
{
return SIE_STATUS & (1u << 31u);
}
inline void set_SIE_STATUS_DATA_SEQ_ERROR() volatile
{
SIE_STATUS |= 1u << 31u;
}
inline void clear_SIE_STATUS_DATA_SEQ_ERROR() volatile
{
SIE_STATUS &= ~(1u << 31u);
}
inline void toggle_SIE_STATUS_DATA_SEQ_ERROR() volatile
{
SIE_STATUS ^= 1u << 31u;
}
inline void get_SIE_STATUS(bool &VBUS_DETECTED, uint8_t &LINE_STATE,
bool &SUSPENDED, uint8_t &SPEED,
bool &VBUS_OVER_CURR, bool &RESUME,
bool &CONNECTED, bool &SETUP_REC,
bool &TRANS_COMPLETE, bool &BUS_RESET,
bool &CRC_ERROR, bool &BIT_STUFF_ERROR,
bool &RX_OVERFLOW, bool &RX_TIMEOUT,
bool &NAK_REC, bool &STALL_REC, bool &ACK_REC,
bool &DATA_SEQ_ERROR) volatile
{
uint32_t curr = SIE_STATUS;
VBUS_DETECTED = curr & (1u << 0u);
LINE_STATE = (curr >> 2u) & 0b11u;
SUSPENDED = curr & (1u << 4u);
SPEED = (curr >> 8u) & 0b11u;
VBUS_OVER_CURR = curr & (1u << 10u);
RESUME = curr & (1u << 11u);
CONNECTED = curr & (1u << 16u);
SETUP_REC = curr & (1u << 17u);
TRANS_COMPLETE = curr & (1u << 18u);
BUS_RESET = curr & (1u << 19u);
CRC_ERROR = curr & (1u << 24u);
BIT_STUFF_ERROR = curr & (1u << 25u);
RX_OVERFLOW = curr & (1u << 26u);
RX_TIMEOUT = curr & (1u << 27u);
NAK_REC = curr & (1u << 28u);
STALL_REC = curr & (1u << 29u);
ACK_REC = curr & (1u << 30u);
DATA_SEQ_ERROR = curr & (1u << 31u);
}
inline void set_SIE_STATUS(bool SUSPENDED, uint8_t SPEED, bool RESUME,
bool CONNECTED, bool SETUP_REC,
bool TRANS_COMPLETE, bool BUS_RESET,
bool CRC_ERROR, bool BIT_STUFF_ERROR,
bool RX_OVERFLOW, bool RX_TIMEOUT, bool NAK_REC,
bool STALL_REC, bool ACK_REC,
bool DATA_SEQ_ERROR) volatile
{
uint32_t curr = SIE_STATUS;
curr &= ~(0b1u << 4u);
curr |= (SUSPENDED & 0b1u) << 4u;
curr &= ~(0b11u << 8u);
curr |= (SPEED & 0b11u) << 8u;
curr &= ~(0b1u << 11u);
curr |= (RESUME & 0b1u) << 11u;
curr &= ~(0b1u << 16u);
curr |= (CONNECTED & 0b1u) << 16u;
curr &= ~(0b1u << 17u);
curr |= (SETUP_REC & 0b1u) << 17u;
curr &= ~(0b1u << 18u);
curr |= (TRANS_COMPLETE & 0b1u) << 18u;
curr &= ~(0b1u << 19u);
curr |= (BUS_RESET & 0b1u) << 19u;
curr &= ~(0b1u << 24u);
curr |= (CRC_ERROR & 0b1u) << 24u;
curr &= ~(0b1u << 25u);
curr |= (BIT_STUFF_ERROR & 0b1u) << 25u;
curr &= ~(0b1u << 26u);
curr |= (RX_OVERFLOW & 0b1u) << 26u;
curr &= ~(0b1u << 27u);
curr |= (RX_TIMEOUT & 0b1u) << 27u;
curr &= ~(0b1u << 28u);
curr |= (NAK_REC & 0b1u) << 28u;
curr &= ~(0b1u << 29u);
curr |= (STALL_REC & 0b1u) << 29u;
curr &= ~(0b1u << 30u);
curr |= (ACK_REC & 0b1u) << 30u;
curr &= ~(0b1u << 31u);
curr |= (DATA_SEQ_ERROR & 0b1u) << 31u;
SIE_STATUS = curr;
}
inline uint16_t get_INT_EP_CTRL_INT_EP_ACTIVE() volatile
{
return (INT_EP_CTRL >> 1u) & 0b111111111111111u;
}
inline void set_INT_EP_CTRL_INT_EP_ACTIVE(uint16_t value) volatile
{
uint32_t curr = INT_EP_CTRL;
curr &= ~(0b111111111111111u << 1u);
curr |= (value & 0b111111111111111u) << 1u;
INT_EP_CTRL = curr;
}
inline bool get_BUFF_STATUS_EP0_IN() volatile
{
return BUFF_STATUS & (1u << 0u);
}
inline void set_BUFF_STATUS_EP0_IN() volatile
{
BUFF_STATUS |= 1u << 0u;
}
inline void clear_BUFF_STATUS_EP0_IN() volatile
{
BUFF_STATUS &= ~(1u << 0u);
}
inline void toggle_BUFF_STATUS_EP0_IN() volatile
{
BUFF_STATUS ^= 1u << 0u;
}
inline bool get_BUFF_STATUS_EP0_OUT() volatile
{
return BUFF_STATUS & (1u << 1u);
}
inline void set_BUFF_STATUS_EP0_OUT() volatile
{
BUFF_STATUS |= 1u << 1u;
}
inline void clear_BUFF_STATUS_EP0_OUT() volatile
{
BUFF_STATUS &= ~(1u << 1u);
}
inline void toggle_BUFF_STATUS_EP0_OUT() volatile
{
BUFF_STATUS ^= 1u << 1u;
}
inline bool get_BUFF_STATUS_EP1_IN() volatile
{
return BUFF_STATUS & (1u << 2u);
}
inline void set_BUFF_STATUS_EP1_IN() volatile
{
BUFF_STATUS |= 1u << 2u;
}
inline void clear_BUFF_STATUS_EP1_IN() volatile
{
BUFF_STATUS &= ~(1u << 2u);
}
inline void toggle_BUFF_STATUS_EP1_IN() volatile
{
BUFF_STATUS ^= 1u << 2u;
}
inline bool get_BUFF_STATUS_EP1_OUT() volatile
{
return BUFF_STATUS & (1u << 3u);
}
inline void set_BUFF_STATUS_EP1_OUT() volatile
{
BUFF_STATUS |= 1u << 3u;
}
inline void clear_BUFF_STATUS_EP1_OUT() volatile
{
BUFF_STATUS &= ~(1u << 3u);
}
inline void toggle_BUFF_STATUS_EP1_OUT() volatile
{
BUFF_STATUS ^= 1u << 3u;
}
inline bool get_BUFF_STATUS_EP2_IN() volatile
{
return BUFF_STATUS & (1u << 4u);
}
inline void set_BUFF_STATUS_EP2_IN() volatile
{
BUFF_STATUS |= 1u << 4u;
}
inline void clear_BUFF_STATUS_EP2_IN() volatile
{
BUFF_STATUS &= ~(1u << 4u);
}
inline void toggle_BUFF_STATUS_EP2_IN() volatile
{
BUFF_STATUS ^= 1u << 4u;
}
inline bool get_BUFF_STATUS_EP2_OUT() volatile
{
return BUFF_STATUS & (1u << 5u);
}
inline void set_BUFF_STATUS_EP2_OUT() volatile
{
BUFF_STATUS |= 1u << 5u;
}
inline void clear_BUFF_STATUS_EP2_OUT() volatile
{
BUFF_STATUS &= ~(1u << 5u);
}
inline void toggle_BUFF_STATUS_EP2_OUT() volatile
{
BUFF_STATUS ^= 1u << 5u;
}
inline bool get_BUFF_STATUS_EP3_IN() volatile
{
return BUFF_STATUS & (1u << 6u);
}
inline void set_BUFF_STATUS_EP3_IN() volatile
{
BUFF_STATUS |= 1u << 6u;
}
inline void clear_BUFF_STATUS_EP3_IN() volatile
{
BUFF_STATUS &= ~(1u << 6u);
}
inline void toggle_BUFF_STATUS_EP3_IN() volatile
{
BUFF_STATUS ^= 1u << 6u;
}
inline bool get_BUFF_STATUS_EP3_OUT() volatile
{
return BUFF_STATUS & (1u << 7u);
}
inline void set_BUFF_STATUS_EP3_OUT() volatile
{
BUFF_STATUS |= 1u << 7u;
}
inline void clear_BUFF_STATUS_EP3_OUT() volatile
{
BUFF_STATUS &= ~(1u << 7u);
}
inline void toggle_BUFF_STATUS_EP3_OUT() volatile
{
BUFF_STATUS ^= 1u << 7u;
}
inline bool get_BUFF_STATUS_EP4_IN() volatile
{
return BUFF_STATUS & (1u << 8u);
}
inline void set_BUFF_STATUS_EP4_IN() volatile
{
BUFF_STATUS |= 1u << 8u;
}
inline void clear_BUFF_STATUS_EP4_IN() volatile
{
BUFF_STATUS &= ~(1u << 8u);
}
inline void toggle_BUFF_STATUS_EP4_IN() volatile
{
BUFF_STATUS ^= 1u << 8u;
}
inline bool get_BUFF_STATUS_EP4_OUT() volatile
{
return BUFF_STATUS & (1u << 9u);
}
inline void set_BUFF_STATUS_EP4_OUT() volatile
{
BUFF_STATUS |= 1u << 9u;
}
inline void clear_BUFF_STATUS_EP4_OUT() volatile
{
BUFF_STATUS &= ~(1u << 9u);
}
inline void toggle_BUFF_STATUS_EP4_OUT() volatile
{
BUFF_STATUS ^= 1u << 9u;
}
inline bool get_BUFF_STATUS_EP5_IN() volatile
{
return BUFF_STATUS & (1u << 10u);
}
inline void set_BUFF_STATUS_EP5_IN() volatile
{
BUFF_STATUS |= 1u << 10u;
}
inline void clear_BUFF_STATUS_EP5_IN() volatile
{
BUFF_STATUS &= ~(1u << 10u);
}
inline void toggle_BUFF_STATUS_EP5_IN() volatile
{
BUFF_STATUS ^= 1u << 10u;
}
inline bool get_BUFF_STATUS_EP5_OUT() volatile
{
return BUFF_STATUS & (1u << 11u);
}
inline void set_BUFF_STATUS_EP5_OUT() volatile
{
BUFF_STATUS |= 1u << 11u;
}
inline void clear_BUFF_STATUS_EP5_OUT() volatile
{
BUFF_STATUS &= ~(1u << 11u);
}
inline void toggle_BUFF_STATUS_EP5_OUT() volatile
{
BUFF_STATUS ^= 1u << 11u;
}
inline bool get_BUFF_STATUS_EP6_IN() volatile
{
return BUFF_STATUS & (1u << 12u);
}
inline void set_BUFF_STATUS_EP6_IN() volatile
{
BUFF_STATUS |= 1u << 12u;
}
inline void clear_BUFF_STATUS_EP6_IN() volatile
{
BUFF_STATUS &= ~(1u << 12u);
}
inline void toggle_BUFF_STATUS_EP6_IN() volatile
{
BUFF_STATUS ^= 1u << 12u;
}
inline bool get_BUFF_STATUS_EP6_OUT() volatile
{
return BUFF_STATUS & (1u << 13u);
}
inline void set_BUFF_STATUS_EP6_OUT() volatile
{
BUFF_STATUS |= 1u << 13u;
}
inline void clear_BUFF_STATUS_EP6_OUT() volatile
{
BUFF_STATUS &= ~(1u << 13u);
}
inline void toggle_BUFF_STATUS_EP6_OUT() volatile
{
BUFF_STATUS ^= 1u << 13u;
}
inline bool get_BUFF_STATUS_EP7_IN() volatile
{
return BUFF_STATUS & (1u << 14u);
}
inline void set_BUFF_STATUS_EP7_IN() volatile
{
BUFF_STATUS |= 1u << 14u;
}
inline void clear_BUFF_STATUS_EP7_IN() volatile
{
BUFF_STATUS &= ~(1u << 14u);
}
inline void toggle_BUFF_STATUS_EP7_IN() volatile
{
BUFF_STATUS ^= 1u << 14u;
}
inline bool get_BUFF_STATUS_EP7_OUT() volatile
{
return BUFF_STATUS & (1u << 15u);
}
inline void set_BUFF_STATUS_EP7_OUT() volatile
{
BUFF_STATUS |= 1u << 15u;
}
inline void clear_BUFF_STATUS_EP7_OUT() volatile
{
BUFF_STATUS &= ~(1u << 15u);
}
inline void toggle_BUFF_STATUS_EP7_OUT() volatile
{
BUFF_STATUS ^= 1u << 15u;
}
inline bool get_BUFF_STATUS_EP8_IN() volatile
{
return BUFF_STATUS & (1u << 16u);
}
inline void set_BUFF_STATUS_EP8_IN() volatile
{
BUFF_STATUS |= 1u << 16u;
}
inline void clear_BUFF_STATUS_EP8_IN() volatile
{
BUFF_STATUS &= ~(1u << 16u);
}
inline void toggle_BUFF_STATUS_EP8_IN() volatile
{
BUFF_STATUS ^= 1u << 16u;
}
inline bool get_BUFF_STATUS_EP8_OUT() volatile
{
return BUFF_STATUS & (1u << 17u);
}
inline void set_BUFF_STATUS_EP8_OUT() volatile
{
BUFF_STATUS |= 1u << 17u;
}
inline void clear_BUFF_STATUS_EP8_OUT() volatile
{
BUFF_STATUS &= ~(1u << 17u);
}
inline void toggle_BUFF_STATUS_EP8_OUT() volatile
{
BUFF_STATUS ^= 1u << 17u;
}
inline bool get_BUFF_STATUS_EP9_IN() volatile
{
return BUFF_STATUS & (1u << 18u);
}
inline void set_BUFF_STATUS_EP9_IN() volatile
{
BUFF_STATUS |= 1u << 18u;
}
inline void clear_BUFF_STATUS_EP9_IN() volatile
{
BUFF_STATUS &= ~(1u << 18u);
}
inline void toggle_BUFF_STATUS_EP9_IN() volatile
{
BUFF_STATUS ^= 1u << 18u;
}
inline bool get_BUFF_STATUS_EP9_OUT() volatile
{
return BUFF_STATUS & (1u << 19u);
}
inline void set_BUFF_STATUS_EP9_OUT() volatile
{
BUFF_STATUS |= 1u << 19u;
}
inline void clear_BUFF_STATUS_EP9_OUT() volatile
{
BUFF_STATUS &= ~(1u << 19u);
}
inline void toggle_BUFF_STATUS_EP9_OUT() volatile
{
BUFF_STATUS ^= 1u << 19u;
}
inline bool get_BUFF_STATUS_EP10_IN() volatile
{
return BUFF_STATUS & (1u << 20u);
}
inline void set_BUFF_STATUS_EP10_IN() volatile
{
BUFF_STATUS |= 1u << 20u;
}
inline void clear_BUFF_STATUS_EP10_IN() volatile
{
BUFF_STATUS &= ~(1u << 20u);
}
inline void toggle_BUFF_STATUS_EP10_IN() volatile
{
BUFF_STATUS ^= 1u << 20u;
}
inline bool get_BUFF_STATUS_EP10_OUT() volatile
{
return BUFF_STATUS & (1u << 21u);
}
inline void set_BUFF_STATUS_EP10_OUT() volatile
{
BUFF_STATUS |= 1u << 21u;
}
inline void clear_BUFF_STATUS_EP10_OUT() volatile
{
BUFF_STATUS &= ~(1u << 21u);
}
inline void toggle_BUFF_STATUS_EP10_OUT() volatile
{
BUFF_STATUS ^= 1u << 21u;
}
inline bool get_BUFF_STATUS_EP11_IN() volatile
{
return BUFF_STATUS & (1u << 22u);
}
inline void set_BUFF_STATUS_EP11_IN() volatile
{
BUFF_STATUS |= 1u << 22u;
}
inline void clear_BUFF_STATUS_EP11_IN() volatile
{
BUFF_STATUS &= ~(1u << 22u);
}
inline void toggle_BUFF_STATUS_EP11_IN() volatile
{
BUFF_STATUS ^= 1u << 22u;
}
inline bool get_BUFF_STATUS_EP11_OUT() volatile
{
return BUFF_STATUS & (1u << 23u);
}
inline void set_BUFF_STATUS_EP11_OUT() volatile
{
BUFF_STATUS |= 1u << 23u;
}
inline void clear_BUFF_STATUS_EP11_OUT() volatile
{
BUFF_STATUS &= ~(1u << 23u);
}
inline void toggle_BUFF_STATUS_EP11_OUT() volatile
{
BUFF_STATUS ^= 1u << 23u;
}
inline bool get_BUFF_STATUS_EP12_IN() volatile
{
return BUFF_STATUS & (1u << 24u);
}
inline void set_BUFF_STATUS_EP12_IN() volatile
{
BUFF_STATUS |= 1u << 24u;
}
inline void clear_BUFF_STATUS_EP12_IN() volatile
{
BUFF_STATUS &= ~(1u << 24u);
}
inline void toggle_BUFF_STATUS_EP12_IN() volatile
{
BUFF_STATUS ^= 1u << 24u;
}
inline bool get_BUFF_STATUS_EP12_OUT() volatile
{
return BUFF_STATUS & (1u << 25u);
}
inline void set_BUFF_STATUS_EP12_OUT() volatile
{
BUFF_STATUS |= 1u << 25u;
}
inline void clear_BUFF_STATUS_EP12_OUT() volatile
{
BUFF_STATUS &= ~(1u << 25u);
}
inline void toggle_BUFF_STATUS_EP12_OUT() volatile
{
BUFF_STATUS ^= 1u << 25u;
}
inline bool get_BUFF_STATUS_EP13_IN() volatile
{
return BUFF_STATUS & (1u << 26u);
}
inline void set_BUFF_STATUS_EP13_IN() volatile
{
BUFF_STATUS |= 1u << 26u;
}
inline void clear_BUFF_STATUS_EP13_IN() volatile
{
BUFF_STATUS &= ~(1u << 26u);
}
inline void toggle_BUFF_STATUS_EP13_IN() volatile
{
BUFF_STATUS ^= 1u << 26u;
}
inline bool get_BUFF_STATUS_EP13_OUT() volatile
{
return BUFF_STATUS & (1u << 27u);
}
inline void set_BUFF_STATUS_EP13_OUT() volatile
{
BUFF_STATUS |= 1u << 27u;
}
inline void clear_BUFF_STATUS_EP13_OUT() volatile
{
BUFF_STATUS &= ~(1u << 27u);
}
inline void toggle_BUFF_STATUS_EP13_OUT() volatile
{
BUFF_STATUS ^= 1u << 27u;
}
inline bool get_BUFF_STATUS_EP14_IN() volatile
{
return BUFF_STATUS & (1u << 28u);
}
inline void set_BUFF_STATUS_EP14_IN() volatile
{
BUFF_STATUS |= 1u << 28u;
}
inline void clear_BUFF_STATUS_EP14_IN() volatile
{
BUFF_STATUS &= ~(1u << 28u);
}
inline void toggle_BUFF_STATUS_EP14_IN() volatile
{
BUFF_STATUS ^= 1u << 28u;
}
inline bool get_BUFF_STATUS_EP14_OUT() volatile
{
return BUFF_STATUS & (1u << 29u);
}
inline void set_BUFF_STATUS_EP14_OUT() volatile
{
BUFF_STATUS |= 1u << 29u;
}
inline void clear_BUFF_STATUS_EP14_OUT() volatile
{
BUFF_STATUS &= ~(1u << 29u);
}
inline void toggle_BUFF_STATUS_EP14_OUT() volatile
{
BUFF_STATUS ^= 1u << 29u;
}
inline bool get_BUFF_STATUS_EP15_IN() volatile
{
return BUFF_STATUS & (1u << 30u);
}
inline void set_BUFF_STATUS_EP15_IN() volatile
{
BUFF_STATUS |= 1u << 30u;
}
inline void clear_BUFF_STATUS_EP15_IN() volatile
{
BUFF_STATUS &= ~(1u << 30u);
}
inline void toggle_BUFF_STATUS_EP15_IN() volatile
{
BUFF_STATUS ^= 1u << 30u;
}
inline bool get_BUFF_STATUS_EP15_OUT() volatile
{
return BUFF_STATUS & (1u << 31u);
}
inline void set_BUFF_STATUS_EP15_OUT() volatile
{
BUFF_STATUS |= 1u << 31u;
}
inline void clear_BUFF_STATUS_EP15_OUT() volatile
{
BUFF_STATUS &= ~(1u << 31u);
}
inline void toggle_BUFF_STATUS_EP15_OUT() volatile
{
BUFF_STATUS ^= 1u << 31u;
}
inline void get_BUFF_STATUS(bool &EP0_IN, bool &EP0_OUT, bool &EP1_IN,
bool &EP1_OUT, bool &EP2_IN, bool &EP2_OUT,
bool &EP3_IN, bool &EP3_OUT, bool &EP4_IN,
bool &EP4_OUT, bool &EP5_IN, bool &EP5_OUT,
bool &EP6_IN, bool &EP6_OUT, bool &EP7_IN,
bool &EP7_OUT, bool &EP8_IN, bool &EP8_OUT,
bool &EP9_IN, bool &EP9_OUT, bool &EP10_IN,
bool &EP10_OUT, bool &EP11_IN, bool &EP11_OUT,
bool &EP12_IN, bool &EP12_OUT, bool &EP13_IN,
bool &EP13_OUT, bool &EP14_IN, bool &EP14_OUT,
bool &EP15_IN, bool &EP15_OUT) volatile
{
uint32_t curr = BUFF_STATUS;
EP0_IN = curr & (1u << 0u);
EP0_OUT = curr & (1u << 1u);
EP1_IN = curr & (1u << 2u);
EP1_OUT = curr & (1u << 3u);
EP2_IN = curr & (1u << 4u);
EP2_OUT = curr & (1u << 5u);
EP3_IN = curr & (1u << 6u);
EP3_OUT = curr & (1u << 7u);
EP4_IN = curr & (1u << 8u);
EP4_OUT = curr & (1u << 9u);
EP5_IN = curr & (1u << 10u);
EP5_OUT = curr & (1u << 11u);
EP6_IN = curr & (1u << 12u);
EP6_OUT = curr & (1u << 13u);
EP7_IN = curr & (1u << 14u);
EP7_OUT = curr & (1u << 15u);
EP8_IN = curr & (1u << 16u);
EP8_OUT = curr & (1u << 17u);
EP9_IN = curr & (1u << 18u);
EP9_OUT = curr & (1u << 19u);
EP10_IN = curr & (1u << 20u);
EP10_OUT = curr & (1u << 21u);
EP11_IN = curr & (1u << 22u);
EP11_OUT = curr & (1u << 23u);
EP12_IN = curr & (1u << 24u);
EP12_OUT = curr & (1u << 25u);
EP13_IN = curr & (1u << 26u);
EP13_OUT = curr & (1u << 27u);
EP14_IN = curr & (1u << 28u);
EP14_OUT = curr & (1u << 29u);
EP15_IN = curr & (1u << 30u);
EP15_OUT = curr & (1u << 31u);
}
inline void set_BUFF_STATUS(
bool EP0_IN, bool EP0_OUT, bool EP1_IN, bool EP1_OUT, bool EP2_IN,
bool EP2_OUT, bool EP3_IN, bool EP3_OUT, bool EP4_IN, bool EP4_OUT,
bool EP5_IN, bool EP5_OUT, bool EP6_IN, bool EP6_OUT, bool EP7_IN,
bool EP7_OUT, bool EP8_IN, bool EP8_OUT, bool EP9_IN, bool EP9_OUT,
bool EP10_IN, bool EP10_OUT, bool EP11_IN, bool EP11_OUT, bool EP12_IN,
bool EP12_OUT, bool EP13_IN, bool EP13_OUT, bool EP14_IN,
bool EP14_OUT, bool EP15_IN, bool EP15_OUT) volatile
{
uint32_t curr = BUFF_STATUS;
curr &= ~(0b1u << 0u);
curr |= (EP0_IN & 0b1u) << 0u;
curr &= ~(0b1u << 1u);
curr |= (EP0_OUT & 0b1u) << 1u;
curr &= ~(0b1u << 2u);
curr |= (EP1_IN & 0b1u) << 2u;
curr &= ~(0b1u << 3u);
curr |= (EP1_OUT & 0b1u) << 3u;
curr &= ~(0b1u << 4u);
curr |= (EP2_IN & 0b1u) << 4u;
curr &= ~(0b1u << 5u);
curr |= (EP2_OUT & 0b1u) << 5u;
curr &= ~(0b1u << 6u);
curr |= (EP3_IN & 0b1u) << 6u;
curr &= ~(0b1u << 7u);
curr |= (EP3_OUT & 0b1u) << 7u;
curr &= ~(0b1u << 8u);
curr |= (EP4_IN & 0b1u) << 8u;
curr &= ~(0b1u << 9u);
curr |= (EP4_OUT & 0b1u) << 9u;
curr &= ~(0b1u << 10u);
curr |= (EP5_IN & 0b1u) << 10u;
curr &= ~(0b1u << 11u);
curr |= (EP5_OUT & 0b1u) << 11u;
curr &= ~(0b1u << 12u);
curr |= (EP6_IN & 0b1u) << 12u;
curr &= ~(0b1u << 13u);
curr |= (EP6_OUT & 0b1u) << 13u;
curr &= ~(0b1u << 14u);
curr |= (EP7_IN & 0b1u) << 14u;
curr &= ~(0b1u << 15u);
curr |= (EP7_OUT & 0b1u) << 15u;
curr &= ~(0b1u << 16u);
curr |= (EP8_IN & 0b1u) << 16u;
curr &= ~(0b1u << 17u);
curr |= (EP8_OUT & 0b1u) << 17u;
curr &= ~(0b1u << 18u);
curr |= (EP9_IN & 0b1u) << 18u;
curr &= ~(0b1u << 19u);
curr |= (EP9_OUT & 0b1u) << 19u;
curr &= ~(0b1u << 20u);
curr |= (EP10_IN & 0b1u) << 20u;
curr &= ~(0b1u << 21u);
curr |= (EP10_OUT & 0b1u) << 21u;
curr &= ~(0b1u << 22u);
curr |= (EP11_IN & 0b1u) << 22u;
curr &= ~(0b1u << 23u);
curr |= (EP11_OUT & 0b1u) << 23u;
curr &= ~(0b1u << 24u);
curr |= (EP12_IN & 0b1u) << 24u;
curr &= ~(0b1u << 25u);
curr |= (EP12_OUT & 0b1u) << 25u;
curr &= ~(0b1u << 26u);
curr |= (EP13_IN & 0b1u) << 26u;
curr &= ~(0b1u << 27u);
curr |= (EP13_OUT & 0b1u) << 27u;
curr &= ~(0b1u << 28u);
curr |= (EP14_IN & 0b1u) << 28u;
curr &= ~(0b1u << 29u);
curr |= (EP14_OUT & 0b1u) << 29u;
curr &= ~(0b1u << 30u);
curr |= (EP15_IN & 0b1u) << 30u;
curr &= ~(0b1u << 31u);
curr |= (EP15_OUT & 0b1u) << 31u;
BUFF_STATUS = curr;
}
inline bool get_BUFF_CPU_SHOULD_HANDLE_EP0_IN() volatile
{
return BUFF_CPU_SHOULD_HANDLE & (1u << 0u);
}
inline bool get_BUFF_CPU_SHOULD_HANDLE_EP0_OUT() volatile
{
return BUFF_CPU_SHOULD_HANDLE & (1u << 1u);
}
inline bool get_BUFF_CPU_SHOULD_HANDLE_EP1_IN() volatile
{
return BUFF_CPU_SHOULD_HANDLE & (1u << 2u);
}
inline bool get_BUFF_CPU_SHOULD_HANDLE_EP1_OUT() volatile
{
return BUFF_CPU_SHOULD_HANDLE & (1u << 3u);
}
inline bool get_BUFF_CPU_SHOULD_HANDLE_EP2_IN() volatile
{
return BUFF_CPU_SHOULD_HANDLE & (1u << 4u);
}
inline bool get_BUFF_CPU_SHOULD_HANDLE_EP2_OUT() volatile
{
return BUFF_CPU_SHOULD_HANDLE & (1u << 5u);
}
inline bool get_BUFF_CPU_SHOULD_HANDLE_EP3_IN() volatile
{
return BUFF_CPU_SHOULD_HANDLE & (1u << 6u);
}
inline bool get_BUFF_CPU_SHOULD_HANDLE_EP3_OUT() volatile
{
return BUFF_CPU_SHOULD_HANDLE & (1u << 7u);
}
inline bool get_BUFF_CPU_SHOULD_HANDLE_EP4_IN() volatile
{
return BUFF_CPU_SHOULD_HANDLE & (1u << 8u);
}
inline bool get_BUFF_CPU_SHOULD_HANDLE_EP4_OUT() volatile
{
return BUFF_CPU_SHOULD_HANDLE & (1u << 9u);
}
inline bool get_BUFF_CPU_SHOULD_HANDLE_EP5_IN() volatile
{
return BUFF_CPU_SHOULD_HANDLE & (1u << 10u);
}
inline bool get_BUFF_CPU_SHOULD_HANDLE_EP5_OUT() volatile
{
return BUFF_CPU_SHOULD_HANDLE & (1u << 11u);
}
inline bool get_BUFF_CPU_SHOULD_HANDLE_EP6_IN() volatile
{
return BUFF_CPU_SHOULD_HANDLE & (1u << 12u);
}
inline bool get_BUFF_CPU_SHOULD_HANDLE_EP6_OUT() volatile
{
return BUFF_CPU_SHOULD_HANDLE & (1u << 13u);
}
inline bool get_BUFF_CPU_SHOULD_HANDLE_EP7_IN() volatile
{
return BUFF_CPU_SHOULD_HANDLE & (1u << 14u);
}
inline bool get_BUFF_CPU_SHOULD_HANDLE_EP7_OUT() volatile
{
return BUFF_CPU_SHOULD_HANDLE & (1u << 15u);
}
inline bool get_BUFF_CPU_SHOULD_HANDLE_EP8_IN() volatile
{
return BUFF_CPU_SHOULD_HANDLE & (1u << 16u);
}
inline bool get_BUFF_CPU_SHOULD_HANDLE_EP8_OUT() volatile
{
return BUFF_CPU_SHOULD_HANDLE & (1u << 17u);
}
inline bool get_BUFF_CPU_SHOULD_HANDLE_EP9_IN() volatile
{
return BUFF_CPU_SHOULD_HANDLE & (1u << 18u);
}
inline bool get_BUFF_CPU_SHOULD_HANDLE_EP9_OUT() volatile
{
return BUFF_CPU_SHOULD_HANDLE & (1u << 19u);
}
inline bool get_BUFF_CPU_SHOULD_HANDLE_EP10_IN() volatile
{
return BUFF_CPU_SHOULD_HANDLE & (1u << 20u);
}
inline bool get_BUFF_CPU_SHOULD_HANDLE_EP10_OUT() volatile
{
return BUFF_CPU_SHOULD_HANDLE & (1u << 21u);
}
inline bool get_BUFF_CPU_SHOULD_HANDLE_EP11_IN() volatile
{
return BUFF_CPU_SHOULD_HANDLE & (1u << 22u);
}
inline bool get_BUFF_CPU_SHOULD_HANDLE_EP11_OUT() volatile
{
return BUFF_CPU_SHOULD_HANDLE & (1u << 23u);
}
inline bool get_BUFF_CPU_SHOULD_HANDLE_EP12_IN() volatile
{
return BUFF_CPU_SHOULD_HANDLE & (1u << 24u);
}
inline bool get_BUFF_CPU_SHOULD_HANDLE_EP12_OUT() volatile
{
return BUFF_CPU_SHOULD_HANDLE & (1u << 25u);
}
inline bool get_BUFF_CPU_SHOULD_HANDLE_EP13_IN() volatile
{
return BUFF_CPU_SHOULD_HANDLE & (1u << 26u);
}
inline bool get_BUFF_CPU_SHOULD_HANDLE_EP13_OUT() volatile
{
return BUFF_CPU_SHOULD_HANDLE & (1u << 27u);
}
inline bool get_BUFF_CPU_SHOULD_HANDLE_EP14_IN() volatile
{
return BUFF_CPU_SHOULD_HANDLE & (1u << 28u);
}
inline bool get_BUFF_CPU_SHOULD_HANDLE_EP14_OUT() volatile
{
return BUFF_CPU_SHOULD_HANDLE & (1u << 29u);
}
inline bool get_BUFF_CPU_SHOULD_HANDLE_EP15_IN() volatile
{
return BUFF_CPU_SHOULD_HANDLE & (1u << 30u);
}
inline bool get_BUFF_CPU_SHOULD_HANDLE_EP15_OUT() volatile
{
return BUFF_CPU_SHOULD_HANDLE & (1u << 31u);
}
inline void get_BUFF_CPU_SHOULD_HANDLE(
bool &EP0_IN, bool &EP0_OUT, bool &EP1_IN, bool &EP1_OUT, bool &EP2_IN,
bool &EP2_OUT, bool &EP3_IN, bool &EP3_OUT, bool &EP4_IN,
bool &EP4_OUT, bool &EP5_IN, bool &EP5_OUT, bool &EP6_IN,
bool &EP6_OUT, bool &EP7_IN, bool &EP7_OUT, bool &EP8_IN,
bool &EP8_OUT, bool &EP9_IN, bool &EP9_OUT, bool &EP10_IN,
bool &EP10_OUT, bool &EP11_IN, bool &EP11_OUT, bool &EP12_IN,
bool &EP12_OUT, bool &EP13_IN, bool &EP13_OUT, bool &EP14_IN,
bool &EP14_OUT, bool &EP15_IN, bool &EP15_OUT) volatile
{
uint32_t curr = BUFF_CPU_SHOULD_HANDLE;
EP0_IN = curr & (1u << 0u);
EP0_OUT = curr & (1u << 1u);
EP1_IN = curr & (1u << 2u);
EP1_OUT = curr & (1u << 3u);
EP2_IN = curr & (1u << 4u);
EP2_OUT = curr & (1u << 5u);
EP3_IN = curr & (1u << 6u);
EP3_OUT = curr & (1u << 7u);
EP4_IN = curr & (1u << 8u);
EP4_OUT = curr & (1u << 9u);
EP5_IN = curr & (1u << 10u);
EP5_OUT = curr & (1u << 11u);
EP6_IN = curr & (1u << 12u);
EP6_OUT = curr & (1u << 13u);
EP7_IN = curr & (1u << 14u);
EP7_OUT = curr & (1u << 15u);
EP8_IN = curr & (1u << 16u);
EP8_OUT = curr & (1u << 17u);
EP9_IN = curr & (1u << 18u);
EP9_OUT = curr & (1u << 19u);
EP10_IN = curr & (1u << 20u);
EP10_OUT = curr & (1u << 21u);
EP11_IN = curr & (1u << 22u);
EP11_OUT = curr & (1u << 23u);
EP12_IN = curr & (1u << 24u);
EP12_OUT = curr & (1u << 25u);
EP13_IN = curr & (1u << 26u);
EP13_OUT = curr & (1u << 27u);
EP14_IN = curr & (1u << 28u);
EP14_OUT = curr & (1u << 29u);
EP15_IN = curr & (1u << 30u);
EP15_OUT = curr & (1u << 31u);
}
inline bool get_EP_ABORT_EP0_IN() volatile
{
return EP_ABORT & (1u << 0u);
}
inline void set_EP_ABORT_EP0_IN() volatile
{
EP_ABORT |= 1u << 0u;
}
inline void clear_EP_ABORT_EP0_IN() volatile
{
EP_ABORT &= ~(1u << 0u);
}
inline void toggle_EP_ABORT_EP0_IN() volatile
{
EP_ABORT ^= 1u << 0u;
}
inline bool get_EP_ABORT_EP0_OUT() volatile
{
return EP_ABORT & (1u << 1u);
}
inline void set_EP_ABORT_EP0_OUT() volatile
{
EP_ABORT |= 1u << 1u;
}
inline void clear_EP_ABORT_EP0_OUT() volatile
{
EP_ABORT &= ~(1u << 1u);
}
inline void toggle_EP_ABORT_EP0_OUT() volatile
{
EP_ABORT ^= 1u << 1u;
}
inline bool get_EP_ABORT_EP1_IN() volatile
{
return EP_ABORT & (1u << 2u);
}
inline void set_EP_ABORT_EP1_IN() volatile
{
EP_ABORT |= 1u << 2u;
}
inline void clear_EP_ABORT_EP1_IN() volatile
{
EP_ABORT &= ~(1u << 2u);
}
inline void toggle_EP_ABORT_EP1_IN() volatile
{
EP_ABORT ^= 1u << 2u;
}
inline bool get_EP_ABORT_EP1_OUT() volatile
{
return EP_ABORT & (1u << 3u);
}
inline void set_EP_ABORT_EP1_OUT() volatile
{
EP_ABORT |= 1u << 3u;
}
inline void clear_EP_ABORT_EP1_OUT() volatile
{
EP_ABORT &= ~(1u << 3u);
}
inline void toggle_EP_ABORT_EP1_OUT() volatile
{
EP_ABORT ^= 1u << 3u;
}
inline bool get_EP_ABORT_EP2_IN() volatile
{
return EP_ABORT & (1u << 4u);
}
inline void set_EP_ABORT_EP2_IN() volatile
{
EP_ABORT |= 1u << 4u;
}
inline void clear_EP_ABORT_EP2_IN() volatile
{
EP_ABORT &= ~(1u << 4u);
}
inline void toggle_EP_ABORT_EP2_IN() volatile
{
EP_ABORT ^= 1u << 4u;
}
inline bool get_EP_ABORT_EP2_OUT() volatile
{
return EP_ABORT & (1u << 5u);
}
inline void set_EP_ABORT_EP2_OUT() volatile
{
EP_ABORT |= 1u << 5u;
}
inline void clear_EP_ABORT_EP2_OUT() volatile
{
EP_ABORT &= ~(1u << 5u);
}
inline void toggle_EP_ABORT_EP2_OUT() volatile
{
EP_ABORT ^= 1u << 5u;
}
inline bool get_EP_ABORT_EP3_IN() volatile
{
return EP_ABORT & (1u << 6u);
}
inline void set_EP_ABORT_EP3_IN() volatile
{
EP_ABORT |= 1u << 6u;
}
inline void clear_EP_ABORT_EP3_IN() volatile
{
EP_ABORT &= ~(1u << 6u);
}
inline void toggle_EP_ABORT_EP3_IN() volatile
{
EP_ABORT ^= 1u << 6u;
}
inline bool get_EP_ABORT_EP3_OUT() volatile
{
return EP_ABORT & (1u << 7u);
}
inline void set_EP_ABORT_EP3_OUT() volatile
{
EP_ABORT |= 1u << 7u;
}
inline void clear_EP_ABORT_EP3_OUT() volatile
{
EP_ABORT &= ~(1u << 7u);
}
inline void toggle_EP_ABORT_EP3_OUT() volatile
{
EP_ABORT ^= 1u << 7u;
}
inline bool get_EP_ABORT_EP4_IN() volatile
{
return EP_ABORT & (1u << 8u);
}
inline void set_EP_ABORT_EP4_IN() volatile
{
EP_ABORT |= 1u << 8u;
}
inline void clear_EP_ABORT_EP4_IN() volatile
{
EP_ABORT &= ~(1u << 8u);
}
inline void toggle_EP_ABORT_EP4_IN() volatile
{
EP_ABORT ^= 1u << 8u;
}
inline bool get_EP_ABORT_EP4_OUT() volatile
{
return EP_ABORT & (1u << 9u);
}
inline void set_EP_ABORT_EP4_OUT() volatile
{
EP_ABORT |= 1u << 9u;
}
inline void clear_EP_ABORT_EP4_OUT() volatile
{
EP_ABORT &= ~(1u << 9u);
}
inline void toggle_EP_ABORT_EP4_OUT() volatile
{
EP_ABORT ^= 1u << 9u;
}
inline bool get_EP_ABORT_EP5_IN() volatile
{
return EP_ABORT & (1u << 10u);
}
inline void set_EP_ABORT_EP5_IN() volatile
{
EP_ABORT |= 1u << 10u;
}
inline void clear_EP_ABORT_EP5_IN() volatile
{
EP_ABORT &= ~(1u << 10u);
}
inline void toggle_EP_ABORT_EP5_IN() volatile
{
EP_ABORT ^= 1u << 10u;
}
inline bool get_EP_ABORT_EP5_OUT() volatile
{
return EP_ABORT & (1u << 11u);
}
inline void set_EP_ABORT_EP5_OUT() volatile
{
EP_ABORT |= 1u << 11u;
}
inline void clear_EP_ABORT_EP5_OUT() volatile
{
EP_ABORT &= ~(1u << 11u);
}
inline void toggle_EP_ABORT_EP5_OUT() volatile
{
EP_ABORT ^= 1u << 11u;
}
inline bool get_EP_ABORT_EP6_IN() volatile
{
return EP_ABORT & (1u << 12u);
}
inline void set_EP_ABORT_EP6_IN() volatile
{
EP_ABORT |= 1u << 12u;
}
inline void clear_EP_ABORT_EP6_IN() volatile
{
EP_ABORT &= ~(1u << 12u);
}
inline void toggle_EP_ABORT_EP6_IN() volatile
{
EP_ABORT ^= 1u << 12u;
}
inline bool get_EP_ABORT_EP6_OUT() volatile
{
return EP_ABORT & (1u << 13u);
}
inline void set_EP_ABORT_EP6_OUT() volatile
{
EP_ABORT |= 1u << 13u;
}
inline void clear_EP_ABORT_EP6_OUT() volatile
{
EP_ABORT &= ~(1u << 13u);
}
inline void toggle_EP_ABORT_EP6_OUT() volatile
{
EP_ABORT ^= 1u << 13u;
}
inline bool get_EP_ABORT_EP7_IN() volatile
{
return EP_ABORT & (1u << 14u);
}
inline void set_EP_ABORT_EP7_IN() volatile
{
EP_ABORT |= 1u << 14u;
}
inline void clear_EP_ABORT_EP7_IN() volatile
{
EP_ABORT &= ~(1u << 14u);
}
inline void toggle_EP_ABORT_EP7_IN() volatile
{
EP_ABORT ^= 1u << 14u;
}
inline bool get_EP_ABORT_EP7_OUT() volatile
{
return EP_ABORT & (1u << 15u);
}
inline void set_EP_ABORT_EP7_OUT() volatile
{
EP_ABORT |= 1u << 15u;
}
inline void clear_EP_ABORT_EP7_OUT() volatile
{
EP_ABORT &= ~(1u << 15u);
}
inline void toggle_EP_ABORT_EP7_OUT() volatile
{
EP_ABORT ^= 1u << 15u;
}
inline bool get_EP_ABORT_EP8_IN() volatile
{
return EP_ABORT & (1u << 16u);
}
inline void set_EP_ABORT_EP8_IN() volatile
{
EP_ABORT |= 1u << 16u;
}
inline void clear_EP_ABORT_EP8_IN() volatile
{
EP_ABORT &= ~(1u << 16u);
}
inline void toggle_EP_ABORT_EP8_IN() volatile
{
EP_ABORT ^= 1u << 16u;
}
inline bool get_EP_ABORT_EP8_OUT() volatile
{
return EP_ABORT & (1u << 17u);
}
inline void set_EP_ABORT_EP8_OUT() volatile
{
EP_ABORT |= 1u << 17u;
}
inline void clear_EP_ABORT_EP8_OUT() volatile
{
EP_ABORT &= ~(1u << 17u);
}
inline void toggle_EP_ABORT_EP8_OUT() volatile
{
EP_ABORT ^= 1u << 17u;
}
inline bool get_EP_ABORT_EP9_IN() volatile
{
return EP_ABORT & (1u << 18u);
}
inline void set_EP_ABORT_EP9_IN() volatile
{
EP_ABORT |= 1u << 18u;
}
inline void clear_EP_ABORT_EP9_IN() volatile
{
EP_ABORT &= ~(1u << 18u);
}
inline void toggle_EP_ABORT_EP9_IN() volatile
{
EP_ABORT ^= 1u << 18u;
}
inline bool get_EP_ABORT_EP9_OUT() volatile
{
return EP_ABORT & (1u << 19u);
}
inline void set_EP_ABORT_EP9_OUT() volatile
{
EP_ABORT |= 1u << 19u;
}
inline void clear_EP_ABORT_EP9_OUT() volatile
{
EP_ABORT &= ~(1u << 19u);
}
inline void toggle_EP_ABORT_EP9_OUT() volatile
{
EP_ABORT ^= 1u << 19u;
}
inline bool get_EP_ABORT_EP10_IN() volatile
{
return EP_ABORT & (1u << 20u);
}
inline void set_EP_ABORT_EP10_IN() volatile
{
EP_ABORT |= 1u << 20u;
}
inline void clear_EP_ABORT_EP10_IN() volatile
{
EP_ABORT &= ~(1u << 20u);
}
inline void toggle_EP_ABORT_EP10_IN() volatile
{
EP_ABORT ^= 1u << 20u;
}
inline bool get_EP_ABORT_EP10_OUT() volatile
{
return EP_ABORT & (1u << 21u);
}
inline void set_EP_ABORT_EP10_OUT() volatile
{
EP_ABORT |= 1u << 21u;
}
inline void clear_EP_ABORT_EP10_OUT() volatile
{
EP_ABORT &= ~(1u << 21u);
}
inline void toggle_EP_ABORT_EP10_OUT() volatile
{
EP_ABORT ^= 1u << 21u;
}
inline bool get_EP_ABORT_EP11_IN() volatile
{
return EP_ABORT & (1u << 22u);
}
inline void set_EP_ABORT_EP11_IN() volatile
{
EP_ABORT |= 1u << 22u;
}
inline void clear_EP_ABORT_EP11_IN() volatile
{
EP_ABORT &= ~(1u << 22u);
}
inline void toggle_EP_ABORT_EP11_IN() volatile
{
EP_ABORT ^= 1u << 22u;
}
inline bool get_EP_ABORT_EP11_OUT() volatile
{
return EP_ABORT & (1u << 23u);
}
inline void set_EP_ABORT_EP11_OUT() volatile
{
EP_ABORT |= 1u << 23u;
}
inline void clear_EP_ABORT_EP11_OUT() volatile
{
EP_ABORT &= ~(1u << 23u);
}
inline void toggle_EP_ABORT_EP11_OUT() volatile
{
EP_ABORT ^= 1u << 23u;
}
inline bool get_EP_ABORT_EP12_IN() volatile
{
return EP_ABORT & (1u << 24u);
}
inline void set_EP_ABORT_EP12_IN() volatile
{
EP_ABORT |= 1u << 24u;
}
inline void clear_EP_ABORT_EP12_IN() volatile
{
EP_ABORT &= ~(1u << 24u);
}
inline void toggle_EP_ABORT_EP12_IN() volatile
{
EP_ABORT ^= 1u << 24u;
}
inline bool get_EP_ABORT_EP12_OUT() volatile
{
return EP_ABORT & (1u << 25u);
}
inline void set_EP_ABORT_EP12_OUT() volatile
{
EP_ABORT |= 1u << 25u;
}
inline void clear_EP_ABORT_EP12_OUT() volatile
{
EP_ABORT &= ~(1u << 25u);
}
inline void toggle_EP_ABORT_EP12_OUT() volatile
{
EP_ABORT ^= 1u << 25u;
}
inline bool get_EP_ABORT_EP13_IN() volatile
{
return EP_ABORT & (1u << 26u);
}
inline void set_EP_ABORT_EP13_IN() volatile
{
EP_ABORT |= 1u << 26u;
}
inline void clear_EP_ABORT_EP13_IN() volatile
{
EP_ABORT &= ~(1u << 26u);
}
inline void toggle_EP_ABORT_EP13_IN() volatile
{
EP_ABORT ^= 1u << 26u;
}
inline bool get_EP_ABORT_EP13_OUT() volatile
{
return EP_ABORT & (1u << 27u);
}
inline void set_EP_ABORT_EP13_OUT() volatile
{
EP_ABORT |= 1u << 27u;
}
inline void clear_EP_ABORT_EP13_OUT() volatile
{
EP_ABORT &= ~(1u << 27u);
}
inline void toggle_EP_ABORT_EP13_OUT() volatile
{
EP_ABORT ^= 1u << 27u;
}
inline bool get_EP_ABORT_EP14_IN() volatile
{
return EP_ABORT & (1u << 28u);
}
inline void set_EP_ABORT_EP14_IN() volatile
{
EP_ABORT |= 1u << 28u;
}
inline void clear_EP_ABORT_EP14_IN() volatile
{
EP_ABORT &= ~(1u << 28u);
}
inline void toggle_EP_ABORT_EP14_IN() volatile
{
EP_ABORT ^= 1u << 28u;
}
inline bool get_EP_ABORT_EP14_OUT() volatile
{
return EP_ABORT & (1u << 29u);
}
inline void set_EP_ABORT_EP14_OUT() volatile
{
EP_ABORT |= 1u << 29u;
}
inline void clear_EP_ABORT_EP14_OUT() volatile
{
EP_ABORT &= ~(1u << 29u);
}
inline void toggle_EP_ABORT_EP14_OUT() volatile
{
EP_ABORT ^= 1u << 29u;
}
inline bool get_EP_ABORT_EP15_IN() volatile
{
return EP_ABORT & (1u << 30u);
}
inline void set_EP_ABORT_EP15_IN() volatile
{
EP_ABORT |= 1u << 30u;
}
inline void clear_EP_ABORT_EP15_IN() volatile
{
EP_ABORT &= ~(1u << 30u);
}
inline void toggle_EP_ABORT_EP15_IN() volatile
{
EP_ABORT ^= 1u << 30u;
}
inline bool get_EP_ABORT_EP15_OUT() volatile
{
return EP_ABORT & (1u << 31u);
}
inline void set_EP_ABORT_EP15_OUT() volatile
{
EP_ABORT |= 1u << 31u;
}
inline void clear_EP_ABORT_EP15_OUT() volatile
{
EP_ABORT &= ~(1u << 31u);
}
inline void toggle_EP_ABORT_EP15_OUT() volatile
{
EP_ABORT ^= 1u << 31u;
}
inline void get_EP_ABORT(bool &EP0_IN, bool &EP0_OUT, bool &EP1_IN,
bool &EP1_OUT, bool &EP2_IN, bool &EP2_OUT,
bool &EP3_IN, bool &EP3_OUT, bool &EP4_IN,
bool &EP4_OUT, bool &EP5_IN, bool &EP5_OUT,
bool &EP6_IN, bool &EP6_OUT, bool &EP7_IN,
bool &EP7_OUT, bool &EP8_IN, bool &EP8_OUT,
bool &EP9_IN, bool &EP9_OUT, bool &EP10_IN,
bool &EP10_OUT, bool &EP11_IN, bool &EP11_OUT,
bool &EP12_IN, bool &EP12_OUT, bool &EP13_IN,
bool &EP13_OUT, bool &EP14_IN, bool &EP14_OUT,
bool &EP15_IN, bool &EP15_OUT) volatile
{
uint32_t curr = EP_ABORT;
EP0_IN = curr & (1u << 0u);
EP0_OUT = curr & (1u << 1u);
EP1_IN = curr & (1u << 2u);
EP1_OUT = curr & (1u << 3u);
EP2_IN = curr & (1u << 4u);
EP2_OUT = curr & (1u << 5u);
EP3_IN = curr & (1u << 6u);
EP3_OUT = curr & (1u << 7u);
EP4_IN = curr & (1u << 8u);
EP4_OUT = curr & (1u << 9u);
EP5_IN = curr & (1u << 10u);
EP5_OUT = curr & (1u << 11u);
EP6_IN = curr & (1u << 12u);
EP6_OUT = curr & (1u << 13u);
EP7_IN = curr & (1u << 14u);
EP7_OUT = curr & (1u << 15u);
EP8_IN = curr & (1u << 16u);
EP8_OUT = curr & (1u << 17u);
EP9_IN = curr & (1u << 18u);
EP9_OUT = curr & (1u << 19u);
EP10_IN = curr & (1u << 20u);
EP10_OUT = curr & (1u << 21u);
EP11_IN = curr & (1u << 22u);
EP11_OUT = curr & (1u << 23u);
EP12_IN = curr & (1u << 24u);
EP12_OUT = curr & (1u << 25u);
EP13_IN = curr & (1u << 26u);
EP13_OUT = curr & (1u << 27u);
EP14_IN = curr & (1u << 28u);
EP14_OUT = curr & (1u << 29u);
EP15_IN = curr & (1u << 30u);
EP15_OUT = curr & (1u << 31u);
}
inline void set_EP_ABORT(
bool EP0_IN, bool EP0_OUT, bool EP1_IN, bool EP1_OUT, bool EP2_IN,
bool EP2_OUT, bool EP3_IN, bool EP3_OUT, bool EP4_IN, bool EP4_OUT,
bool EP5_IN, bool EP5_OUT, bool EP6_IN, bool EP6_OUT, bool EP7_IN,
bool EP7_OUT, bool EP8_IN, bool EP8_OUT, bool EP9_IN, bool EP9_OUT,
bool EP10_IN, bool EP10_OUT, bool EP11_IN, bool EP11_OUT, bool EP12_IN,
bool EP12_OUT, bool EP13_IN, bool EP13_OUT, bool EP14_IN,
bool EP14_OUT, bool EP15_IN, bool EP15_OUT) volatile
{
uint32_t curr = EP_ABORT;
curr &= ~(0b1u << 0u);
curr |= (EP0_IN & 0b1u) << 0u;
curr &= ~(0b1u << 1u);
curr |= (EP0_OUT & 0b1u) << 1u;
curr &= ~(0b1u << 2u);
curr |= (EP1_IN & 0b1u) << 2u;
curr &= ~(0b1u << 3u);
curr |= (EP1_OUT & 0b1u) << 3u;
curr &= ~(0b1u << 4u);
curr |= (EP2_IN & 0b1u) << 4u;
curr &= ~(0b1u << 5u);
curr |= (EP2_OUT & 0b1u) << 5u;
curr &= ~(0b1u << 6u);
curr |= (EP3_IN & 0b1u) << 6u;
curr &= ~(0b1u << 7u);
curr |= (EP3_OUT & 0b1u) << 7u;
curr &= ~(0b1u << 8u);
curr |= (EP4_IN & 0b1u) << 8u;
curr &= ~(0b1u << 9u);
curr |= (EP4_OUT & 0b1u) << 9u;
curr &= ~(0b1u << 10u);
curr |= (EP5_IN & 0b1u) << 10u;
curr &= ~(0b1u << 11u);
curr |= (EP5_OUT & 0b1u) << 11u;
curr &= ~(0b1u << 12u);
curr |= (EP6_IN & 0b1u) << 12u;
curr &= ~(0b1u << 13u);
curr |= (EP6_OUT & 0b1u) << 13u;
curr &= ~(0b1u << 14u);
curr |= (EP7_IN & 0b1u) << 14u;
curr &= ~(0b1u << 15u);
curr |= (EP7_OUT & 0b1u) << 15u;
curr &= ~(0b1u << 16u);
curr |= (EP8_IN & 0b1u) << 16u;
curr &= ~(0b1u << 17u);
curr |= (EP8_OUT & 0b1u) << 17u;
curr &= ~(0b1u << 18u);
curr |= (EP9_IN & 0b1u) << 18u;
curr &= ~(0b1u << 19u);
curr |= (EP9_OUT & 0b1u) << 19u;
curr &= ~(0b1u << 20u);
curr |= (EP10_IN & 0b1u) << 20u;
curr &= ~(0b1u << 21u);
curr |= (EP10_OUT & 0b1u) << 21u;
curr &= ~(0b1u << 22u);
curr |= (EP11_IN & 0b1u) << 22u;
curr &= ~(0b1u << 23u);
curr |= (EP11_OUT & 0b1u) << 23u;
curr &= ~(0b1u << 24u);
curr |= (EP12_IN & 0b1u) << 24u;
curr &= ~(0b1u << 25u);
curr |= (EP12_OUT & 0b1u) << 25u;
curr &= ~(0b1u << 26u);
curr |= (EP13_IN & 0b1u) << 26u;
curr &= ~(0b1u << 27u);
curr |= (EP13_OUT & 0b1u) << 27u;
curr &= ~(0b1u << 28u);
curr |= (EP14_IN & 0b1u) << 28u;
curr &= ~(0b1u << 29u);
curr |= (EP14_OUT & 0b1u) << 29u;
curr &= ~(0b1u << 30u);
curr |= (EP15_IN & 0b1u) << 30u;
curr &= ~(0b1u << 31u);
curr |= (EP15_OUT & 0b1u) << 31u;
EP_ABORT = curr;
}
inline bool get_EP_ABORT_DONE_EP0_IN() volatile
{
return EP_ABORT_DONE & (1u << 0u);
}
inline void set_EP_ABORT_DONE_EP0_IN() volatile
{
EP_ABORT_DONE |= 1u << 0u;
}
inline void clear_EP_ABORT_DONE_EP0_IN() volatile
{
EP_ABORT_DONE &= ~(1u << 0u);
}
inline void toggle_EP_ABORT_DONE_EP0_IN() volatile
{
EP_ABORT_DONE ^= 1u << 0u;
}
inline bool get_EP_ABORT_DONE_EP0_OUT() volatile
{
return EP_ABORT_DONE & (1u << 1u);
}
inline void set_EP_ABORT_DONE_EP0_OUT() volatile
{
EP_ABORT_DONE |= 1u << 1u;
}
inline void clear_EP_ABORT_DONE_EP0_OUT() volatile
{
EP_ABORT_DONE &= ~(1u << 1u);
}
inline void toggle_EP_ABORT_DONE_EP0_OUT() volatile
{
EP_ABORT_DONE ^= 1u << 1u;
}
inline bool get_EP_ABORT_DONE_EP1_IN() volatile
{
return EP_ABORT_DONE & (1u << 2u);
}
inline void set_EP_ABORT_DONE_EP1_IN() volatile
{
EP_ABORT_DONE |= 1u << 2u;
}
inline void clear_EP_ABORT_DONE_EP1_IN() volatile
{
EP_ABORT_DONE &= ~(1u << 2u);
}
inline void toggle_EP_ABORT_DONE_EP1_IN() volatile
{
EP_ABORT_DONE ^= 1u << 2u;
}
inline bool get_EP_ABORT_DONE_EP1_OUT() volatile
{
return EP_ABORT_DONE & (1u << 3u);
}
inline void set_EP_ABORT_DONE_EP1_OUT() volatile
{
EP_ABORT_DONE |= 1u << 3u;
}
inline void clear_EP_ABORT_DONE_EP1_OUT() volatile
{
EP_ABORT_DONE &= ~(1u << 3u);
}
inline void toggle_EP_ABORT_DONE_EP1_OUT() volatile
{
EP_ABORT_DONE ^= 1u << 3u;
}
inline bool get_EP_ABORT_DONE_EP2_IN() volatile
{
return EP_ABORT_DONE & (1u << 4u);
}
inline void set_EP_ABORT_DONE_EP2_IN() volatile
{
EP_ABORT_DONE |= 1u << 4u;
}
inline void clear_EP_ABORT_DONE_EP2_IN() volatile
{
EP_ABORT_DONE &= ~(1u << 4u);
}
inline void toggle_EP_ABORT_DONE_EP2_IN() volatile
{
EP_ABORT_DONE ^= 1u << 4u;
}
inline bool get_EP_ABORT_DONE_EP2_OUT() volatile
{
return EP_ABORT_DONE & (1u << 5u);
}
inline void set_EP_ABORT_DONE_EP2_OUT() volatile
{
EP_ABORT_DONE |= 1u << 5u;
}
inline void clear_EP_ABORT_DONE_EP2_OUT() volatile
{
EP_ABORT_DONE &= ~(1u << 5u);
}
inline void toggle_EP_ABORT_DONE_EP2_OUT() volatile
{
EP_ABORT_DONE ^= 1u << 5u;
}
inline bool get_EP_ABORT_DONE_EP3_IN() volatile
{
return EP_ABORT_DONE & (1u << 6u);
}
inline void set_EP_ABORT_DONE_EP3_IN() volatile
{
EP_ABORT_DONE |= 1u << 6u;
}
inline void clear_EP_ABORT_DONE_EP3_IN() volatile
{
EP_ABORT_DONE &= ~(1u << 6u);
}
inline void toggle_EP_ABORT_DONE_EP3_IN() volatile
{
EP_ABORT_DONE ^= 1u << 6u;
}
inline bool get_EP_ABORT_DONE_EP3_OUT() volatile
{
return EP_ABORT_DONE & (1u << 7u);
}
inline void set_EP_ABORT_DONE_EP3_OUT() volatile
{
EP_ABORT_DONE |= 1u << 7u;
}
inline void clear_EP_ABORT_DONE_EP3_OUT() volatile
{
EP_ABORT_DONE &= ~(1u << 7u);
}
inline void toggle_EP_ABORT_DONE_EP3_OUT() volatile
{
EP_ABORT_DONE ^= 1u << 7u;
}
inline bool get_EP_ABORT_DONE_EP4_IN() volatile
{
return EP_ABORT_DONE & (1u << 8u);
}
inline void set_EP_ABORT_DONE_EP4_IN() volatile
{
EP_ABORT_DONE |= 1u << 8u;
}
inline void clear_EP_ABORT_DONE_EP4_IN() volatile
{
EP_ABORT_DONE &= ~(1u << 8u);
}
inline void toggle_EP_ABORT_DONE_EP4_IN() volatile
{
EP_ABORT_DONE ^= 1u << 8u;
}
inline bool get_EP_ABORT_DONE_EP4_OUT() volatile
{
return EP_ABORT_DONE & (1u << 9u);
}
inline void set_EP_ABORT_DONE_EP4_OUT() volatile
{
EP_ABORT_DONE |= 1u << 9u;
}
inline void clear_EP_ABORT_DONE_EP4_OUT() volatile
{
EP_ABORT_DONE &= ~(1u << 9u);
}
inline void toggle_EP_ABORT_DONE_EP4_OUT() volatile
{
EP_ABORT_DONE ^= 1u << 9u;
}
inline bool get_EP_ABORT_DONE_EP5_IN() volatile
{
return EP_ABORT_DONE & (1u << 10u);
}
inline void set_EP_ABORT_DONE_EP5_IN() volatile
{
EP_ABORT_DONE |= 1u << 10u;
}
inline void clear_EP_ABORT_DONE_EP5_IN() volatile
{
EP_ABORT_DONE &= ~(1u << 10u);
}
inline void toggle_EP_ABORT_DONE_EP5_IN() volatile
{
EP_ABORT_DONE ^= 1u << 10u;
}
inline bool get_EP_ABORT_DONE_EP5_OUT() volatile
{
return EP_ABORT_DONE & (1u << 11u);
}
inline void set_EP_ABORT_DONE_EP5_OUT() volatile
{
EP_ABORT_DONE |= 1u << 11u;
}
inline void clear_EP_ABORT_DONE_EP5_OUT() volatile
{
EP_ABORT_DONE &= ~(1u << 11u);
}
inline void toggle_EP_ABORT_DONE_EP5_OUT() volatile
{
EP_ABORT_DONE ^= 1u << 11u;
}
inline bool get_EP_ABORT_DONE_EP6_IN() volatile
{
return EP_ABORT_DONE & (1u << 12u);
}
inline void set_EP_ABORT_DONE_EP6_IN() volatile
{
EP_ABORT_DONE |= 1u << 12u;
}
inline void clear_EP_ABORT_DONE_EP6_IN() volatile
{
EP_ABORT_DONE &= ~(1u << 12u);
}
inline void toggle_EP_ABORT_DONE_EP6_IN() volatile
{
EP_ABORT_DONE ^= 1u << 12u;
}
inline bool get_EP_ABORT_DONE_EP6_OUT() volatile
{
return EP_ABORT_DONE & (1u << 13u);
}
inline void set_EP_ABORT_DONE_EP6_OUT() volatile
{
EP_ABORT_DONE |= 1u << 13u;
}
inline void clear_EP_ABORT_DONE_EP6_OUT() volatile
{
EP_ABORT_DONE &= ~(1u << 13u);
}
inline void toggle_EP_ABORT_DONE_EP6_OUT() volatile
{
EP_ABORT_DONE ^= 1u << 13u;
}
inline bool get_EP_ABORT_DONE_EP7_IN() volatile
{
return EP_ABORT_DONE & (1u << 14u);
}
inline void set_EP_ABORT_DONE_EP7_IN() volatile
{
EP_ABORT_DONE |= 1u << 14u;
}
inline void clear_EP_ABORT_DONE_EP7_IN() volatile
{
EP_ABORT_DONE &= ~(1u << 14u);
}
inline void toggle_EP_ABORT_DONE_EP7_IN() volatile
{
EP_ABORT_DONE ^= 1u << 14u;
}
inline bool get_EP_ABORT_DONE_EP7_OUT() volatile
{
return EP_ABORT_DONE & (1u << 15u);
}
inline void set_EP_ABORT_DONE_EP7_OUT() volatile
{
EP_ABORT_DONE |= 1u << 15u;
}
inline void clear_EP_ABORT_DONE_EP7_OUT() volatile
{
EP_ABORT_DONE &= ~(1u << 15u);
}
inline void toggle_EP_ABORT_DONE_EP7_OUT() volatile
{
EP_ABORT_DONE ^= 1u << 15u;
}
inline bool get_EP_ABORT_DONE_EP8_IN() volatile
{
return EP_ABORT_DONE & (1u << 16u);
}
inline void set_EP_ABORT_DONE_EP8_IN() volatile
{
EP_ABORT_DONE |= 1u << 16u;
}
inline void clear_EP_ABORT_DONE_EP8_IN() volatile
{
EP_ABORT_DONE &= ~(1u << 16u);
}
inline void toggle_EP_ABORT_DONE_EP8_IN() volatile
{
EP_ABORT_DONE ^= 1u << 16u;
}
inline bool get_EP_ABORT_DONE_EP8_OUT() volatile
{
return EP_ABORT_DONE & (1u << 17u);
}
inline void set_EP_ABORT_DONE_EP8_OUT() volatile
{
EP_ABORT_DONE |= 1u << 17u;
}
inline void clear_EP_ABORT_DONE_EP8_OUT() volatile
{
EP_ABORT_DONE &= ~(1u << 17u);
}
inline void toggle_EP_ABORT_DONE_EP8_OUT() volatile
{
EP_ABORT_DONE ^= 1u << 17u;
}
inline bool get_EP_ABORT_DONE_EP9_IN() volatile
{
return EP_ABORT_DONE & (1u << 18u);
}
inline void set_EP_ABORT_DONE_EP9_IN() volatile
{
EP_ABORT_DONE |= 1u << 18u;
}
inline void clear_EP_ABORT_DONE_EP9_IN() volatile
{
EP_ABORT_DONE &= ~(1u << 18u);
}
inline void toggle_EP_ABORT_DONE_EP9_IN() volatile
{
EP_ABORT_DONE ^= 1u << 18u;
}
inline bool get_EP_ABORT_DONE_EP9_OUT() volatile
{
return EP_ABORT_DONE & (1u << 19u);
}
inline void set_EP_ABORT_DONE_EP9_OUT() volatile
{
EP_ABORT_DONE |= 1u << 19u;
}
inline void clear_EP_ABORT_DONE_EP9_OUT() volatile
{
EP_ABORT_DONE &= ~(1u << 19u);
}
inline void toggle_EP_ABORT_DONE_EP9_OUT() volatile
{
EP_ABORT_DONE ^= 1u << 19u;
}
inline bool get_EP_ABORT_DONE_EP10_IN() volatile
{
return EP_ABORT_DONE & (1u << 20u);
}
inline void set_EP_ABORT_DONE_EP10_IN() volatile
{
EP_ABORT_DONE |= 1u << 20u;
}
inline void clear_EP_ABORT_DONE_EP10_IN() volatile
{
EP_ABORT_DONE &= ~(1u << 20u);
}
inline void toggle_EP_ABORT_DONE_EP10_IN() volatile
{
EP_ABORT_DONE ^= 1u << 20u;
}
inline bool get_EP_ABORT_DONE_EP10_OUT() volatile
{
return EP_ABORT_DONE & (1u << 21u);
}
inline void set_EP_ABORT_DONE_EP10_OUT() volatile
{
EP_ABORT_DONE |= 1u << 21u;
}
inline void clear_EP_ABORT_DONE_EP10_OUT() volatile
{
EP_ABORT_DONE &= ~(1u << 21u);
}
inline void toggle_EP_ABORT_DONE_EP10_OUT() volatile
{
EP_ABORT_DONE ^= 1u << 21u;
}
inline bool get_EP_ABORT_DONE_EP11_IN() volatile
{
return EP_ABORT_DONE & (1u << 22u);
}
inline void set_EP_ABORT_DONE_EP11_IN() volatile
{
EP_ABORT_DONE |= 1u << 22u;
}
inline void clear_EP_ABORT_DONE_EP11_IN() volatile
{
EP_ABORT_DONE &= ~(1u << 22u);
}
inline void toggle_EP_ABORT_DONE_EP11_IN() volatile
{
EP_ABORT_DONE ^= 1u << 22u;
}
inline bool get_EP_ABORT_DONE_EP11_OUT() volatile
{
return EP_ABORT_DONE & (1u << 23u);
}
inline void set_EP_ABORT_DONE_EP11_OUT() volatile
{
EP_ABORT_DONE |= 1u << 23u;
}
inline void clear_EP_ABORT_DONE_EP11_OUT() volatile
{
EP_ABORT_DONE &= ~(1u << 23u);
}
inline void toggle_EP_ABORT_DONE_EP11_OUT() volatile
{
EP_ABORT_DONE ^= 1u << 23u;
}
inline bool get_EP_ABORT_DONE_EP12_IN() volatile
{
return EP_ABORT_DONE & (1u << 24u);
}
inline void set_EP_ABORT_DONE_EP12_IN() volatile
{
EP_ABORT_DONE |= 1u << 24u;
}
inline void clear_EP_ABORT_DONE_EP12_IN() volatile
{
EP_ABORT_DONE &= ~(1u << 24u);
}
inline void toggle_EP_ABORT_DONE_EP12_IN() volatile
{
EP_ABORT_DONE ^= 1u << 24u;
}
inline bool get_EP_ABORT_DONE_EP12_OUT() volatile
{
return EP_ABORT_DONE & (1u << 25u);
}
inline void set_EP_ABORT_DONE_EP12_OUT() volatile
{
EP_ABORT_DONE |= 1u << 25u;
}
inline void clear_EP_ABORT_DONE_EP12_OUT() volatile
{
EP_ABORT_DONE &= ~(1u << 25u);
}
inline void toggle_EP_ABORT_DONE_EP12_OUT() volatile
{
EP_ABORT_DONE ^= 1u << 25u;
}
inline bool get_EP_ABORT_DONE_EP13_IN() volatile
{
return EP_ABORT_DONE & (1u << 26u);
}
inline void set_EP_ABORT_DONE_EP13_IN() volatile
{
EP_ABORT_DONE |= 1u << 26u;
}
inline void clear_EP_ABORT_DONE_EP13_IN() volatile
{
EP_ABORT_DONE &= ~(1u << 26u);
}
inline void toggle_EP_ABORT_DONE_EP13_IN() volatile
{
EP_ABORT_DONE ^= 1u << 26u;
}
inline bool get_EP_ABORT_DONE_EP13_OUT() volatile
{
return EP_ABORT_DONE & (1u << 27u);
}
inline void set_EP_ABORT_DONE_EP13_OUT() volatile
{
EP_ABORT_DONE |= 1u << 27u;
}
inline void clear_EP_ABORT_DONE_EP13_OUT() volatile
{
EP_ABORT_DONE &= ~(1u << 27u);
}
inline void toggle_EP_ABORT_DONE_EP13_OUT() volatile
{
EP_ABORT_DONE ^= 1u << 27u;
}
inline bool get_EP_ABORT_DONE_EP14_IN() volatile
{
return EP_ABORT_DONE & (1u << 28u);
}
inline void set_EP_ABORT_DONE_EP14_IN() volatile
{
EP_ABORT_DONE |= 1u << 28u;
}
inline void clear_EP_ABORT_DONE_EP14_IN() volatile
{
EP_ABORT_DONE &= ~(1u << 28u);
}
inline void toggle_EP_ABORT_DONE_EP14_IN() volatile
{
EP_ABORT_DONE ^= 1u << 28u;
}
inline bool get_EP_ABORT_DONE_EP14_OUT() volatile
{
return EP_ABORT_DONE & (1u << 29u);
}
inline void set_EP_ABORT_DONE_EP14_OUT() volatile
{
EP_ABORT_DONE |= 1u << 29u;
}
inline void clear_EP_ABORT_DONE_EP14_OUT() volatile
{
EP_ABORT_DONE &= ~(1u << 29u);
}
inline void toggle_EP_ABORT_DONE_EP14_OUT() volatile
{
EP_ABORT_DONE ^= 1u << 29u;
}
inline bool get_EP_ABORT_DONE_EP15_IN() volatile
{
return EP_ABORT_DONE & (1u << 30u);
}
inline void set_EP_ABORT_DONE_EP15_IN() volatile
{
EP_ABORT_DONE |= 1u << 30u;
}
inline void clear_EP_ABORT_DONE_EP15_IN() volatile
{
EP_ABORT_DONE &= ~(1u << 30u);
}
inline void toggle_EP_ABORT_DONE_EP15_IN() volatile
{
EP_ABORT_DONE ^= 1u << 30u;
}
inline bool get_EP_ABORT_DONE_EP15_OUT() volatile
{
return EP_ABORT_DONE & (1u << 31u);
}
inline void set_EP_ABORT_DONE_EP15_OUT() volatile
{
EP_ABORT_DONE |= 1u << 31u;
}
inline void clear_EP_ABORT_DONE_EP15_OUT() volatile
{
EP_ABORT_DONE &= ~(1u << 31u);
}
inline void toggle_EP_ABORT_DONE_EP15_OUT() volatile
{
EP_ABORT_DONE ^= 1u << 31u;
}
inline void get_EP_ABORT_DONE(
bool &EP0_IN, bool &EP0_OUT, bool &EP1_IN, bool &EP1_OUT, bool &EP2_IN,
bool &EP2_OUT, bool &EP3_IN, bool &EP3_OUT, bool &EP4_IN,
bool &EP4_OUT, bool &EP5_IN, bool &EP5_OUT, bool &EP6_IN,
bool &EP6_OUT, bool &EP7_IN, bool &EP7_OUT, bool &EP8_IN,
bool &EP8_OUT, bool &EP9_IN, bool &EP9_OUT, bool &EP10_IN,
bool &EP10_OUT, bool &EP11_IN, bool &EP11_OUT, bool &EP12_IN,
bool &EP12_OUT, bool &EP13_IN, bool &EP13_OUT, bool &EP14_IN,
bool &EP14_OUT, bool &EP15_IN, bool &EP15_OUT) volatile
{
uint32_t curr = EP_ABORT_DONE;
EP0_IN = curr & (1u << 0u);
EP0_OUT = curr & (1u << 1u);
EP1_IN = curr & (1u << 2u);
EP1_OUT = curr & (1u << 3u);
EP2_IN = curr & (1u << 4u);
EP2_OUT = curr & (1u << 5u);
EP3_IN = curr & (1u << 6u);
EP3_OUT = curr & (1u << 7u);
EP4_IN = curr & (1u << 8u);
EP4_OUT = curr & (1u << 9u);
EP5_IN = curr & (1u << 10u);
EP5_OUT = curr & (1u << 11u);
EP6_IN = curr & (1u << 12u);
EP6_OUT = curr & (1u << 13u);
EP7_IN = curr & (1u << 14u);
EP7_OUT = curr & (1u << 15u);
EP8_IN = curr & (1u << 16u);
EP8_OUT = curr & (1u << 17u);
EP9_IN = curr & (1u << 18u);
EP9_OUT = curr & (1u << 19u);
EP10_IN = curr & (1u << 20u);
EP10_OUT = curr & (1u << 21u);
EP11_IN = curr & (1u << 22u);
EP11_OUT = curr & (1u << 23u);
EP12_IN = curr & (1u << 24u);
EP12_OUT = curr & (1u << 25u);
EP13_IN = curr & (1u << 26u);
EP13_OUT = curr & (1u << 27u);
EP14_IN = curr & (1u << 28u);
EP14_OUT = curr & (1u << 29u);
EP15_IN = curr & (1u << 30u);
EP15_OUT = curr & (1u << 31u);
}
inline void set_EP_ABORT_DONE(
bool EP0_IN, bool EP0_OUT, bool EP1_IN, bool EP1_OUT, bool EP2_IN,
bool EP2_OUT, bool EP3_IN, bool EP3_OUT, bool EP4_IN, bool EP4_OUT,
bool EP5_IN, bool EP5_OUT, bool EP6_IN, bool EP6_OUT, bool EP7_IN,
bool EP7_OUT, bool EP8_IN, bool EP8_OUT, bool EP9_IN, bool EP9_OUT,
bool EP10_IN, bool EP10_OUT, bool EP11_IN, bool EP11_OUT, bool EP12_IN,
bool EP12_OUT, bool EP13_IN, bool EP13_OUT, bool EP14_IN,
bool EP14_OUT, bool EP15_IN, bool EP15_OUT) volatile
{
uint32_t curr = EP_ABORT_DONE;
curr &= ~(0b1u << 0u);
curr |= (EP0_IN & 0b1u) << 0u;
curr &= ~(0b1u << 1u);
curr |= (EP0_OUT & 0b1u) << 1u;
curr &= ~(0b1u << 2u);
curr |= (EP1_IN & 0b1u) << 2u;
curr &= ~(0b1u << 3u);
curr |= (EP1_OUT & 0b1u) << 3u;
curr &= ~(0b1u << 4u);
curr |= (EP2_IN & 0b1u) << 4u;
curr &= ~(0b1u << 5u);
curr |= (EP2_OUT & 0b1u) << 5u;
curr &= ~(0b1u << 6u);
curr |= (EP3_IN & 0b1u) << 6u;
curr &= ~(0b1u << 7u);
curr |= (EP3_OUT & 0b1u) << 7u;
curr &= ~(0b1u << 8u);
curr |= (EP4_IN & 0b1u) << 8u;
curr &= ~(0b1u << 9u);
curr |= (EP4_OUT & 0b1u) << 9u;
curr &= ~(0b1u << 10u);
curr |= (EP5_IN & 0b1u) << 10u;
curr &= ~(0b1u << 11u);
curr |= (EP5_OUT & 0b1u) << 11u;
curr &= ~(0b1u << 12u);
curr |= (EP6_IN & 0b1u) << 12u;
curr &= ~(0b1u << 13u);
curr |= (EP6_OUT & 0b1u) << 13u;
curr &= ~(0b1u << 14u);
curr |= (EP7_IN & 0b1u) << 14u;
curr &= ~(0b1u << 15u);
curr |= (EP7_OUT & 0b1u) << 15u;
curr &= ~(0b1u << 16u);
curr |= (EP8_IN & 0b1u) << 16u;
curr &= ~(0b1u << 17u);
curr |= (EP8_OUT & 0b1u) << 17u;
curr &= ~(0b1u << 18u);
curr |= (EP9_IN & 0b1u) << 18u;
curr &= ~(0b1u << 19u);
curr |= (EP9_OUT & 0b1u) << 19u;
curr &= ~(0b1u << 20u);
curr |= (EP10_IN & 0b1u) << 20u;
curr &= ~(0b1u << 21u);
curr |= (EP10_OUT & 0b1u) << 21u;
curr &= ~(0b1u << 22u);
curr |= (EP11_IN & 0b1u) << 22u;
curr &= ~(0b1u << 23u);
curr |= (EP11_OUT & 0b1u) << 23u;
curr &= ~(0b1u << 24u);
curr |= (EP12_IN & 0b1u) << 24u;
curr &= ~(0b1u << 25u);
curr |= (EP12_OUT & 0b1u) << 25u;
curr &= ~(0b1u << 26u);
curr |= (EP13_IN & 0b1u) << 26u;
curr &= ~(0b1u << 27u);
curr |= (EP13_OUT & 0b1u) << 27u;
curr &= ~(0b1u << 28u);
curr |= (EP14_IN & 0b1u) << 28u;
curr &= ~(0b1u << 29u);
curr |= (EP14_OUT & 0b1u) << 29u;
curr &= ~(0b1u << 30u);
curr |= (EP15_IN & 0b1u) << 30u;
curr &= ~(0b1u << 31u);
curr |= (EP15_OUT & 0b1u) << 31u;
EP_ABORT_DONE = curr;
}
inline bool get_EP_STALL_ARM_EP0_IN() volatile
{
return EP_STALL_ARM & (1u << 0u);
}
inline void set_EP_STALL_ARM_EP0_IN() volatile
{
EP_STALL_ARM |= 1u << 0u;
}
inline void clear_EP_STALL_ARM_EP0_IN() volatile
{
EP_STALL_ARM &= ~(1u << 0u);
}
inline void toggle_EP_STALL_ARM_EP0_IN() volatile
{
EP_STALL_ARM ^= 1u << 0u;
}
inline bool get_EP_STALL_ARM_EP0_OUT() volatile
{
return EP_STALL_ARM & (1u << 1u);
}
inline void set_EP_STALL_ARM_EP0_OUT() volatile
{
EP_STALL_ARM |= 1u << 1u;
}
inline void clear_EP_STALL_ARM_EP0_OUT() volatile
{
EP_STALL_ARM &= ~(1u << 1u);
}
inline void toggle_EP_STALL_ARM_EP0_OUT() volatile
{
EP_STALL_ARM ^= 1u << 1u;
}
inline void get_EP_STALL_ARM(bool &EP0_IN, bool &EP0_OUT) volatile
{
uint32_t curr = EP_STALL_ARM;
EP0_IN = curr & (1u << 0u);
EP0_OUT = curr & (1u << 1u);
}
inline void set_EP_STALL_ARM(bool EP0_IN, bool EP0_OUT) volatile
{
uint32_t curr = EP_STALL_ARM;
curr &= ~(0b1u << 0u);
curr |= (EP0_IN & 0b1u) << 0u;
curr &= ~(0b1u << 1u);
curr |= (EP0_OUT & 0b1u) << 1u;
EP_STALL_ARM = curr;
}
inline uint16_t get_NAK_POLL_DELAY_LS() volatile
{
return (NAK_POLL >> 0u) & 0b1111111111u;
}
inline void set_NAK_POLL_DELAY_LS(uint16_t value) volatile
{
uint32_t curr = NAK_POLL;
curr &= ~(0b1111111111u << 0u);
curr |= (value & 0b1111111111u) << 0u;
NAK_POLL = curr;
}
inline uint16_t get_NAK_POLL_DELAY_FS() volatile
{
return (NAK_POLL >> 16u) & 0b1111111111u;
}
inline void set_NAK_POLL_DELAY_FS(uint16_t value) volatile
{
uint32_t curr = NAK_POLL;
curr &= ~(0b1111111111u << 16u);
curr |= (value & 0b1111111111u) << 16u;
NAK_POLL = curr;
}
inline void get_NAK_POLL(uint16_t &DELAY_LS, uint16_t &DELAY_FS) volatile
{
uint32_t curr = NAK_POLL;
DELAY_LS = (curr >> 0u) & 0b1111111111u;
DELAY_FS = (curr >> 16u) & 0b1111111111u;
}
inline void set_NAK_POLL(uint16_t DELAY_LS, uint16_t DELAY_FS) volatile
{
uint32_t curr = NAK_POLL;
curr &= ~(0b1111111111u << 0u);
curr |= (DELAY_LS & 0b1111111111u) << 0u;
curr &= ~(0b1111111111u << 16u);
curr |= (DELAY_FS & 0b1111111111u) << 16u;
NAK_POLL = curr;
}
inline bool get_EP_STATUS_STALL_NAK_EP0_IN() volatile
{
return EP_STATUS_STALL_NAK & (1u << 0u);
}
inline void set_EP_STATUS_STALL_NAK_EP0_IN() volatile
{
EP_STATUS_STALL_NAK |= 1u << 0u;
}
inline void clear_EP_STATUS_STALL_NAK_EP0_IN() volatile
{
EP_STATUS_STALL_NAK &= ~(1u << 0u);
}
inline void toggle_EP_STATUS_STALL_NAK_EP0_IN() volatile
{
EP_STATUS_STALL_NAK ^= 1u << 0u;
}
inline bool get_EP_STATUS_STALL_NAK_EP0_OUT() volatile
{
return EP_STATUS_STALL_NAK & (1u << 1u);
}
inline void set_EP_STATUS_STALL_NAK_EP0_OUT() volatile
{
EP_STATUS_STALL_NAK |= 1u << 1u;
}
inline void clear_EP_STATUS_STALL_NAK_EP0_OUT() volatile
{
EP_STATUS_STALL_NAK &= ~(1u << 1u);
}
inline void toggle_EP_STATUS_STALL_NAK_EP0_OUT() volatile
{
EP_STATUS_STALL_NAK ^= 1u << 1u;
}
inline bool get_EP_STATUS_STALL_NAK_EP1_IN() volatile
{
return EP_STATUS_STALL_NAK & (1u << 2u);
}
inline void set_EP_STATUS_STALL_NAK_EP1_IN() volatile
{
EP_STATUS_STALL_NAK |= 1u << 2u;
}
inline void clear_EP_STATUS_STALL_NAK_EP1_IN() volatile
{
EP_STATUS_STALL_NAK &= ~(1u << 2u);
}
inline void toggle_EP_STATUS_STALL_NAK_EP1_IN() volatile
{
EP_STATUS_STALL_NAK ^= 1u << 2u;
}
inline bool get_EP_STATUS_STALL_NAK_EP1_OUT() volatile
{
return EP_STATUS_STALL_NAK & (1u << 3u);
}
inline void set_EP_STATUS_STALL_NAK_EP1_OUT() volatile
{
EP_STATUS_STALL_NAK |= 1u << 3u;
}
inline void clear_EP_STATUS_STALL_NAK_EP1_OUT() volatile
{
EP_STATUS_STALL_NAK &= ~(1u << 3u);
}
inline void toggle_EP_STATUS_STALL_NAK_EP1_OUT() volatile
{
EP_STATUS_STALL_NAK ^= 1u << 3u;
}
inline bool get_EP_STATUS_STALL_NAK_EP2_IN() volatile
{
return EP_STATUS_STALL_NAK & (1u << 4u);
}
inline void set_EP_STATUS_STALL_NAK_EP2_IN() volatile
{
EP_STATUS_STALL_NAK |= 1u << 4u;
}
inline void clear_EP_STATUS_STALL_NAK_EP2_IN() volatile
{
EP_STATUS_STALL_NAK &= ~(1u << 4u);
}
inline void toggle_EP_STATUS_STALL_NAK_EP2_IN() volatile
{
EP_STATUS_STALL_NAK ^= 1u << 4u;
}
inline bool get_EP_STATUS_STALL_NAK_EP2_OUT() volatile
{
return EP_STATUS_STALL_NAK & (1u << 5u);
}
inline void set_EP_STATUS_STALL_NAK_EP2_OUT() volatile
{
EP_STATUS_STALL_NAK |= 1u << 5u;
}
inline void clear_EP_STATUS_STALL_NAK_EP2_OUT() volatile
{
EP_STATUS_STALL_NAK &= ~(1u << 5u);
}
inline void toggle_EP_STATUS_STALL_NAK_EP2_OUT() volatile
{
EP_STATUS_STALL_NAK ^= 1u << 5u;
}
inline bool get_EP_STATUS_STALL_NAK_EP3_IN() volatile
{
return EP_STATUS_STALL_NAK & (1u << 6u);
}
inline void set_EP_STATUS_STALL_NAK_EP3_IN() volatile
{
EP_STATUS_STALL_NAK |= 1u << 6u;
}
inline void clear_EP_STATUS_STALL_NAK_EP3_IN() volatile
{
EP_STATUS_STALL_NAK &= ~(1u << 6u);
}
inline void toggle_EP_STATUS_STALL_NAK_EP3_IN() volatile
{
EP_STATUS_STALL_NAK ^= 1u << 6u;
}
inline bool get_EP_STATUS_STALL_NAK_EP3_OUT() volatile
{
return EP_STATUS_STALL_NAK & (1u << 7u);
}
inline void set_EP_STATUS_STALL_NAK_EP3_OUT() volatile
{
EP_STATUS_STALL_NAK |= 1u << 7u;
}
inline void clear_EP_STATUS_STALL_NAK_EP3_OUT() volatile
{
EP_STATUS_STALL_NAK &= ~(1u << 7u);
}
inline void toggle_EP_STATUS_STALL_NAK_EP3_OUT() volatile
{
EP_STATUS_STALL_NAK ^= 1u << 7u;
}
inline bool get_EP_STATUS_STALL_NAK_EP4_IN() volatile
{
return EP_STATUS_STALL_NAK & (1u << 8u);
}
inline void set_EP_STATUS_STALL_NAK_EP4_IN() volatile
{
EP_STATUS_STALL_NAK |= 1u << 8u;
}
inline void clear_EP_STATUS_STALL_NAK_EP4_IN() volatile
{
EP_STATUS_STALL_NAK &= ~(1u << 8u);
}
inline void toggle_EP_STATUS_STALL_NAK_EP4_IN() volatile
{
EP_STATUS_STALL_NAK ^= 1u << 8u;
}
inline bool get_EP_STATUS_STALL_NAK_EP4_OUT() volatile
{
return EP_STATUS_STALL_NAK & (1u << 9u);
}
inline void set_EP_STATUS_STALL_NAK_EP4_OUT() volatile
{
EP_STATUS_STALL_NAK |= 1u << 9u;
}
inline void clear_EP_STATUS_STALL_NAK_EP4_OUT() volatile
{
EP_STATUS_STALL_NAK &= ~(1u << 9u);
}
inline void toggle_EP_STATUS_STALL_NAK_EP4_OUT() volatile
{
EP_STATUS_STALL_NAK ^= 1u << 9u;
}
inline bool get_EP_STATUS_STALL_NAK_EP5_IN() volatile
{
return EP_STATUS_STALL_NAK & (1u << 10u);
}
inline void set_EP_STATUS_STALL_NAK_EP5_IN() volatile
{
EP_STATUS_STALL_NAK |= 1u << 10u;
}
inline void clear_EP_STATUS_STALL_NAK_EP5_IN() volatile
{
EP_STATUS_STALL_NAK &= ~(1u << 10u);
}
inline void toggle_EP_STATUS_STALL_NAK_EP5_IN() volatile
{
EP_STATUS_STALL_NAK ^= 1u << 10u;
}
inline bool get_EP_STATUS_STALL_NAK_EP5_OUT() volatile
{
return EP_STATUS_STALL_NAK & (1u << 11u);
}
inline void set_EP_STATUS_STALL_NAK_EP5_OUT() volatile
{
EP_STATUS_STALL_NAK |= 1u << 11u;
}
inline void clear_EP_STATUS_STALL_NAK_EP5_OUT() volatile
{
EP_STATUS_STALL_NAK &= ~(1u << 11u);
}
inline void toggle_EP_STATUS_STALL_NAK_EP5_OUT() volatile
{
EP_STATUS_STALL_NAK ^= 1u << 11u;
}
inline bool get_EP_STATUS_STALL_NAK_EP6_IN() volatile
{
return EP_STATUS_STALL_NAK & (1u << 12u);
}
inline void set_EP_STATUS_STALL_NAK_EP6_IN() volatile
{
EP_STATUS_STALL_NAK |= 1u << 12u;
}
inline void clear_EP_STATUS_STALL_NAK_EP6_IN() volatile
{
EP_STATUS_STALL_NAK &= ~(1u << 12u);
}
inline void toggle_EP_STATUS_STALL_NAK_EP6_IN() volatile
{
EP_STATUS_STALL_NAK ^= 1u << 12u;
}
inline bool get_EP_STATUS_STALL_NAK_EP6_OUT() volatile
{
return EP_STATUS_STALL_NAK & (1u << 13u);
}
inline void set_EP_STATUS_STALL_NAK_EP6_OUT() volatile
{
EP_STATUS_STALL_NAK |= 1u << 13u;
}
inline void clear_EP_STATUS_STALL_NAK_EP6_OUT() volatile
{
EP_STATUS_STALL_NAK &= ~(1u << 13u);
}
inline void toggle_EP_STATUS_STALL_NAK_EP6_OUT() volatile
{
EP_STATUS_STALL_NAK ^= 1u << 13u;
}
inline bool get_EP_STATUS_STALL_NAK_EP7_IN() volatile
{
return EP_STATUS_STALL_NAK & (1u << 14u);
}
inline void set_EP_STATUS_STALL_NAK_EP7_IN() volatile
{
EP_STATUS_STALL_NAK |= 1u << 14u;
}
inline void clear_EP_STATUS_STALL_NAK_EP7_IN() volatile
{
EP_STATUS_STALL_NAK &= ~(1u << 14u);
}
inline void toggle_EP_STATUS_STALL_NAK_EP7_IN() volatile
{
EP_STATUS_STALL_NAK ^= 1u << 14u;
}
inline bool get_EP_STATUS_STALL_NAK_EP7_OUT() volatile
{
return EP_STATUS_STALL_NAK & (1u << 15u);
}
inline void set_EP_STATUS_STALL_NAK_EP7_OUT() volatile
{
EP_STATUS_STALL_NAK |= 1u << 15u;
}
inline void clear_EP_STATUS_STALL_NAK_EP7_OUT() volatile
{
EP_STATUS_STALL_NAK &= ~(1u << 15u);
}
inline void toggle_EP_STATUS_STALL_NAK_EP7_OUT() volatile
{
EP_STATUS_STALL_NAK ^= 1u << 15u;
}
inline bool get_EP_STATUS_STALL_NAK_EP8_IN() volatile
{
return EP_STATUS_STALL_NAK & (1u << 16u);
}
inline void set_EP_STATUS_STALL_NAK_EP8_IN() volatile
{
EP_STATUS_STALL_NAK |= 1u << 16u;
}
inline void clear_EP_STATUS_STALL_NAK_EP8_IN() volatile
{
EP_STATUS_STALL_NAK &= ~(1u << 16u);
}
inline void toggle_EP_STATUS_STALL_NAK_EP8_IN() volatile
{
EP_STATUS_STALL_NAK ^= 1u << 16u;
}
inline bool get_EP_STATUS_STALL_NAK_EP8_OUT() volatile
{
return EP_STATUS_STALL_NAK & (1u << 17u);
}
inline void set_EP_STATUS_STALL_NAK_EP8_OUT() volatile
{
EP_STATUS_STALL_NAK |= 1u << 17u;
}
inline void clear_EP_STATUS_STALL_NAK_EP8_OUT() volatile
{
EP_STATUS_STALL_NAK &= ~(1u << 17u);
}
inline void toggle_EP_STATUS_STALL_NAK_EP8_OUT() volatile
{
EP_STATUS_STALL_NAK ^= 1u << 17u;
}
inline bool get_EP_STATUS_STALL_NAK_EP9_IN() volatile
{
return EP_STATUS_STALL_NAK & (1u << 18u);
}
inline void set_EP_STATUS_STALL_NAK_EP9_IN() volatile
{
EP_STATUS_STALL_NAK |= 1u << 18u;
}
inline void clear_EP_STATUS_STALL_NAK_EP9_IN() volatile
{
EP_STATUS_STALL_NAK &= ~(1u << 18u);
}
inline void toggle_EP_STATUS_STALL_NAK_EP9_IN() volatile
{
EP_STATUS_STALL_NAK ^= 1u << 18u;
}
inline bool get_EP_STATUS_STALL_NAK_EP9_OUT() volatile
{
return EP_STATUS_STALL_NAK & (1u << 19u);
}
inline void set_EP_STATUS_STALL_NAK_EP9_OUT() volatile
{
EP_STATUS_STALL_NAK |= 1u << 19u;
}
inline void clear_EP_STATUS_STALL_NAK_EP9_OUT() volatile
{
EP_STATUS_STALL_NAK &= ~(1u << 19u);
}
inline void toggle_EP_STATUS_STALL_NAK_EP9_OUT() volatile
{
EP_STATUS_STALL_NAK ^= 1u << 19u;
}
inline bool get_EP_STATUS_STALL_NAK_EP10_IN() volatile
{
return EP_STATUS_STALL_NAK & (1u << 20u);
}
inline void set_EP_STATUS_STALL_NAK_EP10_IN() volatile
{
EP_STATUS_STALL_NAK |= 1u << 20u;
}
inline void clear_EP_STATUS_STALL_NAK_EP10_IN() volatile
{
EP_STATUS_STALL_NAK &= ~(1u << 20u);
}
inline void toggle_EP_STATUS_STALL_NAK_EP10_IN() volatile
{
EP_STATUS_STALL_NAK ^= 1u << 20u;
}
inline bool get_EP_STATUS_STALL_NAK_EP10_OUT() volatile
{
return EP_STATUS_STALL_NAK & (1u << 21u);
}
inline void set_EP_STATUS_STALL_NAK_EP10_OUT() volatile
{
EP_STATUS_STALL_NAK |= 1u << 21u;
}
inline void clear_EP_STATUS_STALL_NAK_EP10_OUT() volatile
{
EP_STATUS_STALL_NAK &= ~(1u << 21u);
}
inline void toggle_EP_STATUS_STALL_NAK_EP10_OUT() volatile
{
EP_STATUS_STALL_NAK ^= 1u << 21u;
}
inline bool get_EP_STATUS_STALL_NAK_EP11_IN() volatile
{
return EP_STATUS_STALL_NAK & (1u << 22u);
}
inline void set_EP_STATUS_STALL_NAK_EP11_IN() volatile
{
EP_STATUS_STALL_NAK |= 1u << 22u;
}
inline void clear_EP_STATUS_STALL_NAK_EP11_IN() volatile
{
EP_STATUS_STALL_NAK &= ~(1u << 22u);
}
inline void toggle_EP_STATUS_STALL_NAK_EP11_IN() volatile
{
EP_STATUS_STALL_NAK ^= 1u << 22u;
}
inline bool get_EP_STATUS_STALL_NAK_EP11_OUT() volatile
{
return EP_STATUS_STALL_NAK & (1u << 23u);
}
inline void set_EP_STATUS_STALL_NAK_EP11_OUT() volatile
{
EP_STATUS_STALL_NAK |= 1u << 23u;
}
inline void clear_EP_STATUS_STALL_NAK_EP11_OUT() volatile
{
EP_STATUS_STALL_NAK &= ~(1u << 23u);
}
inline void toggle_EP_STATUS_STALL_NAK_EP11_OUT() volatile
{
EP_STATUS_STALL_NAK ^= 1u << 23u;
}
inline bool get_EP_STATUS_STALL_NAK_EP12_IN() volatile
{
return EP_STATUS_STALL_NAK & (1u << 24u);
}
inline void set_EP_STATUS_STALL_NAK_EP12_IN() volatile
{
EP_STATUS_STALL_NAK |= 1u << 24u;
}
inline void clear_EP_STATUS_STALL_NAK_EP12_IN() volatile
{
EP_STATUS_STALL_NAK &= ~(1u << 24u);
}
inline void toggle_EP_STATUS_STALL_NAK_EP12_IN() volatile
{
EP_STATUS_STALL_NAK ^= 1u << 24u;
}
inline bool get_EP_STATUS_STALL_NAK_EP12_OUT() volatile
{
return EP_STATUS_STALL_NAK & (1u << 25u);
}
inline void set_EP_STATUS_STALL_NAK_EP12_OUT() volatile
{
EP_STATUS_STALL_NAK |= 1u << 25u;
}
inline void clear_EP_STATUS_STALL_NAK_EP12_OUT() volatile
{
EP_STATUS_STALL_NAK &= ~(1u << 25u);
}
inline void toggle_EP_STATUS_STALL_NAK_EP12_OUT() volatile
{
EP_STATUS_STALL_NAK ^= 1u << 25u;
}
inline bool get_EP_STATUS_STALL_NAK_EP13_IN() volatile
{
return EP_STATUS_STALL_NAK & (1u << 26u);
}
inline void set_EP_STATUS_STALL_NAK_EP13_IN() volatile
{
EP_STATUS_STALL_NAK |= 1u << 26u;
}
inline void clear_EP_STATUS_STALL_NAK_EP13_IN() volatile
{
EP_STATUS_STALL_NAK &= ~(1u << 26u);
}
inline void toggle_EP_STATUS_STALL_NAK_EP13_IN() volatile
{
EP_STATUS_STALL_NAK ^= 1u << 26u;
}
inline bool get_EP_STATUS_STALL_NAK_EP13_OUT() volatile
{
return EP_STATUS_STALL_NAK & (1u << 27u);
}
inline void set_EP_STATUS_STALL_NAK_EP13_OUT() volatile
{
EP_STATUS_STALL_NAK |= 1u << 27u;
}
inline void clear_EP_STATUS_STALL_NAK_EP13_OUT() volatile
{
EP_STATUS_STALL_NAK &= ~(1u << 27u);
}
inline void toggle_EP_STATUS_STALL_NAK_EP13_OUT() volatile
{
EP_STATUS_STALL_NAK ^= 1u << 27u;
}
inline bool get_EP_STATUS_STALL_NAK_EP14_IN() volatile
{
return EP_STATUS_STALL_NAK & (1u << 28u);
}
inline void set_EP_STATUS_STALL_NAK_EP14_IN() volatile
{
EP_STATUS_STALL_NAK |= 1u << 28u;
}
inline void clear_EP_STATUS_STALL_NAK_EP14_IN() volatile
{
EP_STATUS_STALL_NAK &= ~(1u << 28u);
}
inline void toggle_EP_STATUS_STALL_NAK_EP14_IN() volatile
{
EP_STATUS_STALL_NAK ^= 1u << 28u;
}
inline bool get_EP_STATUS_STALL_NAK_EP14_OUT() volatile
{
return EP_STATUS_STALL_NAK & (1u << 29u);
}
inline void set_EP_STATUS_STALL_NAK_EP14_OUT() volatile
{
EP_STATUS_STALL_NAK |= 1u << 29u;
}
inline void clear_EP_STATUS_STALL_NAK_EP14_OUT() volatile
{
EP_STATUS_STALL_NAK &= ~(1u << 29u);
}
inline void toggle_EP_STATUS_STALL_NAK_EP14_OUT() volatile
{
EP_STATUS_STALL_NAK ^= 1u << 29u;
}
inline bool get_EP_STATUS_STALL_NAK_EP15_IN() volatile
{
return EP_STATUS_STALL_NAK & (1u << 30u);
}
inline void set_EP_STATUS_STALL_NAK_EP15_IN() volatile
{
EP_STATUS_STALL_NAK |= 1u << 30u;
}
inline void clear_EP_STATUS_STALL_NAK_EP15_IN() volatile
{
EP_STATUS_STALL_NAK &= ~(1u << 30u);
}
inline void toggle_EP_STATUS_STALL_NAK_EP15_IN() volatile
{
EP_STATUS_STALL_NAK ^= 1u << 30u;
}
inline bool get_EP_STATUS_STALL_NAK_EP15_OUT() volatile
{
return EP_STATUS_STALL_NAK & (1u << 31u);
}
inline void set_EP_STATUS_STALL_NAK_EP15_OUT() volatile
{
EP_STATUS_STALL_NAK |= 1u << 31u;
}
inline void clear_EP_STATUS_STALL_NAK_EP15_OUT() volatile
{
EP_STATUS_STALL_NAK &= ~(1u << 31u);
}
inline void toggle_EP_STATUS_STALL_NAK_EP15_OUT() volatile
{
EP_STATUS_STALL_NAK ^= 1u << 31u;
}
inline void get_EP_STATUS_STALL_NAK(
bool &EP0_IN, bool &EP0_OUT, bool &EP1_IN, bool &EP1_OUT, bool &EP2_IN,
bool &EP2_OUT, bool &EP3_IN, bool &EP3_OUT, bool &EP4_IN,
bool &EP4_OUT, bool &EP5_IN, bool &EP5_OUT, bool &EP6_IN,
bool &EP6_OUT, bool &EP7_IN, bool &EP7_OUT, bool &EP8_IN,
bool &EP8_OUT, bool &EP9_IN, bool &EP9_OUT, bool &EP10_IN,
bool &EP10_OUT, bool &EP11_IN, bool &EP11_OUT, bool &EP12_IN,
bool &EP12_OUT, bool &EP13_IN, bool &EP13_OUT, bool &EP14_IN,
bool &EP14_OUT, bool &EP15_IN, bool &EP15_OUT) volatile
{
uint32_t curr = EP_STATUS_STALL_NAK;
EP0_IN = curr & (1u << 0u);
EP0_OUT = curr & (1u << 1u);
EP1_IN = curr & (1u << 2u);
EP1_OUT = curr & (1u << 3u);
EP2_IN = curr & (1u << 4u);
EP2_OUT = curr & (1u << 5u);
EP3_IN = curr & (1u << 6u);
EP3_OUT = curr & (1u << 7u);
EP4_IN = curr & (1u << 8u);
EP4_OUT = curr & (1u << 9u);
EP5_IN = curr & (1u << 10u);
EP5_OUT = curr & (1u << 11u);
EP6_IN = curr & (1u << 12u);
EP6_OUT = curr & (1u << 13u);
EP7_IN = curr & (1u << 14u);
EP7_OUT = curr & (1u << 15u);
EP8_IN = curr & (1u << 16u);
EP8_OUT = curr & (1u << 17u);
EP9_IN = curr & (1u << 18u);
EP9_OUT = curr & (1u << 19u);
EP10_IN = curr & (1u << 20u);
EP10_OUT = curr & (1u << 21u);
EP11_IN = curr & (1u << 22u);
EP11_OUT = curr & (1u << 23u);
EP12_IN = curr & (1u << 24u);
EP12_OUT = curr & (1u << 25u);
EP13_IN = curr & (1u << 26u);
EP13_OUT = curr & (1u << 27u);
EP14_IN = curr & (1u << 28u);
EP14_OUT = curr & (1u << 29u);
EP15_IN = curr & (1u << 30u);
EP15_OUT = curr & (1u << 31u);
}
inline void set_EP_STATUS_STALL_NAK(
bool EP0_IN, bool EP0_OUT, bool EP1_IN, bool EP1_OUT, bool EP2_IN,
bool EP2_OUT, bool EP3_IN, bool EP3_OUT, bool EP4_IN, bool EP4_OUT,
bool EP5_IN, bool EP5_OUT, bool EP6_IN, bool EP6_OUT, bool EP7_IN,
bool EP7_OUT, bool EP8_IN, bool EP8_OUT, bool EP9_IN, bool EP9_OUT,
bool EP10_IN, bool EP10_OUT, bool EP11_IN, bool EP11_OUT, bool EP12_IN,
bool EP12_OUT, bool EP13_IN, bool EP13_OUT, bool EP14_IN,
bool EP14_OUT, bool EP15_IN, bool EP15_OUT) volatile
{
uint32_t curr = EP_STATUS_STALL_NAK;
curr &= ~(0b1u << 0u);
curr |= (EP0_IN & 0b1u) << 0u;
curr &= ~(0b1u << 1u);
curr |= (EP0_OUT & 0b1u) << 1u;
curr &= ~(0b1u << 2u);
curr |= (EP1_IN & 0b1u) << 2u;
curr &= ~(0b1u << 3u);
curr |= (EP1_OUT & 0b1u) << 3u;
curr &= ~(0b1u << 4u);
curr |= (EP2_IN & 0b1u) << 4u;
curr &= ~(0b1u << 5u);
curr |= (EP2_OUT & 0b1u) << 5u;
curr &= ~(0b1u << 6u);
curr |= (EP3_IN & 0b1u) << 6u;
curr &= ~(0b1u << 7u);
curr |= (EP3_OUT & 0b1u) << 7u;
curr &= ~(0b1u << 8u);
curr |= (EP4_IN & 0b1u) << 8u;
curr &= ~(0b1u << 9u);
curr |= (EP4_OUT & 0b1u) << 9u;
curr &= ~(0b1u << 10u);
curr |= (EP5_IN & 0b1u) << 10u;
curr &= ~(0b1u << 11u);
curr |= (EP5_OUT & 0b1u) << 11u;
curr &= ~(0b1u << 12u);
curr |= (EP6_IN & 0b1u) << 12u;
curr &= ~(0b1u << 13u);
curr |= (EP6_OUT & 0b1u) << 13u;
curr &= ~(0b1u << 14u);
curr |= (EP7_IN & 0b1u) << 14u;
curr &= ~(0b1u << 15u);
curr |= (EP7_OUT & 0b1u) << 15u;
curr &= ~(0b1u << 16u);
curr |= (EP8_IN & 0b1u) << 16u;
curr &= ~(0b1u << 17u);
curr |= (EP8_OUT & 0b1u) << 17u;
curr &= ~(0b1u << 18u);
curr |= (EP9_IN & 0b1u) << 18u;
curr &= ~(0b1u << 19u);
curr |= (EP9_OUT & 0b1u) << 19u;
curr &= ~(0b1u << 20u);
curr |= (EP10_IN & 0b1u) << 20u;
curr &= ~(0b1u << 21u);
curr |= (EP10_OUT & 0b1u) << 21u;
curr &= ~(0b1u << 22u);
curr |= (EP11_IN & 0b1u) << 22u;
curr &= ~(0b1u << 23u);
curr |= (EP11_OUT & 0b1u) << 23u;
curr &= ~(0b1u << 24u);
curr |= (EP12_IN & 0b1u) << 24u;
curr &= ~(0b1u << 25u);
curr |= (EP12_OUT & 0b1u) << 25u;
curr &= ~(0b1u << 26u);
curr |= (EP13_IN & 0b1u) << 26u;
curr &= ~(0b1u << 27u);
curr |= (EP13_OUT & 0b1u) << 27u;
curr &= ~(0b1u << 28u);
curr |= (EP14_IN & 0b1u) << 28u;
curr &= ~(0b1u << 29u);
curr |= (EP14_OUT & 0b1u) << 29u;
curr &= ~(0b1u << 30u);
curr |= (EP15_IN & 0b1u) << 30u;
curr &= ~(0b1u << 31u);
curr |= (EP15_OUT & 0b1u) << 31u;
EP_STATUS_STALL_NAK = curr;
}
inline bool get_USB_MUXING_TO_PHY() volatile
{
return USB_MUXING & (1u << 0u);
}
inline void set_USB_MUXING_TO_PHY() volatile
{
USB_MUXING |= 1u << 0u;
}
inline void clear_USB_MUXING_TO_PHY() volatile
{
USB_MUXING &= ~(1u << 0u);
}
inline void toggle_USB_MUXING_TO_PHY() volatile
{
USB_MUXING ^= 1u << 0u;
}
inline bool get_USB_MUXING_TO_EXTPHY() volatile
{
return USB_MUXING & (1u << 1u);
}
inline void set_USB_MUXING_TO_EXTPHY() volatile
{
USB_MUXING |= 1u << 1u;
}
inline void clear_USB_MUXING_TO_EXTPHY() volatile
{
USB_MUXING &= ~(1u << 1u);
}
inline void toggle_USB_MUXING_TO_EXTPHY() volatile
{
USB_MUXING ^= 1u << 1u;
}
inline bool get_USB_MUXING_TO_DIGITAL_PAD() volatile
{
return USB_MUXING & (1u << 2u);
}
inline void set_USB_MUXING_TO_DIGITAL_PAD() volatile
{
USB_MUXING |= 1u << 2u;
}
inline void clear_USB_MUXING_TO_DIGITAL_PAD() volatile
{
USB_MUXING &= ~(1u << 2u);
}
inline void toggle_USB_MUXING_TO_DIGITAL_PAD() volatile
{
USB_MUXING ^= 1u << 2u;
}
inline bool get_USB_MUXING_SOFTCON() volatile
{
return USB_MUXING & (1u << 3u);
}
inline void set_USB_MUXING_SOFTCON() volatile
{
USB_MUXING |= 1u << 3u;
}
inline void clear_USB_MUXING_SOFTCON() volatile
{
USB_MUXING &= ~(1u << 3u);
}
inline void toggle_USB_MUXING_SOFTCON() volatile
{
USB_MUXING ^= 1u << 3u;
}
inline void get_USB_MUXING(bool &TO_PHY, bool &TO_EXTPHY,
bool &TO_DIGITAL_PAD, bool &SOFTCON) volatile
{
uint32_t curr = USB_MUXING;
TO_PHY = curr & (1u << 0u);
TO_EXTPHY = curr & (1u << 1u);
TO_DIGITAL_PAD = curr & (1u << 2u);
SOFTCON = curr & (1u << 3u);
}
inline void set_USB_MUXING(bool TO_PHY, bool TO_EXTPHY,
bool TO_DIGITAL_PAD, bool SOFTCON) volatile
{
uint32_t curr = USB_MUXING;
curr &= ~(0b1u << 0u);
curr |= (TO_PHY & 0b1u) << 0u;
curr &= ~(0b1u << 1u);
curr |= (TO_EXTPHY & 0b1u) << 1u;
curr &= ~(0b1u << 2u);
curr |= (TO_DIGITAL_PAD & 0b1u) << 2u;
curr &= ~(0b1u << 3u);
curr |= (SOFTCON & 0b1u) << 3u;
USB_MUXING = curr;
}
inline bool get_USB_PWR_VBUS_EN() volatile
{
return USB_PWR & (1u << 0u);
}
inline void set_USB_PWR_VBUS_EN() volatile
{
USB_PWR |= 1u << 0u;
}
inline void clear_USB_PWR_VBUS_EN() volatile
{
USB_PWR &= ~(1u << 0u);
}
inline void toggle_USB_PWR_VBUS_EN() volatile
{
USB_PWR ^= 1u << 0u;
}
inline bool get_USB_PWR_VBUS_EN_OVERRIDE_EN() volatile
{
return USB_PWR & (1u << 1u);
}
inline void set_USB_PWR_VBUS_EN_OVERRIDE_EN() volatile
{
USB_PWR |= 1u << 1u;
}
inline void clear_USB_PWR_VBUS_EN_OVERRIDE_EN() volatile
{
USB_PWR &= ~(1u << 1u);
}
inline void toggle_USB_PWR_VBUS_EN_OVERRIDE_EN() volatile
{
USB_PWR ^= 1u << 1u;
}
inline bool get_USB_PWR_VBUS_DETECT() volatile
{
return USB_PWR & (1u << 2u);
}
inline void set_USB_PWR_VBUS_DETECT() volatile
{
USB_PWR |= 1u << 2u;
}
inline void clear_USB_PWR_VBUS_DETECT() volatile
{
USB_PWR &= ~(1u << 2u);
}
inline void toggle_USB_PWR_VBUS_DETECT() volatile
{
USB_PWR ^= 1u << 2u;
}
inline bool get_USB_PWR_VBUS_DETECT_OVERRIDE_EN() volatile
{
return USB_PWR & (1u << 3u);
}
inline void set_USB_PWR_VBUS_DETECT_OVERRIDE_EN() volatile
{
USB_PWR |= 1u << 3u;
}
inline void clear_USB_PWR_VBUS_DETECT_OVERRIDE_EN() volatile
{
USB_PWR &= ~(1u << 3u);
}
inline void toggle_USB_PWR_VBUS_DETECT_OVERRIDE_EN() volatile
{
USB_PWR ^= 1u << 3u;
}
inline bool get_USB_PWR_OVERCURR_DETECT() volatile
{
return USB_PWR & (1u << 4u);
}
inline void set_USB_PWR_OVERCURR_DETECT() volatile
{
USB_PWR |= 1u << 4u;
}
inline void clear_USB_PWR_OVERCURR_DETECT() volatile
{
USB_PWR &= ~(1u << 4u);
}
inline void toggle_USB_PWR_OVERCURR_DETECT() volatile
{
USB_PWR ^= 1u << 4u;
}
inline bool get_USB_PWR_OVERCURR_DETECT_EN() volatile
{
return USB_PWR & (1u << 5u);
}
inline void set_USB_PWR_OVERCURR_DETECT_EN() volatile
{
USB_PWR |= 1u << 5u;
}
inline void clear_USB_PWR_OVERCURR_DETECT_EN() volatile
{
USB_PWR &= ~(1u << 5u);
}
inline void toggle_USB_PWR_OVERCURR_DETECT_EN() volatile
{
USB_PWR ^= 1u << 5u;
}
inline void get_USB_PWR(bool &VBUS_EN, bool &VBUS_EN_OVERRIDE_EN,
bool &VBUS_DETECT, bool &VBUS_DETECT_OVERRIDE_EN,
bool &OVERCURR_DETECT,
bool &OVERCURR_DETECT_EN) volatile
{
uint32_t curr = USB_PWR;
VBUS_EN = curr & (1u << 0u);
VBUS_EN_OVERRIDE_EN = curr & (1u << 1u);
VBUS_DETECT = curr & (1u << 2u);
VBUS_DETECT_OVERRIDE_EN = curr & (1u << 3u);
OVERCURR_DETECT = curr & (1u << 4u);
OVERCURR_DETECT_EN = curr & (1u << 5u);
}
inline void set_USB_PWR(bool VBUS_EN, bool VBUS_EN_OVERRIDE_EN,
bool VBUS_DETECT, bool VBUS_DETECT_OVERRIDE_EN,
bool OVERCURR_DETECT,
bool OVERCURR_DETECT_EN) volatile
{
uint32_t curr = USB_PWR;
curr &= ~(0b1u << 0u);
curr |= (VBUS_EN & 0b1u) << 0u;
curr &= ~(0b1u << 1u);
curr |= (VBUS_EN_OVERRIDE_EN & 0b1u) << 1u;
curr &= ~(0b1u << 2u);
curr |= (VBUS_DETECT & 0b1u) << 2u;
curr &= ~(0b1u << 3u);
curr |= (VBUS_DETECT_OVERRIDE_EN & 0b1u) << 3u;
curr &= ~(0b1u << 4u);
curr |= (OVERCURR_DETECT & 0b1u) << 4u;
curr &= ~(0b1u << 5u);
curr |= (OVERCURR_DETECT_EN & 0b1u) << 5u;
USB_PWR = curr;
}
inline bool get_USBPHY_DIRECT_DP_PULLUP_HISEL() volatile
{
return USBPHY_DIRECT & (1u << 0u);
}
inline void set_USBPHY_DIRECT_DP_PULLUP_HISEL() volatile
{
USBPHY_DIRECT |= 1u << 0u;
}
inline void clear_USBPHY_DIRECT_DP_PULLUP_HISEL() volatile
{
USBPHY_DIRECT &= ~(1u << 0u);
}
inline void toggle_USBPHY_DIRECT_DP_PULLUP_HISEL() volatile
{
USBPHY_DIRECT ^= 1u << 0u;
}
inline bool get_USBPHY_DIRECT_DP_PULLUP_EN() volatile
{
return USBPHY_DIRECT & (1u << 1u);
}
inline void set_USBPHY_DIRECT_DP_PULLUP_EN() volatile
{
USBPHY_DIRECT |= 1u << 1u;
}
inline void clear_USBPHY_DIRECT_DP_PULLUP_EN() volatile
{
USBPHY_DIRECT &= ~(1u << 1u);
}
inline void toggle_USBPHY_DIRECT_DP_PULLUP_EN() volatile
{
USBPHY_DIRECT ^= 1u << 1u;
}
inline bool get_USBPHY_DIRECT_DP_PULLDN_EN() volatile
{
return USBPHY_DIRECT & (1u << 2u);
}
inline void set_USBPHY_DIRECT_DP_PULLDN_EN() volatile
{
USBPHY_DIRECT |= 1u << 2u;
}
inline void clear_USBPHY_DIRECT_DP_PULLDN_EN() volatile
{
USBPHY_DIRECT &= ~(1u << 2u);
}
inline void toggle_USBPHY_DIRECT_DP_PULLDN_EN() volatile
{
USBPHY_DIRECT ^= 1u << 2u;
}
inline bool get_USBPHY_DIRECT_DM_PULLUP_HISEL() volatile
{
return USBPHY_DIRECT & (1u << 4u);
}
inline void set_USBPHY_DIRECT_DM_PULLUP_HISEL() volatile
{
USBPHY_DIRECT |= 1u << 4u;
}
inline void clear_USBPHY_DIRECT_DM_PULLUP_HISEL() volatile
{
USBPHY_DIRECT &= ~(1u << 4u);
}
inline void toggle_USBPHY_DIRECT_DM_PULLUP_HISEL() volatile
{
USBPHY_DIRECT ^= 1u << 4u;
}
inline bool get_USBPHY_DIRECT_DM_PULLUP_EN() volatile
{
return USBPHY_DIRECT & (1u << 5u);
}
inline void set_USBPHY_DIRECT_DM_PULLUP_EN() volatile
{
USBPHY_DIRECT |= 1u << 5u;
}
inline void clear_USBPHY_DIRECT_DM_PULLUP_EN() volatile
{
USBPHY_DIRECT &= ~(1u << 5u);
}
inline void toggle_USBPHY_DIRECT_DM_PULLUP_EN() volatile
{
USBPHY_DIRECT ^= 1u << 5u;
}
inline bool get_USBPHY_DIRECT_DM_PULLDN_EN() volatile
{
return USBPHY_DIRECT & (1u << 6u);
}
inline void set_USBPHY_DIRECT_DM_PULLDN_EN() volatile
{
USBPHY_DIRECT |= 1u << 6u;
}
inline void clear_USBPHY_DIRECT_DM_PULLDN_EN() volatile
{
USBPHY_DIRECT &= ~(1u << 6u);
}
inline void toggle_USBPHY_DIRECT_DM_PULLDN_EN() volatile
{
USBPHY_DIRECT ^= 1u << 6u;
}
inline bool get_USBPHY_DIRECT_TX_DP_OE() volatile
{
return USBPHY_DIRECT & (1u << 8u);
}
inline void set_USBPHY_DIRECT_TX_DP_OE() volatile
{
USBPHY_DIRECT |= 1u << 8u;
}
inline void clear_USBPHY_DIRECT_TX_DP_OE() volatile
{
USBPHY_DIRECT &= ~(1u << 8u);
}
inline void toggle_USBPHY_DIRECT_TX_DP_OE() volatile
{
USBPHY_DIRECT ^= 1u << 8u;
}
inline bool get_USBPHY_DIRECT_TX_DM_OE() volatile
{
return USBPHY_DIRECT & (1u << 9u);
}
inline void set_USBPHY_DIRECT_TX_DM_OE() volatile
{
USBPHY_DIRECT |= 1u << 9u;
}
inline void clear_USBPHY_DIRECT_TX_DM_OE() volatile
{
USBPHY_DIRECT &= ~(1u << 9u);
}
inline void toggle_USBPHY_DIRECT_TX_DM_OE() volatile
{
USBPHY_DIRECT ^= 1u << 9u;
}
inline bool get_USBPHY_DIRECT_TX_DP() volatile
{
return USBPHY_DIRECT & (1u << 10u);
}
inline void set_USBPHY_DIRECT_TX_DP() volatile
{
USBPHY_DIRECT |= 1u << 10u;
}
inline void clear_USBPHY_DIRECT_TX_DP() volatile
{
USBPHY_DIRECT &= ~(1u << 10u);
}
inline void toggle_USBPHY_DIRECT_TX_DP() volatile
{
USBPHY_DIRECT ^= 1u << 10u;
}
inline bool get_USBPHY_DIRECT_TX_DM() volatile
{
return USBPHY_DIRECT & (1u << 11u);
}
inline void set_USBPHY_DIRECT_TX_DM() volatile
{
USBPHY_DIRECT |= 1u << 11u;
}
inline void clear_USBPHY_DIRECT_TX_DM() volatile
{
USBPHY_DIRECT &= ~(1u << 11u);
}
inline void toggle_USBPHY_DIRECT_TX_DM() volatile
{
USBPHY_DIRECT ^= 1u << 11u;
}
inline bool get_USBPHY_DIRECT_RX_PD() volatile
{
return USBPHY_DIRECT & (1u << 12u);
}
inline void set_USBPHY_DIRECT_RX_PD() volatile
{
USBPHY_DIRECT |= 1u << 12u;
}
inline void clear_USBPHY_DIRECT_RX_PD() volatile
{
USBPHY_DIRECT &= ~(1u << 12u);
}
inline void toggle_USBPHY_DIRECT_RX_PD() volatile
{
USBPHY_DIRECT ^= 1u << 12u;
}
inline bool get_USBPHY_DIRECT_TX_PD() volatile
{
return USBPHY_DIRECT & (1u << 13u);
}
inline void set_USBPHY_DIRECT_TX_PD() volatile
{
USBPHY_DIRECT |= 1u << 13u;
}
inline void clear_USBPHY_DIRECT_TX_PD() volatile
{
USBPHY_DIRECT &= ~(1u << 13u);
}
inline void toggle_USBPHY_DIRECT_TX_PD() volatile
{
USBPHY_DIRECT ^= 1u << 13u;
}
inline bool get_USBPHY_DIRECT_TX_FSSLEW() volatile
{
return USBPHY_DIRECT & (1u << 14u);
}
inline void set_USBPHY_DIRECT_TX_FSSLEW() volatile
{
USBPHY_DIRECT |= 1u << 14u;
}
inline void clear_USBPHY_DIRECT_TX_FSSLEW() volatile
{
USBPHY_DIRECT &= ~(1u << 14u);
}
inline void toggle_USBPHY_DIRECT_TX_FSSLEW() volatile
{
USBPHY_DIRECT ^= 1u << 14u;
}
inline bool get_USBPHY_DIRECT_TX_DIFFMODE() volatile
{
return USBPHY_DIRECT & (1u << 15u);
}
inline void set_USBPHY_DIRECT_TX_DIFFMODE() volatile
{
USBPHY_DIRECT |= 1u << 15u;
}
inline void clear_USBPHY_DIRECT_TX_DIFFMODE() volatile
{
USBPHY_DIRECT &= ~(1u << 15u);
}
inline void toggle_USBPHY_DIRECT_TX_DIFFMODE() volatile
{
USBPHY_DIRECT ^= 1u << 15u;
}
inline bool get_USBPHY_DIRECT_RX_DD() volatile
{
return USBPHY_DIRECT & (1u << 16u);
}
inline bool get_USBPHY_DIRECT_RX_DP() volatile
{
return USBPHY_DIRECT & (1u << 17u);
}
inline bool get_USBPHY_DIRECT_RX_DM() volatile
{
return USBPHY_DIRECT & (1u << 18u);
}
inline bool get_USBPHY_DIRECT_DP_OVCN() volatile
{
return USBPHY_DIRECT & (1u << 19u);
}
inline bool get_USBPHY_DIRECT_DM_OVCN() volatile
{
return USBPHY_DIRECT & (1u << 20u);
}
inline bool get_USBPHY_DIRECT_DP_OVV() volatile
{
return USBPHY_DIRECT & (1u << 21u);
}
inline bool get_USBPHY_DIRECT_DM_OVV() volatile
{
return USBPHY_DIRECT & (1u << 22u);
}
inline void get_USBPHY_DIRECT(bool &DP_PULLUP_HISEL, bool &DP_PULLUP_EN,
bool &DP_PULLDN_EN, bool &DM_PULLUP_HISEL,
bool &DM_PULLUP_EN, bool &DM_PULLDN_EN,
bool &TX_DP_OE, bool &TX_DM_OE, bool &TX_DP,
bool &TX_DM, bool &RX_PD, bool &TX_PD,
bool &TX_FSSLEW, bool &TX_DIFFMODE,
bool &RX_DD, bool &RX_DP, bool &RX_DM,
bool &DP_OVCN, bool &DM_OVCN, bool &DP_OVV,
bool &DM_OVV) volatile
{
uint32_t curr = USBPHY_DIRECT;
DP_PULLUP_HISEL = curr & (1u << 0u);
DP_PULLUP_EN = curr & (1u << 1u);
DP_PULLDN_EN = curr & (1u << 2u);
DM_PULLUP_HISEL = curr & (1u << 4u);
DM_PULLUP_EN = curr & (1u << 5u);
DM_PULLDN_EN = curr & (1u << 6u);
TX_DP_OE = curr & (1u << 8u);
TX_DM_OE = curr & (1u << 9u);
TX_DP = curr & (1u << 10u);
TX_DM = curr & (1u << 11u);
RX_PD = curr & (1u << 12u);
TX_PD = curr & (1u << 13u);
TX_FSSLEW = curr & (1u << 14u);
TX_DIFFMODE = curr & (1u << 15u);
RX_DD = curr & (1u << 16u);
RX_DP = curr & (1u << 17u);
RX_DM = curr & (1u << 18u);
DP_OVCN = curr & (1u << 19u);
DM_OVCN = curr & (1u << 20u);
DP_OVV = curr & (1u << 21u);
DM_OVV = curr & (1u << 22u);
}
inline void set_USBPHY_DIRECT(bool DP_PULLUP_HISEL, bool DP_PULLUP_EN,
bool DP_PULLDN_EN, bool DM_PULLUP_HISEL,
bool DM_PULLUP_EN, bool DM_PULLDN_EN,
bool TX_DP_OE, bool TX_DM_OE, bool TX_DP,
bool TX_DM, bool RX_PD, bool TX_PD,
bool TX_FSSLEW, bool TX_DIFFMODE) volatile
{
uint32_t curr = USBPHY_DIRECT;
curr &= ~(0b1u << 0u);
curr |= (DP_PULLUP_HISEL & 0b1u) << 0u;
curr &= ~(0b1u << 1u);
curr |= (DP_PULLUP_EN & 0b1u) << 1u;
curr &= ~(0b1u << 2u);
curr |= (DP_PULLDN_EN & 0b1u) << 2u;
curr &= ~(0b1u << 4u);
curr |= (DM_PULLUP_HISEL & 0b1u) << 4u;
curr &= ~(0b1u << 5u);
curr |= (DM_PULLUP_EN & 0b1u) << 5u;
curr &= ~(0b1u << 6u);
curr |= (DM_PULLDN_EN & 0b1u) << 6u;
curr &= ~(0b1u << 8u);
curr |= (TX_DP_OE & 0b1u) << 8u;
curr &= ~(0b1u << 9u);
curr |= (TX_DM_OE & 0b1u) << 9u;
curr &= ~(0b1u << 10u);
curr |= (TX_DP & 0b1u) << 10u;
curr &= ~(0b1u << 11u);
curr |= (TX_DM & 0b1u) << 11u;
curr &= ~(0b1u << 12u);
curr |= (RX_PD & 0b1u) << 12u;
curr &= ~(0b1u << 13u);
curr |= (TX_PD & 0b1u) << 13u;
curr &= ~(0b1u << 14u);
curr |= (TX_FSSLEW & 0b1u) << 14u;
curr &= ~(0b1u << 15u);
curr |= (TX_DIFFMODE & 0b1u) << 15u;
USBPHY_DIRECT = curr;
}
inline bool
get_USBPHY_DIRECT_OVERRIDE_DP_PULLUP_HISEL_OVERRIDE_EN() volatile
{
return USBPHY_DIRECT_OVERRIDE & (1u << 0u);
}
inline void
set_USBPHY_DIRECT_OVERRIDE_DP_PULLUP_HISEL_OVERRIDE_EN() volatile
{
USBPHY_DIRECT_OVERRIDE |= 1u << 0u;
}
inline void
clear_USBPHY_DIRECT_OVERRIDE_DP_PULLUP_HISEL_OVERRIDE_EN() volatile
{
USBPHY_DIRECT_OVERRIDE &= ~(1u << 0u);
}
inline void
toggle_USBPHY_DIRECT_OVERRIDE_DP_PULLUP_HISEL_OVERRIDE_EN() volatile
{
USBPHY_DIRECT_OVERRIDE ^= 1u << 0u;
}
inline bool
get_USBPHY_DIRECT_OVERRIDE_DM_PULLUP_HISEL_OVERRIDE_EN() volatile
{
return USBPHY_DIRECT_OVERRIDE & (1u << 1u);
}
inline void
set_USBPHY_DIRECT_OVERRIDE_DM_PULLUP_HISEL_OVERRIDE_EN() volatile
{
USBPHY_DIRECT_OVERRIDE |= 1u << 1u;
}
inline void
clear_USBPHY_DIRECT_OVERRIDE_DM_PULLUP_HISEL_OVERRIDE_EN() volatile
{
USBPHY_DIRECT_OVERRIDE &= ~(1u << 1u);
}
inline void
toggle_USBPHY_DIRECT_OVERRIDE_DM_PULLUP_HISEL_OVERRIDE_EN() volatile
{
USBPHY_DIRECT_OVERRIDE ^= 1u << 1u;
}
inline bool get_USBPHY_DIRECT_OVERRIDE_DP_PULLUP_EN_OVERRIDE_EN() volatile
{
return USBPHY_DIRECT_OVERRIDE & (1u << 2u);
}
inline void set_USBPHY_DIRECT_OVERRIDE_DP_PULLUP_EN_OVERRIDE_EN() volatile
{
USBPHY_DIRECT_OVERRIDE |= 1u << 2u;
}
inline void
clear_USBPHY_DIRECT_OVERRIDE_DP_PULLUP_EN_OVERRIDE_EN() volatile
{
USBPHY_DIRECT_OVERRIDE &= ~(1u << 2u);
}
inline void
toggle_USBPHY_DIRECT_OVERRIDE_DP_PULLUP_EN_OVERRIDE_EN() volatile
{
USBPHY_DIRECT_OVERRIDE ^= 1u << 2u;
}
inline bool get_USBPHY_DIRECT_OVERRIDE_DP_PULLDN_EN_OVERRIDE_EN() volatile
{
return USBPHY_DIRECT_OVERRIDE & (1u << 3u);
}
inline void set_USBPHY_DIRECT_OVERRIDE_DP_PULLDN_EN_OVERRIDE_EN() volatile
{
USBPHY_DIRECT_OVERRIDE |= 1u << 3u;
}
inline void
clear_USBPHY_DIRECT_OVERRIDE_DP_PULLDN_EN_OVERRIDE_EN() volatile
{
USBPHY_DIRECT_OVERRIDE &= ~(1u << 3u);
}
inline void
toggle_USBPHY_DIRECT_OVERRIDE_DP_PULLDN_EN_OVERRIDE_EN() volatile
{
USBPHY_DIRECT_OVERRIDE ^= 1u << 3u;
}
inline bool get_USBPHY_DIRECT_OVERRIDE_DM_PULLDN_EN_OVERRIDE_EN() volatile
{
return USBPHY_DIRECT_OVERRIDE & (1u << 4u);
}
inline void set_USBPHY_DIRECT_OVERRIDE_DM_PULLDN_EN_OVERRIDE_EN() volatile
{
USBPHY_DIRECT_OVERRIDE |= 1u << 4u;
}
inline void
clear_USBPHY_DIRECT_OVERRIDE_DM_PULLDN_EN_OVERRIDE_EN() volatile
{
USBPHY_DIRECT_OVERRIDE &= ~(1u << 4u);
}
inline void
toggle_USBPHY_DIRECT_OVERRIDE_DM_PULLDN_EN_OVERRIDE_EN() volatile
{
USBPHY_DIRECT_OVERRIDE ^= 1u << 4u;
}
inline bool get_USBPHY_DIRECT_OVERRIDE_TX_DP_OE_OVERRIDE_EN() volatile
{
return USBPHY_DIRECT_OVERRIDE & (1u << 5u);
}
inline void set_USBPHY_DIRECT_OVERRIDE_TX_DP_OE_OVERRIDE_EN() volatile
{
USBPHY_DIRECT_OVERRIDE |= 1u << 5u;
}
inline void clear_USBPHY_DIRECT_OVERRIDE_TX_DP_OE_OVERRIDE_EN() volatile
{
USBPHY_DIRECT_OVERRIDE &= ~(1u << 5u);
}
inline void toggle_USBPHY_DIRECT_OVERRIDE_TX_DP_OE_OVERRIDE_EN() volatile
{
USBPHY_DIRECT_OVERRIDE ^= 1u << 5u;
}
inline bool get_USBPHY_DIRECT_OVERRIDE_TX_DM_OE_OVERRIDE_EN() volatile
{
return USBPHY_DIRECT_OVERRIDE & (1u << 6u);
}
inline void set_USBPHY_DIRECT_OVERRIDE_TX_DM_OE_OVERRIDE_EN() volatile
{
USBPHY_DIRECT_OVERRIDE |= 1u << 6u;
}
inline void clear_USBPHY_DIRECT_OVERRIDE_TX_DM_OE_OVERRIDE_EN() volatile
{
USBPHY_DIRECT_OVERRIDE &= ~(1u << 6u);
}
inline void toggle_USBPHY_DIRECT_OVERRIDE_TX_DM_OE_OVERRIDE_EN() volatile
{
USBPHY_DIRECT_OVERRIDE ^= 1u << 6u;
}
inline bool get_USBPHY_DIRECT_OVERRIDE_TX_DP_OVERRIDE_EN() volatile
{
return USBPHY_DIRECT_OVERRIDE & (1u << 7u);
}
inline void set_USBPHY_DIRECT_OVERRIDE_TX_DP_OVERRIDE_EN() volatile
{
USBPHY_DIRECT_OVERRIDE |= 1u << 7u;
}
inline void clear_USBPHY_DIRECT_OVERRIDE_TX_DP_OVERRIDE_EN() volatile
{
USBPHY_DIRECT_OVERRIDE &= ~(1u << 7u);
}
inline void toggle_USBPHY_DIRECT_OVERRIDE_TX_DP_OVERRIDE_EN() volatile
{
USBPHY_DIRECT_OVERRIDE ^= 1u << 7u;
}
inline bool get_USBPHY_DIRECT_OVERRIDE_TX_DM_OVERRIDE_EN() volatile
{
return USBPHY_DIRECT_OVERRIDE & (1u << 8u);
}
inline void set_USBPHY_DIRECT_OVERRIDE_TX_DM_OVERRIDE_EN() volatile
{
USBPHY_DIRECT_OVERRIDE |= 1u << 8u;
}
inline void clear_USBPHY_DIRECT_OVERRIDE_TX_DM_OVERRIDE_EN() volatile
{
USBPHY_DIRECT_OVERRIDE &= ~(1u << 8u);
}
inline void toggle_USBPHY_DIRECT_OVERRIDE_TX_DM_OVERRIDE_EN() volatile
{
USBPHY_DIRECT_OVERRIDE ^= 1u << 8u;
}
inline bool get_USBPHY_DIRECT_OVERRIDE_RX_PD_OVERRIDE_EN() volatile
{
return USBPHY_DIRECT_OVERRIDE & (1u << 9u);
}
inline void set_USBPHY_DIRECT_OVERRIDE_RX_PD_OVERRIDE_EN() volatile
{
USBPHY_DIRECT_OVERRIDE |= 1u << 9u;
}
inline void clear_USBPHY_DIRECT_OVERRIDE_RX_PD_OVERRIDE_EN() volatile
{
USBPHY_DIRECT_OVERRIDE &= ~(1u << 9u);
}
inline void toggle_USBPHY_DIRECT_OVERRIDE_RX_PD_OVERRIDE_EN() volatile
{
USBPHY_DIRECT_OVERRIDE ^= 1u << 9u;
}
inline bool get_USBPHY_DIRECT_OVERRIDE_TX_PD_OVERRIDE_EN() volatile
{
return USBPHY_DIRECT_OVERRIDE & (1u << 10u);
}
inline void set_USBPHY_DIRECT_OVERRIDE_TX_PD_OVERRIDE_EN() volatile
{
USBPHY_DIRECT_OVERRIDE |= 1u << 10u;
}
inline void clear_USBPHY_DIRECT_OVERRIDE_TX_PD_OVERRIDE_EN() volatile
{
USBPHY_DIRECT_OVERRIDE &= ~(1u << 10u);
}
inline void toggle_USBPHY_DIRECT_OVERRIDE_TX_PD_OVERRIDE_EN() volatile
{
USBPHY_DIRECT_OVERRIDE ^= 1u << 10u;
}
inline bool get_USBPHY_DIRECT_OVERRIDE_TX_FSSLEW_OVERRIDE_EN() volatile
{
return USBPHY_DIRECT_OVERRIDE & (1u << 11u);
}
inline void set_USBPHY_DIRECT_OVERRIDE_TX_FSSLEW_OVERRIDE_EN() volatile
{
USBPHY_DIRECT_OVERRIDE |= 1u << 11u;
}
inline void clear_USBPHY_DIRECT_OVERRIDE_TX_FSSLEW_OVERRIDE_EN() volatile
{
USBPHY_DIRECT_OVERRIDE &= ~(1u << 11u);
}
inline void toggle_USBPHY_DIRECT_OVERRIDE_TX_FSSLEW_OVERRIDE_EN() volatile
{
USBPHY_DIRECT_OVERRIDE ^= 1u << 11u;
}
inline bool get_USBPHY_DIRECT_OVERRIDE_DM_PULLUP_OVERRIDE_EN() volatile
{
return USBPHY_DIRECT_OVERRIDE & (1u << 12u);
}
inline void set_USBPHY_DIRECT_OVERRIDE_DM_PULLUP_OVERRIDE_EN() volatile
{
USBPHY_DIRECT_OVERRIDE |= 1u << 12u;
}
inline void clear_USBPHY_DIRECT_OVERRIDE_DM_PULLUP_OVERRIDE_EN() volatile
{
USBPHY_DIRECT_OVERRIDE &= ~(1u << 12u);
}
inline void toggle_USBPHY_DIRECT_OVERRIDE_DM_PULLUP_OVERRIDE_EN() volatile
{
USBPHY_DIRECT_OVERRIDE ^= 1u << 12u;
}
inline bool get_USBPHY_DIRECT_OVERRIDE_TX_DIFFMODE_OVERRIDE_EN() volatile
{
return USBPHY_DIRECT_OVERRIDE & (1u << 15u);
}
inline void set_USBPHY_DIRECT_OVERRIDE_TX_DIFFMODE_OVERRIDE_EN() volatile
{
USBPHY_DIRECT_OVERRIDE |= 1u << 15u;
}
inline void clear_USBPHY_DIRECT_OVERRIDE_TX_DIFFMODE_OVERRIDE_EN() volatile
{
USBPHY_DIRECT_OVERRIDE &= ~(1u << 15u);
}
inline void
toggle_USBPHY_DIRECT_OVERRIDE_TX_DIFFMODE_OVERRIDE_EN() volatile
{
USBPHY_DIRECT_OVERRIDE ^= 1u << 15u;
}
inline void get_USBPHY_DIRECT_OVERRIDE(
bool &DP_PULLUP_HISEL_OVERRIDE_EN, bool &DM_PULLUP_HISEL_OVERRIDE_EN,
bool &DP_PULLUP_EN_OVERRIDE_EN, bool &DP_PULLDN_EN_OVERRIDE_EN,
bool &DM_PULLDN_EN_OVERRIDE_EN, bool &TX_DP_OE_OVERRIDE_EN,
bool &TX_DM_OE_OVERRIDE_EN, bool &TX_DP_OVERRIDE_EN,
bool &TX_DM_OVERRIDE_EN, bool &RX_PD_OVERRIDE_EN,
bool &TX_PD_OVERRIDE_EN, bool &TX_FSSLEW_OVERRIDE_EN,
bool &DM_PULLUP_OVERRIDE_EN, bool &TX_DIFFMODE_OVERRIDE_EN) volatile
{
uint32_t curr = USBPHY_DIRECT_OVERRIDE;
DP_PULLUP_HISEL_OVERRIDE_EN = curr & (1u << 0u);
DM_PULLUP_HISEL_OVERRIDE_EN = curr & (1u << 1u);
DP_PULLUP_EN_OVERRIDE_EN = curr & (1u << 2u);
DP_PULLDN_EN_OVERRIDE_EN = curr & (1u << 3u);
DM_PULLDN_EN_OVERRIDE_EN = curr & (1u << 4u);
TX_DP_OE_OVERRIDE_EN = curr & (1u << 5u);
TX_DM_OE_OVERRIDE_EN = curr & (1u << 6u);
TX_DP_OVERRIDE_EN = curr & (1u << 7u);
TX_DM_OVERRIDE_EN = curr & (1u << 8u);
RX_PD_OVERRIDE_EN = curr & (1u << 9u);
TX_PD_OVERRIDE_EN = curr & (1u << 10u);
TX_FSSLEW_OVERRIDE_EN = curr & (1u << 11u);
DM_PULLUP_OVERRIDE_EN = curr & (1u << 12u);
TX_DIFFMODE_OVERRIDE_EN = curr & (1u << 15u);
}
inline void set_USBPHY_DIRECT_OVERRIDE(
bool DP_PULLUP_HISEL_OVERRIDE_EN, bool DM_PULLUP_HISEL_OVERRIDE_EN,
bool DP_PULLUP_EN_OVERRIDE_EN, bool DP_PULLDN_EN_OVERRIDE_EN,
bool DM_PULLDN_EN_OVERRIDE_EN, bool TX_DP_OE_OVERRIDE_EN,
bool TX_DM_OE_OVERRIDE_EN, bool TX_DP_OVERRIDE_EN,
bool TX_DM_OVERRIDE_EN, bool RX_PD_OVERRIDE_EN, bool TX_PD_OVERRIDE_EN,
bool TX_FSSLEW_OVERRIDE_EN, bool DM_PULLUP_OVERRIDE_EN,
bool TX_DIFFMODE_OVERRIDE_EN) volatile
{
uint32_t curr = USBPHY_DIRECT_OVERRIDE;
curr &= ~(0b1u << 0u);
curr |= (DP_PULLUP_HISEL_OVERRIDE_EN & 0b1u) << 0u;
curr &= ~(0b1u << 1u);
curr |= (DM_PULLUP_HISEL_OVERRIDE_EN & 0b1u) << 1u;
curr &= ~(0b1u << 2u);
curr |= (DP_PULLUP_EN_OVERRIDE_EN & 0b1u) << 2u;
curr &= ~(0b1u << 3u);
curr |= (DP_PULLDN_EN_OVERRIDE_EN & 0b1u) << 3u;
curr &= ~(0b1u << 4u);
curr |= (DM_PULLDN_EN_OVERRIDE_EN & 0b1u) << 4u;
curr &= ~(0b1u << 5u);
curr |= (TX_DP_OE_OVERRIDE_EN & 0b1u) << 5u;
curr &= ~(0b1u << 6u);
curr |= (TX_DM_OE_OVERRIDE_EN & 0b1u) << 6u;
curr &= ~(0b1u << 7u);
curr |= (TX_DP_OVERRIDE_EN & 0b1u) << 7u;
curr &= ~(0b1u << 8u);
curr |= (TX_DM_OVERRIDE_EN & 0b1u) << 8u;
curr &= ~(0b1u << 9u);
curr |= (RX_PD_OVERRIDE_EN & 0b1u) << 9u;
curr &= ~(0b1u << 10u);
curr |= (TX_PD_OVERRIDE_EN & 0b1u) << 10u;
curr &= ~(0b1u << 11u);
curr |= (TX_FSSLEW_OVERRIDE_EN & 0b1u) << 11u;
curr &= ~(0b1u << 12u);
curr |= (DM_PULLUP_OVERRIDE_EN & 0b1u) << 12u;
curr &= ~(0b1u << 15u);
curr |= (TX_DIFFMODE_OVERRIDE_EN & 0b1u) << 15u;
USBPHY_DIRECT_OVERRIDE = curr;
}
inline uint8_t get_USBPHY_TRIM_DP_PULLDN_TRIM() volatile
{
return (USBPHY_TRIM >> 0u) & 0b11111u;
}
inline void set_USBPHY_TRIM_DP_PULLDN_TRIM(uint8_t value) volatile
{
uint32_t curr = USBPHY_TRIM;
curr &= ~(0b11111u << 0u);
curr |= (value & 0b11111u) << 0u;
USBPHY_TRIM = curr;
}
inline uint8_t get_USBPHY_TRIM_DM_PULLDN_TRIM() volatile
{
return (USBPHY_TRIM >> 8u) & 0b11111u;
}
inline void set_USBPHY_TRIM_DM_PULLDN_TRIM(uint8_t value) volatile
{
uint32_t curr = USBPHY_TRIM;
curr &= ~(0b11111u << 8u);
curr |= (value & 0b11111u) << 8u;
USBPHY_TRIM = curr;
}
inline void get_USBPHY_TRIM(uint8_t &DP_PULLDN_TRIM,
uint8_t &DM_PULLDN_TRIM) volatile
{
uint32_t curr = USBPHY_TRIM;
DP_PULLDN_TRIM = (curr >> 0u) & 0b11111u;
DM_PULLDN_TRIM = (curr >> 8u) & 0b11111u;
}
inline void set_USBPHY_TRIM(uint8_t DP_PULLDN_TRIM,
uint8_t DM_PULLDN_TRIM) volatile
{
uint32_t curr = USBPHY_TRIM;
curr &= ~(0b11111u << 0u);
curr |= (DP_PULLDN_TRIM & 0b11111u) << 0u;
curr &= ~(0b11111u << 8u);
curr |= (DM_PULLDN_TRIM & 0b11111u) << 8u;
USBPHY_TRIM = curr;
}
inline bool get_INTR_HOST_CONN_DIS() volatile
{
return INTR & (1u << 0u);
}
inline bool get_INTR_HOST_RESUME() volatile
{
return INTR & (1u << 1u);
}
inline bool get_INTR_HOST_SOF() volatile
{
return INTR & (1u << 2u);
}
inline bool get_INTR_TRANS_COMPLETE() volatile
{
return INTR & (1u << 3u);
}
inline bool get_INTR_BUFF_STATUS() volatile
{
return INTR & (1u << 4u);
}
inline bool get_INTR_ERROR_DATA_SEQ() volatile
{
return INTR & (1u << 5u);
}
inline bool get_INTR_ERROR_RX_TIMEOUT() volatile
{
return INTR & (1u << 6u);
}
inline bool get_INTR_ERROR_RX_OVERFLOW() volatile
{
return INTR & (1u << 7u);
}
inline bool get_INTR_ERROR_BIT_STUFF() volatile
{
return INTR & (1u << 8u);
}
inline bool get_INTR_ERROR_CRC() volatile
{
return INTR & (1u << 9u);
}
inline bool get_INTR_STALL() volatile
{
return INTR & (1u << 10u);
}
inline bool get_INTR_VBUS_DETECT() volatile
{
return INTR & (1u << 11u);
}
inline bool get_INTR_BUS_RESET() volatile
{
return INTR & (1u << 12u);
}
inline bool get_INTR_DEV_CONN_DIS() volatile
{
return INTR & (1u << 13u);
}
inline bool get_INTR_DEV_SUSPEND() volatile
{
return INTR & (1u << 14u);
}
inline bool get_INTR_DEV_RESUME_FROM_HOST() volatile
{
return INTR & (1u << 15u);
}
inline bool get_INTR_SETUP_REQ() volatile
{
return INTR & (1u << 16u);
}
inline bool get_INTR_DEV_SOF() volatile
{
return INTR & (1u << 17u);
}
inline bool get_INTR_ABORT_DONE() volatile
{
return INTR & (1u << 18u);
}
inline bool get_INTR_EP_STALL_NAK() volatile
{
return INTR & (1u << 19u);
}
inline void get_INTR(bool &HOST_CONN_DIS, bool &HOST_RESUME,
bool &HOST_SOF, bool &TRANS_COMPLETE,
bool &BUFF_STATUS, bool &ERROR_DATA_SEQ,
bool &ERROR_RX_TIMEOUT, bool &ERROR_RX_OVERFLOW,
bool &ERROR_BIT_STUFF, bool &ERROR_CRC, bool &STALL,
bool &VBUS_DETECT, bool &BUS_RESET,
bool &DEV_CONN_DIS, bool &DEV_SUSPEND,
bool &DEV_RESUME_FROM_HOST, bool &SETUP_REQ,
bool &DEV_SOF, bool &ABORT_DONE,
bool &EP_STALL_NAK) volatile
{
uint32_t curr = INTR;
HOST_CONN_DIS = curr & (1u << 0u);
HOST_RESUME = curr & (1u << 1u);
HOST_SOF = curr & (1u << 2u);
TRANS_COMPLETE = curr & (1u << 3u);
BUFF_STATUS = curr & (1u << 4u);
ERROR_DATA_SEQ = curr & (1u << 5u);
ERROR_RX_TIMEOUT = curr & (1u << 6u);
ERROR_RX_OVERFLOW = curr & (1u << 7u);
ERROR_BIT_STUFF = curr & (1u << 8u);
ERROR_CRC = curr & (1u << 9u);
STALL = curr & (1u << 10u);
VBUS_DETECT = curr & (1u << 11u);
BUS_RESET = curr & (1u << 12u);
DEV_CONN_DIS = curr & (1u << 13u);
DEV_SUSPEND = curr & (1u << 14u);
DEV_RESUME_FROM_HOST = curr & (1u << 15u);
SETUP_REQ = curr & (1u << 16u);
DEV_SOF = curr & (1u << 17u);
ABORT_DONE = curr & (1u << 18u);
EP_STALL_NAK = curr & (1u << 19u);
}
inline bool get_INTE_HOST_CONN_DIS() volatile
{
return INTE & (1u << 0u);
}
inline void set_INTE_HOST_CONN_DIS() volatile
{
INTE |= 1u << 0u;
}
inline void clear_INTE_HOST_CONN_DIS() volatile
{
INTE &= ~(1u << 0u);
}
inline void toggle_INTE_HOST_CONN_DIS() volatile
{
INTE ^= 1u << 0u;
}
inline bool get_INTE_HOST_RESUME() volatile
{
return INTE & (1u << 1u);
}
inline void set_INTE_HOST_RESUME() volatile
{
INTE |= 1u << 1u;
}
inline void clear_INTE_HOST_RESUME() volatile
{
INTE &= ~(1u << 1u);
}
inline void toggle_INTE_HOST_RESUME() volatile
{
INTE ^= 1u << 1u;
}
inline bool get_INTE_HOST_SOF() volatile
{
return INTE & (1u << 2u);
}
inline void set_INTE_HOST_SOF() volatile
{
INTE |= 1u << 2u;
}
inline void clear_INTE_HOST_SOF() volatile
{
INTE &= ~(1u << 2u);
}
inline void toggle_INTE_HOST_SOF() volatile
{
INTE ^= 1u << 2u;
}
inline bool get_INTE_TRANS_COMPLETE() volatile
{
return INTE & (1u << 3u);
}
inline void set_INTE_TRANS_COMPLETE() volatile
{
INTE |= 1u << 3u;
}
inline void clear_INTE_TRANS_COMPLETE() volatile
{
INTE &= ~(1u << 3u);
}
inline void toggle_INTE_TRANS_COMPLETE() volatile
{
INTE ^= 1u << 3u;
}
inline bool get_INTE_BUFF_STATUS() volatile
{
return INTE & (1u << 4u);
}
inline void set_INTE_BUFF_STATUS() volatile
{
INTE |= 1u << 4u;
}
inline void clear_INTE_BUFF_STATUS() volatile
{
INTE &= ~(1u << 4u);
}
inline void toggle_INTE_BUFF_STATUS() volatile
{
INTE ^= 1u << 4u;
}
inline bool get_INTE_ERROR_DATA_SEQ() volatile
{
return INTE & (1u << 5u);
}
inline void set_INTE_ERROR_DATA_SEQ() volatile
{
INTE |= 1u << 5u;
}
inline void clear_INTE_ERROR_DATA_SEQ() volatile
{
INTE &= ~(1u << 5u);
}
inline void toggle_INTE_ERROR_DATA_SEQ() volatile
{
INTE ^= 1u << 5u;
}
inline bool get_INTE_ERROR_RX_TIMEOUT() volatile
{
return INTE & (1u << 6u);
}
inline void set_INTE_ERROR_RX_TIMEOUT() volatile
{
INTE |= 1u << 6u;
}
inline void clear_INTE_ERROR_RX_TIMEOUT() volatile
{
INTE &= ~(1u << 6u);
}
inline void toggle_INTE_ERROR_RX_TIMEOUT() volatile
{
INTE ^= 1u << 6u;
}
inline bool get_INTE_ERROR_RX_OVERFLOW() volatile
{
return INTE & (1u << 7u);
}
inline void set_INTE_ERROR_RX_OVERFLOW() volatile
{
INTE |= 1u << 7u;
}
inline void clear_INTE_ERROR_RX_OVERFLOW() volatile
{
INTE &= ~(1u << 7u);
}
inline void toggle_INTE_ERROR_RX_OVERFLOW() volatile
{
INTE ^= 1u << 7u;
}
inline bool get_INTE_ERROR_BIT_STUFF() volatile
{
return INTE & (1u << 8u);
}
inline void set_INTE_ERROR_BIT_STUFF() volatile
{
INTE |= 1u << 8u;
}
inline void clear_INTE_ERROR_BIT_STUFF() volatile
{
INTE &= ~(1u << 8u);
}
inline void toggle_INTE_ERROR_BIT_STUFF() volatile
{
INTE ^= 1u << 8u;
}
inline bool get_INTE_ERROR_CRC() volatile
{
return INTE & (1u << 9u);
}
inline void set_INTE_ERROR_CRC() volatile
{
INTE |= 1u << 9u;
}
inline void clear_INTE_ERROR_CRC() volatile
{
INTE &= ~(1u << 9u);
}
inline void toggle_INTE_ERROR_CRC() volatile
{
INTE ^= 1u << 9u;
}
inline bool get_INTE_STALL() volatile
{
return INTE & (1u << 10u);
}
inline void set_INTE_STALL() volatile
{
INTE |= 1u << 10u;
}
inline void clear_INTE_STALL() volatile
{
INTE &= ~(1u << 10u);
}
inline void toggle_INTE_STALL() volatile
{
INTE ^= 1u << 10u;
}
inline bool get_INTE_VBUS_DETECT() volatile
{
return INTE & (1u << 11u);
}
inline void set_INTE_VBUS_DETECT() volatile
{
INTE |= 1u << 11u;
}
inline void clear_INTE_VBUS_DETECT() volatile
{
INTE &= ~(1u << 11u);
}
inline void toggle_INTE_VBUS_DETECT() volatile
{
INTE ^= 1u << 11u;
}
inline bool get_INTE_BUS_RESET() volatile
{
return INTE & (1u << 12u);
}
inline void set_INTE_BUS_RESET() volatile
{
INTE |= 1u << 12u;
}
inline void clear_INTE_BUS_RESET() volatile
{
INTE &= ~(1u << 12u);
}
inline void toggle_INTE_BUS_RESET() volatile
{
INTE ^= 1u << 12u;
}
inline bool get_INTE_DEV_CONN_DIS() volatile
{
return INTE & (1u << 13u);
}
inline void set_INTE_DEV_CONN_DIS() volatile
{
INTE |= 1u << 13u;
}
inline void clear_INTE_DEV_CONN_DIS() volatile
{
INTE &= ~(1u << 13u);
}
inline void toggle_INTE_DEV_CONN_DIS() volatile
{
INTE ^= 1u << 13u;
}
inline bool get_INTE_DEV_SUSPEND() volatile
{
return INTE & (1u << 14u);
}
inline void set_INTE_DEV_SUSPEND() volatile
{
INTE |= 1u << 14u;
}
inline void clear_INTE_DEV_SUSPEND() volatile
{
INTE &= ~(1u << 14u);
}
inline void toggle_INTE_DEV_SUSPEND() volatile
{
INTE ^= 1u << 14u;
}
inline bool get_INTE_DEV_RESUME_FROM_HOST() volatile
{
return INTE & (1u << 15u);
}
inline void set_INTE_DEV_RESUME_FROM_HOST() volatile
{
INTE |= 1u << 15u;
}
inline void clear_INTE_DEV_RESUME_FROM_HOST() volatile
{
INTE &= ~(1u << 15u);
}
inline void toggle_INTE_DEV_RESUME_FROM_HOST() volatile
{
INTE ^= 1u << 15u;
}
inline bool get_INTE_SETUP_REQ() volatile
{
return INTE & (1u << 16u);
}
inline void set_INTE_SETUP_REQ() volatile
{
INTE |= 1u << 16u;
}
inline void clear_INTE_SETUP_REQ() volatile
{
INTE &= ~(1u << 16u);
}
inline void toggle_INTE_SETUP_REQ() volatile
{
INTE ^= 1u << 16u;
}
inline bool get_INTE_DEV_SOF() volatile
{
return INTE & (1u << 17u);
}
inline void set_INTE_DEV_SOF() volatile
{
INTE |= 1u << 17u;
}
inline void clear_INTE_DEV_SOF() volatile
{
INTE &= ~(1u << 17u);
}
inline void toggle_INTE_DEV_SOF() volatile
{
INTE ^= 1u << 17u;
}
inline bool get_INTE_ABORT_DONE() volatile
{
return INTE & (1u << 18u);
}
inline void set_INTE_ABORT_DONE() volatile
{
INTE |= 1u << 18u;
}
inline void clear_INTE_ABORT_DONE() volatile
{
INTE &= ~(1u << 18u);
}
inline void toggle_INTE_ABORT_DONE() volatile
{
INTE ^= 1u << 18u;
}
inline bool get_INTE_EP_STALL_NAK() volatile
{
return INTE & (1u << 19u);
}
inline void set_INTE_EP_STALL_NAK() volatile
{
INTE |= 1u << 19u;
}
inline void clear_INTE_EP_STALL_NAK() volatile
{
INTE &= ~(1u << 19u);
}
inline void toggle_INTE_EP_STALL_NAK() volatile
{
INTE ^= 1u << 19u;
}
inline void get_INTE(bool &HOST_CONN_DIS, bool &HOST_RESUME,
bool &HOST_SOF, bool &TRANS_COMPLETE,
bool &BUFF_STATUS, bool &ERROR_DATA_SEQ,
bool &ERROR_RX_TIMEOUT, bool &ERROR_RX_OVERFLOW,
bool &ERROR_BIT_STUFF, bool &ERROR_CRC, bool &STALL,
bool &VBUS_DETECT, bool &BUS_RESET,
bool &DEV_CONN_DIS, bool &DEV_SUSPEND,
bool &DEV_RESUME_FROM_HOST, bool &SETUP_REQ,
bool &DEV_SOF, bool &ABORT_DONE,
bool &EP_STALL_NAK) volatile
{
uint32_t curr = INTE;
HOST_CONN_DIS = curr & (1u << 0u);
HOST_RESUME = curr & (1u << 1u);
HOST_SOF = curr & (1u << 2u);
TRANS_COMPLETE = curr & (1u << 3u);
BUFF_STATUS = curr & (1u << 4u);
ERROR_DATA_SEQ = curr & (1u << 5u);
ERROR_RX_TIMEOUT = curr & (1u << 6u);
ERROR_RX_OVERFLOW = curr & (1u << 7u);
ERROR_BIT_STUFF = curr & (1u << 8u);
ERROR_CRC = curr & (1u << 9u);
STALL = curr & (1u << 10u);
VBUS_DETECT = curr & (1u << 11u);
BUS_RESET = curr & (1u << 12u);
DEV_CONN_DIS = curr & (1u << 13u);
DEV_SUSPEND = curr & (1u << 14u);
DEV_RESUME_FROM_HOST = curr & (1u << 15u);
SETUP_REQ = curr & (1u << 16u);
DEV_SOF = curr & (1u << 17u);
ABORT_DONE = curr & (1u << 18u);
EP_STALL_NAK = curr & (1u << 19u);
}
inline void set_INTE(bool HOST_CONN_DIS, bool HOST_RESUME, bool HOST_SOF,
bool TRANS_COMPLETE, bool BUFF_STATUS,
bool ERROR_DATA_SEQ, bool ERROR_RX_TIMEOUT,
bool ERROR_RX_OVERFLOW, bool ERROR_BIT_STUFF,
bool ERROR_CRC, bool STALL, bool VBUS_DETECT,
bool BUS_RESET, bool DEV_CONN_DIS, bool DEV_SUSPEND,
bool DEV_RESUME_FROM_HOST, bool SETUP_REQ,
bool DEV_SOF, bool ABORT_DONE,
bool EP_STALL_NAK) volatile
{
uint32_t curr = INTE;
curr &= ~(0b1u << 0u);
curr |= (HOST_CONN_DIS & 0b1u) << 0u;
curr &= ~(0b1u << 1u);
curr |= (HOST_RESUME & 0b1u) << 1u;
curr &= ~(0b1u << 2u);
curr |= (HOST_SOF & 0b1u) << 2u;
curr &= ~(0b1u << 3u);
curr |= (TRANS_COMPLETE & 0b1u) << 3u;
curr &= ~(0b1u << 4u);
curr |= (BUFF_STATUS & 0b1u) << 4u;
curr &= ~(0b1u << 5u);
curr |= (ERROR_DATA_SEQ & 0b1u) << 5u;
curr &= ~(0b1u << 6u);
curr |= (ERROR_RX_TIMEOUT & 0b1u) << 6u;
curr &= ~(0b1u << 7u);
curr |= (ERROR_RX_OVERFLOW & 0b1u) << 7u;
curr &= ~(0b1u << 8u);
curr |= (ERROR_BIT_STUFF & 0b1u) << 8u;
curr &= ~(0b1u << 9u);
curr |= (ERROR_CRC & 0b1u) << 9u;
curr &= ~(0b1u << 10u);
curr |= (STALL & 0b1u) << 10u;
curr &= ~(0b1u << 11u);
curr |= (VBUS_DETECT & 0b1u) << 11u;
curr &= ~(0b1u << 12u);
curr |= (BUS_RESET & 0b1u) << 12u;
curr &= ~(0b1u << 13u);
curr |= (DEV_CONN_DIS & 0b1u) << 13u;
curr &= ~(0b1u << 14u);
curr |= (DEV_SUSPEND & 0b1u) << 14u;
curr &= ~(0b1u << 15u);
curr |= (DEV_RESUME_FROM_HOST & 0b1u) << 15u;
curr &= ~(0b1u << 16u);
curr |= (SETUP_REQ & 0b1u) << 16u;
curr &= ~(0b1u << 17u);
curr |= (DEV_SOF & 0b1u) << 17u;
curr &= ~(0b1u << 18u);
curr |= (ABORT_DONE & 0b1u) << 18u;
curr &= ~(0b1u << 19u);
curr |= (EP_STALL_NAK & 0b1u) << 19u;
INTE = curr;
}
inline bool get_INTF_HOST_CONN_DIS() volatile
{
return INTF & (1u << 0u);
}
inline void set_INTF_HOST_CONN_DIS() volatile
{
INTF |= 1u << 0u;
}
inline void clear_INTF_HOST_CONN_DIS() volatile
{
INTF &= ~(1u << 0u);
}
inline void toggle_INTF_HOST_CONN_DIS() volatile
{
INTF ^= 1u << 0u;
}
inline bool get_INTF_HOST_RESUME() volatile
{
return INTF & (1u << 1u);
}
inline void set_INTF_HOST_RESUME() volatile
{
INTF |= 1u << 1u;
}
inline void clear_INTF_HOST_RESUME() volatile
{
INTF &= ~(1u << 1u);
}
inline void toggle_INTF_HOST_RESUME() volatile
{
INTF ^= 1u << 1u;
}
inline bool get_INTF_HOST_SOF() volatile
{
return INTF & (1u << 2u);
}
inline void set_INTF_HOST_SOF() volatile
{
INTF |= 1u << 2u;
}
inline void clear_INTF_HOST_SOF() volatile
{
INTF &= ~(1u << 2u);
}
inline void toggle_INTF_HOST_SOF() volatile
{
INTF ^= 1u << 2u;
}
inline bool get_INTF_TRANS_COMPLETE() volatile
{
return INTF & (1u << 3u);
}
inline void set_INTF_TRANS_COMPLETE() volatile
{
INTF |= 1u << 3u;
}
inline void clear_INTF_TRANS_COMPLETE() volatile
{
INTF &= ~(1u << 3u);
}
inline void toggle_INTF_TRANS_COMPLETE() volatile
{
INTF ^= 1u << 3u;
}
inline bool get_INTF_BUFF_STATUS() volatile
{
return INTF & (1u << 4u);
}
inline void set_INTF_BUFF_STATUS() volatile
{
INTF |= 1u << 4u;
}
inline void clear_INTF_BUFF_STATUS() volatile
{
INTF &= ~(1u << 4u);
}
inline void toggle_INTF_BUFF_STATUS() volatile
{
INTF ^= 1u << 4u;
}
inline bool get_INTF_ERROR_DATA_SEQ() volatile
{
return INTF & (1u << 5u);
}
inline void set_INTF_ERROR_DATA_SEQ() volatile
{
INTF |= 1u << 5u;
}
inline void clear_INTF_ERROR_DATA_SEQ() volatile
{
INTF &= ~(1u << 5u);
}
inline void toggle_INTF_ERROR_DATA_SEQ() volatile
{
INTF ^= 1u << 5u;
}
inline bool get_INTF_ERROR_RX_TIMEOUT() volatile
{
return INTF & (1u << 6u);
}
inline void set_INTF_ERROR_RX_TIMEOUT() volatile
{
INTF |= 1u << 6u;
}
inline void clear_INTF_ERROR_RX_TIMEOUT() volatile
{
INTF &= ~(1u << 6u);
}
inline void toggle_INTF_ERROR_RX_TIMEOUT() volatile
{
INTF ^= 1u << 6u;
}
inline bool get_INTF_ERROR_RX_OVERFLOW() volatile
{
return INTF & (1u << 7u);
}
inline void set_INTF_ERROR_RX_OVERFLOW() volatile
{
INTF |= 1u << 7u;
}
inline void clear_INTF_ERROR_RX_OVERFLOW() volatile
{
INTF &= ~(1u << 7u);
}
inline void toggle_INTF_ERROR_RX_OVERFLOW() volatile
{
INTF ^= 1u << 7u;
}
inline bool get_INTF_ERROR_BIT_STUFF() volatile
{
return INTF & (1u << 8u);
}
inline void set_INTF_ERROR_BIT_STUFF() volatile
{
INTF |= 1u << 8u;
}
inline void clear_INTF_ERROR_BIT_STUFF() volatile
{
INTF &= ~(1u << 8u);
}
inline void toggle_INTF_ERROR_BIT_STUFF() volatile
{
INTF ^= 1u << 8u;
}
inline bool get_INTF_ERROR_CRC() volatile
{
return INTF & (1u << 9u);
}
inline void set_INTF_ERROR_CRC() volatile
{
INTF |= 1u << 9u;
}
inline void clear_INTF_ERROR_CRC() volatile
{
INTF &= ~(1u << 9u);
}
inline void toggle_INTF_ERROR_CRC() volatile
{
INTF ^= 1u << 9u;
}
inline bool get_INTF_STALL() volatile
{
return INTF & (1u << 10u);
}
inline void set_INTF_STALL() volatile
{
INTF |= 1u << 10u;
}
inline void clear_INTF_STALL() volatile
{
INTF &= ~(1u << 10u);
}
inline void toggle_INTF_STALL() volatile
{
INTF ^= 1u << 10u;
}
inline bool get_INTF_VBUS_DETECT() volatile
{
return INTF & (1u << 11u);
}
inline void set_INTF_VBUS_DETECT() volatile
{
INTF |= 1u << 11u;
}
inline void clear_INTF_VBUS_DETECT() volatile
{
INTF &= ~(1u << 11u);
}
inline void toggle_INTF_VBUS_DETECT() volatile
{
INTF ^= 1u << 11u;
}
inline bool get_INTF_BUS_RESET() volatile
{
return INTF & (1u << 12u);
}
inline void set_INTF_BUS_RESET() volatile
{
INTF |= 1u << 12u;
}
inline void clear_INTF_BUS_RESET() volatile
{
INTF &= ~(1u << 12u);
}
inline void toggle_INTF_BUS_RESET() volatile
{
INTF ^= 1u << 12u;
}
inline bool get_INTF_DEV_CONN_DIS() volatile
{
return INTF & (1u << 13u);
}
inline void set_INTF_DEV_CONN_DIS() volatile
{
INTF |= 1u << 13u;
}
inline void clear_INTF_DEV_CONN_DIS() volatile
{
INTF &= ~(1u << 13u);
}
inline void toggle_INTF_DEV_CONN_DIS() volatile
{
INTF ^= 1u << 13u;
}
inline bool get_INTF_DEV_SUSPEND() volatile
{
return INTF & (1u << 14u);
}
inline void set_INTF_DEV_SUSPEND() volatile
{
INTF |= 1u << 14u;
}
inline void clear_INTF_DEV_SUSPEND() volatile
{
INTF &= ~(1u << 14u);
}
inline void toggle_INTF_DEV_SUSPEND() volatile
{
INTF ^= 1u << 14u;
}
inline bool get_INTF_DEV_RESUME_FROM_HOST() volatile
{
return INTF & (1u << 15u);
}
inline void set_INTF_DEV_RESUME_FROM_HOST() volatile
{
INTF |= 1u << 15u;
}
inline void clear_INTF_DEV_RESUME_FROM_HOST() volatile
{
INTF &= ~(1u << 15u);
}
inline void toggle_INTF_DEV_RESUME_FROM_HOST() volatile
{
INTF ^= 1u << 15u;
}
inline bool get_INTF_SETUP_REQ() volatile
{
return INTF & (1u << 16u);
}
inline void set_INTF_SETUP_REQ() volatile
{
INTF |= 1u << 16u;
}
inline void clear_INTF_SETUP_REQ() volatile
{
INTF &= ~(1u << 16u);
}
inline void toggle_INTF_SETUP_REQ() volatile
{
INTF ^= 1u << 16u;
}
inline bool get_INTF_DEV_SOF() volatile
{
return INTF & (1u << 17u);
}
inline void set_INTF_DEV_SOF() volatile
{
INTF |= 1u << 17u;
}
inline void clear_INTF_DEV_SOF() volatile
{
INTF &= ~(1u << 17u);
}
inline void toggle_INTF_DEV_SOF() volatile
{
INTF ^= 1u << 17u;
}
inline bool get_INTF_ABORT_DONE() volatile
{
return INTF & (1u << 18u);
}
inline void set_INTF_ABORT_DONE() volatile
{
INTF |= 1u << 18u;
}
inline void clear_INTF_ABORT_DONE() volatile
{
INTF &= ~(1u << 18u);
}
inline void toggle_INTF_ABORT_DONE() volatile
{
INTF ^= 1u << 18u;
}
inline bool get_INTF_EP_STALL_NAK() volatile
{
return INTF & (1u << 19u);
}
inline void set_INTF_EP_STALL_NAK() volatile
{
INTF |= 1u << 19u;
}
inline void clear_INTF_EP_STALL_NAK() volatile
{
INTF &= ~(1u << 19u);
}
inline void toggle_INTF_EP_STALL_NAK() volatile
{
INTF ^= 1u << 19u;
}
inline void get_INTF(bool &HOST_CONN_DIS, bool &HOST_RESUME,
bool &HOST_SOF, bool &TRANS_COMPLETE,
bool &BUFF_STATUS, bool &ERROR_DATA_SEQ,
bool &ERROR_RX_TIMEOUT, bool &ERROR_RX_OVERFLOW,
bool &ERROR_BIT_STUFF, bool &ERROR_CRC, bool &STALL,
bool &VBUS_DETECT, bool &BUS_RESET,
bool &DEV_CONN_DIS, bool &DEV_SUSPEND,
bool &DEV_RESUME_FROM_HOST, bool &SETUP_REQ,
bool &DEV_SOF, bool &ABORT_DONE,
bool &EP_STALL_NAK) volatile
{
uint32_t curr = INTF;
HOST_CONN_DIS = curr & (1u << 0u);
HOST_RESUME = curr & (1u << 1u);
HOST_SOF = curr & (1u << 2u);
TRANS_COMPLETE = curr & (1u << 3u);
BUFF_STATUS = curr & (1u << 4u);
ERROR_DATA_SEQ = curr & (1u << 5u);
ERROR_RX_TIMEOUT = curr & (1u << 6u);
ERROR_RX_OVERFLOW = curr & (1u << 7u);
ERROR_BIT_STUFF = curr & (1u << 8u);
ERROR_CRC = curr & (1u << 9u);
STALL = curr & (1u << 10u);
VBUS_DETECT = curr & (1u << 11u);
BUS_RESET = curr & (1u << 12u);
DEV_CONN_DIS = curr & (1u << 13u);
DEV_SUSPEND = curr & (1u << 14u);
DEV_RESUME_FROM_HOST = curr & (1u << 15u);
SETUP_REQ = curr & (1u << 16u);
DEV_SOF = curr & (1u << 17u);
ABORT_DONE = curr & (1u << 18u);
EP_STALL_NAK = curr & (1u << 19u);
}
inline void set_INTF(bool HOST_CONN_DIS, bool HOST_RESUME, bool HOST_SOF,
bool TRANS_COMPLETE, bool BUFF_STATUS,
bool ERROR_DATA_SEQ, bool ERROR_RX_TIMEOUT,
bool ERROR_RX_OVERFLOW, bool ERROR_BIT_STUFF,
bool ERROR_CRC, bool STALL, bool VBUS_DETECT,
bool BUS_RESET, bool DEV_CONN_DIS, bool DEV_SUSPEND,
bool DEV_RESUME_FROM_HOST, bool SETUP_REQ,
bool DEV_SOF, bool ABORT_DONE,
bool EP_STALL_NAK) volatile
{
uint32_t curr = INTF;
curr &= ~(0b1u << 0u);
curr |= (HOST_CONN_DIS & 0b1u) << 0u;
curr &= ~(0b1u << 1u);
curr |= (HOST_RESUME & 0b1u) << 1u;
curr &= ~(0b1u << 2u);
curr |= (HOST_SOF & 0b1u) << 2u;
curr &= ~(0b1u << 3u);
curr |= (TRANS_COMPLETE & 0b1u) << 3u;
curr &= ~(0b1u << 4u);
curr |= (BUFF_STATUS & 0b1u) << 4u;
curr &= ~(0b1u << 5u);
curr |= (ERROR_DATA_SEQ & 0b1u) << 5u;
curr &= ~(0b1u << 6u);
curr |= (ERROR_RX_TIMEOUT & 0b1u) << 6u;
curr &= ~(0b1u << 7u);
curr |= (ERROR_RX_OVERFLOW & 0b1u) << 7u;
curr &= ~(0b1u << 8u);
curr |= (ERROR_BIT_STUFF & 0b1u) << 8u;
curr &= ~(0b1u << 9u);
curr |= (ERROR_CRC & 0b1u) << 9u;
curr &= ~(0b1u << 10u);
curr |= (STALL & 0b1u) << 10u;
curr &= ~(0b1u << 11u);
curr |= (VBUS_DETECT & 0b1u) << 11u;
curr &= ~(0b1u << 12u);
curr |= (BUS_RESET & 0b1u) << 12u;
curr &= ~(0b1u << 13u);
curr |= (DEV_CONN_DIS & 0b1u) << 13u;
curr &= ~(0b1u << 14u);
curr |= (DEV_SUSPEND & 0b1u) << 14u;
curr &= ~(0b1u << 15u);
curr |= (DEV_RESUME_FROM_HOST & 0b1u) << 15u;
curr &= ~(0b1u << 16u);
curr |= (SETUP_REQ & 0b1u) << 16u;
curr &= ~(0b1u << 17u);
curr |= (DEV_SOF & 0b1u) << 17u;
curr &= ~(0b1u << 18u);
curr |= (ABORT_DONE & 0b1u) << 18u;
curr &= ~(0b1u << 19u);
curr |= (EP_STALL_NAK & 0b1u) << 19u;
INTF = curr;
}
inline bool get_INTS_HOST_CONN_DIS() volatile
{
return INTS & (1u << 0u);
}
inline bool get_INTS_HOST_RESUME() volatile
{
return INTS & (1u << 1u);
}
inline bool get_INTS_HOST_SOF() volatile
{
return INTS & (1u << 2u);
}
inline bool get_INTS_TRANS_COMPLETE() volatile
{
return INTS & (1u << 3u);
}
inline bool get_INTS_BUFF_STATUS() volatile
{
return INTS & (1u << 4u);
}
inline bool get_INTS_ERROR_DATA_SEQ() volatile
{
return INTS & (1u << 5u);
}
inline bool get_INTS_ERROR_RX_TIMEOUT() volatile
{
return INTS & (1u << 6u);
}
inline bool get_INTS_ERROR_RX_OVERFLOW() volatile
{
return INTS & (1u << 7u);
}
inline bool get_INTS_ERROR_BIT_STUFF() volatile
{
return INTS & (1u << 8u);
}
inline bool get_INTS_ERROR_CRC() volatile
{
return INTS & (1u << 9u);
}
inline bool get_INTS_STALL() volatile
{
return INTS & (1u << 10u);
}
inline bool get_INTS_VBUS_DETECT() volatile
{
return INTS & (1u << 11u);
}
inline bool get_INTS_BUS_RESET() volatile
{
return INTS & (1u << 12u);
}
inline bool get_INTS_DEV_CONN_DIS() volatile
{
return INTS & (1u << 13u);
}
inline bool get_INTS_DEV_SUSPEND() volatile
{
return INTS & (1u << 14u);
}
inline bool get_INTS_DEV_RESUME_FROM_HOST() volatile
{
return INTS & (1u << 15u);
}
inline bool get_INTS_SETUP_REQ() volatile
{
return INTS & (1u << 16u);
}
inline bool get_INTS_DEV_SOF() volatile
{
return INTS & (1u << 17u);
}
inline bool get_INTS_ABORT_DONE() volatile
{
return INTS & (1u << 18u);
}
inline bool get_INTS_EP_STALL_NAK() volatile
{
return INTS & (1u << 19u);
}
inline void get_INTS(bool &HOST_CONN_DIS, bool &HOST_RESUME,
bool &HOST_SOF, bool &TRANS_COMPLETE,
bool &BUFF_STATUS, bool &ERROR_DATA_SEQ,
bool &ERROR_RX_TIMEOUT, bool &ERROR_RX_OVERFLOW,
bool &ERROR_BIT_STUFF, bool &ERROR_CRC, bool &STALL,
bool &VBUS_DETECT, bool &BUS_RESET,
bool &DEV_CONN_DIS, bool &DEV_SUSPEND,
bool &DEV_RESUME_FROM_HOST, bool &SETUP_REQ,
bool &DEV_SOF, bool &ABORT_DONE,
bool &EP_STALL_NAK) volatile
{
uint32_t curr = INTS;
HOST_CONN_DIS = curr & (1u << 0u);
HOST_RESUME = curr & (1u << 1u);
HOST_SOF = curr & (1u << 2u);
TRANS_COMPLETE = curr & (1u << 3u);
BUFF_STATUS = curr & (1u << 4u);
ERROR_DATA_SEQ = curr & (1u << 5u);
ERROR_RX_TIMEOUT = curr & (1u << 6u);
ERROR_RX_OVERFLOW = curr & (1u << 7u);
ERROR_BIT_STUFF = curr & (1u << 8u);
ERROR_CRC = curr & (1u << 9u);
STALL = curr & (1u << 10u);
VBUS_DETECT = curr & (1u << 11u);
BUS_RESET = curr & (1u << 12u);
DEV_CONN_DIS = curr & (1u << 13u);
DEV_SUSPEND = curr & (1u << 14u);
DEV_RESUME_FROM_HOST = curr & (1u << 15u);
SETUP_REQ = curr & (1u << 16u);
DEV_SOF = curr & (1u << 17u);
ABORT_DONE = curr & (1u << 18u);
EP_STALL_NAK = curr & (1u << 19u);
}
};
static_assert(sizeof(usbctrl_regs) == usbctrl_regs::size);
static volatile usbctrl_regs *const USBCTRL_REGS =
reinterpret_cast<usbctrl_regs *>(0x50110000);
}; // namespace RP2040