Struct clocks#

Struct Documentation#

struct clocks#

Public Functions

inline CLOCKS_CLK_GPOUT0_CTRL_AUXSRC get_CLK_GPOUT0_CTRL_AUXSRC() volatile#

Get CLK_GPOUT0_CTRL’s AUXSRC field.

Selects the auxiliary clock source, will glitch when switching

inline void set_CLK_GPOUT0_CTRL_AUXSRC(CLOCKS_CLK_GPOUT0_CTRL_AUXSRC value) volatile#

Set CLK_GPOUT0_CTRL’s AUXSRC field.

Selects the auxiliary clock source, will glitch when switching

inline bool get_CLK_GPOUT0_CTRL_KILL() volatile#

Get CLK_GPOUT0_CTRL’s KILL bit.

Asynchronously kills the clock generator

inline void set_CLK_GPOUT0_CTRL_KILL() volatile#

Set CLK_GPOUT0_CTRL’s KILL bit.

Asynchronously kills the clock generator

inline void clear_CLK_GPOUT0_CTRL_KILL() volatile#

Clear CLK_GPOUT0_CTRL’s KILL bit.

Asynchronously kills the clock generator

inline void toggle_CLK_GPOUT0_CTRL_KILL() volatile#

Toggle CLK_GPOUT0_CTRL’s KILL bit.

Asynchronously kills the clock generator

inline bool get_CLK_GPOUT0_CTRL_ENABLE() volatile#

Get CLK_GPOUT0_CTRL’s ENABLE bit.

Starts and stops the clock generator cleanly

inline void set_CLK_GPOUT0_CTRL_ENABLE() volatile#

Set CLK_GPOUT0_CTRL’s ENABLE bit.

Starts and stops the clock generator cleanly

inline void clear_CLK_GPOUT0_CTRL_ENABLE() volatile#

Clear CLK_GPOUT0_CTRL’s ENABLE bit.

Starts and stops the clock generator cleanly

inline void toggle_CLK_GPOUT0_CTRL_ENABLE() volatile#

Toggle CLK_GPOUT0_CTRL’s ENABLE bit.

Starts and stops the clock generator cleanly

inline bool get_CLK_GPOUT0_CTRL_DC50() volatile#

Get CLK_GPOUT0_CTRL’s DC50 bit.

Enables duty cycle correction for odd divisors

inline void set_CLK_GPOUT0_CTRL_DC50() volatile#

Set CLK_GPOUT0_CTRL’s DC50 bit.

Enables duty cycle correction for odd divisors

inline void clear_CLK_GPOUT0_CTRL_DC50() volatile#

Clear CLK_GPOUT0_CTRL’s DC50 bit.

Enables duty cycle correction for odd divisors

inline void toggle_CLK_GPOUT0_CTRL_DC50() volatile#

Toggle CLK_GPOUT0_CTRL’s DC50 bit.

Enables duty cycle correction for odd divisors

inline uint8_t get_CLK_GPOUT0_CTRL_PHASE() volatile#

Get CLK_GPOUT0_CTRL’s PHASE field.

This delays the enable signal by up to 3 cycles of the input clock

This must be set before the clock is enabled to have any effect

inline void set_CLK_GPOUT0_CTRL_PHASE(uint8_t value) volatile#

Set CLK_GPOUT0_CTRL’s PHASE field.

This delays the enable signal by up to 3 cycles of the input clock

This must be set before the clock is enabled to have any effect

inline bool get_CLK_GPOUT0_CTRL_NUDGE() volatile#

Get CLK_GPOUT0_CTRL’s NUDGE bit.

An edge on this signal shifts the phase of the output by 1 cycle of the input clock

This can be done at any time

inline void set_CLK_GPOUT0_CTRL_NUDGE() volatile#

Set CLK_GPOUT0_CTRL’s NUDGE bit.

An edge on this signal shifts the phase of the output by 1 cycle of the input clock

This can be done at any time

inline void clear_CLK_GPOUT0_CTRL_NUDGE() volatile#

Clear CLK_GPOUT0_CTRL’s NUDGE bit.

An edge on this signal shifts the phase of the output by 1 cycle of the input clock

This can be done at any time

inline void toggle_CLK_GPOUT0_CTRL_NUDGE() volatile#

Toggle CLK_GPOUT0_CTRL’s NUDGE bit.

An edge on this signal shifts the phase of the output by 1 cycle of the input clock

This can be done at any time

inline void get_CLK_GPOUT0_CTRL(CLOCKS_CLK_GPOUT0_CTRL_AUXSRC &AUXSRC, bool &KILL, bool &ENABLE, bool &DC50, uint8_t &PHASE, bool &NUDGE) volatile#

Get all of CLK_GPOUT0_CTRL’s bit fields.

(read-write) Clock control, can be changed on-the-fly (except for auxsrc)

inline void set_CLK_GPOUT0_CTRL(CLOCKS_CLK_GPOUT0_CTRL_AUXSRC AUXSRC, bool KILL, bool ENABLE, bool DC50, uint8_t PHASE, bool NUDGE) volatile#

Set all of CLK_GPOUT0_CTRL’s bit fields.

(read-write) Clock control, can be changed on-the-fly (except for auxsrc)

inline uint8_t get_CLK_GPOUT0_DIV_FRAC() volatile#

Get CLK_GPOUT0_DIV’s FRAC field.

Fractional component of the divisor

inline void set_CLK_GPOUT0_DIV_FRAC(uint8_t value) volatile#

Set CLK_GPOUT0_DIV’s FRAC field.

Fractional component of the divisor

inline uint32_t get_CLK_GPOUT0_DIV_INT() volatile#

Get CLK_GPOUT0_DIV’s INT field.

Integer component of the divisor, 0 -> divide by 2^16

inline void set_CLK_GPOUT0_DIV_INT(uint32_t value) volatile#

Set CLK_GPOUT0_DIV’s INT field.

Integer component of the divisor, 0 -> divide by 2^16

inline void get_CLK_GPOUT0_DIV(uint8_t &FRAC, uint32_t &INT) volatile#

Get all of CLK_GPOUT0_DIV’s bit fields.

(read-write) Clock divisor, can be changed on-the-fly

inline void set_CLK_GPOUT0_DIV(uint8_t FRAC, uint32_t INT) volatile#

Set all of CLK_GPOUT0_DIV’s bit fields.

(read-write) Clock divisor, can be changed on-the-fly

inline CLOCKS_CLK_GPOUT1_CTRL_AUXSRC get_CLK_GPOUT1_CTRL_AUXSRC() volatile#

Get CLK_GPOUT1_CTRL’s AUXSRC field.

Selects the auxiliary clock source, will glitch when switching

inline void set_CLK_GPOUT1_CTRL_AUXSRC(CLOCKS_CLK_GPOUT1_CTRL_AUXSRC value) volatile#

Set CLK_GPOUT1_CTRL’s AUXSRC field.

Selects the auxiliary clock source, will glitch when switching

inline bool get_CLK_GPOUT1_CTRL_KILL() volatile#

Get CLK_GPOUT1_CTRL’s KILL bit.

Asynchronously kills the clock generator

inline void set_CLK_GPOUT1_CTRL_KILL() volatile#

Set CLK_GPOUT1_CTRL’s KILL bit.

Asynchronously kills the clock generator

inline void clear_CLK_GPOUT1_CTRL_KILL() volatile#

Clear CLK_GPOUT1_CTRL’s KILL bit.

Asynchronously kills the clock generator

inline void toggle_CLK_GPOUT1_CTRL_KILL() volatile#

Toggle CLK_GPOUT1_CTRL’s KILL bit.

Asynchronously kills the clock generator

inline bool get_CLK_GPOUT1_CTRL_ENABLE() volatile#

Get CLK_GPOUT1_CTRL’s ENABLE bit.

Starts and stops the clock generator cleanly

inline void set_CLK_GPOUT1_CTRL_ENABLE() volatile#

Set CLK_GPOUT1_CTRL’s ENABLE bit.

Starts and stops the clock generator cleanly

inline void clear_CLK_GPOUT1_CTRL_ENABLE() volatile#

Clear CLK_GPOUT1_CTRL’s ENABLE bit.

Starts and stops the clock generator cleanly

inline void toggle_CLK_GPOUT1_CTRL_ENABLE() volatile#

Toggle CLK_GPOUT1_CTRL’s ENABLE bit.

Starts and stops the clock generator cleanly

inline bool get_CLK_GPOUT1_CTRL_DC50() volatile#

Get CLK_GPOUT1_CTRL’s DC50 bit.

Enables duty cycle correction for odd divisors

inline void set_CLK_GPOUT1_CTRL_DC50() volatile#

Set CLK_GPOUT1_CTRL’s DC50 bit.

Enables duty cycle correction for odd divisors

inline void clear_CLK_GPOUT1_CTRL_DC50() volatile#

Clear CLK_GPOUT1_CTRL’s DC50 bit.

Enables duty cycle correction for odd divisors

inline void toggle_CLK_GPOUT1_CTRL_DC50() volatile#

Toggle CLK_GPOUT1_CTRL’s DC50 bit.

Enables duty cycle correction for odd divisors

inline uint8_t get_CLK_GPOUT1_CTRL_PHASE() volatile#

Get CLK_GPOUT1_CTRL’s PHASE field.

This delays the enable signal by up to 3 cycles of the input clock

This must be set before the clock is enabled to have any effect

inline void set_CLK_GPOUT1_CTRL_PHASE(uint8_t value) volatile#

Set CLK_GPOUT1_CTRL’s PHASE field.

This delays the enable signal by up to 3 cycles of the input clock

This must be set before the clock is enabled to have any effect

inline bool get_CLK_GPOUT1_CTRL_NUDGE() volatile#

Get CLK_GPOUT1_CTRL’s NUDGE bit.

An edge on this signal shifts the phase of the output by 1 cycle of the input clock

This can be done at any time

inline void set_CLK_GPOUT1_CTRL_NUDGE() volatile#

Set CLK_GPOUT1_CTRL’s NUDGE bit.

An edge on this signal shifts the phase of the output by 1 cycle of the input clock

This can be done at any time

inline void clear_CLK_GPOUT1_CTRL_NUDGE() volatile#

Clear CLK_GPOUT1_CTRL’s NUDGE bit.

An edge on this signal shifts the phase of the output by 1 cycle of the input clock

This can be done at any time

inline void toggle_CLK_GPOUT1_CTRL_NUDGE() volatile#

Toggle CLK_GPOUT1_CTRL’s NUDGE bit.

An edge on this signal shifts the phase of the output by 1 cycle of the input clock

This can be done at any time

inline void get_CLK_GPOUT1_CTRL(CLOCKS_CLK_GPOUT1_CTRL_AUXSRC &AUXSRC, bool &KILL, bool &ENABLE, bool &DC50, uint8_t &PHASE, bool &NUDGE) volatile#

Get all of CLK_GPOUT1_CTRL’s bit fields.

(read-write) Clock control, can be changed on-the-fly (except for auxsrc)

inline void set_CLK_GPOUT1_CTRL(CLOCKS_CLK_GPOUT1_CTRL_AUXSRC AUXSRC, bool KILL, bool ENABLE, bool DC50, uint8_t PHASE, bool NUDGE) volatile#

Set all of CLK_GPOUT1_CTRL’s bit fields.

(read-write) Clock control, can be changed on-the-fly (except for auxsrc)

inline uint8_t get_CLK_GPOUT1_DIV_FRAC() volatile#

Get CLK_GPOUT1_DIV’s FRAC field.

Fractional component of the divisor

inline void set_CLK_GPOUT1_DIV_FRAC(uint8_t value) volatile#

Set CLK_GPOUT1_DIV’s FRAC field.

Fractional component of the divisor

inline uint32_t get_CLK_GPOUT1_DIV_INT() volatile#

Get CLK_GPOUT1_DIV’s INT field.

Integer component of the divisor, 0 -> divide by 2^16

inline void set_CLK_GPOUT1_DIV_INT(uint32_t value) volatile#

Set CLK_GPOUT1_DIV’s INT field.

Integer component of the divisor, 0 -> divide by 2^16

inline void get_CLK_GPOUT1_DIV(uint8_t &FRAC, uint32_t &INT) volatile#

Get all of CLK_GPOUT1_DIV’s bit fields.

(read-write) Clock divisor, can be changed on-the-fly

inline void set_CLK_GPOUT1_DIV(uint8_t FRAC, uint32_t INT) volatile#

Set all of CLK_GPOUT1_DIV’s bit fields.

(read-write) Clock divisor, can be changed on-the-fly

inline CLOCKS_CLK_GPOUT2_CTRL_AUXSRC get_CLK_GPOUT2_CTRL_AUXSRC() volatile#

Get CLK_GPOUT2_CTRL’s AUXSRC field.

Selects the auxiliary clock source, will glitch when switching

inline void set_CLK_GPOUT2_CTRL_AUXSRC(CLOCKS_CLK_GPOUT2_CTRL_AUXSRC value) volatile#

Set CLK_GPOUT2_CTRL’s AUXSRC field.

Selects the auxiliary clock source, will glitch when switching

inline bool get_CLK_GPOUT2_CTRL_KILL() volatile#

Get CLK_GPOUT2_CTRL’s KILL bit.

Asynchronously kills the clock generator

inline void set_CLK_GPOUT2_CTRL_KILL() volatile#

Set CLK_GPOUT2_CTRL’s KILL bit.

Asynchronously kills the clock generator

inline void clear_CLK_GPOUT2_CTRL_KILL() volatile#

Clear CLK_GPOUT2_CTRL’s KILL bit.

Asynchronously kills the clock generator

inline void toggle_CLK_GPOUT2_CTRL_KILL() volatile#

Toggle CLK_GPOUT2_CTRL’s KILL bit.

Asynchronously kills the clock generator

inline bool get_CLK_GPOUT2_CTRL_ENABLE() volatile#

Get CLK_GPOUT2_CTRL’s ENABLE bit.

Starts and stops the clock generator cleanly

inline void set_CLK_GPOUT2_CTRL_ENABLE() volatile#

Set CLK_GPOUT2_CTRL’s ENABLE bit.

Starts and stops the clock generator cleanly

inline void clear_CLK_GPOUT2_CTRL_ENABLE() volatile#

Clear CLK_GPOUT2_CTRL’s ENABLE bit.

Starts and stops the clock generator cleanly

inline void toggle_CLK_GPOUT2_CTRL_ENABLE() volatile#

Toggle CLK_GPOUT2_CTRL’s ENABLE bit.

Starts and stops the clock generator cleanly

inline bool get_CLK_GPOUT2_CTRL_DC50() volatile#

Get CLK_GPOUT2_CTRL’s DC50 bit.

Enables duty cycle correction for odd divisors

inline void set_CLK_GPOUT2_CTRL_DC50() volatile#

Set CLK_GPOUT2_CTRL’s DC50 bit.

Enables duty cycle correction for odd divisors

inline void clear_CLK_GPOUT2_CTRL_DC50() volatile#

Clear CLK_GPOUT2_CTRL’s DC50 bit.

Enables duty cycle correction for odd divisors

inline void toggle_CLK_GPOUT2_CTRL_DC50() volatile#

Toggle CLK_GPOUT2_CTRL’s DC50 bit.

Enables duty cycle correction for odd divisors

inline uint8_t get_CLK_GPOUT2_CTRL_PHASE() volatile#

Get CLK_GPOUT2_CTRL’s PHASE field.

This delays the enable signal by up to 3 cycles of the input clock

This must be set before the clock is enabled to have any effect

inline void set_CLK_GPOUT2_CTRL_PHASE(uint8_t value) volatile#

Set CLK_GPOUT2_CTRL’s PHASE field.

This delays the enable signal by up to 3 cycles of the input clock

This must be set before the clock is enabled to have any effect

inline bool get_CLK_GPOUT2_CTRL_NUDGE() volatile#

Get CLK_GPOUT2_CTRL’s NUDGE bit.

An edge on this signal shifts the phase of the output by 1 cycle of the input clock

This can be done at any time

inline void set_CLK_GPOUT2_CTRL_NUDGE() volatile#

Set CLK_GPOUT2_CTRL’s NUDGE bit.

An edge on this signal shifts the phase of the output by 1 cycle of the input clock

This can be done at any time

inline void clear_CLK_GPOUT2_CTRL_NUDGE() volatile#

Clear CLK_GPOUT2_CTRL’s NUDGE bit.

An edge on this signal shifts the phase of the output by 1 cycle of the input clock

This can be done at any time

inline void toggle_CLK_GPOUT2_CTRL_NUDGE() volatile#

Toggle CLK_GPOUT2_CTRL’s NUDGE bit.

An edge on this signal shifts the phase of the output by 1 cycle of the input clock

This can be done at any time

inline void get_CLK_GPOUT2_CTRL(CLOCKS_CLK_GPOUT2_CTRL_AUXSRC &AUXSRC, bool &KILL, bool &ENABLE, bool &DC50, uint8_t &PHASE, bool &NUDGE) volatile#

Get all of CLK_GPOUT2_CTRL’s bit fields.

(read-write) Clock control, can be changed on-the-fly (except for auxsrc)

inline void set_CLK_GPOUT2_CTRL(CLOCKS_CLK_GPOUT2_CTRL_AUXSRC AUXSRC, bool KILL, bool ENABLE, bool DC50, uint8_t PHASE, bool NUDGE) volatile#

Set all of CLK_GPOUT2_CTRL’s bit fields.

(read-write) Clock control, can be changed on-the-fly (except for auxsrc)

inline uint8_t get_CLK_GPOUT2_DIV_FRAC() volatile#

Get CLK_GPOUT2_DIV’s FRAC field.

Fractional component of the divisor

inline void set_CLK_GPOUT2_DIV_FRAC(uint8_t value) volatile#

Set CLK_GPOUT2_DIV’s FRAC field.

Fractional component of the divisor

inline uint32_t get_CLK_GPOUT2_DIV_INT() volatile#

Get CLK_GPOUT2_DIV’s INT field.

Integer component of the divisor, 0 -> divide by 2^16

inline void set_CLK_GPOUT2_DIV_INT(uint32_t value) volatile#

Set CLK_GPOUT2_DIV’s INT field.

Integer component of the divisor, 0 -> divide by 2^16

inline void get_CLK_GPOUT2_DIV(uint8_t &FRAC, uint32_t &INT) volatile#

Get all of CLK_GPOUT2_DIV’s bit fields.

(read-write) Clock divisor, can be changed on-the-fly

inline void set_CLK_GPOUT2_DIV(uint8_t FRAC, uint32_t INT) volatile#

Set all of CLK_GPOUT2_DIV’s bit fields.

(read-write) Clock divisor, can be changed on-the-fly

inline CLOCKS_CLK_GPOUT3_CTRL_AUXSRC get_CLK_GPOUT3_CTRL_AUXSRC() volatile#

Get CLK_GPOUT3_CTRL’s AUXSRC field.

Selects the auxiliary clock source, will glitch when switching

inline void set_CLK_GPOUT3_CTRL_AUXSRC(CLOCKS_CLK_GPOUT3_CTRL_AUXSRC value) volatile#

Set CLK_GPOUT3_CTRL’s AUXSRC field.

Selects the auxiliary clock source, will glitch when switching

inline bool get_CLK_GPOUT3_CTRL_KILL() volatile#

Get CLK_GPOUT3_CTRL’s KILL bit.

Asynchronously kills the clock generator

inline void set_CLK_GPOUT3_CTRL_KILL() volatile#

Set CLK_GPOUT3_CTRL’s KILL bit.

Asynchronously kills the clock generator

inline void clear_CLK_GPOUT3_CTRL_KILL() volatile#

Clear CLK_GPOUT3_CTRL’s KILL bit.

Asynchronously kills the clock generator

inline void toggle_CLK_GPOUT3_CTRL_KILL() volatile#

Toggle CLK_GPOUT3_CTRL’s KILL bit.

Asynchronously kills the clock generator

inline bool get_CLK_GPOUT3_CTRL_ENABLE() volatile#

Get CLK_GPOUT3_CTRL’s ENABLE bit.

Starts and stops the clock generator cleanly

inline void set_CLK_GPOUT3_CTRL_ENABLE() volatile#

Set CLK_GPOUT3_CTRL’s ENABLE bit.

Starts and stops the clock generator cleanly

inline void clear_CLK_GPOUT3_CTRL_ENABLE() volatile#

Clear CLK_GPOUT3_CTRL’s ENABLE bit.

Starts and stops the clock generator cleanly

inline void toggle_CLK_GPOUT3_CTRL_ENABLE() volatile#

Toggle CLK_GPOUT3_CTRL’s ENABLE bit.

Starts and stops the clock generator cleanly

inline bool get_CLK_GPOUT3_CTRL_DC50() volatile#

Get CLK_GPOUT3_CTRL’s DC50 bit.

Enables duty cycle correction for odd divisors

inline void set_CLK_GPOUT3_CTRL_DC50() volatile#

Set CLK_GPOUT3_CTRL’s DC50 bit.

Enables duty cycle correction for odd divisors

inline void clear_CLK_GPOUT3_CTRL_DC50() volatile#

Clear CLK_GPOUT3_CTRL’s DC50 bit.

Enables duty cycle correction for odd divisors

inline void toggle_CLK_GPOUT3_CTRL_DC50() volatile#

Toggle CLK_GPOUT3_CTRL’s DC50 bit.

Enables duty cycle correction for odd divisors

inline uint8_t get_CLK_GPOUT3_CTRL_PHASE() volatile#

Get CLK_GPOUT3_CTRL’s PHASE field.

This delays the enable signal by up to 3 cycles of the input clock

This must be set before the clock is enabled to have any effect

inline void set_CLK_GPOUT3_CTRL_PHASE(uint8_t value) volatile#

Set CLK_GPOUT3_CTRL’s PHASE field.

This delays the enable signal by up to 3 cycles of the input clock

This must be set before the clock is enabled to have any effect

inline bool get_CLK_GPOUT3_CTRL_NUDGE() volatile#

Get CLK_GPOUT3_CTRL’s NUDGE bit.

An edge on this signal shifts the phase of the output by 1 cycle of the input clock

This can be done at any time

inline void set_CLK_GPOUT3_CTRL_NUDGE() volatile#

Set CLK_GPOUT3_CTRL’s NUDGE bit.

An edge on this signal shifts the phase of the output by 1 cycle of the input clock

This can be done at any time

inline void clear_CLK_GPOUT3_CTRL_NUDGE() volatile#

Clear CLK_GPOUT3_CTRL’s NUDGE bit.

An edge on this signal shifts the phase of the output by 1 cycle of the input clock

This can be done at any time

inline void toggle_CLK_GPOUT3_CTRL_NUDGE() volatile#

Toggle CLK_GPOUT3_CTRL’s NUDGE bit.

An edge on this signal shifts the phase of the output by 1 cycle of the input clock

This can be done at any time

inline void get_CLK_GPOUT3_CTRL(CLOCKS_CLK_GPOUT3_CTRL_AUXSRC &AUXSRC, bool &KILL, bool &ENABLE, bool &DC50, uint8_t &PHASE, bool &NUDGE) volatile#

Get all of CLK_GPOUT3_CTRL’s bit fields.

(read-write) Clock control, can be changed on-the-fly (except for auxsrc)

inline void set_CLK_GPOUT3_CTRL(CLOCKS_CLK_GPOUT3_CTRL_AUXSRC AUXSRC, bool KILL, bool ENABLE, bool DC50, uint8_t PHASE, bool NUDGE) volatile#

Set all of CLK_GPOUT3_CTRL’s bit fields.

(read-write) Clock control, can be changed on-the-fly (except for auxsrc)

inline uint8_t get_CLK_GPOUT3_DIV_FRAC() volatile#

Get CLK_GPOUT3_DIV’s FRAC field.

Fractional component of the divisor

inline void set_CLK_GPOUT3_DIV_FRAC(uint8_t value) volatile#

Set CLK_GPOUT3_DIV’s FRAC field.

Fractional component of the divisor

inline uint32_t get_CLK_GPOUT3_DIV_INT() volatile#

Get CLK_GPOUT3_DIV’s INT field.

Integer component of the divisor, 0 -> divide by 2^16

inline void set_CLK_GPOUT3_DIV_INT(uint32_t value) volatile#

Set CLK_GPOUT3_DIV’s INT field.

Integer component of the divisor, 0 -> divide by 2^16

inline void get_CLK_GPOUT3_DIV(uint8_t &FRAC, uint32_t &INT) volatile#

Get all of CLK_GPOUT3_DIV’s bit fields.

(read-write) Clock divisor, can be changed on-the-fly

inline void set_CLK_GPOUT3_DIV(uint8_t FRAC, uint32_t INT) volatile#

Set all of CLK_GPOUT3_DIV’s bit fields.

(read-write) Clock divisor, can be changed on-the-fly

inline CLOCKS_CLK_REF_CTRL_SRC get_CLK_REF_CTRL_SRC() volatile#

Get CLK_REF_CTRL’s SRC field.

Selects the clock source glitchlessly, can be changed on-the-fly

inline void set_CLK_REF_CTRL_SRC(CLOCKS_CLK_REF_CTRL_SRC value) volatile#

Set CLK_REF_CTRL’s SRC field.

Selects the clock source glitchlessly, can be changed on-the-fly

inline CLOCKS_CLK_REF_CTRL_AUXSRC get_CLK_REF_CTRL_AUXSRC() volatile#

Get CLK_REF_CTRL’s AUXSRC field.

Selects the auxiliary clock source, will glitch when switching

inline void set_CLK_REF_CTRL_AUXSRC(CLOCKS_CLK_REF_CTRL_AUXSRC value) volatile#

Set CLK_REF_CTRL’s AUXSRC field.

Selects the auxiliary clock source, will glitch when switching

inline void get_CLK_REF_CTRL(CLOCKS_CLK_REF_CTRL_SRC &SRC, CLOCKS_CLK_REF_CTRL_AUXSRC &AUXSRC) volatile#

Get all of CLK_REF_CTRL’s bit fields.

(read-write) Clock control, can be changed on-the-fly (except for auxsrc)

inline void set_CLK_REF_CTRL(CLOCKS_CLK_REF_CTRL_SRC SRC, CLOCKS_CLK_REF_CTRL_AUXSRC AUXSRC) volatile#

Set all of CLK_REF_CTRL’s bit fields.

(read-write) Clock control, can be changed on-the-fly (except for auxsrc)

inline uint8_t get_CLK_REF_DIV_INT() volatile#

Get CLK_REF_DIV’s INT field.

Integer component of the divisor, 0 -> divide by 2^16

inline void set_CLK_REF_DIV_INT(uint8_t value) volatile#

Set CLK_REF_DIV’s INT field.

Integer component of the divisor, 0 -> divide by 2^16

inline bool get_CLK_SYS_CTRL_SRC() volatile#

Get CLK_SYS_CTRL’s SRC bit.

Selects the clock source glitchlessly, can be changed on-the-fly

inline void set_CLK_SYS_CTRL_SRC() volatile#

Set CLK_SYS_CTRL’s SRC bit.

Selects the clock source glitchlessly, can be changed on-the-fly

inline void clear_CLK_SYS_CTRL_SRC() volatile#

Clear CLK_SYS_CTRL’s SRC bit.

Selects the clock source glitchlessly, can be changed on-the-fly

inline void toggle_CLK_SYS_CTRL_SRC() volatile#

Toggle CLK_SYS_CTRL’s SRC bit.

Selects the clock source glitchlessly, can be changed on-the-fly

inline CLOCKS_CLK_SYS_CTRL_AUXSRC get_CLK_SYS_CTRL_AUXSRC() volatile#

Get CLK_SYS_CTRL’s AUXSRC field.

Selects the auxiliary clock source, will glitch when switching

inline void set_CLK_SYS_CTRL_AUXSRC(CLOCKS_CLK_SYS_CTRL_AUXSRC value) volatile#

Set CLK_SYS_CTRL’s AUXSRC field.

Selects the auxiliary clock source, will glitch when switching

inline void get_CLK_SYS_CTRL(bool &SRC, CLOCKS_CLK_SYS_CTRL_AUXSRC &AUXSRC) volatile#

Get all of CLK_SYS_CTRL’s bit fields.

(read-write) Clock control, can be changed on-the-fly (except for auxsrc)

inline void set_CLK_SYS_CTRL(bool SRC, CLOCKS_CLK_SYS_CTRL_AUXSRC AUXSRC) volatile#

Set all of CLK_SYS_CTRL’s bit fields.

(read-write) Clock control, can be changed on-the-fly (except for auxsrc)

inline uint8_t get_CLK_SYS_DIV_FRAC() volatile#

Get CLK_SYS_DIV’s FRAC field.

Fractional component of the divisor

inline void set_CLK_SYS_DIV_FRAC(uint8_t value) volatile#

Set CLK_SYS_DIV’s FRAC field.

Fractional component of the divisor

inline uint32_t get_CLK_SYS_DIV_INT() volatile#

Get CLK_SYS_DIV’s INT field.

Integer component of the divisor, 0 -> divide by 2^16

inline void set_CLK_SYS_DIV_INT(uint32_t value) volatile#

Set CLK_SYS_DIV’s INT field.

Integer component of the divisor, 0 -> divide by 2^16

inline void get_CLK_SYS_DIV(uint8_t &FRAC, uint32_t &INT) volatile#

Get all of CLK_SYS_DIV’s bit fields.

(read-write) Clock divisor, can be changed on-the-fly

inline void set_CLK_SYS_DIV(uint8_t FRAC, uint32_t INT) volatile#

Set all of CLK_SYS_DIV’s bit fields.

(read-write) Clock divisor, can be changed on-the-fly

inline CLOCKS_CLK_PERI_CTRL_AUXSRC get_CLK_PERI_CTRL_AUXSRC() volatile#

Get CLK_PERI_CTRL’s AUXSRC field.

Selects the auxiliary clock source, will glitch when switching

inline void set_CLK_PERI_CTRL_AUXSRC(CLOCKS_CLK_PERI_CTRL_AUXSRC value) volatile#

Set CLK_PERI_CTRL’s AUXSRC field.

Selects the auxiliary clock source, will glitch when switching

inline bool get_CLK_PERI_CTRL_KILL() volatile#

Get CLK_PERI_CTRL’s KILL bit.

Asynchronously kills the clock generator

inline void set_CLK_PERI_CTRL_KILL() volatile#

Set CLK_PERI_CTRL’s KILL bit.

Asynchronously kills the clock generator

inline void clear_CLK_PERI_CTRL_KILL() volatile#

Clear CLK_PERI_CTRL’s KILL bit.

Asynchronously kills the clock generator

inline void toggle_CLK_PERI_CTRL_KILL() volatile#

Toggle CLK_PERI_CTRL’s KILL bit.

Asynchronously kills the clock generator

inline bool get_CLK_PERI_CTRL_ENABLE() volatile#

Get CLK_PERI_CTRL’s ENABLE bit.

Starts and stops the clock generator cleanly

inline void set_CLK_PERI_CTRL_ENABLE() volatile#

Set CLK_PERI_CTRL’s ENABLE bit.

Starts and stops the clock generator cleanly

inline void clear_CLK_PERI_CTRL_ENABLE() volatile#

Clear CLK_PERI_CTRL’s ENABLE bit.

Starts and stops the clock generator cleanly

inline void toggle_CLK_PERI_CTRL_ENABLE() volatile#

Toggle CLK_PERI_CTRL’s ENABLE bit.

Starts and stops the clock generator cleanly

inline void get_CLK_PERI_CTRL(CLOCKS_CLK_PERI_CTRL_AUXSRC &AUXSRC, bool &KILL, bool &ENABLE) volatile#

Get all of CLK_PERI_CTRL’s bit fields.

(read-write) Clock control, can be changed on-the-fly (except for auxsrc)

inline void set_CLK_PERI_CTRL(CLOCKS_CLK_PERI_CTRL_AUXSRC AUXSRC, bool KILL, bool ENABLE) volatile#

Set all of CLK_PERI_CTRL’s bit fields.

(read-write) Clock control, can be changed on-the-fly (except for auxsrc)

inline CLOCKS_CLK_USB_CTRL_AUXSRC get_CLK_USB_CTRL_AUXSRC() volatile#

Get CLK_USB_CTRL’s AUXSRC field.

Selects the auxiliary clock source, will glitch when switching

inline void set_CLK_USB_CTRL_AUXSRC(CLOCKS_CLK_USB_CTRL_AUXSRC value) volatile#

Set CLK_USB_CTRL’s AUXSRC field.

Selects the auxiliary clock source, will glitch when switching

inline bool get_CLK_USB_CTRL_KILL() volatile#

Get CLK_USB_CTRL’s KILL bit.

Asynchronously kills the clock generator

inline void set_CLK_USB_CTRL_KILL() volatile#

Set CLK_USB_CTRL’s KILL bit.

Asynchronously kills the clock generator

inline void clear_CLK_USB_CTRL_KILL() volatile#

Clear CLK_USB_CTRL’s KILL bit.

Asynchronously kills the clock generator

inline void toggle_CLK_USB_CTRL_KILL() volatile#

Toggle CLK_USB_CTRL’s KILL bit.

Asynchronously kills the clock generator

inline bool get_CLK_USB_CTRL_ENABLE() volatile#

Get CLK_USB_CTRL’s ENABLE bit.

Starts and stops the clock generator cleanly

inline void set_CLK_USB_CTRL_ENABLE() volatile#

Set CLK_USB_CTRL’s ENABLE bit.

Starts and stops the clock generator cleanly

inline void clear_CLK_USB_CTRL_ENABLE() volatile#

Clear CLK_USB_CTRL’s ENABLE bit.

Starts and stops the clock generator cleanly

inline void toggle_CLK_USB_CTRL_ENABLE() volatile#

Toggle CLK_USB_CTRL’s ENABLE bit.

Starts and stops the clock generator cleanly

inline uint8_t get_CLK_USB_CTRL_PHASE() volatile#

Get CLK_USB_CTRL’s PHASE field.

This delays the enable signal by up to 3 cycles of the input clock

This must be set before the clock is enabled to have any effect

inline void set_CLK_USB_CTRL_PHASE(uint8_t value) volatile#

Set CLK_USB_CTRL’s PHASE field.

This delays the enable signal by up to 3 cycles of the input clock

This must be set before the clock is enabled to have any effect

inline bool get_CLK_USB_CTRL_NUDGE() volatile#

Get CLK_USB_CTRL’s NUDGE bit.

An edge on this signal shifts the phase of the output by 1 cycle of the input clock

This can be done at any time

inline void set_CLK_USB_CTRL_NUDGE() volatile#

Set CLK_USB_CTRL’s NUDGE bit.

An edge on this signal shifts the phase of the output by 1 cycle of the input clock

This can be done at any time

inline void clear_CLK_USB_CTRL_NUDGE() volatile#

Clear CLK_USB_CTRL’s NUDGE bit.

An edge on this signal shifts the phase of the output by 1 cycle of the input clock

This can be done at any time

inline void toggle_CLK_USB_CTRL_NUDGE() volatile#

Toggle CLK_USB_CTRL’s NUDGE bit.

An edge on this signal shifts the phase of the output by 1 cycle of the input clock

This can be done at any time

inline void get_CLK_USB_CTRL(CLOCKS_CLK_USB_CTRL_AUXSRC &AUXSRC, bool &KILL, bool &ENABLE, uint8_t &PHASE, bool &NUDGE) volatile#

Get all of CLK_USB_CTRL’s bit fields.

(read-write) Clock control, can be changed on-the-fly (except for auxsrc)

inline void set_CLK_USB_CTRL(CLOCKS_CLK_USB_CTRL_AUXSRC AUXSRC, bool KILL, bool ENABLE, uint8_t PHASE, bool NUDGE) volatile#

Set all of CLK_USB_CTRL’s bit fields.

(read-write) Clock control, can be changed on-the-fly (except for auxsrc)

inline uint8_t get_CLK_USB_DIV_INT() volatile#

Get CLK_USB_DIV’s INT field.

Integer component of the divisor, 0 -> divide by 2^16

inline void set_CLK_USB_DIV_INT(uint8_t value) volatile#

Set CLK_USB_DIV’s INT field.

Integer component of the divisor, 0 -> divide by 2^16

inline CLOCKS_CLK_ADC_CTRL_AUXSRC get_CLK_ADC_CTRL_AUXSRC() volatile#

Get CLK_ADC_CTRL’s AUXSRC field.

Selects the auxiliary clock source, will glitch when switching

inline void set_CLK_ADC_CTRL_AUXSRC(CLOCKS_CLK_ADC_CTRL_AUXSRC value) volatile#

Set CLK_ADC_CTRL’s AUXSRC field.

Selects the auxiliary clock source, will glitch when switching

inline bool get_CLK_ADC_CTRL_KILL() volatile#

Get CLK_ADC_CTRL’s KILL bit.

Asynchronously kills the clock generator

inline void set_CLK_ADC_CTRL_KILL() volatile#

Set CLK_ADC_CTRL’s KILL bit.

Asynchronously kills the clock generator

inline void clear_CLK_ADC_CTRL_KILL() volatile#

Clear CLK_ADC_CTRL’s KILL bit.

Asynchronously kills the clock generator

inline void toggle_CLK_ADC_CTRL_KILL() volatile#

Toggle CLK_ADC_CTRL’s KILL bit.

Asynchronously kills the clock generator

inline bool get_CLK_ADC_CTRL_ENABLE() volatile#

Get CLK_ADC_CTRL’s ENABLE bit.

Starts and stops the clock generator cleanly

inline void set_CLK_ADC_CTRL_ENABLE() volatile#

Set CLK_ADC_CTRL’s ENABLE bit.

Starts and stops the clock generator cleanly

inline void clear_CLK_ADC_CTRL_ENABLE() volatile#

Clear CLK_ADC_CTRL’s ENABLE bit.

Starts and stops the clock generator cleanly

inline void toggle_CLK_ADC_CTRL_ENABLE() volatile#

Toggle CLK_ADC_CTRL’s ENABLE bit.

Starts and stops the clock generator cleanly

inline uint8_t get_CLK_ADC_CTRL_PHASE() volatile#

Get CLK_ADC_CTRL’s PHASE field.

This delays the enable signal by up to 3 cycles of the input clock

This must be set before the clock is enabled to have any effect

inline void set_CLK_ADC_CTRL_PHASE(uint8_t value) volatile#

Set CLK_ADC_CTRL’s PHASE field.

This delays the enable signal by up to 3 cycles of the input clock

This must be set before the clock is enabled to have any effect

inline bool get_CLK_ADC_CTRL_NUDGE() volatile#

Get CLK_ADC_CTRL’s NUDGE bit.

An edge on this signal shifts the phase of the output by 1 cycle of the input clock

This can be done at any time

inline void set_CLK_ADC_CTRL_NUDGE() volatile#

Set CLK_ADC_CTRL’s NUDGE bit.

An edge on this signal shifts the phase of the output by 1 cycle of the input clock

This can be done at any time

inline void clear_CLK_ADC_CTRL_NUDGE() volatile#

Clear CLK_ADC_CTRL’s NUDGE bit.

An edge on this signal shifts the phase of the output by 1 cycle of the input clock

This can be done at any time

inline void toggle_CLK_ADC_CTRL_NUDGE() volatile#

Toggle CLK_ADC_CTRL’s NUDGE bit.

An edge on this signal shifts the phase of the output by 1 cycle of the input clock

This can be done at any time

inline void get_CLK_ADC_CTRL(CLOCKS_CLK_ADC_CTRL_AUXSRC &AUXSRC, bool &KILL, bool &ENABLE, uint8_t &PHASE, bool &NUDGE) volatile#

Get all of CLK_ADC_CTRL’s bit fields.

(read-write) Clock control, can be changed on-the-fly (except for auxsrc)

inline void set_CLK_ADC_CTRL(CLOCKS_CLK_ADC_CTRL_AUXSRC AUXSRC, bool KILL, bool ENABLE, uint8_t PHASE, bool NUDGE) volatile#

Set all of CLK_ADC_CTRL’s bit fields.

(read-write) Clock control, can be changed on-the-fly (except for auxsrc)

inline uint8_t get_CLK_ADC_DIV_INT() volatile#

Get CLK_ADC_DIV’s INT field.

Integer component of the divisor, 0 -> divide by 2^16

inline void set_CLK_ADC_DIV_INT(uint8_t value) volatile#

Set CLK_ADC_DIV’s INT field.

Integer component of the divisor, 0 -> divide by 2^16

inline CLOCKS_CLK_RTC_CTRL_AUXSRC get_CLK_RTC_CTRL_AUXSRC() volatile#

Get CLK_RTC_CTRL’s AUXSRC field.

Selects the auxiliary clock source, will glitch when switching

inline void set_CLK_RTC_CTRL_AUXSRC(CLOCKS_CLK_RTC_CTRL_AUXSRC value) volatile#

Set CLK_RTC_CTRL’s AUXSRC field.

Selects the auxiliary clock source, will glitch when switching

inline bool get_CLK_RTC_CTRL_KILL() volatile#

Get CLK_RTC_CTRL’s KILL bit.

Asynchronously kills the clock generator

inline void set_CLK_RTC_CTRL_KILL() volatile#

Set CLK_RTC_CTRL’s KILL bit.

Asynchronously kills the clock generator

inline void clear_CLK_RTC_CTRL_KILL() volatile#

Clear CLK_RTC_CTRL’s KILL bit.

Asynchronously kills the clock generator

inline void toggle_CLK_RTC_CTRL_KILL() volatile#

Toggle CLK_RTC_CTRL’s KILL bit.

Asynchronously kills the clock generator

inline bool get_CLK_RTC_CTRL_ENABLE() volatile#

Get CLK_RTC_CTRL’s ENABLE bit.

Starts and stops the clock generator cleanly

inline void set_CLK_RTC_CTRL_ENABLE() volatile#

Set CLK_RTC_CTRL’s ENABLE bit.

Starts and stops the clock generator cleanly

inline void clear_CLK_RTC_CTRL_ENABLE() volatile#

Clear CLK_RTC_CTRL’s ENABLE bit.

Starts and stops the clock generator cleanly

inline void toggle_CLK_RTC_CTRL_ENABLE() volatile#

Toggle CLK_RTC_CTRL’s ENABLE bit.

Starts and stops the clock generator cleanly

inline uint8_t get_CLK_RTC_CTRL_PHASE() volatile#

Get CLK_RTC_CTRL’s PHASE field.

This delays the enable signal by up to 3 cycles of the input clock

This must be set before the clock is enabled to have any effect

inline void set_CLK_RTC_CTRL_PHASE(uint8_t value) volatile#

Set CLK_RTC_CTRL’s PHASE field.

This delays the enable signal by up to 3 cycles of the input clock

This must be set before the clock is enabled to have any effect

inline bool get_CLK_RTC_CTRL_NUDGE() volatile#

Get CLK_RTC_CTRL’s NUDGE bit.

An edge on this signal shifts the phase of the output by 1 cycle of the input clock

This can be done at any time

inline void set_CLK_RTC_CTRL_NUDGE() volatile#

Set CLK_RTC_CTRL’s NUDGE bit.

An edge on this signal shifts the phase of the output by 1 cycle of the input clock

This can be done at any time

inline void clear_CLK_RTC_CTRL_NUDGE() volatile#

Clear CLK_RTC_CTRL’s NUDGE bit.

An edge on this signal shifts the phase of the output by 1 cycle of the input clock

This can be done at any time

inline void toggle_CLK_RTC_CTRL_NUDGE() volatile#

Toggle CLK_RTC_CTRL’s NUDGE bit.

An edge on this signal shifts the phase of the output by 1 cycle of the input clock

This can be done at any time

inline void get_CLK_RTC_CTRL(CLOCKS_CLK_RTC_CTRL_AUXSRC &AUXSRC, bool &KILL, bool &ENABLE, uint8_t &PHASE, bool &NUDGE) volatile#

Get all of CLK_RTC_CTRL’s bit fields.

(read-write) Clock control, can be changed on-the-fly (except for auxsrc)

inline void set_CLK_RTC_CTRL(CLOCKS_CLK_RTC_CTRL_AUXSRC AUXSRC, bool KILL, bool ENABLE, uint8_t PHASE, bool NUDGE) volatile#

Set all of CLK_RTC_CTRL’s bit fields.

(read-write) Clock control, can be changed on-the-fly (except for auxsrc)

inline uint8_t get_CLK_RTC_DIV_FRAC() volatile#

Get CLK_RTC_DIV’s FRAC field.

Fractional component of the divisor

inline void set_CLK_RTC_DIV_FRAC(uint8_t value) volatile#

Set CLK_RTC_DIV’s FRAC field.

Fractional component of the divisor

inline uint32_t get_CLK_RTC_DIV_INT() volatile#

Get CLK_RTC_DIV’s INT field.

Integer component of the divisor, 0 -> divide by 2^16

inline void set_CLK_RTC_DIV_INT(uint32_t value) volatile#

Set CLK_RTC_DIV’s INT field.

Integer component of the divisor, 0 -> divide by 2^16

inline void get_CLK_RTC_DIV(uint8_t &FRAC, uint32_t &INT) volatile#

Get all of CLK_RTC_DIV’s bit fields.

(read-write) Clock divisor, can be changed on-the-fly

inline void set_CLK_RTC_DIV(uint8_t FRAC, uint32_t INT) volatile#

Set all of CLK_RTC_DIV’s bit fields.

(read-write) Clock divisor, can be changed on-the-fly

inline uint8_t get_CLK_SYS_RESUS_CTRL_TIMEOUT() volatile#

Get CLK_SYS_RESUS_CTRL’s TIMEOUT field.

This is expressed as a number of clk_ref cycles

and must be >= 2x clk_ref_freq/min_clk_tst_freq

inline void set_CLK_SYS_RESUS_CTRL_TIMEOUT(uint8_t value) volatile#

Set CLK_SYS_RESUS_CTRL’s TIMEOUT field.

This is expressed as a number of clk_ref cycles

and must be >= 2x clk_ref_freq/min_clk_tst_freq

inline bool get_CLK_SYS_RESUS_CTRL_ENABLE() volatile#

Get CLK_SYS_RESUS_CTRL’s ENABLE bit.

Enable resus

inline void set_CLK_SYS_RESUS_CTRL_ENABLE() volatile#

Set CLK_SYS_RESUS_CTRL’s ENABLE bit.

Enable resus

inline void clear_CLK_SYS_RESUS_CTRL_ENABLE() volatile#

Clear CLK_SYS_RESUS_CTRL’s ENABLE bit.

Enable resus

inline void toggle_CLK_SYS_RESUS_CTRL_ENABLE() volatile#

Toggle CLK_SYS_RESUS_CTRL’s ENABLE bit.

Enable resus

inline bool get_CLK_SYS_RESUS_CTRL_FRCE() volatile#

Get CLK_SYS_RESUS_CTRL’s FRCE bit.

Force a resus, for test purposes only

inline void set_CLK_SYS_RESUS_CTRL_FRCE() volatile#

Set CLK_SYS_RESUS_CTRL’s FRCE bit.

Force a resus, for test purposes only

inline void clear_CLK_SYS_RESUS_CTRL_FRCE() volatile#

Clear CLK_SYS_RESUS_CTRL’s FRCE bit.

Force a resus, for test purposes only

inline void toggle_CLK_SYS_RESUS_CTRL_FRCE() volatile#

Toggle CLK_SYS_RESUS_CTRL’s FRCE bit.

Force a resus, for test purposes only

inline bool get_CLK_SYS_RESUS_CTRL_CLEAR() volatile#

Get CLK_SYS_RESUS_CTRL’s CLEAR bit.

For clearing the resus after the fault that triggered it has been corrected

inline void set_CLK_SYS_RESUS_CTRL_CLEAR() volatile#

Set CLK_SYS_RESUS_CTRL’s CLEAR bit.

For clearing the resus after the fault that triggered it has been corrected

inline void clear_CLK_SYS_RESUS_CTRL_CLEAR() volatile#

Clear CLK_SYS_RESUS_CTRL’s CLEAR bit.

For clearing the resus after the fault that triggered it has been corrected

inline void toggle_CLK_SYS_RESUS_CTRL_CLEAR() volatile#

Toggle CLK_SYS_RESUS_CTRL’s CLEAR bit.

For clearing the resus after the fault that triggered it has been corrected

inline void get_CLK_SYS_RESUS_CTRL(uint8_t &TIMEOUT, bool &ENABLE, bool &FRCE, bool &CLEAR) volatile#

Get all of CLK_SYS_RESUS_CTRL’s bit fields.

inline void set_CLK_SYS_RESUS_CTRL(uint8_t TIMEOUT, bool ENABLE, bool FRCE, bool CLEAR) volatile#

Set all of CLK_SYS_RESUS_CTRL’s bit fields.

inline bool get_CLK_SYS_RESUS_STATUS_RESUSSED() volatile#

Get CLK_SYS_RESUS_STATUS’s RESUSSED bit.

Clock has been resuscitated, correct the error then send ctrl_clear=1

inline uint32_t get_FC0_REF_KHZ_FC0_REF_KHZ() volatile#

Get FC0_REF_KHZ’s FC0_REF_KHZ field.

inline void set_FC0_REF_KHZ_FC0_REF_KHZ(uint32_t value) volatile#

Set FC0_REF_KHZ’s FC0_REF_KHZ field.

inline uint32_t get_FC0_MIN_KHZ_FC0_MIN_KHZ() volatile#

Get FC0_MIN_KHZ’s FC0_MIN_KHZ field.

inline void set_FC0_MIN_KHZ_FC0_MIN_KHZ(uint32_t value) volatile#

Set FC0_MIN_KHZ’s FC0_MIN_KHZ field.

inline uint32_t get_FC0_MAX_KHZ_FC0_MAX_KHZ() volatile#

Get FC0_MAX_KHZ’s FC0_MAX_KHZ field.

inline void set_FC0_MAX_KHZ_FC0_MAX_KHZ(uint32_t value) volatile#

Set FC0_MAX_KHZ’s FC0_MAX_KHZ field.

inline uint8_t get_FC0_DELAY_FC0_DELAY() volatile#

Get FC0_DELAY’s FC0_DELAY field.

inline void set_FC0_DELAY_FC0_DELAY(uint8_t value) volatile#

Set FC0_DELAY’s FC0_DELAY field.

inline uint8_t get_FC0_INTERVAL_FC0_INTERVAL() volatile#

Get FC0_INTERVAL’s FC0_INTERVAL field.

inline void set_FC0_INTERVAL_FC0_INTERVAL(uint8_t value) volatile#

Set FC0_INTERVAL’s FC0_INTERVAL field.

inline CLOCKS_FC0_SRC_FC0_SRC get_FC0_SRC_FC0_SRC() volatile#

Get FC0_SRC’s FC0_SRC field.

inline void set_FC0_SRC_FC0_SRC(CLOCKS_FC0_SRC_FC0_SRC value) volatile#

Set FC0_SRC’s FC0_SRC field.

inline bool get_FC0_STATUS_PASS() volatile#

Get FC0_STATUS’s PASS bit.

Test passed

inline bool get_FC0_STATUS_DONE() volatile#

Get FC0_STATUS’s DONE bit.

Test complete

inline bool get_FC0_STATUS_RUNNING() volatile#

Get FC0_STATUS’s RUNNING bit.

Test running

inline bool get_FC0_STATUS_WAITING() volatile#

Get FC0_STATUS’s WAITING bit.

Waiting for test clock to start

inline bool get_FC0_STATUS_FAIL() volatile#

Get FC0_STATUS’s FAIL bit.

Test failed

inline bool get_FC0_STATUS_SLOW() volatile#

Get FC0_STATUS’s SLOW bit.

Test clock slower than expected, only valid when status_done=1

inline bool get_FC0_STATUS_FAST() volatile#

Get FC0_STATUS’s FAST bit.

Test clock faster than expected, only valid when status_done=1

inline bool get_FC0_STATUS_DIED() volatile#

Get FC0_STATUS’s DIED bit.

Test clock stopped during test

inline void get_FC0_STATUS(bool &PASS, bool &DONE, bool &RUNNING, bool &WAITING, bool &FAIL, bool &SLOW, bool &FAST, bool &DIED) volatile#

Get all of FC0_STATUS’s bit fields.

(read-only) Frequency counter status

inline uint8_t get_FC0_RESULT_FRAC() volatile#

Get FC0_RESULT’s FRAC field.

inline uint32_t get_FC0_RESULT_KHZ() volatile#

Get FC0_RESULT’s KHZ field.

inline void get_FC0_RESULT(uint8_t &FRAC, uint32_t &KHZ) volatile#

Get all of FC0_RESULT’s bit fields.

(read-only) Result of frequency measurement, only valid when status_done=1

inline bool get_WAKE_EN0_clk_sys_clocks() volatile#

Get WAKE_EN0’s clk_sys_clocks bit.

inline void set_WAKE_EN0_clk_sys_clocks() volatile#

Set WAKE_EN0’s clk_sys_clocks bit.

inline void clear_WAKE_EN0_clk_sys_clocks() volatile#

Clear WAKE_EN0’s clk_sys_clocks bit.

inline void toggle_WAKE_EN0_clk_sys_clocks() volatile#

Toggle WAKE_EN0’s clk_sys_clocks bit.

inline bool get_WAKE_EN0_clk_adc_adc() volatile#

Get WAKE_EN0’s clk_adc_adc bit.

inline void set_WAKE_EN0_clk_adc_adc() volatile#

Set WAKE_EN0’s clk_adc_adc bit.

inline void clear_WAKE_EN0_clk_adc_adc() volatile#

Clear WAKE_EN0’s clk_adc_adc bit.

inline void toggle_WAKE_EN0_clk_adc_adc() volatile#

Toggle WAKE_EN0’s clk_adc_adc bit.

inline bool get_WAKE_EN0_clk_sys_adc() volatile#

Get WAKE_EN0’s clk_sys_adc bit.

inline void set_WAKE_EN0_clk_sys_adc() volatile#

Set WAKE_EN0’s clk_sys_adc bit.

inline void clear_WAKE_EN0_clk_sys_adc() volatile#

Clear WAKE_EN0’s clk_sys_adc bit.

inline void toggle_WAKE_EN0_clk_sys_adc() volatile#

Toggle WAKE_EN0’s clk_sys_adc bit.

inline bool get_WAKE_EN0_clk_sys_busctrl() volatile#

Get WAKE_EN0’s clk_sys_busctrl bit.

inline void set_WAKE_EN0_clk_sys_busctrl() volatile#

Set WAKE_EN0’s clk_sys_busctrl bit.

inline void clear_WAKE_EN0_clk_sys_busctrl() volatile#

Clear WAKE_EN0’s clk_sys_busctrl bit.

inline void toggle_WAKE_EN0_clk_sys_busctrl() volatile#

Toggle WAKE_EN0’s clk_sys_busctrl bit.

inline bool get_WAKE_EN0_clk_sys_busfabric() volatile#

Get WAKE_EN0’s clk_sys_busfabric bit.

inline void set_WAKE_EN0_clk_sys_busfabric() volatile#

Set WAKE_EN0’s clk_sys_busfabric bit.

inline void clear_WAKE_EN0_clk_sys_busfabric() volatile#

Clear WAKE_EN0’s clk_sys_busfabric bit.

inline void toggle_WAKE_EN0_clk_sys_busfabric() volatile#

Toggle WAKE_EN0’s clk_sys_busfabric bit.

inline bool get_WAKE_EN0_clk_sys_dma() volatile#

Get WAKE_EN0’s clk_sys_dma bit.

inline void set_WAKE_EN0_clk_sys_dma() volatile#

Set WAKE_EN0’s clk_sys_dma bit.

inline void clear_WAKE_EN0_clk_sys_dma() volatile#

Clear WAKE_EN0’s clk_sys_dma bit.

inline void toggle_WAKE_EN0_clk_sys_dma() volatile#

Toggle WAKE_EN0’s clk_sys_dma bit.

inline bool get_WAKE_EN0_clk_sys_i2c0() volatile#

Get WAKE_EN0’s clk_sys_i2c0 bit.

inline void set_WAKE_EN0_clk_sys_i2c0() volatile#

Set WAKE_EN0’s clk_sys_i2c0 bit.

inline void clear_WAKE_EN0_clk_sys_i2c0() volatile#

Clear WAKE_EN0’s clk_sys_i2c0 bit.

inline void toggle_WAKE_EN0_clk_sys_i2c0() volatile#

Toggle WAKE_EN0’s clk_sys_i2c0 bit.

inline bool get_WAKE_EN0_clk_sys_i2c1() volatile#

Get WAKE_EN0’s clk_sys_i2c1 bit.

inline void set_WAKE_EN0_clk_sys_i2c1() volatile#

Set WAKE_EN0’s clk_sys_i2c1 bit.

inline void clear_WAKE_EN0_clk_sys_i2c1() volatile#

Clear WAKE_EN0’s clk_sys_i2c1 bit.

inline void toggle_WAKE_EN0_clk_sys_i2c1() volatile#

Toggle WAKE_EN0’s clk_sys_i2c1 bit.

inline bool get_WAKE_EN0_clk_sys_io() volatile#

Get WAKE_EN0’s clk_sys_io bit.

inline void set_WAKE_EN0_clk_sys_io() volatile#

Set WAKE_EN0’s clk_sys_io bit.

inline void clear_WAKE_EN0_clk_sys_io() volatile#

Clear WAKE_EN0’s clk_sys_io bit.

inline void toggle_WAKE_EN0_clk_sys_io() volatile#

Toggle WAKE_EN0’s clk_sys_io bit.

inline bool get_WAKE_EN0_clk_sys_jtag() volatile#

Get WAKE_EN0’s clk_sys_jtag bit.

inline void set_WAKE_EN0_clk_sys_jtag() volatile#

Set WAKE_EN0’s clk_sys_jtag bit.

inline void clear_WAKE_EN0_clk_sys_jtag() volatile#

Clear WAKE_EN0’s clk_sys_jtag bit.

inline void toggle_WAKE_EN0_clk_sys_jtag() volatile#

Toggle WAKE_EN0’s clk_sys_jtag bit.

inline bool get_WAKE_EN0_clk_sys_vreg_and_chip_reset() volatile#

Get WAKE_EN0’s clk_sys_vreg_and_chip_reset bit.

inline void set_WAKE_EN0_clk_sys_vreg_and_chip_reset() volatile#

Set WAKE_EN0’s clk_sys_vreg_and_chip_reset bit.

inline void clear_WAKE_EN0_clk_sys_vreg_and_chip_reset() volatile#

Clear WAKE_EN0’s clk_sys_vreg_and_chip_reset bit.

inline void toggle_WAKE_EN0_clk_sys_vreg_and_chip_reset() volatile#

Toggle WAKE_EN0’s clk_sys_vreg_and_chip_reset bit.

inline bool get_WAKE_EN0_clk_sys_pads() volatile#

Get WAKE_EN0’s clk_sys_pads bit.

inline void set_WAKE_EN0_clk_sys_pads() volatile#

Set WAKE_EN0’s clk_sys_pads bit.

inline void clear_WAKE_EN0_clk_sys_pads() volatile#

Clear WAKE_EN0’s clk_sys_pads bit.

inline void toggle_WAKE_EN0_clk_sys_pads() volatile#

Toggle WAKE_EN0’s clk_sys_pads bit.

inline bool get_WAKE_EN0_clk_sys_pio0() volatile#

Get WAKE_EN0’s clk_sys_pio0 bit.

inline void set_WAKE_EN0_clk_sys_pio0() volatile#

Set WAKE_EN0’s clk_sys_pio0 bit.

inline void clear_WAKE_EN0_clk_sys_pio0() volatile#

Clear WAKE_EN0’s clk_sys_pio0 bit.

inline void toggle_WAKE_EN0_clk_sys_pio0() volatile#

Toggle WAKE_EN0’s clk_sys_pio0 bit.

inline bool get_WAKE_EN0_clk_sys_pio1() volatile#

Get WAKE_EN0’s clk_sys_pio1 bit.

inline void set_WAKE_EN0_clk_sys_pio1() volatile#

Set WAKE_EN0’s clk_sys_pio1 bit.

inline void clear_WAKE_EN0_clk_sys_pio1() volatile#

Clear WAKE_EN0’s clk_sys_pio1 bit.

inline void toggle_WAKE_EN0_clk_sys_pio1() volatile#

Toggle WAKE_EN0’s clk_sys_pio1 bit.

inline bool get_WAKE_EN0_clk_sys_pll_sys() volatile#

Get WAKE_EN0’s clk_sys_pll_sys bit.

inline void set_WAKE_EN0_clk_sys_pll_sys() volatile#

Set WAKE_EN0’s clk_sys_pll_sys bit.

inline void clear_WAKE_EN0_clk_sys_pll_sys() volatile#

Clear WAKE_EN0’s clk_sys_pll_sys bit.

inline void toggle_WAKE_EN0_clk_sys_pll_sys() volatile#

Toggle WAKE_EN0’s clk_sys_pll_sys bit.

inline bool get_WAKE_EN0_clk_sys_pll_usb() volatile#

Get WAKE_EN0’s clk_sys_pll_usb bit.

inline void set_WAKE_EN0_clk_sys_pll_usb() volatile#

Set WAKE_EN0’s clk_sys_pll_usb bit.

inline void clear_WAKE_EN0_clk_sys_pll_usb() volatile#

Clear WAKE_EN0’s clk_sys_pll_usb bit.

inline void toggle_WAKE_EN0_clk_sys_pll_usb() volatile#

Toggle WAKE_EN0’s clk_sys_pll_usb bit.

inline bool get_WAKE_EN0_clk_sys_psm() volatile#

Get WAKE_EN0’s clk_sys_psm bit.

inline void set_WAKE_EN0_clk_sys_psm() volatile#

Set WAKE_EN0’s clk_sys_psm bit.

inline void clear_WAKE_EN0_clk_sys_psm() volatile#

Clear WAKE_EN0’s clk_sys_psm bit.

inline void toggle_WAKE_EN0_clk_sys_psm() volatile#

Toggle WAKE_EN0’s clk_sys_psm bit.

inline bool get_WAKE_EN0_clk_sys_pwm() volatile#

Get WAKE_EN0’s clk_sys_pwm bit.

inline void set_WAKE_EN0_clk_sys_pwm() volatile#

Set WAKE_EN0’s clk_sys_pwm bit.

inline void clear_WAKE_EN0_clk_sys_pwm() volatile#

Clear WAKE_EN0’s clk_sys_pwm bit.

inline void toggle_WAKE_EN0_clk_sys_pwm() volatile#

Toggle WAKE_EN0’s clk_sys_pwm bit.

inline bool get_WAKE_EN0_clk_sys_resets() volatile#

Get WAKE_EN0’s clk_sys_resets bit.

inline void set_WAKE_EN0_clk_sys_resets() volatile#

Set WAKE_EN0’s clk_sys_resets bit.

inline void clear_WAKE_EN0_clk_sys_resets() volatile#

Clear WAKE_EN0’s clk_sys_resets bit.

inline void toggle_WAKE_EN0_clk_sys_resets() volatile#

Toggle WAKE_EN0’s clk_sys_resets bit.

inline bool get_WAKE_EN0_clk_sys_rom() volatile#

Get WAKE_EN0’s clk_sys_rom bit.

inline void set_WAKE_EN0_clk_sys_rom() volatile#

Set WAKE_EN0’s clk_sys_rom bit.

inline void clear_WAKE_EN0_clk_sys_rom() volatile#

Clear WAKE_EN0’s clk_sys_rom bit.

inline void toggle_WAKE_EN0_clk_sys_rom() volatile#

Toggle WAKE_EN0’s clk_sys_rom bit.

inline bool get_WAKE_EN0_clk_sys_rosc() volatile#

Get WAKE_EN0’s clk_sys_rosc bit.

inline void set_WAKE_EN0_clk_sys_rosc() volatile#

Set WAKE_EN0’s clk_sys_rosc bit.

inline void clear_WAKE_EN0_clk_sys_rosc() volatile#

Clear WAKE_EN0’s clk_sys_rosc bit.

inline void toggle_WAKE_EN0_clk_sys_rosc() volatile#

Toggle WAKE_EN0’s clk_sys_rosc bit.

inline bool get_WAKE_EN0_clk_rtc_rtc() volatile#

Get WAKE_EN0’s clk_rtc_rtc bit.

inline void set_WAKE_EN0_clk_rtc_rtc() volatile#

Set WAKE_EN0’s clk_rtc_rtc bit.

inline void clear_WAKE_EN0_clk_rtc_rtc() volatile#

Clear WAKE_EN0’s clk_rtc_rtc bit.

inline void toggle_WAKE_EN0_clk_rtc_rtc() volatile#

Toggle WAKE_EN0’s clk_rtc_rtc bit.

inline bool get_WAKE_EN0_clk_sys_rtc() volatile#

Get WAKE_EN0’s clk_sys_rtc bit.

inline void set_WAKE_EN0_clk_sys_rtc() volatile#

Set WAKE_EN0’s clk_sys_rtc bit.

inline void clear_WAKE_EN0_clk_sys_rtc() volatile#

Clear WAKE_EN0’s clk_sys_rtc bit.

inline void toggle_WAKE_EN0_clk_sys_rtc() volatile#

Toggle WAKE_EN0’s clk_sys_rtc bit.

inline bool get_WAKE_EN0_clk_sys_sio() volatile#

Get WAKE_EN0’s clk_sys_sio bit.

inline void set_WAKE_EN0_clk_sys_sio() volatile#

Set WAKE_EN0’s clk_sys_sio bit.

inline void clear_WAKE_EN0_clk_sys_sio() volatile#

Clear WAKE_EN0’s clk_sys_sio bit.

inline void toggle_WAKE_EN0_clk_sys_sio() volatile#

Toggle WAKE_EN0’s clk_sys_sio bit.

inline bool get_WAKE_EN0_clk_peri_spi0() volatile#

Get WAKE_EN0’s clk_peri_spi0 bit.

inline void set_WAKE_EN0_clk_peri_spi0() volatile#

Set WAKE_EN0’s clk_peri_spi0 bit.

inline void clear_WAKE_EN0_clk_peri_spi0() volatile#

Clear WAKE_EN0’s clk_peri_spi0 bit.

inline void toggle_WAKE_EN0_clk_peri_spi0() volatile#

Toggle WAKE_EN0’s clk_peri_spi0 bit.

inline bool get_WAKE_EN0_clk_sys_spi0() volatile#

Get WAKE_EN0’s clk_sys_spi0 bit.

inline void set_WAKE_EN0_clk_sys_spi0() volatile#

Set WAKE_EN0’s clk_sys_spi0 bit.

inline void clear_WAKE_EN0_clk_sys_spi0() volatile#

Clear WAKE_EN0’s clk_sys_spi0 bit.

inline void toggle_WAKE_EN0_clk_sys_spi0() volatile#

Toggle WAKE_EN0’s clk_sys_spi0 bit.

inline bool get_WAKE_EN0_clk_peri_spi1() volatile#

Get WAKE_EN0’s clk_peri_spi1 bit.

inline void set_WAKE_EN0_clk_peri_spi1() volatile#

Set WAKE_EN0’s clk_peri_spi1 bit.

inline void clear_WAKE_EN0_clk_peri_spi1() volatile#

Clear WAKE_EN0’s clk_peri_spi1 bit.

inline void toggle_WAKE_EN0_clk_peri_spi1() volatile#

Toggle WAKE_EN0’s clk_peri_spi1 bit.

inline bool get_WAKE_EN0_clk_sys_spi1() volatile#

Get WAKE_EN0’s clk_sys_spi1 bit.

inline void set_WAKE_EN0_clk_sys_spi1() volatile#

Set WAKE_EN0’s clk_sys_spi1 bit.

inline void clear_WAKE_EN0_clk_sys_spi1() volatile#

Clear WAKE_EN0’s clk_sys_spi1 bit.

inline void toggle_WAKE_EN0_clk_sys_spi1() volatile#

Toggle WAKE_EN0’s clk_sys_spi1 bit.

inline bool get_WAKE_EN0_clk_sys_sram0() volatile#

Get WAKE_EN0’s clk_sys_sram0 bit.

inline void set_WAKE_EN0_clk_sys_sram0() volatile#

Set WAKE_EN0’s clk_sys_sram0 bit.

inline void clear_WAKE_EN0_clk_sys_sram0() volatile#

Clear WAKE_EN0’s clk_sys_sram0 bit.

inline void toggle_WAKE_EN0_clk_sys_sram0() volatile#

Toggle WAKE_EN0’s clk_sys_sram0 bit.

inline bool get_WAKE_EN0_clk_sys_sram1() volatile#

Get WAKE_EN0’s clk_sys_sram1 bit.

inline void set_WAKE_EN0_clk_sys_sram1() volatile#

Set WAKE_EN0’s clk_sys_sram1 bit.

inline void clear_WAKE_EN0_clk_sys_sram1() volatile#

Clear WAKE_EN0’s clk_sys_sram1 bit.

inline void toggle_WAKE_EN0_clk_sys_sram1() volatile#

Toggle WAKE_EN0’s clk_sys_sram1 bit.

inline bool get_WAKE_EN0_clk_sys_sram2() volatile#

Get WAKE_EN0’s clk_sys_sram2 bit.

inline void set_WAKE_EN0_clk_sys_sram2() volatile#

Set WAKE_EN0’s clk_sys_sram2 bit.

inline void clear_WAKE_EN0_clk_sys_sram2() volatile#

Clear WAKE_EN0’s clk_sys_sram2 bit.

inline void toggle_WAKE_EN0_clk_sys_sram2() volatile#

Toggle WAKE_EN0’s clk_sys_sram2 bit.

inline bool get_WAKE_EN0_clk_sys_sram3() volatile#

Get WAKE_EN0’s clk_sys_sram3 bit.

inline void set_WAKE_EN0_clk_sys_sram3() volatile#

Set WAKE_EN0’s clk_sys_sram3 bit.

inline void clear_WAKE_EN0_clk_sys_sram3() volatile#

Clear WAKE_EN0’s clk_sys_sram3 bit.

inline void toggle_WAKE_EN0_clk_sys_sram3() volatile#

Toggle WAKE_EN0’s clk_sys_sram3 bit.

inline void get_WAKE_EN0(bool &clk_sys_clocks, bool &clk_adc_adc, bool &clk_sys_adc, bool &clk_sys_busctrl, bool &clk_sys_busfabric, bool &clk_sys_dma, bool &clk_sys_i2c0, bool &clk_sys_i2c1, bool &clk_sys_io, bool &clk_sys_jtag, bool &clk_sys_vreg_and_chip_reset, bool &clk_sys_pads, bool &clk_sys_pio0, bool &clk_sys_pio1, bool &clk_sys_pll_sys, bool &clk_sys_pll_usb, bool &clk_sys_psm, bool &clk_sys_pwm, bool &clk_sys_resets, bool &clk_sys_rom, bool &clk_sys_rosc, bool &clk_rtc_rtc, bool &clk_sys_rtc, bool &clk_sys_sio, bool &clk_peri_spi0, bool &clk_sys_spi0, bool &clk_peri_spi1, bool &clk_sys_spi1, bool &clk_sys_sram0, bool &clk_sys_sram1, bool &clk_sys_sram2, bool &clk_sys_sram3) volatile#

Get all of WAKE_EN0’s bit fields.

(read-write) enable clock in wake mode

inline void set_WAKE_EN0(bool clk_sys_clocks, bool clk_adc_adc, bool clk_sys_adc, bool clk_sys_busctrl, bool clk_sys_busfabric, bool clk_sys_dma, bool clk_sys_i2c0, bool clk_sys_i2c1, bool clk_sys_io, bool clk_sys_jtag, bool clk_sys_vreg_and_chip_reset, bool clk_sys_pads, bool clk_sys_pio0, bool clk_sys_pio1, bool clk_sys_pll_sys, bool clk_sys_pll_usb, bool clk_sys_psm, bool clk_sys_pwm, bool clk_sys_resets, bool clk_sys_rom, bool clk_sys_rosc, bool clk_rtc_rtc, bool clk_sys_rtc, bool clk_sys_sio, bool clk_peri_spi0, bool clk_sys_spi0, bool clk_peri_spi1, bool clk_sys_spi1, bool clk_sys_sram0, bool clk_sys_sram1, bool clk_sys_sram2, bool clk_sys_sram3) volatile#

Set all of WAKE_EN0’s bit fields.

(read-write) enable clock in wake mode

inline bool get_WAKE_EN1_clk_sys_sram4() volatile#

Get WAKE_EN1’s clk_sys_sram4 bit.

inline void set_WAKE_EN1_clk_sys_sram4() volatile#

Set WAKE_EN1’s clk_sys_sram4 bit.

inline void clear_WAKE_EN1_clk_sys_sram4() volatile#

Clear WAKE_EN1’s clk_sys_sram4 bit.

inline void toggle_WAKE_EN1_clk_sys_sram4() volatile#

Toggle WAKE_EN1’s clk_sys_sram4 bit.

inline bool get_WAKE_EN1_clk_sys_sram5() volatile#

Get WAKE_EN1’s clk_sys_sram5 bit.

inline void set_WAKE_EN1_clk_sys_sram5() volatile#

Set WAKE_EN1’s clk_sys_sram5 bit.

inline void clear_WAKE_EN1_clk_sys_sram5() volatile#

Clear WAKE_EN1’s clk_sys_sram5 bit.

inline void toggle_WAKE_EN1_clk_sys_sram5() volatile#

Toggle WAKE_EN1’s clk_sys_sram5 bit.

inline bool get_WAKE_EN1_clk_sys_syscfg() volatile#

Get WAKE_EN1’s clk_sys_syscfg bit.

inline void set_WAKE_EN1_clk_sys_syscfg() volatile#

Set WAKE_EN1’s clk_sys_syscfg bit.

inline void clear_WAKE_EN1_clk_sys_syscfg() volatile#

Clear WAKE_EN1’s clk_sys_syscfg bit.

inline void toggle_WAKE_EN1_clk_sys_syscfg() volatile#

Toggle WAKE_EN1’s clk_sys_syscfg bit.

inline bool get_WAKE_EN1_clk_sys_sysinfo() volatile#

Get WAKE_EN1’s clk_sys_sysinfo bit.

inline void set_WAKE_EN1_clk_sys_sysinfo() volatile#

Set WAKE_EN1’s clk_sys_sysinfo bit.

inline void clear_WAKE_EN1_clk_sys_sysinfo() volatile#

Clear WAKE_EN1’s clk_sys_sysinfo bit.

inline void toggle_WAKE_EN1_clk_sys_sysinfo() volatile#

Toggle WAKE_EN1’s clk_sys_sysinfo bit.

inline bool get_WAKE_EN1_clk_sys_tbman() volatile#

Get WAKE_EN1’s clk_sys_tbman bit.

inline void set_WAKE_EN1_clk_sys_tbman() volatile#

Set WAKE_EN1’s clk_sys_tbman bit.

inline void clear_WAKE_EN1_clk_sys_tbman() volatile#

Clear WAKE_EN1’s clk_sys_tbman bit.

inline void toggle_WAKE_EN1_clk_sys_tbman() volatile#

Toggle WAKE_EN1’s clk_sys_tbman bit.

inline bool get_WAKE_EN1_clk_sys_timer() volatile#

Get WAKE_EN1’s clk_sys_timer bit.

inline void set_WAKE_EN1_clk_sys_timer() volatile#

Set WAKE_EN1’s clk_sys_timer bit.

inline void clear_WAKE_EN1_clk_sys_timer() volatile#

Clear WAKE_EN1’s clk_sys_timer bit.

inline void toggle_WAKE_EN1_clk_sys_timer() volatile#

Toggle WAKE_EN1’s clk_sys_timer bit.

inline bool get_WAKE_EN1_clk_peri_uart0() volatile#

Get WAKE_EN1’s clk_peri_uart0 bit.

inline void set_WAKE_EN1_clk_peri_uart0() volatile#

Set WAKE_EN1’s clk_peri_uart0 bit.

inline void clear_WAKE_EN1_clk_peri_uart0() volatile#

Clear WAKE_EN1’s clk_peri_uart0 bit.

inline void toggle_WAKE_EN1_clk_peri_uart0() volatile#

Toggle WAKE_EN1’s clk_peri_uart0 bit.

inline bool get_WAKE_EN1_clk_sys_uart0() volatile#

Get WAKE_EN1’s clk_sys_uart0 bit.

inline void set_WAKE_EN1_clk_sys_uart0() volatile#

Set WAKE_EN1’s clk_sys_uart0 bit.

inline void clear_WAKE_EN1_clk_sys_uart0() volatile#

Clear WAKE_EN1’s clk_sys_uart0 bit.

inline void toggle_WAKE_EN1_clk_sys_uart0() volatile#

Toggle WAKE_EN1’s clk_sys_uart0 bit.

inline bool get_WAKE_EN1_clk_peri_uart1() volatile#

Get WAKE_EN1’s clk_peri_uart1 bit.

inline void set_WAKE_EN1_clk_peri_uart1() volatile#

Set WAKE_EN1’s clk_peri_uart1 bit.

inline void clear_WAKE_EN1_clk_peri_uart1() volatile#

Clear WAKE_EN1’s clk_peri_uart1 bit.

inline void toggle_WAKE_EN1_clk_peri_uart1() volatile#

Toggle WAKE_EN1’s clk_peri_uart1 bit.

inline bool get_WAKE_EN1_clk_sys_uart1() volatile#

Get WAKE_EN1’s clk_sys_uart1 bit.

inline void set_WAKE_EN1_clk_sys_uart1() volatile#

Set WAKE_EN1’s clk_sys_uart1 bit.

inline void clear_WAKE_EN1_clk_sys_uart1() volatile#

Clear WAKE_EN1’s clk_sys_uart1 bit.

inline void toggle_WAKE_EN1_clk_sys_uart1() volatile#

Toggle WAKE_EN1’s clk_sys_uart1 bit.

inline bool get_WAKE_EN1_clk_sys_usbctrl() volatile#

Get WAKE_EN1’s clk_sys_usbctrl bit.

inline void set_WAKE_EN1_clk_sys_usbctrl() volatile#

Set WAKE_EN1’s clk_sys_usbctrl bit.

inline void clear_WAKE_EN1_clk_sys_usbctrl() volatile#

Clear WAKE_EN1’s clk_sys_usbctrl bit.

inline void toggle_WAKE_EN1_clk_sys_usbctrl() volatile#

Toggle WAKE_EN1’s clk_sys_usbctrl bit.

inline bool get_WAKE_EN1_clk_usb_usbctrl() volatile#

Get WAKE_EN1’s clk_usb_usbctrl bit.

inline void set_WAKE_EN1_clk_usb_usbctrl() volatile#

Set WAKE_EN1’s clk_usb_usbctrl bit.

inline void clear_WAKE_EN1_clk_usb_usbctrl() volatile#

Clear WAKE_EN1’s clk_usb_usbctrl bit.

inline void toggle_WAKE_EN1_clk_usb_usbctrl() volatile#

Toggle WAKE_EN1’s clk_usb_usbctrl bit.

inline bool get_WAKE_EN1_clk_sys_watchdog() volatile#

Get WAKE_EN1’s clk_sys_watchdog bit.

inline void set_WAKE_EN1_clk_sys_watchdog() volatile#

Set WAKE_EN1’s clk_sys_watchdog bit.

inline void clear_WAKE_EN1_clk_sys_watchdog() volatile#

Clear WAKE_EN1’s clk_sys_watchdog bit.

inline void toggle_WAKE_EN1_clk_sys_watchdog() volatile#

Toggle WAKE_EN1’s clk_sys_watchdog bit.

inline bool get_WAKE_EN1_clk_sys_xip() volatile#

Get WAKE_EN1’s clk_sys_xip bit.

inline void set_WAKE_EN1_clk_sys_xip() volatile#

Set WAKE_EN1’s clk_sys_xip bit.

inline void clear_WAKE_EN1_clk_sys_xip() volatile#

Clear WAKE_EN1’s clk_sys_xip bit.

inline void toggle_WAKE_EN1_clk_sys_xip() volatile#

Toggle WAKE_EN1’s clk_sys_xip bit.

inline bool get_WAKE_EN1_clk_sys_xosc() volatile#

Get WAKE_EN1’s clk_sys_xosc bit.

inline void set_WAKE_EN1_clk_sys_xosc() volatile#

Set WAKE_EN1’s clk_sys_xosc bit.

inline void clear_WAKE_EN1_clk_sys_xosc() volatile#

Clear WAKE_EN1’s clk_sys_xosc bit.

inline void toggle_WAKE_EN1_clk_sys_xosc() volatile#

Toggle WAKE_EN1’s clk_sys_xosc bit.

inline void get_WAKE_EN1(bool &clk_sys_sram4, bool &clk_sys_sram5, bool &clk_sys_syscfg, bool &clk_sys_sysinfo, bool &clk_sys_tbman, bool &clk_sys_timer, bool &clk_peri_uart0, bool &clk_sys_uart0, bool &clk_peri_uart1, bool &clk_sys_uart1, bool &clk_sys_usbctrl, bool &clk_usb_usbctrl, bool &clk_sys_watchdog, bool &clk_sys_xip, bool &clk_sys_xosc) volatile#

Get all of WAKE_EN1’s bit fields.

(read-write) enable clock in wake mode

inline void set_WAKE_EN1(bool clk_sys_sram4, bool clk_sys_sram5, bool clk_sys_syscfg, bool clk_sys_sysinfo, bool clk_sys_tbman, bool clk_sys_timer, bool clk_peri_uart0, bool clk_sys_uart0, bool clk_peri_uart1, bool clk_sys_uart1, bool clk_sys_usbctrl, bool clk_usb_usbctrl, bool clk_sys_watchdog, bool clk_sys_xip, bool clk_sys_xosc) volatile#

Set all of WAKE_EN1’s bit fields.

(read-write) enable clock in wake mode

inline bool get_SLEEP_EN0_clk_sys_clocks() volatile#

Get SLEEP_EN0’s clk_sys_clocks bit.

inline void set_SLEEP_EN0_clk_sys_clocks() volatile#

Set SLEEP_EN0’s clk_sys_clocks bit.

inline void clear_SLEEP_EN0_clk_sys_clocks() volatile#

Clear SLEEP_EN0’s clk_sys_clocks bit.

inline void toggle_SLEEP_EN0_clk_sys_clocks() volatile#

Toggle SLEEP_EN0’s clk_sys_clocks bit.

inline bool get_SLEEP_EN0_clk_adc_adc() volatile#

Get SLEEP_EN0’s clk_adc_adc bit.

inline void set_SLEEP_EN0_clk_adc_adc() volatile#

Set SLEEP_EN0’s clk_adc_adc bit.

inline void clear_SLEEP_EN0_clk_adc_adc() volatile#

Clear SLEEP_EN0’s clk_adc_adc bit.

inline void toggle_SLEEP_EN0_clk_adc_adc() volatile#

Toggle SLEEP_EN0’s clk_adc_adc bit.

inline bool get_SLEEP_EN0_clk_sys_adc() volatile#

Get SLEEP_EN0’s clk_sys_adc bit.

inline void set_SLEEP_EN0_clk_sys_adc() volatile#

Set SLEEP_EN0’s clk_sys_adc bit.

inline void clear_SLEEP_EN0_clk_sys_adc() volatile#

Clear SLEEP_EN0’s clk_sys_adc bit.

inline void toggle_SLEEP_EN0_clk_sys_adc() volatile#

Toggle SLEEP_EN0’s clk_sys_adc bit.

inline bool get_SLEEP_EN0_clk_sys_busctrl() volatile#

Get SLEEP_EN0’s clk_sys_busctrl bit.

inline void set_SLEEP_EN0_clk_sys_busctrl() volatile#

Set SLEEP_EN0’s clk_sys_busctrl bit.

inline void clear_SLEEP_EN0_clk_sys_busctrl() volatile#

Clear SLEEP_EN0’s clk_sys_busctrl bit.

inline void toggle_SLEEP_EN0_clk_sys_busctrl() volatile#

Toggle SLEEP_EN0’s clk_sys_busctrl bit.

inline bool get_SLEEP_EN0_clk_sys_busfabric() volatile#

Get SLEEP_EN0’s clk_sys_busfabric bit.

inline void set_SLEEP_EN0_clk_sys_busfabric() volatile#

Set SLEEP_EN0’s clk_sys_busfabric bit.

inline void clear_SLEEP_EN0_clk_sys_busfabric() volatile#

Clear SLEEP_EN0’s clk_sys_busfabric bit.

inline void toggle_SLEEP_EN0_clk_sys_busfabric() volatile#

Toggle SLEEP_EN0’s clk_sys_busfabric bit.

inline bool get_SLEEP_EN0_clk_sys_dma() volatile#

Get SLEEP_EN0’s clk_sys_dma bit.

inline void set_SLEEP_EN0_clk_sys_dma() volatile#

Set SLEEP_EN0’s clk_sys_dma bit.

inline void clear_SLEEP_EN0_clk_sys_dma() volatile#

Clear SLEEP_EN0’s clk_sys_dma bit.

inline void toggle_SLEEP_EN0_clk_sys_dma() volatile#

Toggle SLEEP_EN0’s clk_sys_dma bit.

inline bool get_SLEEP_EN0_clk_sys_i2c0() volatile#

Get SLEEP_EN0’s clk_sys_i2c0 bit.

inline void set_SLEEP_EN0_clk_sys_i2c0() volatile#

Set SLEEP_EN0’s clk_sys_i2c0 bit.

inline void clear_SLEEP_EN0_clk_sys_i2c0() volatile#

Clear SLEEP_EN0’s clk_sys_i2c0 bit.

inline void toggle_SLEEP_EN0_clk_sys_i2c0() volatile#

Toggle SLEEP_EN0’s clk_sys_i2c0 bit.

inline bool get_SLEEP_EN0_clk_sys_i2c1() volatile#

Get SLEEP_EN0’s clk_sys_i2c1 bit.

inline void set_SLEEP_EN0_clk_sys_i2c1() volatile#

Set SLEEP_EN0’s clk_sys_i2c1 bit.

inline void clear_SLEEP_EN0_clk_sys_i2c1() volatile#

Clear SLEEP_EN0’s clk_sys_i2c1 bit.

inline void toggle_SLEEP_EN0_clk_sys_i2c1() volatile#

Toggle SLEEP_EN0’s clk_sys_i2c1 bit.

inline bool get_SLEEP_EN0_clk_sys_io() volatile#

Get SLEEP_EN0’s clk_sys_io bit.

inline void set_SLEEP_EN0_clk_sys_io() volatile#

Set SLEEP_EN0’s clk_sys_io bit.

inline void clear_SLEEP_EN0_clk_sys_io() volatile#

Clear SLEEP_EN0’s clk_sys_io bit.

inline void toggle_SLEEP_EN0_clk_sys_io() volatile#

Toggle SLEEP_EN0’s clk_sys_io bit.

inline bool get_SLEEP_EN0_clk_sys_jtag() volatile#

Get SLEEP_EN0’s clk_sys_jtag bit.

inline void set_SLEEP_EN0_clk_sys_jtag() volatile#

Set SLEEP_EN0’s clk_sys_jtag bit.

inline void clear_SLEEP_EN0_clk_sys_jtag() volatile#

Clear SLEEP_EN0’s clk_sys_jtag bit.

inline void toggle_SLEEP_EN0_clk_sys_jtag() volatile#

Toggle SLEEP_EN0’s clk_sys_jtag bit.

inline bool get_SLEEP_EN0_clk_sys_vreg_and_chip_reset() volatile#

Get SLEEP_EN0’s clk_sys_vreg_and_chip_reset bit.

inline void set_SLEEP_EN0_clk_sys_vreg_and_chip_reset() volatile#

Set SLEEP_EN0’s clk_sys_vreg_and_chip_reset bit.

inline void clear_SLEEP_EN0_clk_sys_vreg_and_chip_reset() volatile#

Clear SLEEP_EN0’s clk_sys_vreg_and_chip_reset bit.

inline void toggle_SLEEP_EN0_clk_sys_vreg_and_chip_reset() volatile#

Toggle SLEEP_EN0’s clk_sys_vreg_and_chip_reset bit.

inline bool get_SLEEP_EN0_clk_sys_pads() volatile#

Get SLEEP_EN0’s clk_sys_pads bit.

inline void set_SLEEP_EN0_clk_sys_pads() volatile#

Set SLEEP_EN0’s clk_sys_pads bit.

inline void clear_SLEEP_EN0_clk_sys_pads() volatile#

Clear SLEEP_EN0’s clk_sys_pads bit.

inline void toggle_SLEEP_EN0_clk_sys_pads() volatile#

Toggle SLEEP_EN0’s clk_sys_pads bit.

inline bool get_SLEEP_EN0_clk_sys_pio0() volatile#

Get SLEEP_EN0’s clk_sys_pio0 bit.

inline void set_SLEEP_EN0_clk_sys_pio0() volatile#

Set SLEEP_EN0’s clk_sys_pio0 bit.

inline void clear_SLEEP_EN0_clk_sys_pio0() volatile#

Clear SLEEP_EN0’s clk_sys_pio0 bit.

inline void toggle_SLEEP_EN0_clk_sys_pio0() volatile#

Toggle SLEEP_EN0’s clk_sys_pio0 bit.

inline bool get_SLEEP_EN0_clk_sys_pio1() volatile#

Get SLEEP_EN0’s clk_sys_pio1 bit.

inline void set_SLEEP_EN0_clk_sys_pio1() volatile#

Set SLEEP_EN0’s clk_sys_pio1 bit.

inline void clear_SLEEP_EN0_clk_sys_pio1() volatile#

Clear SLEEP_EN0’s clk_sys_pio1 bit.

inline void toggle_SLEEP_EN0_clk_sys_pio1() volatile#

Toggle SLEEP_EN0’s clk_sys_pio1 bit.

inline bool get_SLEEP_EN0_clk_sys_pll_sys() volatile#

Get SLEEP_EN0’s clk_sys_pll_sys bit.

inline void set_SLEEP_EN0_clk_sys_pll_sys() volatile#

Set SLEEP_EN0’s clk_sys_pll_sys bit.

inline void clear_SLEEP_EN0_clk_sys_pll_sys() volatile#

Clear SLEEP_EN0’s clk_sys_pll_sys bit.

inline void toggle_SLEEP_EN0_clk_sys_pll_sys() volatile#

Toggle SLEEP_EN0’s clk_sys_pll_sys bit.

inline bool get_SLEEP_EN0_clk_sys_pll_usb() volatile#

Get SLEEP_EN0’s clk_sys_pll_usb bit.

inline void set_SLEEP_EN0_clk_sys_pll_usb() volatile#

Set SLEEP_EN0’s clk_sys_pll_usb bit.

inline void clear_SLEEP_EN0_clk_sys_pll_usb() volatile#

Clear SLEEP_EN0’s clk_sys_pll_usb bit.

inline void toggle_SLEEP_EN0_clk_sys_pll_usb() volatile#

Toggle SLEEP_EN0’s clk_sys_pll_usb bit.

inline bool get_SLEEP_EN0_clk_sys_psm() volatile#

Get SLEEP_EN0’s clk_sys_psm bit.

inline void set_SLEEP_EN0_clk_sys_psm() volatile#

Set SLEEP_EN0’s clk_sys_psm bit.

inline void clear_SLEEP_EN0_clk_sys_psm() volatile#

Clear SLEEP_EN0’s clk_sys_psm bit.

inline void toggle_SLEEP_EN0_clk_sys_psm() volatile#

Toggle SLEEP_EN0’s clk_sys_psm bit.

inline bool get_SLEEP_EN0_clk_sys_pwm() volatile#

Get SLEEP_EN0’s clk_sys_pwm bit.

inline void set_SLEEP_EN0_clk_sys_pwm() volatile#

Set SLEEP_EN0’s clk_sys_pwm bit.

inline void clear_SLEEP_EN0_clk_sys_pwm() volatile#

Clear SLEEP_EN0’s clk_sys_pwm bit.

inline void toggle_SLEEP_EN0_clk_sys_pwm() volatile#

Toggle SLEEP_EN0’s clk_sys_pwm bit.

inline bool get_SLEEP_EN0_clk_sys_resets() volatile#

Get SLEEP_EN0’s clk_sys_resets bit.

inline void set_SLEEP_EN0_clk_sys_resets() volatile#

Set SLEEP_EN0’s clk_sys_resets bit.

inline void clear_SLEEP_EN0_clk_sys_resets() volatile#

Clear SLEEP_EN0’s clk_sys_resets bit.

inline void toggle_SLEEP_EN0_clk_sys_resets() volatile#

Toggle SLEEP_EN0’s clk_sys_resets bit.

inline bool get_SLEEP_EN0_clk_sys_rom() volatile#

Get SLEEP_EN0’s clk_sys_rom bit.

inline void set_SLEEP_EN0_clk_sys_rom() volatile#

Set SLEEP_EN0’s clk_sys_rom bit.

inline void clear_SLEEP_EN0_clk_sys_rom() volatile#

Clear SLEEP_EN0’s clk_sys_rom bit.

inline void toggle_SLEEP_EN0_clk_sys_rom() volatile#

Toggle SLEEP_EN0’s clk_sys_rom bit.

inline bool get_SLEEP_EN0_clk_sys_rosc() volatile#

Get SLEEP_EN0’s clk_sys_rosc bit.

inline void set_SLEEP_EN0_clk_sys_rosc() volatile#

Set SLEEP_EN0’s clk_sys_rosc bit.

inline void clear_SLEEP_EN0_clk_sys_rosc() volatile#

Clear SLEEP_EN0’s clk_sys_rosc bit.

inline void toggle_SLEEP_EN0_clk_sys_rosc() volatile#

Toggle SLEEP_EN0’s clk_sys_rosc bit.

inline bool get_SLEEP_EN0_clk_rtc_rtc() volatile#

Get SLEEP_EN0’s clk_rtc_rtc bit.

inline void set_SLEEP_EN0_clk_rtc_rtc() volatile#

Set SLEEP_EN0’s clk_rtc_rtc bit.

inline void clear_SLEEP_EN0_clk_rtc_rtc() volatile#

Clear SLEEP_EN0’s clk_rtc_rtc bit.

inline void toggle_SLEEP_EN0_clk_rtc_rtc() volatile#

Toggle SLEEP_EN0’s clk_rtc_rtc bit.

inline bool get_SLEEP_EN0_clk_sys_rtc() volatile#

Get SLEEP_EN0’s clk_sys_rtc bit.

inline void set_SLEEP_EN0_clk_sys_rtc() volatile#

Set SLEEP_EN0’s clk_sys_rtc bit.

inline void clear_SLEEP_EN0_clk_sys_rtc() volatile#

Clear SLEEP_EN0’s clk_sys_rtc bit.

inline void toggle_SLEEP_EN0_clk_sys_rtc() volatile#

Toggle SLEEP_EN0’s clk_sys_rtc bit.

inline bool get_SLEEP_EN0_clk_sys_sio() volatile#

Get SLEEP_EN0’s clk_sys_sio bit.

inline void set_SLEEP_EN0_clk_sys_sio() volatile#

Set SLEEP_EN0’s clk_sys_sio bit.

inline void clear_SLEEP_EN0_clk_sys_sio() volatile#

Clear SLEEP_EN0’s clk_sys_sio bit.

inline void toggle_SLEEP_EN0_clk_sys_sio() volatile#

Toggle SLEEP_EN0’s clk_sys_sio bit.

inline bool get_SLEEP_EN0_clk_peri_spi0() volatile#

Get SLEEP_EN0’s clk_peri_spi0 bit.

inline void set_SLEEP_EN0_clk_peri_spi0() volatile#

Set SLEEP_EN0’s clk_peri_spi0 bit.

inline void clear_SLEEP_EN0_clk_peri_spi0() volatile#

Clear SLEEP_EN0’s clk_peri_spi0 bit.

inline void toggle_SLEEP_EN0_clk_peri_spi0() volatile#

Toggle SLEEP_EN0’s clk_peri_spi0 bit.

inline bool get_SLEEP_EN0_clk_sys_spi0() volatile#

Get SLEEP_EN0’s clk_sys_spi0 bit.

inline void set_SLEEP_EN0_clk_sys_spi0() volatile#

Set SLEEP_EN0’s clk_sys_spi0 bit.

inline void clear_SLEEP_EN0_clk_sys_spi0() volatile#

Clear SLEEP_EN0’s clk_sys_spi0 bit.

inline void toggle_SLEEP_EN0_clk_sys_spi0() volatile#

Toggle SLEEP_EN0’s clk_sys_spi0 bit.

inline bool get_SLEEP_EN0_clk_peri_spi1() volatile#

Get SLEEP_EN0’s clk_peri_spi1 bit.

inline void set_SLEEP_EN0_clk_peri_spi1() volatile#

Set SLEEP_EN0’s clk_peri_spi1 bit.

inline void clear_SLEEP_EN0_clk_peri_spi1() volatile#

Clear SLEEP_EN0’s clk_peri_spi1 bit.

inline void toggle_SLEEP_EN0_clk_peri_spi1() volatile#

Toggle SLEEP_EN0’s clk_peri_spi1 bit.

inline bool get_SLEEP_EN0_clk_sys_spi1() volatile#

Get SLEEP_EN0’s clk_sys_spi1 bit.

inline void set_SLEEP_EN0_clk_sys_spi1() volatile#

Set SLEEP_EN0’s clk_sys_spi1 bit.

inline void clear_SLEEP_EN0_clk_sys_spi1() volatile#

Clear SLEEP_EN0’s clk_sys_spi1 bit.

inline void toggle_SLEEP_EN0_clk_sys_spi1() volatile#

Toggle SLEEP_EN0’s clk_sys_spi1 bit.

inline bool get_SLEEP_EN0_clk_sys_sram0() volatile#

Get SLEEP_EN0’s clk_sys_sram0 bit.

inline void set_SLEEP_EN0_clk_sys_sram0() volatile#

Set SLEEP_EN0’s clk_sys_sram0 bit.

inline void clear_SLEEP_EN0_clk_sys_sram0() volatile#

Clear SLEEP_EN0’s clk_sys_sram0 bit.

inline void toggle_SLEEP_EN0_clk_sys_sram0() volatile#

Toggle SLEEP_EN0’s clk_sys_sram0 bit.

inline bool get_SLEEP_EN0_clk_sys_sram1() volatile#

Get SLEEP_EN0’s clk_sys_sram1 bit.

inline void set_SLEEP_EN0_clk_sys_sram1() volatile#

Set SLEEP_EN0’s clk_sys_sram1 bit.

inline void clear_SLEEP_EN0_clk_sys_sram1() volatile#

Clear SLEEP_EN0’s clk_sys_sram1 bit.

inline void toggle_SLEEP_EN0_clk_sys_sram1() volatile#

Toggle SLEEP_EN0’s clk_sys_sram1 bit.

inline bool get_SLEEP_EN0_clk_sys_sram2() volatile#

Get SLEEP_EN0’s clk_sys_sram2 bit.

inline void set_SLEEP_EN0_clk_sys_sram2() volatile#

Set SLEEP_EN0’s clk_sys_sram2 bit.

inline void clear_SLEEP_EN0_clk_sys_sram2() volatile#

Clear SLEEP_EN0’s clk_sys_sram2 bit.

inline void toggle_SLEEP_EN0_clk_sys_sram2() volatile#

Toggle SLEEP_EN0’s clk_sys_sram2 bit.

inline bool get_SLEEP_EN0_clk_sys_sram3() volatile#

Get SLEEP_EN0’s clk_sys_sram3 bit.

inline void set_SLEEP_EN0_clk_sys_sram3() volatile#

Set SLEEP_EN0’s clk_sys_sram3 bit.

inline void clear_SLEEP_EN0_clk_sys_sram3() volatile#

Clear SLEEP_EN0’s clk_sys_sram3 bit.

inline void toggle_SLEEP_EN0_clk_sys_sram3() volatile#

Toggle SLEEP_EN0’s clk_sys_sram3 bit.

inline void get_SLEEP_EN0(bool &clk_sys_clocks, bool &clk_adc_adc, bool &clk_sys_adc, bool &clk_sys_busctrl, bool &clk_sys_busfabric, bool &clk_sys_dma, bool &clk_sys_i2c0, bool &clk_sys_i2c1, bool &clk_sys_io, bool &clk_sys_jtag, bool &clk_sys_vreg_and_chip_reset, bool &clk_sys_pads, bool &clk_sys_pio0, bool &clk_sys_pio1, bool &clk_sys_pll_sys, bool &clk_sys_pll_usb, bool &clk_sys_psm, bool &clk_sys_pwm, bool &clk_sys_resets, bool &clk_sys_rom, bool &clk_sys_rosc, bool &clk_rtc_rtc, bool &clk_sys_rtc, bool &clk_sys_sio, bool &clk_peri_spi0, bool &clk_sys_spi0, bool &clk_peri_spi1, bool &clk_sys_spi1, bool &clk_sys_sram0, bool &clk_sys_sram1, bool &clk_sys_sram2, bool &clk_sys_sram3) volatile#

Get all of SLEEP_EN0’s bit fields.

(read-write) enable clock in sleep mode

inline void set_SLEEP_EN0(bool clk_sys_clocks, bool clk_adc_adc, bool clk_sys_adc, bool clk_sys_busctrl, bool clk_sys_busfabric, bool clk_sys_dma, bool clk_sys_i2c0, bool clk_sys_i2c1, bool clk_sys_io, bool clk_sys_jtag, bool clk_sys_vreg_and_chip_reset, bool clk_sys_pads, bool clk_sys_pio0, bool clk_sys_pio1, bool clk_sys_pll_sys, bool clk_sys_pll_usb, bool clk_sys_psm, bool clk_sys_pwm, bool clk_sys_resets, bool clk_sys_rom, bool clk_sys_rosc, bool clk_rtc_rtc, bool clk_sys_rtc, bool clk_sys_sio, bool clk_peri_spi0, bool clk_sys_spi0, bool clk_peri_spi1, bool clk_sys_spi1, bool clk_sys_sram0, bool clk_sys_sram1, bool clk_sys_sram2, bool clk_sys_sram3) volatile#

Set all of SLEEP_EN0’s bit fields.

(read-write) enable clock in sleep mode

inline bool get_SLEEP_EN1_clk_sys_sram4() volatile#

Get SLEEP_EN1’s clk_sys_sram4 bit.

inline void set_SLEEP_EN1_clk_sys_sram4() volatile#

Set SLEEP_EN1’s clk_sys_sram4 bit.

inline void clear_SLEEP_EN1_clk_sys_sram4() volatile#

Clear SLEEP_EN1’s clk_sys_sram4 bit.

inline void toggle_SLEEP_EN1_clk_sys_sram4() volatile#

Toggle SLEEP_EN1’s clk_sys_sram4 bit.

inline bool get_SLEEP_EN1_clk_sys_sram5() volatile#

Get SLEEP_EN1’s clk_sys_sram5 bit.

inline void set_SLEEP_EN1_clk_sys_sram5() volatile#

Set SLEEP_EN1’s clk_sys_sram5 bit.

inline void clear_SLEEP_EN1_clk_sys_sram5() volatile#

Clear SLEEP_EN1’s clk_sys_sram5 bit.

inline void toggle_SLEEP_EN1_clk_sys_sram5() volatile#

Toggle SLEEP_EN1’s clk_sys_sram5 bit.

inline bool get_SLEEP_EN1_clk_sys_syscfg() volatile#

Get SLEEP_EN1’s clk_sys_syscfg bit.

inline void set_SLEEP_EN1_clk_sys_syscfg() volatile#

Set SLEEP_EN1’s clk_sys_syscfg bit.

inline void clear_SLEEP_EN1_clk_sys_syscfg() volatile#

Clear SLEEP_EN1’s clk_sys_syscfg bit.

inline void toggle_SLEEP_EN1_clk_sys_syscfg() volatile#

Toggle SLEEP_EN1’s clk_sys_syscfg bit.

inline bool get_SLEEP_EN1_clk_sys_sysinfo() volatile#

Get SLEEP_EN1’s clk_sys_sysinfo bit.

inline void set_SLEEP_EN1_clk_sys_sysinfo() volatile#

Set SLEEP_EN1’s clk_sys_sysinfo bit.

inline void clear_SLEEP_EN1_clk_sys_sysinfo() volatile#

Clear SLEEP_EN1’s clk_sys_sysinfo bit.

inline void toggle_SLEEP_EN1_clk_sys_sysinfo() volatile#

Toggle SLEEP_EN1’s clk_sys_sysinfo bit.

inline bool get_SLEEP_EN1_clk_sys_tbman() volatile#

Get SLEEP_EN1’s clk_sys_tbman bit.

inline void set_SLEEP_EN1_clk_sys_tbman() volatile#

Set SLEEP_EN1’s clk_sys_tbman bit.

inline void clear_SLEEP_EN1_clk_sys_tbman() volatile#

Clear SLEEP_EN1’s clk_sys_tbman bit.

inline void toggle_SLEEP_EN1_clk_sys_tbman() volatile#

Toggle SLEEP_EN1’s clk_sys_tbman bit.

inline bool get_SLEEP_EN1_clk_sys_timer() volatile#

Get SLEEP_EN1’s clk_sys_timer bit.

inline void set_SLEEP_EN1_clk_sys_timer() volatile#

Set SLEEP_EN1’s clk_sys_timer bit.

inline void clear_SLEEP_EN1_clk_sys_timer() volatile#

Clear SLEEP_EN1’s clk_sys_timer bit.

inline void toggle_SLEEP_EN1_clk_sys_timer() volatile#

Toggle SLEEP_EN1’s clk_sys_timer bit.

inline bool get_SLEEP_EN1_clk_peri_uart0() volatile#

Get SLEEP_EN1’s clk_peri_uart0 bit.

inline void set_SLEEP_EN1_clk_peri_uart0() volatile#

Set SLEEP_EN1’s clk_peri_uart0 bit.

inline void clear_SLEEP_EN1_clk_peri_uart0() volatile#

Clear SLEEP_EN1’s clk_peri_uart0 bit.

inline void toggle_SLEEP_EN1_clk_peri_uart0() volatile#

Toggle SLEEP_EN1’s clk_peri_uart0 bit.

inline bool get_SLEEP_EN1_clk_sys_uart0() volatile#

Get SLEEP_EN1’s clk_sys_uart0 bit.

inline void set_SLEEP_EN1_clk_sys_uart0() volatile#

Set SLEEP_EN1’s clk_sys_uart0 bit.

inline void clear_SLEEP_EN1_clk_sys_uart0() volatile#

Clear SLEEP_EN1’s clk_sys_uart0 bit.

inline void toggle_SLEEP_EN1_clk_sys_uart0() volatile#

Toggle SLEEP_EN1’s clk_sys_uart0 bit.

inline bool get_SLEEP_EN1_clk_peri_uart1() volatile#

Get SLEEP_EN1’s clk_peri_uart1 bit.

inline void set_SLEEP_EN1_clk_peri_uart1() volatile#

Set SLEEP_EN1’s clk_peri_uart1 bit.

inline void clear_SLEEP_EN1_clk_peri_uart1() volatile#

Clear SLEEP_EN1’s clk_peri_uart1 bit.

inline void toggle_SLEEP_EN1_clk_peri_uart1() volatile#

Toggle SLEEP_EN1’s clk_peri_uart1 bit.

inline bool get_SLEEP_EN1_clk_sys_uart1() volatile#

Get SLEEP_EN1’s clk_sys_uart1 bit.

inline void set_SLEEP_EN1_clk_sys_uart1() volatile#

Set SLEEP_EN1’s clk_sys_uart1 bit.

inline void clear_SLEEP_EN1_clk_sys_uart1() volatile#

Clear SLEEP_EN1’s clk_sys_uart1 bit.

inline void toggle_SLEEP_EN1_clk_sys_uart1() volatile#

Toggle SLEEP_EN1’s clk_sys_uart1 bit.

inline bool get_SLEEP_EN1_clk_sys_usbctrl() volatile#

Get SLEEP_EN1’s clk_sys_usbctrl bit.

inline void set_SLEEP_EN1_clk_sys_usbctrl() volatile#

Set SLEEP_EN1’s clk_sys_usbctrl bit.

inline void clear_SLEEP_EN1_clk_sys_usbctrl() volatile#

Clear SLEEP_EN1’s clk_sys_usbctrl bit.

inline void toggle_SLEEP_EN1_clk_sys_usbctrl() volatile#

Toggle SLEEP_EN1’s clk_sys_usbctrl bit.

inline bool get_SLEEP_EN1_clk_usb_usbctrl() volatile#

Get SLEEP_EN1’s clk_usb_usbctrl bit.

inline void set_SLEEP_EN1_clk_usb_usbctrl() volatile#

Set SLEEP_EN1’s clk_usb_usbctrl bit.

inline void clear_SLEEP_EN1_clk_usb_usbctrl() volatile#

Clear SLEEP_EN1’s clk_usb_usbctrl bit.

inline void toggle_SLEEP_EN1_clk_usb_usbctrl() volatile#

Toggle SLEEP_EN1’s clk_usb_usbctrl bit.

inline bool get_SLEEP_EN1_clk_sys_watchdog() volatile#

Get SLEEP_EN1’s clk_sys_watchdog bit.

inline void set_SLEEP_EN1_clk_sys_watchdog() volatile#

Set SLEEP_EN1’s clk_sys_watchdog bit.

inline void clear_SLEEP_EN1_clk_sys_watchdog() volatile#

Clear SLEEP_EN1’s clk_sys_watchdog bit.

inline void toggle_SLEEP_EN1_clk_sys_watchdog() volatile#

Toggle SLEEP_EN1’s clk_sys_watchdog bit.

inline bool get_SLEEP_EN1_clk_sys_xip() volatile#

Get SLEEP_EN1’s clk_sys_xip bit.

inline void set_SLEEP_EN1_clk_sys_xip() volatile#

Set SLEEP_EN1’s clk_sys_xip bit.

inline void clear_SLEEP_EN1_clk_sys_xip() volatile#

Clear SLEEP_EN1’s clk_sys_xip bit.

inline void toggle_SLEEP_EN1_clk_sys_xip() volatile#

Toggle SLEEP_EN1’s clk_sys_xip bit.

inline bool get_SLEEP_EN1_clk_sys_xosc() volatile#

Get SLEEP_EN1’s clk_sys_xosc bit.

inline void set_SLEEP_EN1_clk_sys_xosc() volatile#

Set SLEEP_EN1’s clk_sys_xosc bit.

inline void clear_SLEEP_EN1_clk_sys_xosc() volatile#

Clear SLEEP_EN1’s clk_sys_xosc bit.

inline void toggle_SLEEP_EN1_clk_sys_xosc() volatile#

Toggle SLEEP_EN1’s clk_sys_xosc bit.

inline void get_SLEEP_EN1(bool &clk_sys_sram4, bool &clk_sys_sram5, bool &clk_sys_syscfg, bool &clk_sys_sysinfo, bool &clk_sys_tbman, bool &clk_sys_timer, bool &clk_peri_uart0, bool &clk_sys_uart0, bool &clk_peri_uart1, bool &clk_sys_uart1, bool &clk_sys_usbctrl, bool &clk_usb_usbctrl, bool &clk_sys_watchdog, bool &clk_sys_xip, bool &clk_sys_xosc) volatile#

Get all of SLEEP_EN1’s bit fields.

(read-write) enable clock in sleep mode

inline void set_SLEEP_EN1(bool clk_sys_sram4, bool clk_sys_sram5, bool clk_sys_syscfg, bool clk_sys_sysinfo, bool clk_sys_tbman, bool clk_sys_timer, bool clk_peri_uart0, bool clk_sys_uart0, bool clk_peri_uart1, bool clk_sys_uart1, bool clk_sys_usbctrl, bool clk_usb_usbctrl, bool clk_sys_watchdog, bool clk_sys_xip, bool clk_sys_xosc) volatile#

Set all of SLEEP_EN1’s bit fields.

(read-write) enable clock in sleep mode

inline bool get_ENABLED0_clk_sys_clocks() volatile#

Get ENABLED0’s clk_sys_clocks bit.

inline bool get_ENABLED0_clk_adc_adc() volatile#

Get ENABLED0’s clk_adc_adc bit.

inline bool get_ENABLED0_clk_sys_adc() volatile#

Get ENABLED0’s clk_sys_adc bit.

inline bool get_ENABLED0_clk_sys_busctrl() volatile#

Get ENABLED0’s clk_sys_busctrl bit.

inline bool get_ENABLED0_clk_sys_busfabric() volatile#

Get ENABLED0’s clk_sys_busfabric bit.

inline bool get_ENABLED0_clk_sys_dma() volatile#

Get ENABLED0’s clk_sys_dma bit.

inline bool get_ENABLED0_clk_sys_i2c0() volatile#

Get ENABLED0’s clk_sys_i2c0 bit.

inline bool get_ENABLED0_clk_sys_i2c1() volatile#

Get ENABLED0’s clk_sys_i2c1 bit.

inline bool get_ENABLED0_clk_sys_io() volatile#

Get ENABLED0’s clk_sys_io bit.

inline bool get_ENABLED0_clk_sys_jtag() volatile#

Get ENABLED0’s clk_sys_jtag bit.

inline bool get_ENABLED0_clk_sys_vreg_and_chip_reset() volatile#

Get ENABLED0’s clk_sys_vreg_and_chip_reset bit.

inline bool get_ENABLED0_clk_sys_pads() volatile#

Get ENABLED0’s clk_sys_pads bit.

inline bool get_ENABLED0_clk_sys_pio0() volatile#

Get ENABLED0’s clk_sys_pio0 bit.

inline bool get_ENABLED0_clk_sys_pio1() volatile#

Get ENABLED0’s clk_sys_pio1 bit.

inline bool get_ENABLED0_clk_sys_pll_sys() volatile#

Get ENABLED0’s clk_sys_pll_sys bit.

inline bool get_ENABLED0_clk_sys_pll_usb() volatile#

Get ENABLED0’s clk_sys_pll_usb bit.

inline bool get_ENABLED0_clk_sys_psm() volatile#

Get ENABLED0’s clk_sys_psm bit.

inline bool get_ENABLED0_clk_sys_pwm() volatile#

Get ENABLED0’s clk_sys_pwm bit.

inline bool get_ENABLED0_clk_sys_resets() volatile#

Get ENABLED0’s clk_sys_resets bit.

inline bool get_ENABLED0_clk_sys_rom() volatile#

Get ENABLED0’s clk_sys_rom bit.

inline bool get_ENABLED0_clk_sys_rosc() volatile#

Get ENABLED0’s clk_sys_rosc bit.

inline bool get_ENABLED0_clk_rtc_rtc() volatile#

Get ENABLED0’s clk_rtc_rtc bit.

inline bool get_ENABLED0_clk_sys_rtc() volatile#

Get ENABLED0’s clk_sys_rtc bit.

inline bool get_ENABLED0_clk_sys_sio() volatile#

Get ENABLED0’s clk_sys_sio bit.

inline bool get_ENABLED0_clk_peri_spi0() volatile#

Get ENABLED0’s clk_peri_spi0 bit.

inline bool get_ENABLED0_clk_sys_spi0() volatile#

Get ENABLED0’s clk_sys_spi0 bit.

inline bool get_ENABLED0_clk_peri_spi1() volatile#

Get ENABLED0’s clk_peri_spi1 bit.

inline bool get_ENABLED0_clk_sys_spi1() volatile#

Get ENABLED0’s clk_sys_spi1 bit.

inline bool get_ENABLED0_clk_sys_sram0() volatile#

Get ENABLED0’s clk_sys_sram0 bit.

inline bool get_ENABLED0_clk_sys_sram1() volatile#

Get ENABLED0’s clk_sys_sram1 bit.

inline bool get_ENABLED0_clk_sys_sram2() volatile#

Get ENABLED0’s clk_sys_sram2 bit.

inline bool get_ENABLED0_clk_sys_sram3() volatile#

Get ENABLED0’s clk_sys_sram3 bit.

inline void get_ENABLED0(bool &clk_sys_clocks, bool &clk_adc_adc, bool &clk_sys_adc, bool &clk_sys_busctrl, bool &clk_sys_busfabric, bool &clk_sys_dma, bool &clk_sys_i2c0, bool &clk_sys_i2c1, bool &clk_sys_io, bool &clk_sys_jtag, bool &clk_sys_vreg_and_chip_reset, bool &clk_sys_pads, bool &clk_sys_pio0, bool &clk_sys_pio1, bool &clk_sys_pll_sys, bool &clk_sys_pll_usb, bool &clk_sys_psm, bool &clk_sys_pwm, bool &clk_sys_resets, bool &clk_sys_rom, bool &clk_sys_rosc, bool &clk_rtc_rtc, bool &clk_sys_rtc, bool &clk_sys_sio, bool &clk_peri_spi0, bool &clk_sys_spi0, bool &clk_peri_spi1, bool &clk_sys_spi1, bool &clk_sys_sram0, bool &clk_sys_sram1, bool &clk_sys_sram2, bool &clk_sys_sram3) volatile#

Get all of ENABLED0’s bit fields.

(read-only) indicates the state of the clock enable

inline bool get_ENABLED1_clk_sys_sram4() volatile#

Get ENABLED1’s clk_sys_sram4 bit.

inline bool get_ENABLED1_clk_sys_sram5() volatile#

Get ENABLED1’s clk_sys_sram5 bit.

inline bool get_ENABLED1_clk_sys_syscfg() volatile#

Get ENABLED1’s clk_sys_syscfg bit.

inline bool get_ENABLED1_clk_sys_sysinfo() volatile#

Get ENABLED1’s clk_sys_sysinfo bit.

inline bool get_ENABLED1_clk_sys_tbman() volatile#

Get ENABLED1’s clk_sys_tbman bit.

inline bool get_ENABLED1_clk_sys_timer() volatile#

Get ENABLED1’s clk_sys_timer bit.

inline bool get_ENABLED1_clk_peri_uart0() volatile#

Get ENABLED1’s clk_peri_uart0 bit.

inline bool get_ENABLED1_clk_sys_uart0() volatile#

Get ENABLED1’s clk_sys_uart0 bit.

inline bool get_ENABLED1_clk_peri_uart1() volatile#

Get ENABLED1’s clk_peri_uart1 bit.

inline bool get_ENABLED1_clk_sys_uart1() volatile#

Get ENABLED1’s clk_sys_uart1 bit.

inline bool get_ENABLED1_clk_sys_usbctrl() volatile#

Get ENABLED1’s clk_sys_usbctrl bit.

inline bool get_ENABLED1_clk_usb_usbctrl() volatile#

Get ENABLED1’s clk_usb_usbctrl bit.

inline bool get_ENABLED1_clk_sys_watchdog() volatile#

Get ENABLED1’s clk_sys_watchdog bit.

inline bool get_ENABLED1_clk_sys_xip() volatile#

Get ENABLED1’s clk_sys_xip bit.

inline bool get_ENABLED1_clk_sys_xosc() volatile#

Get ENABLED1’s clk_sys_xosc bit.

inline void get_ENABLED1(bool &clk_sys_sram4, bool &clk_sys_sram5, bool &clk_sys_syscfg, bool &clk_sys_sysinfo, bool &clk_sys_tbman, bool &clk_sys_timer, bool &clk_peri_uart0, bool &clk_sys_uart0, bool &clk_peri_uart1, bool &clk_sys_uart1, bool &clk_sys_usbctrl, bool &clk_usb_usbctrl, bool &clk_sys_watchdog, bool &clk_sys_xip, bool &clk_sys_xosc) volatile#

Get all of ENABLED1’s bit fields.

(read-only) indicates the state of the clock enable

inline bool get_INTR_CLK_SYS_RESUS() volatile#

Get INTR’s CLK_SYS_RESUS bit.

inline bool get_INTE_CLK_SYS_RESUS() volatile#

Get INTE’s CLK_SYS_RESUS bit.

inline void set_INTE_CLK_SYS_RESUS() volatile#

Set INTE’s CLK_SYS_RESUS bit.

inline void clear_INTE_CLK_SYS_RESUS() volatile#

Clear INTE’s CLK_SYS_RESUS bit.

inline void toggle_INTE_CLK_SYS_RESUS() volatile#

Toggle INTE’s CLK_SYS_RESUS bit.

inline bool get_INTF_CLK_SYS_RESUS() volatile#

Get INTF’s CLK_SYS_RESUS bit.

inline void set_INTF_CLK_SYS_RESUS() volatile#

Set INTF’s CLK_SYS_RESUS bit.

inline void clear_INTF_CLK_SYS_RESUS() volatile#

Clear INTF’s CLK_SYS_RESUS bit.

inline void toggle_INTF_CLK_SYS_RESUS() volatile#

Toggle INTF’s CLK_SYS_RESUS bit.

inline bool get_INTS_CLK_SYS_RESUS() volatile#

Get INTS’s CLK_SYS_RESUS bit.

Public Members

uint32_t CLK_GPOUT0_CTRL#

(read-write) Clock control, can be changed on-the-fly (except for auxsrc)

uint32_t CLK_GPOUT0_DIV#

(read-write) Clock divisor, can be changed on-the-fly

uint32_t CLK_GPOUT0_SELECTED#

(read-write) Indicates which SRC is currently selected by the glitchless mux (one-hot).

This slice does not have a glitchless mux (only the AUX_SRC field is present, not SRC) so this register is hardwired to 0x1.

uint32_t CLK_GPOUT1_CTRL#

(read-write) Clock control, can be changed on-the-fly (except for auxsrc)

uint32_t CLK_GPOUT1_DIV#

(read-write) Clock divisor, can be changed on-the-fly

uint32_t CLK_GPOUT1_SELECTED#

(read-write) Indicates which SRC is currently selected by the glitchless mux (one-hot).

This slice does not have a glitchless mux (only the AUX_SRC field is present, not SRC) so this register is hardwired to 0x1.

uint32_t CLK_GPOUT2_CTRL#

(read-write) Clock control, can be changed on-the-fly (except for auxsrc)

uint32_t CLK_GPOUT2_DIV#

(read-write) Clock divisor, can be changed on-the-fly

uint32_t CLK_GPOUT2_SELECTED#

(read-write) Indicates which SRC is currently selected by the glitchless mux (one-hot).

This slice does not have a glitchless mux (only the AUX_SRC field is present, not SRC) so this register is hardwired to 0x1.

uint32_t CLK_GPOUT3_CTRL#

(read-write) Clock control, can be changed on-the-fly (except for auxsrc)

uint32_t CLK_GPOUT3_DIV#

(read-write) Clock divisor, can be changed on-the-fly

uint32_t CLK_GPOUT3_SELECTED#

(read-write) Indicates which SRC is currently selected by the glitchless mux (one-hot).

This slice does not have a glitchless mux (only the AUX_SRC field is present, not SRC) so this register is hardwired to 0x1.

uint32_t CLK_REF_CTRL#

(read-write) Clock control, can be changed on-the-fly (except for auxsrc)

uint32_t CLK_REF_DIV#

(read-write) Clock divisor, can be changed on-the-fly

uint32_t CLK_REF_SELECTED#

(read-write) Indicates which SRC is currently selected by the glitchless mux (one-hot).

The glitchless multiplexer does not switch instantaneously (to avoid glitches), so software should poll this register to wait for the switch to complete. This register contains one decoded bit for each of the clock sources enumerated in the CTRL SRC field. At most one of these bits will be set at any time, indicating that clock is currently present at the output of the glitchless mux. Whilst switching is in progress, this register may briefly show all-0s.

uint32_t CLK_SYS_CTRL#

(read-write) Clock control, can be changed on-the-fly (except for auxsrc)

uint32_t CLK_SYS_DIV#

(read-write) Clock divisor, can be changed on-the-fly

uint32_t CLK_SYS_SELECTED#

(read-write) Indicates which SRC is currently selected by the glitchless mux (one-hot).

The glitchless multiplexer does not switch instantaneously (to avoid glitches), so software should poll this register to wait for the switch to complete. This register contains one decoded bit for each of the clock sources enumerated in the CTRL SRC field. At most one of these bits will be set at any time, indicating that clock is currently present at the output of the glitchless mux. Whilst switching is in progress, this register may briefly show all-0s.

uint32_t CLK_PERI_CTRL#

(read-write) Clock control, can be changed on-the-fly (except for auxsrc)

const uint32_t reserved_padding0 = {}#
uint32_t CLK_PERI_SELECTED#

(read-write) Indicates which SRC is currently selected by the glitchless mux (one-hot).

This slice does not have a glitchless mux (only the AUX_SRC field is present, not SRC) so this register is hardwired to 0x1.

uint32_t CLK_USB_CTRL#

(read-write) Clock control, can be changed on-the-fly (except for auxsrc)

uint32_t CLK_USB_DIV#

(read-write) Clock divisor, can be changed on-the-fly

uint32_t CLK_USB_SELECTED#

(read-write) Indicates which SRC is currently selected by the glitchless mux (one-hot).

This slice does not have a glitchless mux (only the AUX_SRC field is present, not SRC) so this register is hardwired to 0x1.

uint32_t CLK_ADC_CTRL#

(read-write) Clock control, can be changed on-the-fly (except for auxsrc)

uint32_t CLK_ADC_DIV#

(read-write) Clock divisor, can be changed on-the-fly

uint32_t CLK_ADC_SELECTED#

(read-write) Indicates which SRC is currently selected by the glitchless mux (one-hot).

This slice does not have a glitchless mux (only the AUX_SRC field is present, not SRC) so this register is hardwired to 0x1.

uint32_t CLK_RTC_CTRL#

(read-write) Clock control, can be changed on-the-fly (except for auxsrc)

uint32_t CLK_RTC_DIV#

(read-write) Clock divisor, can be changed on-the-fly

uint32_t CLK_RTC_SELECTED#

(read-write) Indicates which SRC is currently selected by the glitchless mux (one-hot).

This slice does not have a glitchless mux (only the AUX_SRC field is present, not SRC) so this register is hardwired to 0x1.

uint32_t CLK_SYS_RESUS_CTRL#
const uint32_t CLK_SYS_RESUS_STATUS = {}#
uint32_t FC0_REF_KHZ#

(read-write) Reference clock frequency in kHz

uint32_t FC0_MIN_KHZ#

(read-write) Minimum pass frequency in kHz. This is optional. Set to 0 if you are not using the pass/fail flags

uint32_t FC0_MAX_KHZ#

(read-write) Maximum pass frequency in kHz. This is optional. Set to 0x1ffffff if you are not using the pass/fail flags

uint32_t FC0_DELAY#

(read-write) Delays the start of frequency counting to allow the mux to settle

Delay is measured in multiples of the reference clock period

uint32_t FC0_INTERVAL#

(read-write) The test interval is 0.98us * 2**interval, but let’s call it 1us * 2**interval

The default gives a test interval of 250us

uint32_t FC0_SRC#

(read-write) Clock sent to frequency counter, set to 0 when not required

Writing to this register initiates the frequency count

const uint32_t FC0_STATUS = {}#

(read-only) Frequency counter status

const uint32_t FC0_RESULT = {}#

(read-only) Result of frequency measurement, only valid when status_done=1

uint32_t WAKE_EN0#

(read-write) enable clock in wake mode

uint32_t WAKE_EN1#

(read-write) enable clock in wake mode

uint32_t SLEEP_EN0#

(read-write) enable clock in sleep mode

uint32_t SLEEP_EN1#

(read-write) enable clock in sleep mode

const uint32_t ENABLED0 = {}#

(read-only) indicates the state of the clock enable

const uint32_t ENABLED1 = {}#

(read-only) indicates the state of the clock enable

const uint32_t INTR = {}#

(read-only) Raw Interrupts

uint32_t INTE#

(read-write) Interrupt Enable

uint32_t INTF#

(read-write) Interrupt Force

const uint32_t INTS = {}#

(read-only) Interrupt status after masking & forcing

Public Static Attributes

static constexpr std::size_t size = 200#

clocks’s size in bytes.