Struct usbctrl_dpram

• Defined in File usbctrl_dpram.h

Struct Documentation

struct usbctrl_dpram

DPRAM layout for USB device.

Public Functions

inline uint8_t get_SETUP_PACKET_LOW_BMREQUESTTYPE() volatile

Get SETUP_PACKET_LOW’s BMREQUESTTYPE field.

inline void set_SETUP_PACKET_LOW_BMREQUESTTYPE(uint8_t value) volatile

Set SETUP_PACKET_LOW’s BMREQUESTTYPE field.

inline uint8_t get_SETUP_PACKET_LOW_BREQUEST() volatile

Get SETUP_PACKET_LOW’s BREQUEST field.

inline void set_SETUP_PACKET_LOW_BREQUEST(uint8_t value) volatile

Set SETUP_PACKET_LOW’s BREQUEST field.

inline uint16_t get_SETUP_PACKET_LOW_WVALUE() volatile

Get SETUP_PACKET_LOW’s WVALUE field.

inline void set_SETUP_PACKET_LOW_WVALUE(uint16_t value) volatile

Set SETUP_PACKET_LOW’s WVALUE field.

inline void get_SETUP_PACKET_LOW(uint8_t &BMREQUESTTYPE, uint8_t &BREQUEST, uint16_t &WVALUE) volatile

Get all of SETUP_PACKET_LOW’s bit fields.

(read-write) Bytes 0-3 of the SETUP packet from the host.

inline void set_SETUP_PACKET_LOW(uint8_t BMREQUESTTYPE, uint8_t BREQUEST, uint16_t WVALUE) volatile

Set all of SETUP_PACKET_LOW’s bit fields.

(read-write) Bytes 0-3 of the SETUP packet from the host.

inline uint16_t get_SETUP_PACKET_HIGH_WINDEX() volatile

Get SETUP_PACKET_HIGH’s WINDEX field.

inline void set_SETUP_PACKET_HIGH_WINDEX(uint16_t value) volatile

Set SETUP_PACKET_HIGH’s WINDEX field.

inline uint16_t get_SETUP_PACKET_HIGH_WLENGTH() volatile

Get SETUP_PACKET_HIGH’s WLENGTH field.

inline void set_SETUP_PACKET_HIGH_WLENGTH(uint16_t value) volatile

Set SETUP_PACKET_HIGH’s WLENGTH field.

inline void get_SETUP_PACKET_HIGH(uint16_t &WINDEX, uint16_t &WLENGTH) volatile

Get all of SETUP_PACKET_HIGH’s bit fields.

(read-write) Bytes 4-7 of the setup packet from the host.

inline void set_SETUP_PACKET_HIGH(uint16_t WINDEX, uint16_t WLENGTH) volatile

Set all of SETUP_PACKET_HIGH’s bit fields.

(read-write) Bytes 4-7 of the setup packet from the host.

inline uint16_t get_EP1_IN_CONTROL_BUFFER_ADDRESS() volatile

Get EP1_IN_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline void set_EP1_IN_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile

Set EP1_IN_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline bool get_EP1_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Get EP1_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void set_EP1_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Set EP1_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void clear_EP1_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Clear EP1_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void toggle_EP1_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Toggle EP1_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline bool get_EP1_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Get EP1_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void set_EP1_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Set EP1_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void clear_EP1_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Clear EP1_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void toggle_EP1_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Toggle EP1_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline USBCTRL_DPRAM_EP1_IN_CONTROL_ENDPOINT_TYPE get_EP1_IN_CONTROL_ENDPOINT_TYPE() volatile

Get EP1_IN_CONTROL’s ENDPOINT_TYPE field.

inline void set_EP1_IN_CONTROL_ENDPOINT_TYPE(USBCTRL_DPRAM_EP1_IN_CONTROL_ENDPOINT_TYPE value) volatile

Set EP1_IN_CONTROL’s ENDPOINT_TYPE field.

inline bool get_EP1_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Get EP1_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void set_EP1_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Set EP1_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void clear_EP1_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Clear EP1_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void toggle_EP1_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Toggle EP1_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline bool get_EP1_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Get EP1_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void set_EP1_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Set EP1_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void clear_EP1_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Clear EP1_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void toggle_EP1_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Toggle EP1_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline bool get_EP1_IN_CONTROL_DOUBLE_BUFFERED() volatile

Get EP1_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void set_EP1_IN_CONTROL_DOUBLE_BUFFERED() volatile

Set EP1_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void clear_EP1_IN_CONTROL_DOUBLE_BUFFERED() volatile

Clear EP1_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void toggle_EP1_IN_CONTROL_DOUBLE_BUFFERED() volatile

Toggle EP1_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline bool get_EP1_IN_CONTROL_ENABLE() volatile

Get EP1_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void set_EP1_IN_CONTROL_ENABLE() volatile

Set EP1_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void clear_EP1_IN_CONTROL_ENABLE() volatile

Clear EP1_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void toggle_EP1_IN_CONTROL_ENABLE() volatile

Toggle EP1_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void get_EP1_IN_CONTROL(uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK, bool &INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP1_IN_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE, bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF, bool &DOUBLE_BUFFERED, bool &ENABLE) volatile

Get all of EP1_IN_CONTROL’s bit fields.

inline void set_EP1_IN_CONTROL(uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK, bool INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP1_IN_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE, bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF, bool DOUBLE_BUFFERED, bool ENABLE) volatile

Set all of EP1_IN_CONTROL’s bit fields.

inline uint16_t get_EP1_OUT_CONTROL_BUFFER_ADDRESS() volatile

Get EP1_OUT_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline void set_EP1_OUT_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile

Set EP1_OUT_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline bool get_EP1_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Get EP1_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void set_EP1_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Set EP1_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void clear_EP1_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Clear EP1_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void toggle_EP1_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Toggle EP1_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline bool get_EP1_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Get EP1_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void set_EP1_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Set EP1_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void clear_EP1_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Clear EP1_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void toggle_EP1_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Toggle EP1_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline USBCTRL_DPRAM_EP1_OUT_CONTROL_ENDPOINT_TYPE get_EP1_OUT_CONTROL_ENDPOINT_TYPE() volatile

Get EP1_OUT_CONTROL’s ENDPOINT_TYPE field.

inline void set_EP1_OUT_CONTROL_ENDPOINT_TYPE(USBCTRL_DPRAM_EP1_OUT_CONTROL_ENDPOINT_TYPE value) volatile

Set EP1_OUT_CONTROL’s ENDPOINT_TYPE field.

inline bool get_EP1_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Get EP1_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void set_EP1_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Set EP1_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void clear_EP1_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Clear EP1_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void toggle_EP1_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Toggle EP1_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline bool get_EP1_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Get EP1_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void set_EP1_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Set EP1_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void clear_EP1_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Clear EP1_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void toggle_EP1_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Toggle EP1_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline bool get_EP1_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Get EP1_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void set_EP1_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Set EP1_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void clear_EP1_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Clear EP1_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void toggle_EP1_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Toggle EP1_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline bool get_EP1_OUT_CONTROL_ENABLE() volatile

Get EP1_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void set_EP1_OUT_CONTROL_ENABLE() volatile

Set EP1_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void clear_EP1_OUT_CONTROL_ENABLE() volatile

Clear EP1_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void toggle_EP1_OUT_CONTROL_ENABLE() volatile

Toggle EP1_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void get_EP1_OUT_CONTROL(uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK, bool &INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP1_OUT_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE, bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF, bool &DOUBLE_BUFFERED, bool &ENABLE) volatile

Get all of EP1_OUT_CONTROL’s bit fields.

inline void set_EP1_OUT_CONTROL(uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK, bool INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP1_OUT_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE, bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF, bool DOUBLE_BUFFERED, bool ENABLE) volatile

Set all of EP1_OUT_CONTROL’s bit fields.

inline uint16_t get_EP2_IN_CONTROL_BUFFER_ADDRESS() volatile

Get EP2_IN_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline void set_EP2_IN_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile

Set EP2_IN_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline bool get_EP2_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Get EP2_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void set_EP2_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Set EP2_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void clear_EP2_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Clear EP2_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void toggle_EP2_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Toggle EP2_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline bool get_EP2_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Get EP2_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void set_EP2_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Set EP2_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void clear_EP2_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Clear EP2_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void toggle_EP2_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Toggle EP2_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline USBCTRL_DPRAM_EP2_IN_CONTROL_ENDPOINT_TYPE get_EP2_IN_CONTROL_ENDPOINT_TYPE() volatile

Get EP2_IN_CONTROL’s ENDPOINT_TYPE field.

inline void set_EP2_IN_CONTROL_ENDPOINT_TYPE(USBCTRL_DPRAM_EP2_IN_CONTROL_ENDPOINT_TYPE value) volatile

Set EP2_IN_CONTROL’s ENDPOINT_TYPE field.

inline bool get_EP2_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Get EP2_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void set_EP2_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Set EP2_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void clear_EP2_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Clear EP2_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void toggle_EP2_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Toggle EP2_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline bool get_EP2_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Get EP2_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void set_EP2_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Set EP2_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void clear_EP2_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Clear EP2_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void toggle_EP2_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Toggle EP2_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline bool get_EP2_IN_CONTROL_DOUBLE_BUFFERED() volatile

Get EP2_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void set_EP2_IN_CONTROL_DOUBLE_BUFFERED() volatile

Set EP2_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void clear_EP2_IN_CONTROL_DOUBLE_BUFFERED() volatile

Clear EP2_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void toggle_EP2_IN_CONTROL_DOUBLE_BUFFERED() volatile

Toggle EP2_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline bool get_EP2_IN_CONTROL_ENABLE() volatile

Get EP2_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void set_EP2_IN_CONTROL_ENABLE() volatile

Set EP2_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void clear_EP2_IN_CONTROL_ENABLE() volatile

Clear EP2_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void toggle_EP2_IN_CONTROL_ENABLE() volatile

Toggle EP2_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void get_EP2_IN_CONTROL(uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK, bool &INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP2_IN_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE, bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF, bool &DOUBLE_BUFFERED, bool &ENABLE) volatile

Get all of EP2_IN_CONTROL’s bit fields.

inline void set_EP2_IN_CONTROL(uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK, bool INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP2_IN_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE, bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF, bool DOUBLE_BUFFERED, bool ENABLE) volatile

Set all of EP2_IN_CONTROL’s bit fields.

inline uint16_t get_EP2_OUT_CONTROL_BUFFER_ADDRESS() volatile

Get EP2_OUT_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline void set_EP2_OUT_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile

Set EP2_OUT_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline bool get_EP2_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Get EP2_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void set_EP2_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Set EP2_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void clear_EP2_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Clear EP2_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void toggle_EP2_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Toggle EP2_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline bool get_EP2_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Get EP2_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void set_EP2_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Set EP2_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void clear_EP2_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Clear EP2_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void toggle_EP2_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Toggle EP2_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline USBCTRL_DPRAM_EP2_OUT_CONTROL_ENDPOINT_TYPE get_EP2_OUT_CONTROL_ENDPOINT_TYPE() volatile

Get EP2_OUT_CONTROL’s ENDPOINT_TYPE field.

inline void set_EP2_OUT_CONTROL_ENDPOINT_TYPE(USBCTRL_DPRAM_EP2_OUT_CONTROL_ENDPOINT_TYPE value) volatile

Set EP2_OUT_CONTROL’s ENDPOINT_TYPE field.

inline bool get_EP2_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Get EP2_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void set_EP2_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Set EP2_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void clear_EP2_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Clear EP2_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void toggle_EP2_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Toggle EP2_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline bool get_EP2_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Get EP2_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void set_EP2_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Set EP2_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void clear_EP2_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Clear EP2_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void toggle_EP2_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Toggle EP2_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline bool get_EP2_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Get EP2_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void set_EP2_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Set EP2_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void clear_EP2_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Clear EP2_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void toggle_EP2_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Toggle EP2_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline bool get_EP2_OUT_CONTROL_ENABLE() volatile

Get EP2_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void set_EP2_OUT_CONTROL_ENABLE() volatile

Set EP2_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void clear_EP2_OUT_CONTROL_ENABLE() volatile

Clear EP2_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void toggle_EP2_OUT_CONTROL_ENABLE() volatile

Toggle EP2_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void get_EP2_OUT_CONTROL(uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK, bool &INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP2_OUT_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE, bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF, bool &DOUBLE_BUFFERED, bool &ENABLE) volatile

Get all of EP2_OUT_CONTROL’s bit fields.

inline void set_EP2_OUT_CONTROL(uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK, bool INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP2_OUT_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE, bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF, bool DOUBLE_BUFFERED, bool ENABLE) volatile

Set all of EP2_OUT_CONTROL’s bit fields.

inline uint16_t get_EP3_IN_CONTROL_BUFFER_ADDRESS() volatile

Get EP3_IN_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline void set_EP3_IN_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile

Set EP3_IN_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline bool get_EP3_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Get EP3_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void set_EP3_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Set EP3_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void clear_EP3_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Clear EP3_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void toggle_EP3_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Toggle EP3_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline bool get_EP3_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Get EP3_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void set_EP3_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Set EP3_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void clear_EP3_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Clear EP3_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void toggle_EP3_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Toggle EP3_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline USBCTRL_DPRAM_EP3_IN_CONTROL_ENDPOINT_TYPE get_EP3_IN_CONTROL_ENDPOINT_TYPE() volatile

Get EP3_IN_CONTROL’s ENDPOINT_TYPE field.

inline void set_EP3_IN_CONTROL_ENDPOINT_TYPE(USBCTRL_DPRAM_EP3_IN_CONTROL_ENDPOINT_TYPE value) volatile

Set EP3_IN_CONTROL’s ENDPOINT_TYPE field.

inline bool get_EP3_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Get EP3_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void set_EP3_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Set EP3_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void clear_EP3_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Clear EP3_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void toggle_EP3_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Toggle EP3_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline bool get_EP3_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Get EP3_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void set_EP3_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Set EP3_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void clear_EP3_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Clear EP3_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void toggle_EP3_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Toggle EP3_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline bool get_EP3_IN_CONTROL_DOUBLE_BUFFERED() volatile

Get EP3_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void set_EP3_IN_CONTROL_DOUBLE_BUFFERED() volatile

Set EP3_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void clear_EP3_IN_CONTROL_DOUBLE_BUFFERED() volatile

Clear EP3_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void toggle_EP3_IN_CONTROL_DOUBLE_BUFFERED() volatile

Toggle EP3_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline bool get_EP3_IN_CONTROL_ENABLE() volatile

Get EP3_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void set_EP3_IN_CONTROL_ENABLE() volatile

Set EP3_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void clear_EP3_IN_CONTROL_ENABLE() volatile

Clear EP3_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void toggle_EP3_IN_CONTROL_ENABLE() volatile

Toggle EP3_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void get_EP3_IN_CONTROL(uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK, bool &INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP3_IN_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE, bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF, bool &DOUBLE_BUFFERED, bool &ENABLE) volatile

Get all of EP3_IN_CONTROL’s bit fields.

inline void set_EP3_IN_CONTROL(uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK, bool INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP3_IN_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE, bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF, bool DOUBLE_BUFFERED, bool ENABLE) volatile

Set all of EP3_IN_CONTROL’s bit fields.

inline uint16_t get_EP3_OUT_CONTROL_BUFFER_ADDRESS() volatile

Get EP3_OUT_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline void set_EP3_OUT_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile

Set EP3_OUT_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline bool get_EP3_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Get EP3_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void set_EP3_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Set EP3_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void clear_EP3_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Clear EP3_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void toggle_EP3_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Toggle EP3_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline bool get_EP3_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Get EP3_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void set_EP3_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Set EP3_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void clear_EP3_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Clear EP3_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void toggle_EP3_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Toggle EP3_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline USBCTRL_DPRAM_EP3_OUT_CONTROL_ENDPOINT_TYPE get_EP3_OUT_CONTROL_ENDPOINT_TYPE() volatile

Get EP3_OUT_CONTROL’s ENDPOINT_TYPE field.

inline void set_EP3_OUT_CONTROL_ENDPOINT_TYPE(USBCTRL_DPRAM_EP3_OUT_CONTROL_ENDPOINT_TYPE value) volatile

Set EP3_OUT_CONTROL’s ENDPOINT_TYPE field.

inline bool get_EP3_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Get EP3_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void set_EP3_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Set EP3_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void clear_EP3_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Clear EP3_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void toggle_EP3_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Toggle EP3_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline bool get_EP3_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Get EP3_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void set_EP3_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Set EP3_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void clear_EP3_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Clear EP3_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void toggle_EP3_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Toggle EP3_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline bool get_EP3_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Get EP3_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void set_EP3_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Set EP3_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void clear_EP3_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Clear EP3_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void toggle_EP3_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Toggle EP3_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline bool get_EP3_OUT_CONTROL_ENABLE() volatile

Get EP3_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void set_EP3_OUT_CONTROL_ENABLE() volatile

Set EP3_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void clear_EP3_OUT_CONTROL_ENABLE() volatile

Clear EP3_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void toggle_EP3_OUT_CONTROL_ENABLE() volatile

Toggle EP3_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void get_EP3_OUT_CONTROL(uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK, bool &INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP3_OUT_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE, bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF, bool &DOUBLE_BUFFERED, bool &ENABLE) volatile

Get all of EP3_OUT_CONTROL’s bit fields.

inline void set_EP3_OUT_CONTROL(uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK, bool INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP3_OUT_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE, bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF, bool DOUBLE_BUFFERED, bool ENABLE) volatile

Set all of EP3_OUT_CONTROL’s bit fields.

inline uint16_t get_EP4_IN_CONTROL_BUFFER_ADDRESS() volatile

Get EP4_IN_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline void set_EP4_IN_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile

Set EP4_IN_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline bool get_EP4_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Get EP4_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void set_EP4_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Set EP4_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void clear_EP4_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Clear EP4_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void toggle_EP4_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Toggle EP4_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline bool get_EP4_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Get EP4_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void set_EP4_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Set EP4_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void clear_EP4_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Clear EP4_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void toggle_EP4_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Toggle EP4_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline USBCTRL_DPRAM_EP4_IN_CONTROL_ENDPOINT_TYPE get_EP4_IN_CONTROL_ENDPOINT_TYPE() volatile

Get EP4_IN_CONTROL’s ENDPOINT_TYPE field.

inline void set_EP4_IN_CONTROL_ENDPOINT_TYPE(USBCTRL_DPRAM_EP4_IN_CONTROL_ENDPOINT_TYPE value) volatile

Set EP4_IN_CONTROL’s ENDPOINT_TYPE field.

inline bool get_EP4_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Get EP4_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void set_EP4_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Set EP4_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void clear_EP4_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Clear EP4_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void toggle_EP4_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Toggle EP4_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline bool get_EP4_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Get EP4_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void set_EP4_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Set EP4_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void clear_EP4_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Clear EP4_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void toggle_EP4_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Toggle EP4_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline bool get_EP4_IN_CONTROL_DOUBLE_BUFFERED() volatile

Get EP4_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void set_EP4_IN_CONTROL_DOUBLE_BUFFERED() volatile

Set EP4_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void clear_EP4_IN_CONTROL_DOUBLE_BUFFERED() volatile

Clear EP4_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void toggle_EP4_IN_CONTROL_DOUBLE_BUFFERED() volatile

Toggle EP4_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline bool get_EP4_IN_CONTROL_ENABLE() volatile

Get EP4_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void set_EP4_IN_CONTROL_ENABLE() volatile

Set EP4_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void clear_EP4_IN_CONTROL_ENABLE() volatile

Clear EP4_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void toggle_EP4_IN_CONTROL_ENABLE() volatile

Toggle EP4_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void get_EP4_IN_CONTROL(uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK, bool &INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP4_IN_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE, bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF, bool &DOUBLE_BUFFERED, bool &ENABLE) volatile

Get all of EP4_IN_CONTROL’s bit fields.

inline void set_EP4_IN_CONTROL(uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK, bool INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP4_IN_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE, bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF, bool DOUBLE_BUFFERED, bool ENABLE) volatile

Set all of EP4_IN_CONTROL’s bit fields.

inline uint16_t get_EP4_OUT_CONTROL_BUFFER_ADDRESS() volatile

Get EP4_OUT_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline void set_EP4_OUT_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile

Set EP4_OUT_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline bool get_EP4_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Get EP4_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void set_EP4_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Set EP4_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void clear_EP4_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Clear EP4_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void toggle_EP4_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Toggle EP4_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline bool get_EP4_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Get EP4_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void set_EP4_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Set EP4_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void clear_EP4_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Clear EP4_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void toggle_EP4_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Toggle EP4_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline USBCTRL_DPRAM_EP4_OUT_CONTROL_ENDPOINT_TYPE get_EP4_OUT_CONTROL_ENDPOINT_TYPE() volatile

Get EP4_OUT_CONTROL’s ENDPOINT_TYPE field.

inline void set_EP4_OUT_CONTROL_ENDPOINT_TYPE(USBCTRL_DPRAM_EP4_OUT_CONTROL_ENDPOINT_TYPE value) volatile

Set EP4_OUT_CONTROL’s ENDPOINT_TYPE field.

inline bool get_EP4_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Get EP4_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void set_EP4_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Set EP4_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void clear_EP4_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Clear EP4_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void toggle_EP4_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Toggle EP4_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline bool get_EP4_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Get EP4_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void set_EP4_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Set EP4_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void clear_EP4_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Clear EP4_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void toggle_EP4_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Toggle EP4_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline bool get_EP4_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Get EP4_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void set_EP4_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Set EP4_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void clear_EP4_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Clear EP4_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void toggle_EP4_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Toggle EP4_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline bool get_EP4_OUT_CONTROL_ENABLE() volatile

Get EP4_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void set_EP4_OUT_CONTROL_ENABLE() volatile

Set EP4_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void clear_EP4_OUT_CONTROL_ENABLE() volatile

Clear EP4_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void toggle_EP4_OUT_CONTROL_ENABLE() volatile

Toggle EP4_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void get_EP4_OUT_CONTROL(uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK, bool &INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP4_OUT_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE, bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF, bool &DOUBLE_BUFFERED, bool &ENABLE) volatile

Get all of EP4_OUT_CONTROL’s bit fields.

inline void set_EP4_OUT_CONTROL(uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK, bool INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP4_OUT_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE, bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF, bool DOUBLE_BUFFERED, bool ENABLE) volatile

Set all of EP4_OUT_CONTROL’s bit fields.

inline uint16_t get_EP5_IN_CONTROL_BUFFER_ADDRESS() volatile

Get EP5_IN_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline void set_EP5_IN_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile

Set EP5_IN_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline bool get_EP5_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Get EP5_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void set_EP5_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Set EP5_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void clear_EP5_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Clear EP5_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void toggle_EP5_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Toggle EP5_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline bool get_EP5_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Get EP5_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void set_EP5_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Set EP5_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void clear_EP5_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Clear EP5_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void toggle_EP5_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Toggle EP5_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline USBCTRL_DPRAM_EP5_IN_CONTROL_ENDPOINT_TYPE get_EP5_IN_CONTROL_ENDPOINT_TYPE() volatile

Get EP5_IN_CONTROL’s ENDPOINT_TYPE field.

inline void set_EP5_IN_CONTROL_ENDPOINT_TYPE(USBCTRL_DPRAM_EP5_IN_CONTROL_ENDPOINT_TYPE value) volatile

Set EP5_IN_CONTROL’s ENDPOINT_TYPE field.

inline bool get_EP5_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Get EP5_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void set_EP5_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Set EP5_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void clear_EP5_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Clear EP5_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void toggle_EP5_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Toggle EP5_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline bool get_EP5_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Get EP5_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void set_EP5_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Set EP5_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void clear_EP5_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Clear EP5_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void toggle_EP5_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Toggle EP5_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline bool get_EP5_IN_CONTROL_DOUBLE_BUFFERED() volatile

Get EP5_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void set_EP5_IN_CONTROL_DOUBLE_BUFFERED() volatile

Set EP5_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void clear_EP5_IN_CONTROL_DOUBLE_BUFFERED() volatile

Clear EP5_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void toggle_EP5_IN_CONTROL_DOUBLE_BUFFERED() volatile

Toggle EP5_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline bool get_EP5_IN_CONTROL_ENABLE() volatile

Get EP5_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void set_EP5_IN_CONTROL_ENABLE() volatile

Set EP5_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void clear_EP5_IN_CONTROL_ENABLE() volatile

Clear EP5_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void toggle_EP5_IN_CONTROL_ENABLE() volatile

Toggle EP5_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void get_EP5_IN_CONTROL(uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK, bool &INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP5_IN_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE, bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF, bool &DOUBLE_BUFFERED, bool &ENABLE) volatile

Get all of EP5_IN_CONTROL’s bit fields.

inline void set_EP5_IN_CONTROL(uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK, bool INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP5_IN_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE, bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF, bool DOUBLE_BUFFERED, bool ENABLE) volatile

Set all of EP5_IN_CONTROL’s bit fields.

inline uint16_t get_EP5_OUT_CONTROL_BUFFER_ADDRESS() volatile

Get EP5_OUT_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline void set_EP5_OUT_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile

Set EP5_OUT_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline bool get_EP5_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Get EP5_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void set_EP5_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Set EP5_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void clear_EP5_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Clear EP5_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void toggle_EP5_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Toggle EP5_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline bool get_EP5_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Get EP5_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void set_EP5_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Set EP5_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void clear_EP5_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Clear EP5_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void toggle_EP5_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Toggle EP5_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline USBCTRL_DPRAM_EP5_OUT_CONTROL_ENDPOINT_TYPE get_EP5_OUT_CONTROL_ENDPOINT_TYPE() volatile

Get EP5_OUT_CONTROL’s ENDPOINT_TYPE field.

inline void set_EP5_OUT_CONTROL_ENDPOINT_TYPE(USBCTRL_DPRAM_EP5_OUT_CONTROL_ENDPOINT_TYPE value) volatile

Set EP5_OUT_CONTROL’s ENDPOINT_TYPE field.

inline bool get_EP5_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Get EP5_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void set_EP5_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Set EP5_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void clear_EP5_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Clear EP5_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void toggle_EP5_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Toggle EP5_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline bool get_EP5_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Get EP5_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void set_EP5_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Set EP5_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void clear_EP5_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Clear EP5_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void toggle_EP5_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Toggle EP5_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline bool get_EP5_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Get EP5_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void set_EP5_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Set EP5_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void clear_EP5_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Clear EP5_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void toggle_EP5_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Toggle EP5_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline bool get_EP5_OUT_CONTROL_ENABLE() volatile

Get EP5_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void set_EP5_OUT_CONTROL_ENABLE() volatile

Set EP5_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void clear_EP5_OUT_CONTROL_ENABLE() volatile

Clear EP5_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void toggle_EP5_OUT_CONTROL_ENABLE() volatile

Toggle EP5_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void get_EP5_OUT_CONTROL(uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK, bool &INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP5_OUT_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE, bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF, bool &DOUBLE_BUFFERED, bool &ENABLE) volatile

Get all of EP5_OUT_CONTROL’s bit fields.

inline void set_EP5_OUT_CONTROL(uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK, bool INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP5_OUT_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE, bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF, bool DOUBLE_BUFFERED, bool ENABLE) volatile

Set all of EP5_OUT_CONTROL’s bit fields.

inline uint16_t get_EP6_IN_CONTROL_BUFFER_ADDRESS() volatile

Get EP6_IN_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline void set_EP6_IN_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile

Set EP6_IN_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline bool get_EP6_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Get EP6_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void set_EP6_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Set EP6_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void clear_EP6_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Clear EP6_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void toggle_EP6_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Toggle EP6_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline bool get_EP6_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Get EP6_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void set_EP6_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Set EP6_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void clear_EP6_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Clear EP6_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void toggle_EP6_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Toggle EP6_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline USBCTRL_DPRAM_EP6_IN_CONTROL_ENDPOINT_TYPE get_EP6_IN_CONTROL_ENDPOINT_TYPE() volatile

Get EP6_IN_CONTROL’s ENDPOINT_TYPE field.

inline void set_EP6_IN_CONTROL_ENDPOINT_TYPE(USBCTRL_DPRAM_EP6_IN_CONTROL_ENDPOINT_TYPE value) volatile

Set EP6_IN_CONTROL’s ENDPOINT_TYPE field.

inline bool get_EP6_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Get EP6_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void set_EP6_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Set EP6_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void clear_EP6_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Clear EP6_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void toggle_EP6_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Toggle EP6_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline bool get_EP6_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Get EP6_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void set_EP6_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Set EP6_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void clear_EP6_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Clear EP6_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void toggle_EP6_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Toggle EP6_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline bool get_EP6_IN_CONTROL_DOUBLE_BUFFERED() volatile

Get EP6_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void set_EP6_IN_CONTROL_DOUBLE_BUFFERED() volatile

Set EP6_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void clear_EP6_IN_CONTROL_DOUBLE_BUFFERED() volatile

Clear EP6_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void toggle_EP6_IN_CONTROL_DOUBLE_BUFFERED() volatile

Toggle EP6_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline bool get_EP6_IN_CONTROL_ENABLE() volatile

Get EP6_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void set_EP6_IN_CONTROL_ENABLE() volatile

Set EP6_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void clear_EP6_IN_CONTROL_ENABLE() volatile

Clear EP6_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void toggle_EP6_IN_CONTROL_ENABLE() volatile

Toggle EP6_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void get_EP6_IN_CONTROL(uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK, bool &INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP6_IN_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE, bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF, bool &DOUBLE_BUFFERED, bool &ENABLE) volatile

Get all of EP6_IN_CONTROL’s bit fields.

inline void set_EP6_IN_CONTROL(uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK, bool INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP6_IN_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE, bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF, bool DOUBLE_BUFFERED, bool ENABLE) volatile

Set all of EP6_IN_CONTROL’s bit fields.

inline uint16_t get_EP6_OUT_CONTROL_BUFFER_ADDRESS() volatile

Get EP6_OUT_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline void set_EP6_OUT_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile

Set EP6_OUT_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline bool get_EP6_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Get EP6_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void set_EP6_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Set EP6_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void clear_EP6_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Clear EP6_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void toggle_EP6_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Toggle EP6_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline bool get_EP6_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Get EP6_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void set_EP6_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Set EP6_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void clear_EP6_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Clear EP6_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void toggle_EP6_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Toggle EP6_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline USBCTRL_DPRAM_EP6_OUT_CONTROL_ENDPOINT_TYPE get_EP6_OUT_CONTROL_ENDPOINT_TYPE() volatile

Get EP6_OUT_CONTROL’s ENDPOINT_TYPE field.

inline void set_EP6_OUT_CONTROL_ENDPOINT_TYPE(USBCTRL_DPRAM_EP6_OUT_CONTROL_ENDPOINT_TYPE value) volatile

Set EP6_OUT_CONTROL’s ENDPOINT_TYPE field.

inline bool get_EP6_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Get EP6_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void set_EP6_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Set EP6_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void clear_EP6_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Clear EP6_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void toggle_EP6_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Toggle EP6_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline bool get_EP6_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Get EP6_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void set_EP6_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Set EP6_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void clear_EP6_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Clear EP6_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void toggle_EP6_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Toggle EP6_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline bool get_EP6_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Get EP6_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void set_EP6_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Set EP6_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void clear_EP6_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Clear EP6_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void toggle_EP6_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Toggle EP6_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline bool get_EP6_OUT_CONTROL_ENABLE() volatile

Get EP6_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void set_EP6_OUT_CONTROL_ENABLE() volatile

Set EP6_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void clear_EP6_OUT_CONTROL_ENABLE() volatile

Clear EP6_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void toggle_EP6_OUT_CONTROL_ENABLE() volatile

Toggle EP6_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void get_EP6_OUT_CONTROL(uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK, bool &INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP6_OUT_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE, bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF, bool &DOUBLE_BUFFERED, bool &ENABLE) volatile

Get all of EP6_OUT_CONTROL’s bit fields.

inline void set_EP6_OUT_CONTROL(uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK, bool INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP6_OUT_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE, bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF, bool DOUBLE_BUFFERED, bool ENABLE) volatile

Set all of EP6_OUT_CONTROL’s bit fields.

inline uint16_t get_EP7_IN_CONTROL_BUFFER_ADDRESS() volatile

Get EP7_IN_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline void set_EP7_IN_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile

Set EP7_IN_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline bool get_EP7_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Get EP7_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void set_EP7_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Set EP7_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void clear_EP7_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Clear EP7_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void toggle_EP7_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Toggle EP7_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline bool get_EP7_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Get EP7_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void set_EP7_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Set EP7_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void clear_EP7_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Clear EP7_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void toggle_EP7_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Toggle EP7_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline USBCTRL_DPRAM_EP7_IN_CONTROL_ENDPOINT_TYPE get_EP7_IN_CONTROL_ENDPOINT_TYPE() volatile

Get EP7_IN_CONTROL’s ENDPOINT_TYPE field.

inline void set_EP7_IN_CONTROL_ENDPOINT_TYPE(USBCTRL_DPRAM_EP7_IN_CONTROL_ENDPOINT_TYPE value) volatile

Set EP7_IN_CONTROL’s ENDPOINT_TYPE field.

inline bool get_EP7_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Get EP7_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void set_EP7_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Set EP7_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void clear_EP7_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Clear EP7_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void toggle_EP7_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Toggle EP7_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline bool get_EP7_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Get EP7_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void set_EP7_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Set EP7_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void clear_EP7_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Clear EP7_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void toggle_EP7_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Toggle EP7_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline bool get_EP7_IN_CONTROL_DOUBLE_BUFFERED() volatile

Get EP7_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void set_EP7_IN_CONTROL_DOUBLE_BUFFERED() volatile

Set EP7_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void clear_EP7_IN_CONTROL_DOUBLE_BUFFERED() volatile

Clear EP7_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void toggle_EP7_IN_CONTROL_DOUBLE_BUFFERED() volatile

Toggle EP7_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline bool get_EP7_IN_CONTROL_ENABLE() volatile

Get EP7_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void set_EP7_IN_CONTROL_ENABLE() volatile

Set EP7_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void clear_EP7_IN_CONTROL_ENABLE() volatile

Clear EP7_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void toggle_EP7_IN_CONTROL_ENABLE() volatile

Toggle EP7_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void get_EP7_IN_CONTROL(uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK, bool &INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP7_IN_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE, bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF, bool &DOUBLE_BUFFERED, bool &ENABLE) volatile

Get all of EP7_IN_CONTROL’s bit fields.

inline void set_EP7_IN_CONTROL(uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK, bool INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP7_IN_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE, bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF, bool DOUBLE_BUFFERED, bool ENABLE) volatile

Set all of EP7_IN_CONTROL’s bit fields.

inline uint16_t get_EP7_OUT_CONTROL_BUFFER_ADDRESS() volatile

Get EP7_OUT_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline void set_EP7_OUT_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile

Set EP7_OUT_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline bool get_EP7_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Get EP7_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void set_EP7_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Set EP7_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void clear_EP7_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Clear EP7_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void toggle_EP7_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Toggle EP7_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline bool get_EP7_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Get EP7_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void set_EP7_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Set EP7_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void clear_EP7_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Clear EP7_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void toggle_EP7_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Toggle EP7_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline USBCTRL_DPRAM_EP7_OUT_CONTROL_ENDPOINT_TYPE get_EP7_OUT_CONTROL_ENDPOINT_TYPE() volatile

Get EP7_OUT_CONTROL’s ENDPOINT_TYPE field.

inline void set_EP7_OUT_CONTROL_ENDPOINT_TYPE(USBCTRL_DPRAM_EP7_OUT_CONTROL_ENDPOINT_TYPE value) volatile

Set EP7_OUT_CONTROL’s ENDPOINT_TYPE field.

inline bool get_EP7_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Get EP7_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void set_EP7_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Set EP7_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void clear_EP7_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Clear EP7_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void toggle_EP7_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Toggle EP7_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline bool get_EP7_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Get EP7_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void set_EP7_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Set EP7_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void clear_EP7_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Clear EP7_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void toggle_EP7_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Toggle EP7_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline bool get_EP7_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Get EP7_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void set_EP7_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Set EP7_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void clear_EP7_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Clear EP7_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void toggle_EP7_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Toggle EP7_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline bool get_EP7_OUT_CONTROL_ENABLE() volatile

Get EP7_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void set_EP7_OUT_CONTROL_ENABLE() volatile

Set EP7_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void clear_EP7_OUT_CONTROL_ENABLE() volatile

Clear EP7_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void toggle_EP7_OUT_CONTROL_ENABLE() volatile

Toggle EP7_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void get_EP7_OUT_CONTROL(uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK, bool &INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP7_OUT_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE, bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF, bool &DOUBLE_BUFFERED, bool &ENABLE) volatile

Get all of EP7_OUT_CONTROL’s bit fields.

inline void set_EP7_OUT_CONTROL(uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK, bool INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP7_OUT_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE, bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF, bool DOUBLE_BUFFERED, bool ENABLE) volatile

Set all of EP7_OUT_CONTROL’s bit fields.

inline uint16_t get_EP8_IN_CONTROL_BUFFER_ADDRESS() volatile

Get EP8_IN_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline void set_EP8_IN_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile

Set EP8_IN_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline bool get_EP8_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Get EP8_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void set_EP8_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Set EP8_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void clear_EP8_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Clear EP8_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void toggle_EP8_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Toggle EP8_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline bool get_EP8_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Get EP8_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void set_EP8_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Set EP8_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void clear_EP8_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Clear EP8_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void toggle_EP8_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Toggle EP8_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline USBCTRL_DPRAM_EP8_IN_CONTROL_ENDPOINT_TYPE get_EP8_IN_CONTROL_ENDPOINT_TYPE() volatile

Get EP8_IN_CONTROL’s ENDPOINT_TYPE field.

inline void set_EP8_IN_CONTROL_ENDPOINT_TYPE(USBCTRL_DPRAM_EP8_IN_CONTROL_ENDPOINT_TYPE value) volatile

Set EP8_IN_CONTROL’s ENDPOINT_TYPE field.

inline bool get_EP8_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Get EP8_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void set_EP8_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Set EP8_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void clear_EP8_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Clear EP8_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void toggle_EP8_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Toggle EP8_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline bool get_EP8_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Get EP8_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void set_EP8_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Set EP8_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void clear_EP8_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Clear EP8_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void toggle_EP8_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Toggle EP8_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline bool get_EP8_IN_CONTROL_DOUBLE_BUFFERED() volatile

Get EP8_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void set_EP8_IN_CONTROL_DOUBLE_BUFFERED() volatile

Set EP8_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void clear_EP8_IN_CONTROL_DOUBLE_BUFFERED() volatile

Clear EP8_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void toggle_EP8_IN_CONTROL_DOUBLE_BUFFERED() volatile

Toggle EP8_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline bool get_EP8_IN_CONTROL_ENABLE() volatile

Get EP8_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void set_EP8_IN_CONTROL_ENABLE() volatile

Set EP8_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void clear_EP8_IN_CONTROL_ENABLE() volatile

Clear EP8_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void toggle_EP8_IN_CONTROL_ENABLE() volatile

Toggle EP8_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void get_EP8_IN_CONTROL(uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK, bool &INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP8_IN_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE, bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF, bool &DOUBLE_BUFFERED, bool &ENABLE) volatile

Get all of EP8_IN_CONTROL’s bit fields.

inline void set_EP8_IN_CONTROL(uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK, bool INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP8_IN_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE, bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF, bool DOUBLE_BUFFERED, bool ENABLE) volatile

Set all of EP8_IN_CONTROL’s bit fields.

inline uint16_t get_EP8_OUT_CONTROL_BUFFER_ADDRESS() volatile

Get EP8_OUT_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline void set_EP8_OUT_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile

Set EP8_OUT_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline bool get_EP8_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Get EP8_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void set_EP8_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Set EP8_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void clear_EP8_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Clear EP8_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void toggle_EP8_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Toggle EP8_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline bool get_EP8_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Get EP8_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void set_EP8_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Set EP8_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void clear_EP8_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Clear EP8_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void toggle_EP8_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Toggle EP8_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline USBCTRL_DPRAM_EP8_OUT_CONTROL_ENDPOINT_TYPE get_EP8_OUT_CONTROL_ENDPOINT_TYPE() volatile

Get EP8_OUT_CONTROL’s ENDPOINT_TYPE field.

inline void set_EP8_OUT_CONTROL_ENDPOINT_TYPE(USBCTRL_DPRAM_EP8_OUT_CONTROL_ENDPOINT_TYPE value) volatile

Set EP8_OUT_CONTROL’s ENDPOINT_TYPE field.

inline bool get_EP8_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Get EP8_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void set_EP8_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Set EP8_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void clear_EP8_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Clear EP8_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void toggle_EP8_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Toggle EP8_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline bool get_EP8_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Get EP8_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void set_EP8_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Set EP8_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void clear_EP8_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Clear EP8_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void toggle_EP8_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Toggle EP8_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline bool get_EP8_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Get EP8_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void set_EP8_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Set EP8_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void clear_EP8_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Clear EP8_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void toggle_EP8_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Toggle EP8_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline bool get_EP8_OUT_CONTROL_ENABLE() volatile

Get EP8_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void set_EP8_OUT_CONTROL_ENABLE() volatile

Set EP8_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void clear_EP8_OUT_CONTROL_ENABLE() volatile

Clear EP8_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void toggle_EP8_OUT_CONTROL_ENABLE() volatile

Toggle EP8_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void get_EP8_OUT_CONTROL(uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK, bool &INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP8_OUT_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE, bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF, bool &DOUBLE_BUFFERED, bool &ENABLE) volatile

Get all of EP8_OUT_CONTROL’s bit fields.

inline void set_EP8_OUT_CONTROL(uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK, bool INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP8_OUT_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE, bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF, bool DOUBLE_BUFFERED, bool ENABLE) volatile

Set all of EP8_OUT_CONTROL’s bit fields.

inline uint16_t get_EP9_IN_CONTROL_BUFFER_ADDRESS() volatile

Get EP9_IN_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline void set_EP9_IN_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile

Set EP9_IN_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline bool get_EP9_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Get EP9_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void set_EP9_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Set EP9_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void clear_EP9_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Clear EP9_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void toggle_EP9_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Toggle EP9_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline bool get_EP9_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Get EP9_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void set_EP9_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Set EP9_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void clear_EP9_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Clear EP9_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void toggle_EP9_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Toggle EP9_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline USBCTRL_DPRAM_EP9_IN_CONTROL_ENDPOINT_TYPE get_EP9_IN_CONTROL_ENDPOINT_TYPE() volatile

Get EP9_IN_CONTROL’s ENDPOINT_TYPE field.

inline void set_EP9_IN_CONTROL_ENDPOINT_TYPE(USBCTRL_DPRAM_EP9_IN_CONTROL_ENDPOINT_TYPE value) volatile

Set EP9_IN_CONTROL’s ENDPOINT_TYPE field.

inline bool get_EP9_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Get EP9_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void set_EP9_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Set EP9_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void clear_EP9_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Clear EP9_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void toggle_EP9_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Toggle EP9_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline bool get_EP9_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Get EP9_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void set_EP9_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Set EP9_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void clear_EP9_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Clear EP9_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void toggle_EP9_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Toggle EP9_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline bool get_EP9_IN_CONTROL_DOUBLE_BUFFERED() volatile

Get EP9_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void set_EP9_IN_CONTROL_DOUBLE_BUFFERED() volatile

Set EP9_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void clear_EP9_IN_CONTROL_DOUBLE_BUFFERED() volatile

Clear EP9_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void toggle_EP9_IN_CONTROL_DOUBLE_BUFFERED() volatile

Toggle EP9_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline bool get_EP9_IN_CONTROL_ENABLE() volatile

Get EP9_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void set_EP9_IN_CONTROL_ENABLE() volatile

Set EP9_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void clear_EP9_IN_CONTROL_ENABLE() volatile

Clear EP9_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void toggle_EP9_IN_CONTROL_ENABLE() volatile

Toggle EP9_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void get_EP9_IN_CONTROL(uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK, bool &INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP9_IN_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE, bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF, bool &DOUBLE_BUFFERED, bool &ENABLE) volatile

Get all of EP9_IN_CONTROL’s bit fields.

inline void set_EP9_IN_CONTROL(uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK, bool INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP9_IN_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE, bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF, bool DOUBLE_BUFFERED, bool ENABLE) volatile

Set all of EP9_IN_CONTROL’s bit fields.

inline uint16_t get_EP9_OUT_CONTROL_BUFFER_ADDRESS() volatile

Get EP9_OUT_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline void set_EP9_OUT_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile

Set EP9_OUT_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline bool get_EP9_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Get EP9_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void set_EP9_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Set EP9_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void clear_EP9_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Clear EP9_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void toggle_EP9_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Toggle EP9_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline bool get_EP9_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Get EP9_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void set_EP9_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Set EP9_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void clear_EP9_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Clear EP9_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void toggle_EP9_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Toggle EP9_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline USBCTRL_DPRAM_EP9_OUT_CONTROL_ENDPOINT_TYPE get_EP9_OUT_CONTROL_ENDPOINT_TYPE() volatile

Get EP9_OUT_CONTROL’s ENDPOINT_TYPE field.

inline void set_EP9_OUT_CONTROL_ENDPOINT_TYPE(USBCTRL_DPRAM_EP9_OUT_CONTROL_ENDPOINT_TYPE value) volatile

Set EP9_OUT_CONTROL’s ENDPOINT_TYPE field.

inline bool get_EP9_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Get EP9_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void set_EP9_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Set EP9_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void clear_EP9_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Clear EP9_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void toggle_EP9_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Toggle EP9_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline bool get_EP9_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Get EP9_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void set_EP9_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Set EP9_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void clear_EP9_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Clear EP9_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void toggle_EP9_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Toggle EP9_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline bool get_EP9_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Get EP9_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void set_EP9_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Set EP9_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void clear_EP9_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Clear EP9_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void toggle_EP9_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Toggle EP9_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline bool get_EP9_OUT_CONTROL_ENABLE() volatile

Get EP9_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void set_EP9_OUT_CONTROL_ENABLE() volatile

Set EP9_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void clear_EP9_OUT_CONTROL_ENABLE() volatile

Clear EP9_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void toggle_EP9_OUT_CONTROL_ENABLE() volatile

Toggle EP9_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void get_EP9_OUT_CONTROL(uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK, bool &INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP9_OUT_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE, bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF, bool &DOUBLE_BUFFERED, bool &ENABLE) volatile

Get all of EP9_OUT_CONTROL’s bit fields.

inline void set_EP9_OUT_CONTROL(uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK, bool INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP9_OUT_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE, bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF, bool DOUBLE_BUFFERED, bool ENABLE) volatile

Set all of EP9_OUT_CONTROL’s bit fields.

inline uint16_t get_EP10_IN_CONTROL_BUFFER_ADDRESS() volatile

Get EP10_IN_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline void set_EP10_IN_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile

Set EP10_IN_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline bool get_EP10_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Get EP10_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void set_EP10_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Set EP10_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void clear_EP10_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Clear EP10_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void toggle_EP10_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Toggle EP10_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline bool get_EP10_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Get EP10_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void set_EP10_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Set EP10_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void clear_EP10_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Clear EP10_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void toggle_EP10_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Toggle EP10_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline USBCTRL_DPRAM_EP10_IN_CONTROL_ENDPOINT_TYPE get_EP10_IN_CONTROL_ENDPOINT_TYPE() volatile

Get EP10_IN_CONTROL’s ENDPOINT_TYPE field.

inline void set_EP10_IN_CONTROL_ENDPOINT_TYPE(USBCTRL_DPRAM_EP10_IN_CONTROL_ENDPOINT_TYPE value) volatile

Set EP10_IN_CONTROL’s ENDPOINT_TYPE field.

inline bool get_EP10_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Get EP10_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void set_EP10_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Set EP10_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void clear_EP10_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Clear EP10_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void toggle_EP10_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Toggle EP10_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline bool get_EP10_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Get EP10_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void set_EP10_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Set EP10_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void clear_EP10_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Clear EP10_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void toggle_EP10_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Toggle EP10_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline bool get_EP10_IN_CONTROL_DOUBLE_BUFFERED() volatile

Get EP10_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void set_EP10_IN_CONTROL_DOUBLE_BUFFERED() volatile

Set EP10_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void clear_EP10_IN_CONTROL_DOUBLE_BUFFERED() volatile

Clear EP10_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void toggle_EP10_IN_CONTROL_DOUBLE_BUFFERED() volatile

Toggle EP10_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline bool get_EP10_IN_CONTROL_ENABLE() volatile

Get EP10_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void set_EP10_IN_CONTROL_ENABLE() volatile

Set EP10_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void clear_EP10_IN_CONTROL_ENABLE() volatile

Clear EP10_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void toggle_EP10_IN_CONTROL_ENABLE() volatile

Toggle EP10_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void get_EP10_IN_CONTROL(uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK, bool &INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP10_IN_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE, bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF, bool &DOUBLE_BUFFERED, bool &ENABLE) volatile

Get all of EP10_IN_CONTROL’s bit fields.

inline void set_EP10_IN_CONTROL(uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK, bool INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP10_IN_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE, bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF, bool DOUBLE_BUFFERED, bool ENABLE) volatile

Set all of EP10_IN_CONTROL’s bit fields.

inline uint16_t get_EP10_OUT_CONTROL_BUFFER_ADDRESS() volatile

Get EP10_OUT_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline void set_EP10_OUT_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile

Set EP10_OUT_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline bool get_EP10_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Get EP10_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void set_EP10_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Set EP10_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void clear_EP10_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Clear EP10_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void toggle_EP10_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Toggle EP10_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline bool get_EP10_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Get EP10_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void set_EP10_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Set EP10_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void clear_EP10_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Clear EP10_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void toggle_EP10_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Toggle EP10_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline USBCTRL_DPRAM_EP10_OUT_CONTROL_ENDPOINT_TYPE get_EP10_OUT_CONTROL_ENDPOINT_TYPE() volatile

Get EP10_OUT_CONTROL’s ENDPOINT_TYPE field.

inline void set_EP10_OUT_CONTROL_ENDPOINT_TYPE(USBCTRL_DPRAM_EP10_OUT_CONTROL_ENDPOINT_TYPE value) volatile

Set EP10_OUT_CONTROL’s ENDPOINT_TYPE field.

inline bool get_EP10_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Get EP10_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void set_EP10_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Set EP10_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void clear_EP10_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Clear EP10_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void toggle_EP10_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Toggle EP10_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline bool get_EP10_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Get EP10_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void set_EP10_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Set EP10_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void clear_EP10_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Clear EP10_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void toggle_EP10_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Toggle EP10_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline bool get_EP10_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Get EP10_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void set_EP10_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Set EP10_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void clear_EP10_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Clear EP10_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void toggle_EP10_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Toggle EP10_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline bool get_EP10_OUT_CONTROL_ENABLE() volatile

Get EP10_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void set_EP10_OUT_CONTROL_ENABLE() volatile

Set EP10_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void clear_EP10_OUT_CONTROL_ENABLE() volatile

Clear EP10_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void toggle_EP10_OUT_CONTROL_ENABLE() volatile

Toggle EP10_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void get_EP10_OUT_CONTROL(uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK, bool &INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP10_OUT_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE, bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF, bool &DOUBLE_BUFFERED, bool &ENABLE) volatile

Get all of EP10_OUT_CONTROL’s bit fields.

inline void set_EP10_OUT_CONTROL(uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK, bool INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP10_OUT_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE, bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF, bool DOUBLE_BUFFERED, bool ENABLE) volatile

Set all of EP10_OUT_CONTROL’s bit fields.

inline uint16_t get_EP11_IN_CONTROL_BUFFER_ADDRESS() volatile

Get EP11_IN_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline void set_EP11_IN_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile

Set EP11_IN_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline bool get_EP11_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Get EP11_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void set_EP11_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Set EP11_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void clear_EP11_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Clear EP11_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void toggle_EP11_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Toggle EP11_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline bool get_EP11_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Get EP11_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void set_EP11_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Set EP11_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void clear_EP11_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Clear EP11_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void toggle_EP11_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Toggle EP11_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline USBCTRL_DPRAM_EP11_IN_CONTROL_ENDPOINT_TYPE get_EP11_IN_CONTROL_ENDPOINT_TYPE() volatile

Get EP11_IN_CONTROL’s ENDPOINT_TYPE field.

inline void set_EP11_IN_CONTROL_ENDPOINT_TYPE(USBCTRL_DPRAM_EP11_IN_CONTROL_ENDPOINT_TYPE value) volatile

Set EP11_IN_CONTROL’s ENDPOINT_TYPE field.

inline bool get_EP11_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Get EP11_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void set_EP11_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Set EP11_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void clear_EP11_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Clear EP11_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void toggle_EP11_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Toggle EP11_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline bool get_EP11_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Get EP11_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void set_EP11_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Set EP11_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void clear_EP11_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Clear EP11_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void toggle_EP11_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Toggle EP11_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline bool get_EP11_IN_CONTROL_DOUBLE_BUFFERED() volatile

Get EP11_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void set_EP11_IN_CONTROL_DOUBLE_BUFFERED() volatile

Set EP11_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void clear_EP11_IN_CONTROL_DOUBLE_BUFFERED() volatile

Clear EP11_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void toggle_EP11_IN_CONTROL_DOUBLE_BUFFERED() volatile

Toggle EP11_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline bool get_EP11_IN_CONTROL_ENABLE() volatile

Get EP11_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void set_EP11_IN_CONTROL_ENABLE() volatile

Set EP11_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void clear_EP11_IN_CONTROL_ENABLE() volatile

Clear EP11_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void toggle_EP11_IN_CONTROL_ENABLE() volatile

Toggle EP11_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void get_EP11_IN_CONTROL(uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK, bool &INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP11_IN_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE, bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF, bool &DOUBLE_BUFFERED, bool &ENABLE) volatile

Get all of EP11_IN_CONTROL’s bit fields.

inline void set_EP11_IN_CONTROL(uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK, bool INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP11_IN_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE, bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF, bool DOUBLE_BUFFERED, bool ENABLE) volatile

Set all of EP11_IN_CONTROL’s bit fields.

inline uint16_t get_EP11_OUT_CONTROL_BUFFER_ADDRESS() volatile

Get EP11_OUT_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline void set_EP11_OUT_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile

Set EP11_OUT_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline bool get_EP11_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Get EP11_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void set_EP11_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Set EP11_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void clear_EP11_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Clear EP11_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void toggle_EP11_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Toggle EP11_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline bool get_EP11_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Get EP11_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void set_EP11_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Set EP11_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void clear_EP11_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Clear EP11_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void toggle_EP11_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Toggle EP11_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline USBCTRL_DPRAM_EP11_OUT_CONTROL_ENDPOINT_TYPE get_EP11_OUT_CONTROL_ENDPOINT_TYPE() volatile

Get EP11_OUT_CONTROL’s ENDPOINT_TYPE field.

inline void set_EP11_OUT_CONTROL_ENDPOINT_TYPE(USBCTRL_DPRAM_EP11_OUT_CONTROL_ENDPOINT_TYPE value) volatile

Set EP11_OUT_CONTROL’s ENDPOINT_TYPE field.

inline bool get_EP11_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Get EP11_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void set_EP11_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Set EP11_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void clear_EP11_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Clear EP11_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void toggle_EP11_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Toggle EP11_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline bool get_EP11_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Get EP11_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void set_EP11_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Set EP11_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void clear_EP11_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Clear EP11_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void toggle_EP11_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Toggle EP11_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline bool get_EP11_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Get EP11_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void set_EP11_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Set EP11_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void clear_EP11_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Clear EP11_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void toggle_EP11_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Toggle EP11_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline bool get_EP11_OUT_CONTROL_ENABLE() volatile

Get EP11_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void set_EP11_OUT_CONTROL_ENABLE() volatile

Set EP11_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void clear_EP11_OUT_CONTROL_ENABLE() volatile

Clear EP11_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void toggle_EP11_OUT_CONTROL_ENABLE() volatile

Toggle EP11_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void get_EP11_OUT_CONTROL(uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK, bool &INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP11_OUT_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE, bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF, bool &DOUBLE_BUFFERED, bool &ENABLE) volatile

Get all of EP11_OUT_CONTROL’s bit fields.

inline void set_EP11_OUT_CONTROL(uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK, bool INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP11_OUT_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE, bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF, bool DOUBLE_BUFFERED, bool ENABLE) volatile

Set all of EP11_OUT_CONTROL’s bit fields.

inline uint16_t get_EP12_IN_CONTROL_BUFFER_ADDRESS() volatile

Get EP12_IN_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline void set_EP12_IN_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile

Set EP12_IN_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline bool get_EP12_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Get EP12_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void set_EP12_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Set EP12_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void clear_EP12_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Clear EP12_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void toggle_EP12_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Toggle EP12_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline bool get_EP12_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Get EP12_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void set_EP12_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Set EP12_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void clear_EP12_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Clear EP12_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void toggle_EP12_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Toggle EP12_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline USBCTRL_DPRAM_EP12_IN_CONTROL_ENDPOINT_TYPE get_EP12_IN_CONTROL_ENDPOINT_TYPE() volatile

Get EP12_IN_CONTROL’s ENDPOINT_TYPE field.

inline void set_EP12_IN_CONTROL_ENDPOINT_TYPE(USBCTRL_DPRAM_EP12_IN_CONTROL_ENDPOINT_TYPE value) volatile

Set EP12_IN_CONTROL’s ENDPOINT_TYPE field.

inline bool get_EP12_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Get EP12_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void set_EP12_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Set EP12_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void clear_EP12_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Clear EP12_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void toggle_EP12_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Toggle EP12_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline bool get_EP12_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Get EP12_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void set_EP12_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Set EP12_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void clear_EP12_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Clear EP12_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void toggle_EP12_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Toggle EP12_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline bool get_EP12_IN_CONTROL_DOUBLE_BUFFERED() volatile

Get EP12_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void set_EP12_IN_CONTROL_DOUBLE_BUFFERED() volatile

Set EP12_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void clear_EP12_IN_CONTROL_DOUBLE_BUFFERED() volatile

Clear EP12_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void toggle_EP12_IN_CONTROL_DOUBLE_BUFFERED() volatile

Toggle EP12_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline bool get_EP12_IN_CONTROL_ENABLE() volatile

Get EP12_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void set_EP12_IN_CONTROL_ENABLE() volatile

Set EP12_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void clear_EP12_IN_CONTROL_ENABLE() volatile

Clear EP12_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void toggle_EP12_IN_CONTROL_ENABLE() volatile

Toggle EP12_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void get_EP12_IN_CONTROL(uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK, bool &INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP12_IN_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE, bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF, bool &DOUBLE_BUFFERED, bool &ENABLE) volatile

Get all of EP12_IN_CONTROL’s bit fields.

inline void set_EP12_IN_CONTROL(uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK, bool INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP12_IN_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE, bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF, bool DOUBLE_BUFFERED, bool ENABLE) volatile

Set all of EP12_IN_CONTROL’s bit fields.

inline uint16_t get_EP12_OUT_CONTROL_BUFFER_ADDRESS() volatile

Get EP12_OUT_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline void set_EP12_OUT_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile

Set EP12_OUT_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline bool get_EP12_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Get EP12_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void set_EP12_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Set EP12_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void clear_EP12_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Clear EP12_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void toggle_EP12_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Toggle EP12_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline bool get_EP12_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Get EP12_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void set_EP12_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Set EP12_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void clear_EP12_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Clear EP12_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void toggle_EP12_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Toggle EP12_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline USBCTRL_DPRAM_EP12_OUT_CONTROL_ENDPOINT_TYPE get_EP12_OUT_CONTROL_ENDPOINT_TYPE() volatile

Get EP12_OUT_CONTROL’s ENDPOINT_TYPE field.

inline void set_EP12_OUT_CONTROL_ENDPOINT_TYPE(USBCTRL_DPRAM_EP12_OUT_CONTROL_ENDPOINT_TYPE value) volatile

Set EP12_OUT_CONTROL’s ENDPOINT_TYPE field.

inline bool get_EP12_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Get EP12_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void set_EP12_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Set EP12_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void clear_EP12_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Clear EP12_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void toggle_EP12_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Toggle EP12_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline bool get_EP12_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Get EP12_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void set_EP12_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Set EP12_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void clear_EP12_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Clear EP12_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void toggle_EP12_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Toggle EP12_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline bool get_EP12_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Get EP12_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void set_EP12_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Set EP12_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void clear_EP12_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Clear EP12_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void toggle_EP12_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Toggle EP12_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline bool get_EP12_OUT_CONTROL_ENABLE() volatile

Get EP12_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void set_EP12_OUT_CONTROL_ENABLE() volatile

Set EP12_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void clear_EP12_OUT_CONTROL_ENABLE() volatile

Clear EP12_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void toggle_EP12_OUT_CONTROL_ENABLE() volatile

Toggle EP12_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void get_EP12_OUT_CONTROL(uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK, bool &INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP12_OUT_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE, bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF, bool &DOUBLE_BUFFERED, bool &ENABLE) volatile

Get all of EP12_OUT_CONTROL’s bit fields.

inline void set_EP12_OUT_CONTROL(uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK, bool INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP12_OUT_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE, bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF, bool DOUBLE_BUFFERED, bool ENABLE) volatile

Set all of EP12_OUT_CONTROL’s bit fields.

inline uint16_t get_EP13_IN_CONTROL_BUFFER_ADDRESS() volatile

Get EP13_IN_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline void set_EP13_IN_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile

Set EP13_IN_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline bool get_EP13_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Get EP13_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void set_EP13_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Set EP13_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void clear_EP13_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Clear EP13_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void toggle_EP13_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Toggle EP13_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline bool get_EP13_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Get EP13_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void set_EP13_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Set EP13_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void clear_EP13_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Clear EP13_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void toggle_EP13_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Toggle EP13_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline USBCTRL_DPRAM_EP13_IN_CONTROL_ENDPOINT_TYPE get_EP13_IN_CONTROL_ENDPOINT_TYPE() volatile

Get EP13_IN_CONTROL’s ENDPOINT_TYPE field.

inline void set_EP13_IN_CONTROL_ENDPOINT_TYPE(USBCTRL_DPRAM_EP13_IN_CONTROL_ENDPOINT_TYPE value) volatile

Set EP13_IN_CONTROL’s ENDPOINT_TYPE field.

inline bool get_EP13_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Get EP13_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void set_EP13_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Set EP13_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void clear_EP13_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Clear EP13_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void toggle_EP13_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Toggle EP13_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline bool get_EP13_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Get EP13_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void set_EP13_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Set EP13_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void clear_EP13_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Clear EP13_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void toggle_EP13_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Toggle EP13_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline bool get_EP13_IN_CONTROL_DOUBLE_BUFFERED() volatile

Get EP13_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void set_EP13_IN_CONTROL_DOUBLE_BUFFERED() volatile

Set EP13_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void clear_EP13_IN_CONTROL_DOUBLE_BUFFERED() volatile

Clear EP13_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void toggle_EP13_IN_CONTROL_DOUBLE_BUFFERED() volatile

Toggle EP13_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline bool get_EP13_IN_CONTROL_ENABLE() volatile

Get EP13_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void set_EP13_IN_CONTROL_ENABLE() volatile

Set EP13_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void clear_EP13_IN_CONTROL_ENABLE() volatile

Clear EP13_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void toggle_EP13_IN_CONTROL_ENABLE() volatile

Toggle EP13_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void get_EP13_IN_CONTROL(uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK, bool &INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP13_IN_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE, bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF, bool &DOUBLE_BUFFERED, bool &ENABLE) volatile

Get all of EP13_IN_CONTROL’s bit fields.

inline void set_EP13_IN_CONTROL(uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK, bool INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP13_IN_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE, bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF, bool DOUBLE_BUFFERED, bool ENABLE) volatile

Set all of EP13_IN_CONTROL’s bit fields.

inline uint16_t get_EP13_OUT_CONTROL_BUFFER_ADDRESS() volatile

Get EP13_OUT_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline void set_EP13_OUT_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile

Set EP13_OUT_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline bool get_EP13_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Get EP13_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void set_EP13_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Set EP13_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void clear_EP13_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Clear EP13_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void toggle_EP13_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Toggle EP13_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline bool get_EP13_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Get EP13_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void set_EP13_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Set EP13_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void clear_EP13_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Clear EP13_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void toggle_EP13_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Toggle EP13_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline USBCTRL_DPRAM_EP13_OUT_CONTROL_ENDPOINT_TYPE get_EP13_OUT_CONTROL_ENDPOINT_TYPE() volatile

Get EP13_OUT_CONTROL’s ENDPOINT_TYPE field.

inline void set_EP13_OUT_CONTROL_ENDPOINT_TYPE(USBCTRL_DPRAM_EP13_OUT_CONTROL_ENDPOINT_TYPE value) volatile

Set EP13_OUT_CONTROL’s ENDPOINT_TYPE field.

inline bool get_EP13_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Get EP13_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void set_EP13_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Set EP13_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void clear_EP13_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Clear EP13_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void toggle_EP13_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Toggle EP13_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline bool get_EP13_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Get EP13_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void set_EP13_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Set EP13_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void clear_EP13_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Clear EP13_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void toggle_EP13_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Toggle EP13_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline bool get_EP13_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Get EP13_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void set_EP13_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Set EP13_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void clear_EP13_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Clear EP13_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void toggle_EP13_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Toggle EP13_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline bool get_EP13_OUT_CONTROL_ENABLE() volatile

Get EP13_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void set_EP13_OUT_CONTROL_ENABLE() volatile

Set EP13_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void clear_EP13_OUT_CONTROL_ENABLE() volatile

Clear EP13_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void toggle_EP13_OUT_CONTROL_ENABLE() volatile

Toggle EP13_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void get_EP13_OUT_CONTROL(uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK, bool &INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP13_OUT_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE, bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF, bool &DOUBLE_BUFFERED, bool &ENABLE) volatile

Get all of EP13_OUT_CONTROL’s bit fields.

inline void set_EP13_OUT_CONTROL(uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK, bool INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP13_OUT_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE, bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF, bool DOUBLE_BUFFERED, bool ENABLE) volatile

Set all of EP13_OUT_CONTROL’s bit fields.

inline uint16_t get_EP14_IN_CONTROL_BUFFER_ADDRESS() volatile

Get EP14_IN_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline void set_EP14_IN_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile

Set EP14_IN_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline bool get_EP14_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Get EP14_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void set_EP14_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Set EP14_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void clear_EP14_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Clear EP14_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void toggle_EP14_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Toggle EP14_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline bool get_EP14_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Get EP14_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void set_EP14_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Set EP14_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void clear_EP14_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Clear EP14_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void toggle_EP14_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Toggle EP14_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline USBCTRL_DPRAM_EP14_IN_CONTROL_ENDPOINT_TYPE get_EP14_IN_CONTROL_ENDPOINT_TYPE() volatile

Get EP14_IN_CONTROL’s ENDPOINT_TYPE field.

inline void set_EP14_IN_CONTROL_ENDPOINT_TYPE(USBCTRL_DPRAM_EP14_IN_CONTROL_ENDPOINT_TYPE value) volatile

Set EP14_IN_CONTROL’s ENDPOINT_TYPE field.

inline bool get_EP14_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Get EP14_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void set_EP14_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Set EP14_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void clear_EP14_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Clear EP14_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void toggle_EP14_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Toggle EP14_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline bool get_EP14_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Get EP14_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void set_EP14_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Set EP14_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void clear_EP14_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Clear EP14_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void toggle_EP14_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Toggle EP14_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline bool get_EP14_IN_CONTROL_DOUBLE_BUFFERED() volatile

Get EP14_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void set_EP14_IN_CONTROL_DOUBLE_BUFFERED() volatile

Set EP14_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void clear_EP14_IN_CONTROL_DOUBLE_BUFFERED() volatile

Clear EP14_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void toggle_EP14_IN_CONTROL_DOUBLE_BUFFERED() volatile

Toggle EP14_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline bool get_EP14_IN_CONTROL_ENABLE() volatile

Get EP14_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void set_EP14_IN_CONTROL_ENABLE() volatile

Set EP14_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void clear_EP14_IN_CONTROL_ENABLE() volatile

Clear EP14_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void toggle_EP14_IN_CONTROL_ENABLE() volatile

Toggle EP14_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void get_EP14_IN_CONTROL(uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK, bool &INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP14_IN_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE, bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF, bool &DOUBLE_BUFFERED, bool &ENABLE) volatile

Get all of EP14_IN_CONTROL’s bit fields.

inline void set_EP14_IN_CONTROL(uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK, bool INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP14_IN_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE, bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF, bool DOUBLE_BUFFERED, bool ENABLE) volatile

Set all of EP14_IN_CONTROL’s bit fields.

inline uint16_t get_EP14_OUT_CONTROL_BUFFER_ADDRESS() volatile

Get EP14_OUT_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline void set_EP14_OUT_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile

Set EP14_OUT_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline bool get_EP14_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Get EP14_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void set_EP14_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Set EP14_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void clear_EP14_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Clear EP14_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void toggle_EP14_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Toggle EP14_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline bool get_EP14_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Get EP14_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void set_EP14_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Set EP14_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void clear_EP14_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Clear EP14_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void toggle_EP14_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Toggle EP14_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline USBCTRL_DPRAM_EP14_OUT_CONTROL_ENDPOINT_TYPE get_EP14_OUT_CONTROL_ENDPOINT_TYPE() volatile

Get EP14_OUT_CONTROL’s ENDPOINT_TYPE field.

inline void set_EP14_OUT_CONTROL_ENDPOINT_TYPE(USBCTRL_DPRAM_EP14_OUT_CONTROL_ENDPOINT_TYPE value) volatile

Set EP14_OUT_CONTROL’s ENDPOINT_TYPE field.

inline bool get_EP14_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Get EP14_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void set_EP14_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Set EP14_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void clear_EP14_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Clear EP14_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void toggle_EP14_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Toggle EP14_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline bool get_EP14_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Get EP14_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void set_EP14_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Set EP14_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void clear_EP14_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Clear EP14_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void toggle_EP14_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Toggle EP14_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline bool get_EP14_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Get EP14_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void set_EP14_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Set EP14_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void clear_EP14_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Clear EP14_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void toggle_EP14_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Toggle EP14_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline bool get_EP14_OUT_CONTROL_ENABLE() volatile

Get EP14_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void set_EP14_OUT_CONTROL_ENABLE() volatile

Set EP14_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void clear_EP14_OUT_CONTROL_ENABLE() volatile

Clear EP14_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void toggle_EP14_OUT_CONTROL_ENABLE() volatile

Toggle EP14_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void get_EP14_OUT_CONTROL(uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK, bool &INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP14_OUT_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE, bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF, bool &DOUBLE_BUFFERED, bool &ENABLE) volatile

Get all of EP14_OUT_CONTROL’s bit fields.

inline void set_EP14_OUT_CONTROL(uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK, bool INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP14_OUT_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE, bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF, bool DOUBLE_BUFFERED, bool ENABLE) volatile

Set all of EP14_OUT_CONTROL’s bit fields.

inline uint16_t get_EP15_IN_CONTROL_BUFFER_ADDRESS() volatile

Get EP15_IN_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline void set_EP15_IN_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile

Set EP15_IN_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline bool get_EP15_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Get EP15_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void set_EP15_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Set EP15_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void clear_EP15_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Clear EP15_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void toggle_EP15_IN_CONTROL_INTERRUPT_ON_NAK() volatile

Toggle EP15_IN_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline bool get_EP15_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Get EP15_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void set_EP15_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Set EP15_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void clear_EP15_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Clear EP15_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void toggle_EP15_IN_CONTROL_INTERRUPT_ON_STALL() volatile

Toggle EP15_IN_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline USBCTRL_DPRAM_EP15_IN_CONTROL_ENDPOINT_TYPE get_EP15_IN_CONTROL_ENDPOINT_TYPE() volatile

Get EP15_IN_CONTROL’s ENDPOINT_TYPE field.

inline void set_EP15_IN_CONTROL_ENDPOINT_TYPE(USBCTRL_DPRAM_EP15_IN_CONTROL_ENDPOINT_TYPE value) volatile

Set EP15_IN_CONTROL’s ENDPOINT_TYPE field.

inline bool get_EP15_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Get EP15_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void set_EP15_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Set EP15_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void clear_EP15_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Clear EP15_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void toggle_EP15_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Toggle EP15_IN_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline bool get_EP15_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Get EP15_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void set_EP15_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Set EP15_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void clear_EP15_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Clear EP15_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void toggle_EP15_IN_CONTROL_INTERRUPT_PER_BUFF() volatile

Toggle EP15_IN_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline bool get_EP15_IN_CONTROL_DOUBLE_BUFFERED() volatile

Get EP15_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void set_EP15_IN_CONTROL_DOUBLE_BUFFERED() volatile

Set EP15_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void clear_EP15_IN_CONTROL_DOUBLE_BUFFERED() volatile

Clear EP15_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void toggle_EP15_IN_CONTROL_DOUBLE_BUFFERED() volatile

Toggle EP15_IN_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline bool get_EP15_IN_CONTROL_ENABLE() volatile

Get EP15_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void set_EP15_IN_CONTROL_ENABLE() volatile

Set EP15_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void clear_EP15_IN_CONTROL_ENABLE() volatile

Clear EP15_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void toggle_EP15_IN_CONTROL_ENABLE() volatile

Toggle EP15_IN_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void get_EP15_IN_CONTROL(uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK, bool &INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP15_IN_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE, bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF, bool &DOUBLE_BUFFERED, bool &ENABLE) volatile

Get all of EP15_IN_CONTROL’s bit fields.

inline void set_EP15_IN_CONTROL(uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK, bool INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP15_IN_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE, bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF, bool DOUBLE_BUFFERED, bool ENABLE) volatile

Set all of EP15_IN_CONTROL’s bit fields.

inline uint16_t get_EP15_OUT_CONTROL_BUFFER_ADDRESS() volatile

Get EP15_OUT_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline void set_EP15_OUT_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile

Set EP15_OUT_CONTROL’s BUFFER_ADDRESS field.

64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.

inline bool get_EP15_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Get EP15_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void set_EP15_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Set EP15_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void clear_EP15_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Clear EP15_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline void toggle_EP15_OUT_CONTROL_INTERRUPT_ON_NAK() volatile

Toggle EP15_OUT_CONTROL’s INTERRUPT_ON_NAK bit.

Trigger an interrupt if a NAK is sent. Intended for debug only.

inline bool get_EP15_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Get EP15_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void set_EP15_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Set EP15_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void clear_EP15_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Clear EP15_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline void toggle_EP15_OUT_CONTROL_INTERRUPT_ON_STALL() volatile

Toggle EP15_OUT_CONTROL’s INTERRUPT_ON_STALL bit.

Trigger an interrupt if a STALL is sent. Intended for debug only.

inline USBCTRL_DPRAM_EP15_OUT_CONTROL_ENDPOINT_TYPE get_EP15_OUT_CONTROL_ENDPOINT_TYPE() volatile

Get EP15_OUT_CONTROL’s ENDPOINT_TYPE field.

inline void set_EP15_OUT_CONTROL_ENDPOINT_TYPE(USBCTRL_DPRAM_EP15_OUT_CONTROL_ENDPOINT_TYPE value) volatile

Set EP15_OUT_CONTROL’s ENDPOINT_TYPE field.

inline bool get_EP15_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Get EP15_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void set_EP15_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Set EP15_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void clear_EP15_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Clear EP15_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline void toggle_EP15_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile

Toggle EP15_OUT_CONTROL’s INTERRUPT_PER_DOUBLE_BUFF bit.

Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.

inline bool get_EP15_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Get EP15_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void set_EP15_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Set EP15_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void clear_EP15_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Clear EP15_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline void toggle_EP15_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile

Toggle EP15_OUT_CONTROL’s INTERRUPT_PER_BUFF bit.

Trigger an interrupt each time a buffer is done.

inline bool get_EP15_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Get EP15_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void set_EP15_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Set EP15_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void clear_EP15_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Clear EP15_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline void toggle_EP15_OUT_CONTROL_DOUBLE_BUFFERED() volatile

Toggle EP15_OUT_CONTROL’s DOUBLE_BUFFERED bit.

This endpoint is double buffered.

inline bool get_EP15_OUT_CONTROL_ENABLE() volatile

Get EP15_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void set_EP15_OUT_CONTROL_ENABLE() volatile

Set EP15_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void clear_EP15_OUT_CONTROL_ENABLE() volatile

Clear EP15_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void toggle_EP15_OUT_CONTROL_ENABLE() volatile

Toggle EP15_OUT_CONTROL’s ENABLE bit.

Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.

inline void get_EP15_OUT_CONTROL(uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK, bool &INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP15_OUT_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE, bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF, bool &DOUBLE_BUFFERED, bool &ENABLE) volatile

Get all of EP15_OUT_CONTROL’s bit fields.

inline void set_EP15_OUT_CONTROL(uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK, bool INTERRUPT_ON_STALL, USBCTRL_DPRAM_EP15_OUT_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE, bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF, bool DOUBLE_BUFFERED, bool ENABLE) volatile

Set all of EP15_OUT_CONTROL’s bit fields.

inline uint16_t get_EP0_IN_BUFFER_CONTROL_LENGTH_0() volatile

Get EP0_IN_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline void set_EP0_IN_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile

Set EP0_IN_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline bool get_EP0_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Get EP0_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP0_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Set EP0_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP0_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Clear EP0_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP0_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Toggle EP0_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline bool get_EP0_IN_BUFFER_CONTROL_STALL() volatile

Get EP0_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void set_EP0_IN_BUFFER_CONTROL_STALL() volatile

Set EP0_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void clear_EP0_IN_BUFFER_CONTROL_STALL() volatile

Clear EP0_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void toggle_EP0_IN_BUFFER_CONTROL_STALL() volatile

Toggle EP0_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline bool get_EP0_IN_BUFFER_CONTROL_RESET() volatile

Get EP0_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void set_EP0_IN_BUFFER_CONTROL_RESET() volatile

Set EP0_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void clear_EP0_IN_BUFFER_CONTROL_RESET() volatile

Clear EP0_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void toggle_EP0_IN_BUFFER_CONTROL_RESET() volatile

Toggle EP0_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline bool get_EP0_IN_BUFFER_CONTROL_PID_0() volatile

Get EP0_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void set_EP0_IN_BUFFER_CONTROL_PID_0() volatile

Set EP0_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void clear_EP0_IN_BUFFER_CONTROL_PID_0() volatile

Clear EP0_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void toggle_EP0_IN_BUFFER_CONTROL_PID_0() volatile

Toggle EP0_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline bool get_EP0_IN_BUFFER_CONTROL_LAST_0() volatile

Get EP0_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void set_EP0_IN_BUFFER_CONTROL_LAST_0() volatile

Set EP0_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void clear_EP0_IN_BUFFER_CONTROL_LAST_0() volatile

Clear EP0_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void toggle_EP0_IN_BUFFER_CONTROL_LAST_0() volatile

Toggle EP0_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline bool get_EP0_IN_BUFFER_CONTROL_FULL_0() volatile

Get EP0_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP0_IN_BUFFER_CONTROL_FULL_0() volatile

Set EP0_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP0_IN_BUFFER_CONTROL_FULL_0() volatile

Clear EP0_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP0_IN_BUFFER_CONTROL_FULL_0() volatile

Toggle EP0_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline uint16_t get_EP0_IN_BUFFER_CONTROL_LENGTH_1() volatile

Get EP0_IN_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline void set_EP0_IN_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile

Set EP0_IN_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline bool get_EP0_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Get EP0_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP0_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Set EP0_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP0_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Clear EP0_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP0_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Toggle EP0_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline USBCTRL_DPRAM_EP0_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET get_EP0_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile

Get EP0_IN_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline void set_EP0_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(USBCTRL_DPRAM_EP0_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET value) volatile

Set EP0_IN_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline bool get_EP0_IN_BUFFER_CONTROL_PID_1() volatile

Get EP0_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void set_EP0_IN_BUFFER_CONTROL_PID_1() volatile

Set EP0_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void clear_EP0_IN_BUFFER_CONTROL_PID_1() volatile

Clear EP0_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void toggle_EP0_IN_BUFFER_CONTROL_PID_1() volatile

Toggle EP0_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline bool get_EP0_IN_BUFFER_CONTROL_LAST_1() volatile

Get EP0_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void set_EP0_IN_BUFFER_CONTROL_LAST_1() volatile

Set EP0_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void clear_EP0_IN_BUFFER_CONTROL_LAST_1() volatile

Clear EP0_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void toggle_EP0_IN_BUFFER_CONTROL_LAST_1() volatile

Toggle EP0_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline bool get_EP0_IN_BUFFER_CONTROL_FULL_1() volatile

Get EP0_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP0_IN_BUFFER_CONTROL_FULL_1() volatile

Set EP0_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP0_IN_BUFFER_CONTROL_FULL_1() volatile

Clear EP0_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP0_IN_BUFFER_CONTROL_FULL_1() volatile

Toggle EP0_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void get_EP0_IN_BUFFER_CONTROL(uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET, bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1, bool &AVAILABLE_1, USBCTRL_DPRAM_EP0_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET &DOUBLE_BUFFER_ISO_OFFSET, bool &PID_1, bool &LAST_1, bool &FULL_1) volatile

Get all of EP0_IN_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline void set_EP0_IN_BUFFER_CONTROL(uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET, bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1, bool AVAILABLE_1, USBCTRL_DPRAM_EP0_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET DOUBLE_BUFFER_ISO_OFFSET, bool PID_1, bool LAST_1, bool FULL_1) volatile

Set all of EP0_IN_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline uint16_t get_EP0_OUT_BUFFER_CONTROL_LENGTH_0() volatile

Get EP0_OUT_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline void set_EP0_OUT_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile

Set EP0_OUT_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline bool get_EP0_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Get EP0_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP0_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Set EP0_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP0_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Clear EP0_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP0_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Toggle EP0_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline bool get_EP0_OUT_BUFFER_CONTROL_STALL() volatile

Get EP0_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void set_EP0_OUT_BUFFER_CONTROL_STALL() volatile

Set EP0_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void clear_EP0_OUT_BUFFER_CONTROL_STALL() volatile

Clear EP0_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void toggle_EP0_OUT_BUFFER_CONTROL_STALL() volatile

Toggle EP0_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline bool get_EP0_OUT_BUFFER_CONTROL_RESET() volatile

Get EP0_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void set_EP0_OUT_BUFFER_CONTROL_RESET() volatile

Set EP0_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void clear_EP0_OUT_BUFFER_CONTROL_RESET() volatile

Clear EP0_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void toggle_EP0_OUT_BUFFER_CONTROL_RESET() volatile

Toggle EP0_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline bool get_EP0_OUT_BUFFER_CONTROL_PID_0() volatile

Get EP0_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void set_EP0_OUT_BUFFER_CONTROL_PID_0() volatile

Set EP0_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void clear_EP0_OUT_BUFFER_CONTROL_PID_0() volatile

Clear EP0_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void toggle_EP0_OUT_BUFFER_CONTROL_PID_0() volatile

Toggle EP0_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline bool get_EP0_OUT_BUFFER_CONTROL_LAST_0() volatile

Get EP0_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void set_EP0_OUT_BUFFER_CONTROL_LAST_0() volatile

Set EP0_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void clear_EP0_OUT_BUFFER_CONTROL_LAST_0() volatile

Clear EP0_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void toggle_EP0_OUT_BUFFER_CONTROL_LAST_0() volatile

Toggle EP0_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline bool get_EP0_OUT_BUFFER_CONTROL_FULL_0() volatile

Get EP0_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP0_OUT_BUFFER_CONTROL_FULL_0() volatile

Set EP0_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP0_OUT_BUFFER_CONTROL_FULL_0() volatile

Clear EP0_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP0_OUT_BUFFER_CONTROL_FULL_0() volatile

Toggle EP0_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline uint16_t get_EP0_OUT_BUFFER_CONTROL_LENGTH_1() volatile

Get EP0_OUT_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline void set_EP0_OUT_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile

Set EP0_OUT_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline bool get_EP0_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Get EP0_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP0_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Set EP0_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP0_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Clear EP0_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP0_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Toggle EP0_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline USBCTRL_DPRAM_EP0_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET get_EP0_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile

Get EP0_OUT_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline void set_EP0_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(USBCTRL_DPRAM_EP0_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET value) volatile

Set EP0_OUT_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline bool get_EP0_OUT_BUFFER_CONTROL_PID_1() volatile

Get EP0_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void set_EP0_OUT_BUFFER_CONTROL_PID_1() volatile

Set EP0_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void clear_EP0_OUT_BUFFER_CONTROL_PID_1() volatile

Clear EP0_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void toggle_EP0_OUT_BUFFER_CONTROL_PID_1() volatile

Toggle EP0_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline bool get_EP0_OUT_BUFFER_CONTROL_LAST_1() volatile

Get EP0_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void set_EP0_OUT_BUFFER_CONTROL_LAST_1() volatile

Set EP0_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void clear_EP0_OUT_BUFFER_CONTROL_LAST_1() volatile

Clear EP0_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void toggle_EP0_OUT_BUFFER_CONTROL_LAST_1() volatile

Toggle EP0_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline bool get_EP0_OUT_BUFFER_CONTROL_FULL_1() volatile

Get EP0_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP0_OUT_BUFFER_CONTROL_FULL_1() volatile

Set EP0_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP0_OUT_BUFFER_CONTROL_FULL_1() volatile

Clear EP0_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP0_OUT_BUFFER_CONTROL_FULL_1() volatile

Toggle EP0_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void get_EP0_OUT_BUFFER_CONTROL(uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET, bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1, bool &AVAILABLE_1, USBCTRL_DPRAM_EP0_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET &DOUBLE_BUFFER_ISO_OFFSET, bool &PID_1, bool &LAST_1, bool &FULL_1) volatile

Get all of EP0_OUT_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline void set_EP0_OUT_BUFFER_CONTROL(uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET, bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1, bool AVAILABLE_1, USBCTRL_DPRAM_EP0_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET DOUBLE_BUFFER_ISO_OFFSET, bool PID_1, bool LAST_1, bool FULL_1) volatile

Set all of EP0_OUT_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline uint16_t get_EP1_IN_BUFFER_CONTROL_LENGTH_0() volatile

Get EP1_IN_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline void set_EP1_IN_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile

Set EP1_IN_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline bool get_EP1_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Get EP1_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP1_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Set EP1_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP1_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Clear EP1_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP1_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Toggle EP1_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline bool get_EP1_IN_BUFFER_CONTROL_STALL() volatile

Get EP1_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void set_EP1_IN_BUFFER_CONTROL_STALL() volatile

Set EP1_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void clear_EP1_IN_BUFFER_CONTROL_STALL() volatile

Clear EP1_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void toggle_EP1_IN_BUFFER_CONTROL_STALL() volatile

Toggle EP1_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline bool get_EP1_IN_BUFFER_CONTROL_RESET() volatile

Get EP1_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void set_EP1_IN_BUFFER_CONTROL_RESET() volatile

Set EP1_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void clear_EP1_IN_BUFFER_CONTROL_RESET() volatile

Clear EP1_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void toggle_EP1_IN_BUFFER_CONTROL_RESET() volatile

Toggle EP1_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline bool get_EP1_IN_BUFFER_CONTROL_PID_0() volatile

Get EP1_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void set_EP1_IN_BUFFER_CONTROL_PID_0() volatile

Set EP1_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void clear_EP1_IN_BUFFER_CONTROL_PID_0() volatile

Clear EP1_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void toggle_EP1_IN_BUFFER_CONTROL_PID_0() volatile

Toggle EP1_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline bool get_EP1_IN_BUFFER_CONTROL_LAST_0() volatile

Get EP1_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void set_EP1_IN_BUFFER_CONTROL_LAST_0() volatile

Set EP1_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void clear_EP1_IN_BUFFER_CONTROL_LAST_0() volatile

Clear EP1_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void toggle_EP1_IN_BUFFER_CONTROL_LAST_0() volatile

Toggle EP1_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline bool get_EP1_IN_BUFFER_CONTROL_FULL_0() volatile

Get EP1_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP1_IN_BUFFER_CONTROL_FULL_0() volatile

Set EP1_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP1_IN_BUFFER_CONTROL_FULL_0() volatile

Clear EP1_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP1_IN_BUFFER_CONTROL_FULL_0() volatile

Toggle EP1_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline uint16_t get_EP1_IN_BUFFER_CONTROL_LENGTH_1() volatile

Get EP1_IN_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline void set_EP1_IN_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile

Set EP1_IN_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline bool get_EP1_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Get EP1_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP1_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Set EP1_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP1_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Clear EP1_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP1_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Toggle EP1_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline USBCTRL_DPRAM_EP1_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET get_EP1_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile

Get EP1_IN_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline void set_EP1_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(USBCTRL_DPRAM_EP1_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET value) volatile

Set EP1_IN_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline bool get_EP1_IN_BUFFER_CONTROL_PID_1() volatile

Get EP1_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void set_EP1_IN_BUFFER_CONTROL_PID_1() volatile

Set EP1_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void clear_EP1_IN_BUFFER_CONTROL_PID_1() volatile

Clear EP1_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void toggle_EP1_IN_BUFFER_CONTROL_PID_1() volatile

Toggle EP1_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline bool get_EP1_IN_BUFFER_CONTROL_LAST_1() volatile

Get EP1_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void set_EP1_IN_BUFFER_CONTROL_LAST_1() volatile

Set EP1_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void clear_EP1_IN_BUFFER_CONTROL_LAST_1() volatile

Clear EP1_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void toggle_EP1_IN_BUFFER_CONTROL_LAST_1() volatile

Toggle EP1_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline bool get_EP1_IN_BUFFER_CONTROL_FULL_1() volatile

Get EP1_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP1_IN_BUFFER_CONTROL_FULL_1() volatile

Set EP1_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP1_IN_BUFFER_CONTROL_FULL_1() volatile

Clear EP1_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP1_IN_BUFFER_CONTROL_FULL_1() volatile

Toggle EP1_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void get_EP1_IN_BUFFER_CONTROL(uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET, bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1, bool &AVAILABLE_1, USBCTRL_DPRAM_EP1_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET &DOUBLE_BUFFER_ISO_OFFSET, bool &PID_1, bool &LAST_1, bool &FULL_1) volatile

Get all of EP1_IN_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline void set_EP1_IN_BUFFER_CONTROL(uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET, bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1, bool AVAILABLE_1, USBCTRL_DPRAM_EP1_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET DOUBLE_BUFFER_ISO_OFFSET, bool PID_1, bool LAST_1, bool FULL_1) volatile

Set all of EP1_IN_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline uint16_t get_EP1_OUT_BUFFER_CONTROL_LENGTH_0() volatile

Get EP1_OUT_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline void set_EP1_OUT_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile

Set EP1_OUT_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline bool get_EP1_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Get EP1_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP1_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Set EP1_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP1_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Clear EP1_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP1_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Toggle EP1_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline bool get_EP1_OUT_BUFFER_CONTROL_STALL() volatile

Get EP1_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void set_EP1_OUT_BUFFER_CONTROL_STALL() volatile

Set EP1_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void clear_EP1_OUT_BUFFER_CONTROL_STALL() volatile

Clear EP1_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void toggle_EP1_OUT_BUFFER_CONTROL_STALL() volatile

Toggle EP1_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline bool get_EP1_OUT_BUFFER_CONTROL_RESET() volatile

Get EP1_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void set_EP1_OUT_BUFFER_CONTROL_RESET() volatile

Set EP1_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void clear_EP1_OUT_BUFFER_CONTROL_RESET() volatile

Clear EP1_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void toggle_EP1_OUT_BUFFER_CONTROL_RESET() volatile

Toggle EP1_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline bool get_EP1_OUT_BUFFER_CONTROL_PID_0() volatile

Get EP1_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void set_EP1_OUT_BUFFER_CONTROL_PID_0() volatile

Set EP1_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void clear_EP1_OUT_BUFFER_CONTROL_PID_0() volatile

Clear EP1_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void toggle_EP1_OUT_BUFFER_CONTROL_PID_0() volatile

Toggle EP1_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline bool get_EP1_OUT_BUFFER_CONTROL_LAST_0() volatile

Get EP1_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void set_EP1_OUT_BUFFER_CONTROL_LAST_0() volatile

Set EP1_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void clear_EP1_OUT_BUFFER_CONTROL_LAST_0() volatile

Clear EP1_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void toggle_EP1_OUT_BUFFER_CONTROL_LAST_0() volatile

Toggle EP1_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline bool get_EP1_OUT_BUFFER_CONTROL_FULL_0() volatile

Get EP1_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP1_OUT_BUFFER_CONTROL_FULL_0() volatile

Set EP1_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP1_OUT_BUFFER_CONTROL_FULL_0() volatile

Clear EP1_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP1_OUT_BUFFER_CONTROL_FULL_0() volatile

Toggle EP1_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline uint16_t get_EP1_OUT_BUFFER_CONTROL_LENGTH_1() volatile

Get EP1_OUT_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline void set_EP1_OUT_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile

Set EP1_OUT_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline bool get_EP1_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Get EP1_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP1_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Set EP1_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP1_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Clear EP1_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP1_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Toggle EP1_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline USBCTRL_DPRAM_EP1_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET get_EP1_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile

Get EP1_OUT_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline void set_EP1_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(USBCTRL_DPRAM_EP1_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET value) volatile

Set EP1_OUT_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline bool get_EP1_OUT_BUFFER_CONTROL_PID_1() volatile

Get EP1_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void set_EP1_OUT_BUFFER_CONTROL_PID_1() volatile

Set EP1_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void clear_EP1_OUT_BUFFER_CONTROL_PID_1() volatile

Clear EP1_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void toggle_EP1_OUT_BUFFER_CONTROL_PID_1() volatile

Toggle EP1_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline bool get_EP1_OUT_BUFFER_CONTROL_LAST_1() volatile

Get EP1_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void set_EP1_OUT_BUFFER_CONTROL_LAST_1() volatile

Set EP1_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void clear_EP1_OUT_BUFFER_CONTROL_LAST_1() volatile

Clear EP1_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void toggle_EP1_OUT_BUFFER_CONTROL_LAST_1() volatile

Toggle EP1_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline bool get_EP1_OUT_BUFFER_CONTROL_FULL_1() volatile

Get EP1_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP1_OUT_BUFFER_CONTROL_FULL_1() volatile

Set EP1_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP1_OUT_BUFFER_CONTROL_FULL_1() volatile

Clear EP1_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP1_OUT_BUFFER_CONTROL_FULL_1() volatile

Toggle EP1_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void get_EP1_OUT_BUFFER_CONTROL(uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET, bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1, bool &AVAILABLE_1, USBCTRL_DPRAM_EP1_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET &DOUBLE_BUFFER_ISO_OFFSET, bool &PID_1, bool &LAST_1, bool &FULL_1) volatile

Get all of EP1_OUT_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline void set_EP1_OUT_BUFFER_CONTROL(uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET, bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1, bool AVAILABLE_1, USBCTRL_DPRAM_EP1_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET DOUBLE_BUFFER_ISO_OFFSET, bool PID_1, bool LAST_1, bool FULL_1) volatile

Set all of EP1_OUT_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline uint16_t get_EP2_IN_BUFFER_CONTROL_LENGTH_0() volatile

Get EP2_IN_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline void set_EP2_IN_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile

Set EP2_IN_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline bool get_EP2_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Get EP2_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP2_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Set EP2_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP2_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Clear EP2_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP2_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Toggle EP2_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline bool get_EP2_IN_BUFFER_CONTROL_STALL() volatile

Get EP2_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void set_EP2_IN_BUFFER_CONTROL_STALL() volatile

Set EP2_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void clear_EP2_IN_BUFFER_CONTROL_STALL() volatile

Clear EP2_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void toggle_EP2_IN_BUFFER_CONTROL_STALL() volatile

Toggle EP2_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline bool get_EP2_IN_BUFFER_CONTROL_RESET() volatile

Get EP2_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void set_EP2_IN_BUFFER_CONTROL_RESET() volatile

Set EP2_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void clear_EP2_IN_BUFFER_CONTROL_RESET() volatile

Clear EP2_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void toggle_EP2_IN_BUFFER_CONTROL_RESET() volatile

Toggle EP2_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline bool get_EP2_IN_BUFFER_CONTROL_PID_0() volatile

Get EP2_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void set_EP2_IN_BUFFER_CONTROL_PID_0() volatile

Set EP2_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void clear_EP2_IN_BUFFER_CONTROL_PID_0() volatile

Clear EP2_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void toggle_EP2_IN_BUFFER_CONTROL_PID_0() volatile

Toggle EP2_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline bool get_EP2_IN_BUFFER_CONTROL_LAST_0() volatile

Get EP2_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void set_EP2_IN_BUFFER_CONTROL_LAST_0() volatile

Set EP2_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void clear_EP2_IN_BUFFER_CONTROL_LAST_0() volatile

Clear EP2_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void toggle_EP2_IN_BUFFER_CONTROL_LAST_0() volatile

Toggle EP2_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline bool get_EP2_IN_BUFFER_CONTROL_FULL_0() volatile

Get EP2_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP2_IN_BUFFER_CONTROL_FULL_0() volatile

Set EP2_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP2_IN_BUFFER_CONTROL_FULL_0() volatile

Clear EP2_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP2_IN_BUFFER_CONTROL_FULL_0() volatile

Toggle EP2_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline uint16_t get_EP2_IN_BUFFER_CONTROL_LENGTH_1() volatile

Get EP2_IN_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline void set_EP2_IN_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile

Set EP2_IN_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline bool get_EP2_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Get EP2_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP2_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Set EP2_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP2_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Clear EP2_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP2_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Toggle EP2_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline USBCTRL_DPRAM_EP2_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET get_EP2_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile

Get EP2_IN_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline void set_EP2_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(USBCTRL_DPRAM_EP2_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET value) volatile

Set EP2_IN_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline bool get_EP2_IN_BUFFER_CONTROL_PID_1() volatile

Get EP2_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void set_EP2_IN_BUFFER_CONTROL_PID_1() volatile

Set EP2_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void clear_EP2_IN_BUFFER_CONTROL_PID_1() volatile

Clear EP2_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void toggle_EP2_IN_BUFFER_CONTROL_PID_1() volatile

Toggle EP2_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline bool get_EP2_IN_BUFFER_CONTROL_LAST_1() volatile

Get EP2_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void set_EP2_IN_BUFFER_CONTROL_LAST_1() volatile

Set EP2_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void clear_EP2_IN_BUFFER_CONTROL_LAST_1() volatile

Clear EP2_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void toggle_EP2_IN_BUFFER_CONTROL_LAST_1() volatile

Toggle EP2_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline bool get_EP2_IN_BUFFER_CONTROL_FULL_1() volatile

Get EP2_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP2_IN_BUFFER_CONTROL_FULL_1() volatile

Set EP2_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP2_IN_BUFFER_CONTROL_FULL_1() volatile

Clear EP2_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP2_IN_BUFFER_CONTROL_FULL_1() volatile

Toggle EP2_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void get_EP2_IN_BUFFER_CONTROL(uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET, bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1, bool &AVAILABLE_1, USBCTRL_DPRAM_EP2_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET &DOUBLE_BUFFER_ISO_OFFSET, bool &PID_1, bool &LAST_1, bool &FULL_1) volatile

Get all of EP2_IN_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline void set_EP2_IN_BUFFER_CONTROL(uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET, bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1, bool AVAILABLE_1, USBCTRL_DPRAM_EP2_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET DOUBLE_BUFFER_ISO_OFFSET, bool PID_1, bool LAST_1, bool FULL_1) volatile

Set all of EP2_IN_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline uint16_t get_EP2_OUT_BUFFER_CONTROL_LENGTH_0() volatile

Get EP2_OUT_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline void set_EP2_OUT_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile

Set EP2_OUT_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline bool get_EP2_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Get EP2_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP2_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Set EP2_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP2_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Clear EP2_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP2_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Toggle EP2_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline bool get_EP2_OUT_BUFFER_CONTROL_STALL() volatile

Get EP2_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void set_EP2_OUT_BUFFER_CONTROL_STALL() volatile

Set EP2_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void clear_EP2_OUT_BUFFER_CONTROL_STALL() volatile

Clear EP2_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void toggle_EP2_OUT_BUFFER_CONTROL_STALL() volatile

Toggle EP2_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline bool get_EP2_OUT_BUFFER_CONTROL_RESET() volatile

Get EP2_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void set_EP2_OUT_BUFFER_CONTROL_RESET() volatile

Set EP2_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void clear_EP2_OUT_BUFFER_CONTROL_RESET() volatile

Clear EP2_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void toggle_EP2_OUT_BUFFER_CONTROL_RESET() volatile

Toggle EP2_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline bool get_EP2_OUT_BUFFER_CONTROL_PID_0() volatile

Get EP2_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void set_EP2_OUT_BUFFER_CONTROL_PID_0() volatile

Set EP2_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void clear_EP2_OUT_BUFFER_CONTROL_PID_0() volatile

Clear EP2_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void toggle_EP2_OUT_BUFFER_CONTROL_PID_0() volatile

Toggle EP2_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline bool get_EP2_OUT_BUFFER_CONTROL_LAST_0() volatile

Get EP2_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void set_EP2_OUT_BUFFER_CONTROL_LAST_0() volatile

Set EP2_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void clear_EP2_OUT_BUFFER_CONTROL_LAST_0() volatile

Clear EP2_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void toggle_EP2_OUT_BUFFER_CONTROL_LAST_0() volatile

Toggle EP2_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline bool get_EP2_OUT_BUFFER_CONTROL_FULL_0() volatile

Get EP2_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP2_OUT_BUFFER_CONTROL_FULL_0() volatile

Set EP2_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP2_OUT_BUFFER_CONTROL_FULL_0() volatile

Clear EP2_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP2_OUT_BUFFER_CONTROL_FULL_0() volatile

Toggle EP2_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline uint16_t get_EP2_OUT_BUFFER_CONTROL_LENGTH_1() volatile

Get EP2_OUT_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline void set_EP2_OUT_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile

Set EP2_OUT_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline bool get_EP2_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Get EP2_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP2_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Set EP2_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP2_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Clear EP2_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP2_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Toggle EP2_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline USBCTRL_DPRAM_EP2_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET get_EP2_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile

Get EP2_OUT_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline void set_EP2_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(USBCTRL_DPRAM_EP2_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET value) volatile

Set EP2_OUT_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline bool get_EP2_OUT_BUFFER_CONTROL_PID_1() volatile

Get EP2_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void set_EP2_OUT_BUFFER_CONTROL_PID_1() volatile

Set EP2_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void clear_EP2_OUT_BUFFER_CONTROL_PID_1() volatile

Clear EP2_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void toggle_EP2_OUT_BUFFER_CONTROL_PID_1() volatile

Toggle EP2_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline bool get_EP2_OUT_BUFFER_CONTROL_LAST_1() volatile

Get EP2_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void set_EP2_OUT_BUFFER_CONTROL_LAST_1() volatile

Set EP2_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void clear_EP2_OUT_BUFFER_CONTROL_LAST_1() volatile

Clear EP2_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void toggle_EP2_OUT_BUFFER_CONTROL_LAST_1() volatile

Toggle EP2_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline bool get_EP2_OUT_BUFFER_CONTROL_FULL_1() volatile

Get EP2_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP2_OUT_BUFFER_CONTROL_FULL_1() volatile

Set EP2_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP2_OUT_BUFFER_CONTROL_FULL_1() volatile

Clear EP2_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP2_OUT_BUFFER_CONTROL_FULL_1() volatile

Toggle EP2_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void get_EP2_OUT_BUFFER_CONTROL(uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET, bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1, bool &AVAILABLE_1, USBCTRL_DPRAM_EP2_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET &DOUBLE_BUFFER_ISO_OFFSET, bool &PID_1, bool &LAST_1, bool &FULL_1) volatile

Get all of EP2_OUT_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline void set_EP2_OUT_BUFFER_CONTROL(uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET, bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1, bool AVAILABLE_1, USBCTRL_DPRAM_EP2_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET DOUBLE_BUFFER_ISO_OFFSET, bool PID_1, bool LAST_1, bool FULL_1) volatile

Set all of EP2_OUT_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline uint16_t get_EP3_IN_BUFFER_CONTROL_LENGTH_0() volatile

Get EP3_IN_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline void set_EP3_IN_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile

Set EP3_IN_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline bool get_EP3_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Get EP3_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP3_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Set EP3_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP3_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Clear EP3_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP3_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Toggle EP3_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline bool get_EP3_IN_BUFFER_CONTROL_STALL() volatile

Get EP3_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void set_EP3_IN_BUFFER_CONTROL_STALL() volatile

Set EP3_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void clear_EP3_IN_BUFFER_CONTROL_STALL() volatile

Clear EP3_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void toggle_EP3_IN_BUFFER_CONTROL_STALL() volatile

Toggle EP3_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline bool get_EP3_IN_BUFFER_CONTROL_RESET() volatile

Get EP3_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void set_EP3_IN_BUFFER_CONTROL_RESET() volatile

Set EP3_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void clear_EP3_IN_BUFFER_CONTROL_RESET() volatile

Clear EP3_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void toggle_EP3_IN_BUFFER_CONTROL_RESET() volatile

Toggle EP3_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline bool get_EP3_IN_BUFFER_CONTROL_PID_0() volatile

Get EP3_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void set_EP3_IN_BUFFER_CONTROL_PID_0() volatile

Set EP3_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void clear_EP3_IN_BUFFER_CONTROL_PID_0() volatile

Clear EP3_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void toggle_EP3_IN_BUFFER_CONTROL_PID_0() volatile

Toggle EP3_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline bool get_EP3_IN_BUFFER_CONTROL_LAST_0() volatile

Get EP3_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void set_EP3_IN_BUFFER_CONTROL_LAST_0() volatile

Set EP3_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void clear_EP3_IN_BUFFER_CONTROL_LAST_0() volatile

Clear EP3_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void toggle_EP3_IN_BUFFER_CONTROL_LAST_0() volatile

Toggle EP3_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline bool get_EP3_IN_BUFFER_CONTROL_FULL_0() volatile

Get EP3_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP3_IN_BUFFER_CONTROL_FULL_0() volatile

Set EP3_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP3_IN_BUFFER_CONTROL_FULL_0() volatile

Clear EP3_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP3_IN_BUFFER_CONTROL_FULL_0() volatile

Toggle EP3_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline uint16_t get_EP3_IN_BUFFER_CONTROL_LENGTH_1() volatile

Get EP3_IN_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline void set_EP3_IN_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile

Set EP3_IN_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline bool get_EP3_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Get EP3_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP3_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Set EP3_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP3_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Clear EP3_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP3_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Toggle EP3_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline USBCTRL_DPRAM_EP3_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET get_EP3_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile

Get EP3_IN_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline void set_EP3_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(USBCTRL_DPRAM_EP3_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET value) volatile

Set EP3_IN_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline bool get_EP3_IN_BUFFER_CONTROL_PID_1() volatile

Get EP3_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void set_EP3_IN_BUFFER_CONTROL_PID_1() volatile

Set EP3_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void clear_EP3_IN_BUFFER_CONTROL_PID_1() volatile

Clear EP3_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void toggle_EP3_IN_BUFFER_CONTROL_PID_1() volatile

Toggle EP3_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline bool get_EP3_IN_BUFFER_CONTROL_LAST_1() volatile

Get EP3_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void set_EP3_IN_BUFFER_CONTROL_LAST_1() volatile

Set EP3_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void clear_EP3_IN_BUFFER_CONTROL_LAST_1() volatile

Clear EP3_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void toggle_EP3_IN_BUFFER_CONTROL_LAST_1() volatile

Toggle EP3_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline bool get_EP3_IN_BUFFER_CONTROL_FULL_1() volatile

Get EP3_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP3_IN_BUFFER_CONTROL_FULL_1() volatile

Set EP3_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP3_IN_BUFFER_CONTROL_FULL_1() volatile

Clear EP3_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP3_IN_BUFFER_CONTROL_FULL_1() volatile

Toggle EP3_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void get_EP3_IN_BUFFER_CONTROL(uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET, bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1, bool &AVAILABLE_1, USBCTRL_DPRAM_EP3_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET &DOUBLE_BUFFER_ISO_OFFSET, bool &PID_1, bool &LAST_1, bool &FULL_1) volatile

Get all of EP3_IN_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline void set_EP3_IN_BUFFER_CONTROL(uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET, bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1, bool AVAILABLE_1, USBCTRL_DPRAM_EP3_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET DOUBLE_BUFFER_ISO_OFFSET, bool PID_1, bool LAST_1, bool FULL_1) volatile

Set all of EP3_IN_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline uint16_t get_EP3_OUT_BUFFER_CONTROL_LENGTH_0() volatile

Get EP3_OUT_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline void set_EP3_OUT_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile

Set EP3_OUT_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline bool get_EP3_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Get EP3_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP3_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Set EP3_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP3_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Clear EP3_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP3_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Toggle EP3_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline bool get_EP3_OUT_BUFFER_CONTROL_STALL() volatile

Get EP3_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void set_EP3_OUT_BUFFER_CONTROL_STALL() volatile

Set EP3_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void clear_EP3_OUT_BUFFER_CONTROL_STALL() volatile

Clear EP3_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void toggle_EP3_OUT_BUFFER_CONTROL_STALL() volatile

Toggle EP3_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline bool get_EP3_OUT_BUFFER_CONTROL_RESET() volatile

Get EP3_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void set_EP3_OUT_BUFFER_CONTROL_RESET() volatile

Set EP3_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void clear_EP3_OUT_BUFFER_CONTROL_RESET() volatile

Clear EP3_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void toggle_EP3_OUT_BUFFER_CONTROL_RESET() volatile

Toggle EP3_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline bool get_EP3_OUT_BUFFER_CONTROL_PID_0() volatile

Get EP3_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void set_EP3_OUT_BUFFER_CONTROL_PID_0() volatile

Set EP3_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void clear_EP3_OUT_BUFFER_CONTROL_PID_0() volatile

Clear EP3_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void toggle_EP3_OUT_BUFFER_CONTROL_PID_0() volatile

Toggle EP3_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline bool get_EP3_OUT_BUFFER_CONTROL_LAST_0() volatile

Get EP3_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void set_EP3_OUT_BUFFER_CONTROL_LAST_0() volatile

Set EP3_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void clear_EP3_OUT_BUFFER_CONTROL_LAST_0() volatile

Clear EP3_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void toggle_EP3_OUT_BUFFER_CONTROL_LAST_0() volatile

Toggle EP3_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline bool get_EP3_OUT_BUFFER_CONTROL_FULL_0() volatile

Get EP3_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP3_OUT_BUFFER_CONTROL_FULL_0() volatile

Set EP3_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP3_OUT_BUFFER_CONTROL_FULL_0() volatile

Clear EP3_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP3_OUT_BUFFER_CONTROL_FULL_0() volatile

Toggle EP3_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline uint16_t get_EP3_OUT_BUFFER_CONTROL_LENGTH_1() volatile

Get EP3_OUT_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline void set_EP3_OUT_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile

Set EP3_OUT_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline bool get_EP3_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Get EP3_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP3_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Set EP3_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP3_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Clear EP3_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP3_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Toggle EP3_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline USBCTRL_DPRAM_EP3_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET get_EP3_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile

Get EP3_OUT_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline void set_EP3_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(USBCTRL_DPRAM_EP3_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET value) volatile

Set EP3_OUT_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline bool get_EP3_OUT_BUFFER_CONTROL_PID_1() volatile

Get EP3_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void set_EP3_OUT_BUFFER_CONTROL_PID_1() volatile

Set EP3_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void clear_EP3_OUT_BUFFER_CONTROL_PID_1() volatile

Clear EP3_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void toggle_EP3_OUT_BUFFER_CONTROL_PID_1() volatile

Toggle EP3_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline bool get_EP3_OUT_BUFFER_CONTROL_LAST_1() volatile

Get EP3_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void set_EP3_OUT_BUFFER_CONTROL_LAST_1() volatile

Set EP3_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void clear_EP3_OUT_BUFFER_CONTROL_LAST_1() volatile

Clear EP3_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void toggle_EP3_OUT_BUFFER_CONTROL_LAST_1() volatile

Toggle EP3_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline bool get_EP3_OUT_BUFFER_CONTROL_FULL_1() volatile

Get EP3_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP3_OUT_BUFFER_CONTROL_FULL_1() volatile

Set EP3_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP3_OUT_BUFFER_CONTROL_FULL_1() volatile

Clear EP3_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP3_OUT_BUFFER_CONTROL_FULL_1() volatile

Toggle EP3_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void get_EP3_OUT_BUFFER_CONTROL(uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET, bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1, bool &AVAILABLE_1, USBCTRL_DPRAM_EP3_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET &DOUBLE_BUFFER_ISO_OFFSET, bool &PID_1, bool &LAST_1, bool &FULL_1) volatile

Get all of EP3_OUT_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline void set_EP3_OUT_BUFFER_CONTROL(uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET, bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1, bool AVAILABLE_1, USBCTRL_DPRAM_EP3_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET DOUBLE_BUFFER_ISO_OFFSET, bool PID_1, bool LAST_1, bool FULL_1) volatile

Set all of EP3_OUT_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline uint16_t get_EP4_IN_BUFFER_CONTROL_LENGTH_0() volatile

Get EP4_IN_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline void set_EP4_IN_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile

Set EP4_IN_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline bool get_EP4_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Get EP4_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP4_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Set EP4_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP4_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Clear EP4_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP4_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Toggle EP4_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline bool get_EP4_IN_BUFFER_CONTROL_STALL() volatile

Get EP4_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void set_EP4_IN_BUFFER_CONTROL_STALL() volatile

Set EP4_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void clear_EP4_IN_BUFFER_CONTROL_STALL() volatile

Clear EP4_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void toggle_EP4_IN_BUFFER_CONTROL_STALL() volatile

Toggle EP4_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline bool get_EP4_IN_BUFFER_CONTROL_RESET() volatile

Get EP4_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void set_EP4_IN_BUFFER_CONTROL_RESET() volatile

Set EP4_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void clear_EP4_IN_BUFFER_CONTROL_RESET() volatile

Clear EP4_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void toggle_EP4_IN_BUFFER_CONTROL_RESET() volatile

Toggle EP4_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline bool get_EP4_IN_BUFFER_CONTROL_PID_0() volatile

Get EP4_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void set_EP4_IN_BUFFER_CONTROL_PID_0() volatile

Set EP4_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void clear_EP4_IN_BUFFER_CONTROL_PID_0() volatile

Clear EP4_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void toggle_EP4_IN_BUFFER_CONTROL_PID_0() volatile

Toggle EP4_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline bool get_EP4_IN_BUFFER_CONTROL_LAST_0() volatile

Get EP4_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void set_EP4_IN_BUFFER_CONTROL_LAST_0() volatile

Set EP4_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void clear_EP4_IN_BUFFER_CONTROL_LAST_0() volatile

Clear EP4_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void toggle_EP4_IN_BUFFER_CONTROL_LAST_0() volatile

Toggle EP4_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline bool get_EP4_IN_BUFFER_CONTROL_FULL_0() volatile

Get EP4_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP4_IN_BUFFER_CONTROL_FULL_0() volatile

Set EP4_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP4_IN_BUFFER_CONTROL_FULL_0() volatile

Clear EP4_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP4_IN_BUFFER_CONTROL_FULL_0() volatile

Toggle EP4_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline uint16_t get_EP4_IN_BUFFER_CONTROL_LENGTH_1() volatile

Get EP4_IN_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline void set_EP4_IN_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile

Set EP4_IN_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline bool get_EP4_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Get EP4_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP4_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Set EP4_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP4_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Clear EP4_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP4_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Toggle EP4_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline USBCTRL_DPRAM_EP4_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET get_EP4_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile

Get EP4_IN_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline void set_EP4_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(USBCTRL_DPRAM_EP4_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET value) volatile

Set EP4_IN_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline bool get_EP4_IN_BUFFER_CONTROL_PID_1() volatile

Get EP4_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void set_EP4_IN_BUFFER_CONTROL_PID_1() volatile

Set EP4_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void clear_EP4_IN_BUFFER_CONTROL_PID_1() volatile

Clear EP4_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void toggle_EP4_IN_BUFFER_CONTROL_PID_1() volatile

Toggle EP4_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline bool get_EP4_IN_BUFFER_CONTROL_LAST_1() volatile

Get EP4_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void set_EP4_IN_BUFFER_CONTROL_LAST_1() volatile

Set EP4_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void clear_EP4_IN_BUFFER_CONTROL_LAST_1() volatile

Clear EP4_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void toggle_EP4_IN_BUFFER_CONTROL_LAST_1() volatile

Toggle EP4_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline bool get_EP4_IN_BUFFER_CONTROL_FULL_1() volatile

Get EP4_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP4_IN_BUFFER_CONTROL_FULL_1() volatile

Set EP4_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP4_IN_BUFFER_CONTROL_FULL_1() volatile

Clear EP4_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP4_IN_BUFFER_CONTROL_FULL_1() volatile

Toggle EP4_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void get_EP4_IN_BUFFER_CONTROL(uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET, bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1, bool &AVAILABLE_1, USBCTRL_DPRAM_EP4_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET &DOUBLE_BUFFER_ISO_OFFSET, bool &PID_1, bool &LAST_1, bool &FULL_1) volatile

Get all of EP4_IN_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline void set_EP4_IN_BUFFER_CONTROL(uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET, bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1, bool AVAILABLE_1, USBCTRL_DPRAM_EP4_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET DOUBLE_BUFFER_ISO_OFFSET, bool PID_1, bool LAST_1, bool FULL_1) volatile

Set all of EP4_IN_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline uint16_t get_EP4_OUT_BUFFER_CONTROL_LENGTH_0() volatile

Get EP4_OUT_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline void set_EP4_OUT_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile

Set EP4_OUT_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline bool get_EP4_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Get EP4_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP4_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Set EP4_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP4_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Clear EP4_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP4_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Toggle EP4_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline bool get_EP4_OUT_BUFFER_CONTROL_STALL() volatile

Get EP4_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void set_EP4_OUT_BUFFER_CONTROL_STALL() volatile

Set EP4_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void clear_EP4_OUT_BUFFER_CONTROL_STALL() volatile

Clear EP4_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void toggle_EP4_OUT_BUFFER_CONTROL_STALL() volatile

Toggle EP4_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline bool get_EP4_OUT_BUFFER_CONTROL_RESET() volatile

Get EP4_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void set_EP4_OUT_BUFFER_CONTROL_RESET() volatile

Set EP4_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void clear_EP4_OUT_BUFFER_CONTROL_RESET() volatile

Clear EP4_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void toggle_EP4_OUT_BUFFER_CONTROL_RESET() volatile

Toggle EP4_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline bool get_EP4_OUT_BUFFER_CONTROL_PID_0() volatile

Get EP4_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void set_EP4_OUT_BUFFER_CONTROL_PID_0() volatile

Set EP4_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void clear_EP4_OUT_BUFFER_CONTROL_PID_0() volatile

Clear EP4_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void toggle_EP4_OUT_BUFFER_CONTROL_PID_0() volatile

Toggle EP4_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline bool get_EP4_OUT_BUFFER_CONTROL_LAST_0() volatile

Get EP4_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void set_EP4_OUT_BUFFER_CONTROL_LAST_0() volatile

Set EP4_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void clear_EP4_OUT_BUFFER_CONTROL_LAST_0() volatile

Clear EP4_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void toggle_EP4_OUT_BUFFER_CONTROL_LAST_0() volatile

Toggle EP4_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline bool get_EP4_OUT_BUFFER_CONTROL_FULL_0() volatile

Get EP4_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP4_OUT_BUFFER_CONTROL_FULL_0() volatile

Set EP4_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP4_OUT_BUFFER_CONTROL_FULL_0() volatile

Clear EP4_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP4_OUT_BUFFER_CONTROL_FULL_0() volatile

Toggle EP4_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline uint16_t get_EP4_OUT_BUFFER_CONTROL_LENGTH_1() volatile

Get EP4_OUT_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline void set_EP4_OUT_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile

Set EP4_OUT_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline bool get_EP4_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Get EP4_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP4_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Set EP4_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP4_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Clear EP4_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP4_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Toggle EP4_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline USBCTRL_DPRAM_EP4_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET get_EP4_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile

Get EP4_OUT_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline void set_EP4_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(USBCTRL_DPRAM_EP4_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET value) volatile

Set EP4_OUT_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline bool get_EP4_OUT_BUFFER_CONTROL_PID_1() volatile

Get EP4_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void set_EP4_OUT_BUFFER_CONTROL_PID_1() volatile

Set EP4_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void clear_EP4_OUT_BUFFER_CONTROL_PID_1() volatile

Clear EP4_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void toggle_EP4_OUT_BUFFER_CONTROL_PID_1() volatile

Toggle EP4_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline bool get_EP4_OUT_BUFFER_CONTROL_LAST_1() volatile

Get EP4_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void set_EP4_OUT_BUFFER_CONTROL_LAST_1() volatile

Set EP4_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void clear_EP4_OUT_BUFFER_CONTROL_LAST_1() volatile

Clear EP4_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void toggle_EP4_OUT_BUFFER_CONTROL_LAST_1() volatile

Toggle EP4_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline bool get_EP4_OUT_BUFFER_CONTROL_FULL_1() volatile

Get EP4_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP4_OUT_BUFFER_CONTROL_FULL_1() volatile

Set EP4_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP4_OUT_BUFFER_CONTROL_FULL_1() volatile

Clear EP4_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP4_OUT_BUFFER_CONTROL_FULL_1() volatile

Toggle EP4_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void get_EP4_OUT_BUFFER_CONTROL(uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET, bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1, bool &AVAILABLE_1, USBCTRL_DPRAM_EP4_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET &DOUBLE_BUFFER_ISO_OFFSET, bool &PID_1, bool &LAST_1, bool &FULL_1) volatile

Get all of EP4_OUT_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline void set_EP4_OUT_BUFFER_CONTROL(uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET, bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1, bool AVAILABLE_1, USBCTRL_DPRAM_EP4_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET DOUBLE_BUFFER_ISO_OFFSET, bool PID_1, bool LAST_1, bool FULL_1) volatile

Set all of EP4_OUT_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline uint16_t get_EP5_IN_BUFFER_CONTROL_LENGTH_0() volatile

Get EP5_IN_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline void set_EP5_IN_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile

Set EP5_IN_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline bool get_EP5_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Get EP5_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP5_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Set EP5_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP5_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Clear EP5_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP5_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Toggle EP5_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline bool get_EP5_IN_BUFFER_CONTROL_STALL() volatile

Get EP5_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void set_EP5_IN_BUFFER_CONTROL_STALL() volatile

Set EP5_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void clear_EP5_IN_BUFFER_CONTROL_STALL() volatile

Clear EP5_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void toggle_EP5_IN_BUFFER_CONTROL_STALL() volatile

Toggle EP5_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline bool get_EP5_IN_BUFFER_CONTROL_RESET() volatile

Get EP5_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void set_EP5_IN_BUFFER_CONTROL_RESET() volatile

Set EP5_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void clear_EP5_IN_BUFFER_CONTROL_RESET() volatile

Clear EP5_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void toggle_EP5_IN_BUFFER_CONTROL_RESET() volatile

Toggle EP5_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline bool get_EP5_IN_BUFFER_CONTROL_PID_0() volatile

Get EP5_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void set_EP5_IN_BUFFER_CONTROL_PID_0() volatile

Set EP5_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void clear_EP5_IN_BUFFER_CONTROL_PID_0() volatile

Clear EP5_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void toggle_EP5_IN_BUFFER_CONTROL_PID_0() volatile

Toggle EP5_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline bool get_EP5_IN_BUFFER_CONTROL_LAST_0() volatile

Get EP5_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void set_EP5_IN_BUFFER_CONTROL_LAST_0() volatile

Set EP5_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void clear_EP5_IN_BUFFER_CONTROL_LAST_0() volatile

Clear EP5_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void toggle_EP5_IN_BUFFER_CONTROL_LAST_0() volatile

Toggle EP5_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline bool get_EP5_IN_BUFFER_CONTROL_FULL_0() volatile

Get EP5_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP5_IN_BUFFER_CONTROL_FULL_0() volatile

Set EP5_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP5_IN_BUFFER_CONTROL_FULL_0() volatile

Clear EP5_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP5_IN_BUFFER_CONTROL_FULL_0() volatile

Toggle EP5_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline uint16_t get_EP5_IN_BUFFER_CONTROL_LENGTH_1() volatile

Get EP5_IN_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline void set_EP5_IN_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile

Set EP5_IN_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline bool get_EP5_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Get EP5_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP5_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Set EP5_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP5_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Clear EP5_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP5_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Toggle EP5_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline USBCTRL_DPRAM_EP5_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET get_EP5_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile

Get EP5_IN_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline void set_EP5_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(USBCTRL_DPRAM_EP5_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET value) volatile

Set EP5_IN_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline bool get_EP5_IN_BUFFER_CONTROL_PID_1() volatile

Get EP5_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void set_EP5_IN_BUFFER_CONTROL_PID_1() volatile

Set EP5_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void clear_EP5_IN_BUFFER_CONTROL_PID_1() volatile

Clear EP5_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void toggle_EP5_IN_BUFFER_CONTROL_PID_1() volatile

Toggle EP5_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline bool get_EP5_IN_BUFFER_CONTROL_LAST_1() volatile

Get EP5_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void set_EP5_IN_BUFFER_CONTROL_LAST_1() volatile

Set EP5_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void clear_EP5_IN_BUFFER_CONTROL_LAST_1() volatile

Clear EP5_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void toggle_EP5_IN_BUFFER_CONTROL_LAST_1() volatile

Toggle EP5_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline bool get_EP5_IN_BUFFER_CONTROL_FULL_1() volatile

Get EP5_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP5_IN_BUFFER_CONTROL_FULL_1() volatile

Set EP5_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP5_IN_BUFFER_CONTROL_FULL_1() volatile

Clear EP5_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP5_IN_BUFFER_CONTROL_FULL_1() volatile

Toggle EP5_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void get_EP5_IN_BUFFER_CONTROL(uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET, bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1, bool &AVAILABLE_1, USBCTRL_DPRAM_EP5_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET &DOUBLE_BUFFER_ISO_OFFSET, bool &PID_1, bool &LAST_1, bool &FULL_1) volatile

Get all of EP5_IN_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline void set_EP5_IN_BUFFER_CONTROL(uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET, bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1, bool AVAILABLE_1, USBCTRL_DPRAM_EP5_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET DOUBLE_BUFFER_ISO_OFFSET, bool PID_1, bool LAST_1, bool FULL_1) volatile

Set all of EP5_IN_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline uint16_t get_EP5_OUT_BUFFER_CONTROL_LENGTH_0() volatile

Get EP5_OUT_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline void set_EP5_OUT_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile

Set EP5_OUT_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline bool get_EP5_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Get EP5_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP5_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Set EP5_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP5_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Clear EP5_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP5_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Toggle EP5_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline bool get_EP5_OUT_BUFFER_CONTROL_STALL() volatile

Get EP5_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void set_EP5_OUT_BUFFER_CONTROL_STALL() volatile

Set EP5_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void clear_EP5_OUT_BUFFER_CONTROL_STALL() volatile

Clear EP5_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void toggle_EP5_OUT_BUFFER_CONTROL_STALL() volatile

Toggle EP5_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline bool get_EP5_OUT_BUFFER_CONTROL_RESET() volatile

Get EP5_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void set_EP5_OUT_BUFFER_CONTROL_RESET() volatile

Set EP5_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void clear_EP5_OUT_BUFFER_CONTROL_RESET() volatile

Clear EP5_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void toggle_EP5_OUT_BUFFER_CONTROL_RESET() volatile

Toggle EP5_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline bool get_EP5_OUT_BUFFER_CONTROL_PID_0() volatile

Get EP5_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void set_EP5_OUT_BUFFER_CONTROL_PID_0() volatile

Set EP5_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void clear_EP5_OUT_BUFFER_CONTROL_PID_0() volatile

Clear EP5_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void toggle_EP5_OUT_BUFFER_CONTROL_PID_0() volatile

Toggle EP5_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline bool get_EP5_OUT_BUFFER_CONTROL_LAST_0() volatile

Get EP5_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void set_EP5_OUT_BUFFER_CONTROL_LAST_0() volatile

Set EP5_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void clear_EP5_OUT_BUFFER_CONTROL_LAST_0() volatile

Clear EP5_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void toggle_EP5_OUT_BUFFER_CONTROL_LAST_0() volatile

Toggle EP5_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline bool get_EP5_OUT_BUFFER_CONTROL_FULL_0() volatile

Get EP5_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP5_OUT_BUFFER_CONTROL_FULL_0() volatile

Set EP5_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP5_OUT_BUFFER_CONTROL_FULL_0() volatile

Clear EP5_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP5_OUT_BUFFER_CONTROL_FULL_0() volatile

Toggle EP5_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline uint16_t get_EP5_OUT_BUFFER_CONTROL_LENGTH_1() volatile

Get EP5_OUT_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline void set_EP5_OUT_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile

Set EP5_OUT_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline bool get_EP5_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Get EP5_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP5_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Set EP5_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP5_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Clear EP5_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP5_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Toggle EP5_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline USBCTRL_DPRAM_EP5_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET get_EP5_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile

Get EP5_OUT_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline void set_EP5_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(USBCTRL_DPRAM_EP5_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET value) volatile

Set EP5_OUT_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline bool get_EP5_OUT_BUFFER_CONTROL_PID_1() volatile

Get EP5_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void set_EP5_OUT_BUFFER_CONTROL_PID_1() volatile

Set EP5_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void clear_EP5_OUT_BUFFER_CONTROL_PID_1() volatile

Clear EP5_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void toggle_EP5_OUT_BUFFER_CONTROL_PID_1() volatile

Toggle EP5_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline bool get_EP5_OUT_BUFFER_CONTROL_LAST_1() volatile

Get EP5_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void set_EP5_OUT_BUFFER_CONTROL_LAST_1() volatile

Set EP5_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void clear_EP5_OUT_BUFFER_CONTROL_LAST_1() volatile

Clear EP5_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void toggle_EP5_OUT_BUFFER_CONTROL_LAST_1() volatile

Toggle EP5_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline bool get_EP5_OUT_BUFFER_CONTROL_FULL_1() volatile

Get EP5_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP5_OUT_BUFFER_CONTROL_FULL_1() volatile

Set EP5_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP5_OUT_BUFFER_CONTROL_FULL_1() volatile

Clear EP5_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP5_OUT_BUFFER_CONTROL_FULL_1() volatile

Toggle EP5_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void get_EP5_OUT_BUFFER_CONTROL(uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET, bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1, bool &AVAILABLE_1, USBCTRL_DPRAM_EP5_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET &DOUBLE_BUFFER_ISO_OFFSET, bool &PID_1, bool &LAST_1, bool &FULL_1) volatile

Get all of EP5_OUT_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline void set_EP5_OUT_BUFFER_CONTROL(uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET, bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1, bool AVAILABLE_1, USBCTRL_DPRAM_EP5_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET DOUBLE_BUFFER_ISO_OFFSET, bool PID_1, bool LAST_1, bool FULL_1) volatile

Set all of EP5_OUT_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline uint16_t get_EP6_IN_BUFFER_CONTROL_LENGTH_0() volatile

Get EP6_IN_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline void set_EP6_IN_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile

Set EP6_IN_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline bool get_EP6_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Get EP6_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP6_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Set EP6_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP6_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Clear EP6_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP6_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Toggle EP6_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline bool get_EP6_IN_BUFFER_CONTROL_STALL() volatile

Get EP6_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void set_EP6_IN_BUFFER_CONTROL_STALL() volatile

Set EP6_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void clear_EP6_IN_BUFFER_CONTROL_STALL() volatile

Clear EP6_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void toggle_EP6_IN_BUFFER_CONTROL_STALL() volatile

Toggle EP6_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline bool get_EP6_IN_BUFFER_CONTROL_RESET() volatile

Get EP6_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void set_EP6_IN_BUFFER_CONTROL_RESET() volatile

Set EP6_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void clear_EP6_IN_BUFFER_CONTROL_RESET() volatile

Clear EP6_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void toggle_EP6_IN_BUFFER_CONTROL_RESET() volatile

Toggle EP6_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline bool get_EP6_IN_BUFFER_CONTROL_PID_0() volatile

Get EP6_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void set_EP6_IN_BUFFER_CONTROL_PID_0() volatile

Set EP6_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void clear_EP6_IN_BUFFER_CONTROL_PID_0() volatile

Clear EP6_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void toggle_EP6_IN_BUFFER_CONTROL_PID_0() volatile

Toggle EP6_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline bool get_EP6_IN_BUFFER_CONTROL_LAST_0() volatile

Get EP6_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void set_EP6_IN_BUFFER_CONTROL_LAST_0() volatile

Set EP6_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void clear_EP6_IN_BUFFER_CONTROL_LAST_0() volatile

Clear EP6_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void toggle_EP6_IN_BUFFER_CONTROL_LAST_0() volatile

Toggle EP6_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline bool get_EP6_IN_BUFFER_CONTROL_FULL_0() volatile

Get EP6_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP6_IN_BUFFER_CONTROL_FULL_0() volatile

Set EP6_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP6_IN_BUFFER_CONTROL_FULL_0() volatile

Clear EP6_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP6_IN_BUFFER_CONTROL_FULL_0() volatile

Toggle EP6_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline uint16_t get_EP6_IN_BUFFER_CONTROL_LENGTH_1() volatile

Get EP6_IN_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline void set_EP6_IN_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile

Set EP6_IN_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline bool get_EP6_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Get EP6_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP6_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Set EP6_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP6_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Clear EP6_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP6_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Toggle EP6_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline USBCTRL_DPRAM_EP6_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET get_EP6_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile

Get EP6_IN_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline void set_EP6_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(USBCTRL_DPRAM_EP6_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET value) volatile

Set EP6_IN_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline bool get_EP6_IN_BUFFER_CONTROL_PID_1() volatile

Get EP6_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void set_EP6_IN_BUFFER_CONTROL_PID_1() volatile

Set EP6_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void clear_EP6_IN_BUFFER_CONTROL_PID_1() volatile

Clear EP6_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void toggle_EP6_IN_BUFFER_CONTROL_PID_1() volatile

Toggle EP6_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline bool get_EP6_IN_BUFFER_CONTROL_LAST_1() volatile

Get EP6_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void set_EP6_IN_BUFFER_CONTROL_LAST_1() volatile

Set EP6_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void clear_EP6_IN_BUFFER_CONTROL_LAST_1() volatile

Clear EP6_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void toggle_EP6_IN_BUFFER_CONTROL_LAST_1() volatile

Toggle EP6_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline bool get_EP6_IN_BUFFER_CONTROL_FULL_1() volatile

Get EP6_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP6_IN_BUFFER_CONTROL_FULL_1() volatile

Set EP6_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP6_IN_BUFFER_CONTROL_FULL_1() volatile

Clear EP6_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP6_IN_BUFFER_CONTROL_FULL_1() volatile

Toggle EP6_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void get_EP6_IN_BUFFER_CONTROL(uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET, bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1, bool &AVAILABLE_1, USBCTRL_DPRAM_EP6_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET &DOUBLE_BUFFER_ISO_OFFSET, bool &PID_1, bool &LAST_1, bool &FULL_1) volatile

Get all of EP6_IN_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline void set_EP6_IN_BUFFER_CONTROL(uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET, bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1, bool AVAILABLE_1, USBCTRL_DPRAM_EP6_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET DOUBLE_BUFFER_ISO_OFFSET, bool PID_1, bool LAST_1, bool FULL_1) volatile

Set all of EP6_IN_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline uint16_t get_EP6_OUT_BUFFER_CONTROL_LENGTH_0() volatile

Get EP6_OUT_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline void set_EP6_OUT_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile

Set EP6_OUT_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline bool get_EP6_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Get EP6_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP6_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Set EP6_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP6_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Clear EP6_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP6_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Toggle EP6_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline bool get_EP6_OUT_BUFFER_CONTROL_STALL() volatile

Get EP6_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void set_EP6_OUT_BUFFER_CONTROL_STALL() volatile

Set EP6_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void clear_EP6_OUT_BUFFER_CONTROL_STALL() volatile

Clear EP6_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void toggle_EP6_OUT_BUFFER_CONTROL_STALL() volatile

Toggle EP6_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline bool get_EP6_OUT_BUFFER_CONTROL_RESET() volatile

Get EP6_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void set_EP6_OUT_BUFFER_CONTROL_RESET() volatile

Set EP6_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void clear_EP6_OUT_BUFFER_CONTROL_RESET() volatile

Clear EP6_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void toggle_EP6_OUT_BUFFER_CONTROL_RESET() volatile

Toggle EP6_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline bool get_EP6_OUT_BUFFER_CONTROL_PID_0() volatile

Get EP6_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void set_EP6_OUT_BUFFER_CONTROL_PID_0() volatile

Set EP6_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void clear_EP6_OUT_BUFFER_CONTROL_PID_0() volatile

Clear EP6_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void toggle_EP6_OUT_BUFFER_CONTROL_PID_0() volatile

Toggle EP6_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline bool get_EP6_OUT_BUFFER_CONTROL_LAST_0() volatile

Get EP6_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void set_EP6_OUT_BUFFER_CONTROL_LAST_0() volatile

Set EP6_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void clear_EP6_OUT_BUFFER_CONTROL_LAST_0() volatile

Clear EP6_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void toggle_EP6_OUT_BUFFER_CONTROL_LAST_0() volatile

Toggle EP6_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline bool get_EP6_OUT_BUFFER_CONTROL_FULL_0() volatile

Get EP6_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP6_OUT_BUFFER_CONTROL_FULL_0() volatile

Set EP6_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP6_OUT_BUFFER_CONTROL_FULL_0() volatile

Clear EP6_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP6_OUT_BUFFER_CONTROL_FULL_0() volatile

Toggle EP6_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline uint16_t get_EP6_OUT_BUFFER_CONTROL_LENGTH_1() volatile

Get EP6_OUT_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline void set_EP6_OUT_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile

Set EP6_OUT_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline bool get_EP6_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Get EP6_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP6_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Set EP6_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP6_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Clear EP6_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP6_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Toggle EP6_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline USBCTRL_DPRAM_EP6_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET get_EP6_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile

Get EP6_OUT_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline void set_EP6_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(USBCTRL_DPRAM_EP6_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET value) volatile

Set EP6_OUT_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline bool get_EP6_OUT_BUFFER_CONTROL_PID_1() volatile

Get EP6_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void set_EP6_OUT_BUFFER_CONTROL_PID_1() volatile

Set EP6_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void clear_EP6_OUT_BUFFER_CONTROL_PID_1() volatile

Clear EP6_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void toggle_EP6_OUT_BUFFER_CONTROL_PID_1() volatile

Toggle EP6_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline bool get_EP6_OUT_BUFFER_CONTROL_LAST_1() volatile

Get EP6_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void set_EP6_OUT_BUFFER_CONTROL_LAST_1() volatile

Set EP6_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void clear_EP6_OUT_BUFFER_CONTROL_LAST_1() volatile

Clear EP6_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void toggle_EP6_OUT_BUFFER_CONTROL_LAST_1() volatile

Toggle EP6_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline bool get_EP6_OUT_BUFFER_CONTROL_FULL_1() volatile

Get EP6_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP6_OUT_BUFFER_CONTROL_FULL_1() volatile

Set EP6_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP6_OUT_BUFFER_CONTROL_FULL_1() volatile

Clear EP6_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP6_OUT_BUFFER_CONTROL_FULL_1() volatile

Toggle EP6_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void get_EP6_OUT_BUFFER_CONTROL(uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET, bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1, bool &AVAILABLE_1, USBCTRL_DPRAM_EP6_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET &DOUBLE_BUFFER_ISO_OFFSET, bool &PID_1, bool &LAST_1, bool &FULL_1) volatile

Get all of EP6_OUT_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline void set_EP6_OUT_BUFFER_CONTROL(uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET, bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1, bool AVAILABLE_1, USBCTRL_DPRAM_EP6_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET DOUBLE_BUFFER_ISO_OFFSET, bool PID_1, bool LAST_1, bool FULL_1) volatile

Set all of EP6_OUT_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline uint16_t get_EP7_IN_BUFFER_CONTROL_LENGTH_0() volatile

Get EP7_IN_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline void set_EP7_IN_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile

Set EP7_IN_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline bool get_EP7_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Get EP7_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP7_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Set EP7_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP7_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Clear EP7_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP7_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Toggle EP7_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline bool get_EP7_IN_BUFFER_CONTROL_STALL() volatile

Get EP7_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void set_EP7_IN_BUFFER_CONTROL_STALL() volatile

Set EP7_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void clear_EP7_IN_BUFFER_CONTROL_STALL() volatile

Clear EP7_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void toggle_EP7_IN_BUFFER_CONTROL_STALL() volatile

Toggle EP7_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline bool get_EP7_IN_BUFFER_CONTROL_RESET() volatile

Get EP7_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void set_EP7_IN_BUFFER_CONTROL_RESET() volatile

Set EP7_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void clear_EP7_IN_BUFFER_CONTROL_RESET() volatile

Clear EP7_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void toggle_EP7_IN_BUFFER_CONTROL_RESET() volatile

Toggle EP7_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline bool get_EP7_IN_BUFFER_CONTROL_PID_0() volatile

Get EP7_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void set_EP7_IN_BUFFER_CONTROL_PID_0() volatile

Set EP7_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void clear_EP7_IN_BUFFER_CONTROL_PID_0() volatile

Clear EP7_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void toggle_EP7_IN_BUFFER_CONTROL_PID_0() volatile

Toggle EP7_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline bool get_EP7_IN_BUFFER_CONTROL_LAST_0() volatile

Get EP7_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void set_EP7_IN_BUFFER_CONTROL_LAST_0() volatile

Set EP7_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void clear_EP7_IN_BUFFER_CONTROL_LAST_0() volatile

Clear EP7_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void toggle_EP7_IN_BUFFER_CONTROL_LAST_0() volatile

Toggle EP7_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline bool get_EP7_IN_BUFFER_CONTROL_FULL_0() volatile

Get EP7_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP7_IN_BUFFER_CONTROL_FULL_0() volatile

Set EP7_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP7_IN_BUFFER_CONTROL_FULL_0() volatile

Clear EP7_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP7_IN_BUFFER_CONTROL_FULL_0() volatile

Toggle EP7_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline uint16_t get_EP7_IN_BUFFER_CONTROL_LENGTH_1() volatile

Get EP7_IN_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline void set_EP7_IN_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile

Set EP7_IN_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline bool get_EP7_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Get EP7_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP7_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Set EP7_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP7_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Clear EP7_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP7_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Toggle EP7_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline USBCTRL_DPRAM_EP7_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET get_EP7_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile

Get EP7_IN_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline void set_EP7_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(USBCTRL_DPRAM_EP7_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET value) volatile

Set EP7_IN_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline bool get_EP7_IN_BUFFER_CONTROL_PID_1() volatile

Get EP7_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void set_EP7_IN_BUFFER_CONTROL_PID_1() volatile

Set EP7_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void clear_EP7_IN_BUFFER_CONTROL_PID_1() volatile

Clear EP7_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void toggle_EP7_IN_BUFFER_CONTROL_PID_1() volatile

Toggle EP7_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline bool get_EP7_IN_BUFFER_CONTROL_LAST_1() volatile

Get EP7_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void set_EP7_IN_BUFFER_CONTROL_LAST_1() volatile

Set EP7_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void clear_EP7_IN_BUFFER_CONTROL_LAST_1() volatile

Clear EP7_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void toggle_EP7_IN_BUFFER_CONTROL_LAST_1() volatile

Toggle EP7_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline bool get_EP7_IN_BUFFER_CONTROL_FULL_1() volatile

Get EP7_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP7_IN_BUFFER_CONTROL_FULL_1() volatile

Set EP7_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP7_IN_BUFFER_CONTROL_FULL_1() volatile

Clear EP7_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP7_IN_BUFFER_CONTROL_FULL_1() volatile

Toggle EP7_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void get_EP7_IN_BUFFER_CONTROL(uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET, bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1, bool &AVAILABLE_1, USBCTRL_DPRAM_EP7_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET &DOUBLE_BUFFER_ISO_OFFSET, bool &PID_1, bool &LAST_1, bool &FULL_1) volatile

Get all of EP7_IN_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline void set_EP7_IN_BUFFER_CONTROL(uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET, bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1, bool AVAILABLE_1, USBCTRL_DPRAM_EP7_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET DOUBLE_BUFFER_ISO_OFFSET, bool PID_1, bool LAST_1, bool FULL_1) volatile

Set all of EP7_IN_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline uint16_t get_EP7_OUT_BUFFER_CONTROL_LENGTH_0() volatile

Get EP7_OUT_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline void set_EP7_OUT_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile

Set EP7_OUT_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline bool get_EP7_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Get EP7_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP7_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Set EP7_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP7_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Clear EP7_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP7_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Toggle EP7_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline bool get_EP7_OUT_BUFFER_CONTROL_STALL() volatile

Get EP7_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void set_EP7_OUT_BUFFER_CONTROL_STALL() volatile

Set EP7_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void clear_EP7_OUT_BUFFER_CONTROL_STALL() volatile

Clear EP7_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void toggle_EP7_OUT_BUFFER_CONTROL_STALL() volatile

Toggle EP7_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline bool get_EP7_OUT_BUFFER_CONTROL_RESET() volatile

Get EP7_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void set_EP7_OUT_BUFFER_CONTROL_RESET() volatile

Set EP7_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void clear_EP7_OUT_BUFFER_CONTROL_RESET() volatile

Clear EP7_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void toggle_EP7_OUT_BUFFER_CONTROL_RESET() volatile

Toggle EP7_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline bool get_EP7_OUT_BUFFER_CONTROL_PID_0() volatile

Get EP7_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void set_EP7_OUT_BUFFER_CONTROL_PID_0() volatile

Set EP7_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void clear_EP7_OUT_BUFFER_CONTROL_PID_0() volatile

Clear EP7_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void toggle_EP7_OUT_BUFFER_CONTROL_PID_0() volatile

Toggle EP7_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline bool get_EP7_OUT_BUFFER_CONTROL_LAST_0() volatile

Get EP7_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void set_EP7_OUT_BUFFER_CONTROL_LAST_0() volatile

Set EP7_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void clear_EP7_OUT_BUFFER_CONTROL_LAST_0() volatile

Clear EP7_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void toggle_EP7_OUT_BUFFER_CONTROL_LAST_0() volatile

Toggle EP7_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline bool get_EP7_OUT_BUFFER_CONTROL_FULL_0() volatile

Get EP7_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP7_OUT_BUFFER_CONTROL_FULL_0() volatile

Set EP7_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP7_OUT_BUFFER_CONTROL_FULL_0() volatile

Clear EP7_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP7_OUT_BUFFER_CONTROL_FULL_0() volatile

Toggle EP7_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline uint16_t get_EP7_OUT_BUFFER_CONTROL_LENGTH_1() volatile

Get EP7_OUT_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline void set_EP7_OUT_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile

Set EP7_OUT_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline bool get_EP7_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Get EP7_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP7_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Set EP7_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP7_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Clear EP7_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP7_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Toggle EP7_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline USBCTRL_DPRAM_EP7_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET get_EP7_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile

Get EP7_OUT_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline void set_EP7_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(USBCTRL_DPRAM_EP7_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET value) volatile

Set EP7_OUT_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline bool get_EP7_OUT_BUFFER_CONTROL_PID_1() volatile

Get EP7_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void set_EP7_OUT_BUFFER_CONTROL_PID_1() volatile

Set EP7_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void clear_EP7_OUT_BUFFER_CONTROL_PID_1() volatile

Clear EP7_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void toggle_EP7_OUT_BUFFER_CONTROL_PID_1() volatile

Toggle EP7_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline bool get_EP7_OUT_BUFFER_CONTROL_LAST_1() volatile

Get EP7_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void set_EP7_OUT_BUFFER_CONTROL_LAST_1() volatile

Set EP7_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void clear_EP7_OUT_BUFFER_CONTROL_LAST_1() volatile

Clear EP7_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void toggle_EP7_OUT_BUFFER_CONTROL_LAST_1() volatile

Toggle EP7_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline bool get_EP7_OUT_BUFFER_CONTROL_FULL_1() volatile

Get EP7_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP7_OUT_BUFFER_CONTROL_FULL_1() volatile

Set EP7_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP7_OUT_BUFFER_CONTROL_FULL_1() volatile

Clear EP7_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP7_OUT_BUFFER_CONTROL_FULL_1() volatile

Toggle EP7_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void get_EP7_OUT_BUFFER_CONTROL(uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET, bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1, bool &AVAILABLE_1, USBCTRL_DPRAM_EP7_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET &DOUBLE_BUFFER_ISO_OFFSET, bool &PID_1, bool &LAST_1, bool &FULL_1) volatile

Get all of EP7_OUT_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline void set_EP7_OUT_BUFFER_CONTROL(uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET, bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1, bool AVAILABLE_1, USBCTRL_DPRAM_EP7_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET DOUBLE_BUFFER_ISO_OFFSET, bool PID_1, bool LAST_1, bool FULL_1) volatile

Set all of EP7_OUT_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline uint16_t get_EP8_IN_BUFFER_CONTROL_LENGTH_0() volatile

Get EP8_IN_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline void set_EP8_IN_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile

Set EP8_IN_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline bool get_EP8_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Get EP8_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP8_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Set EP8_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP8_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Clear EP8_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP8_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Toggle EP8_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline bool get_EP8_IN_BUFFER_CONTROL_STALL() volatile

Get EP8_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void set_EP8_IN_BUFFER_CONTROL_STALL() volatile

Set EP8_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void clear_EP8_IN_BUFFER_CONTROL_STALL() volatile

Clear EP8_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void toggle_EP8_IN_BUFFER_CONTROL_STALL() volatile

Toggle EP8_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline bool get_EP8_IN_BUFFER_CONTROL_RESET() volatile

Get EP8_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void set_EP8_IN_BUFFER_CONTROL_RESET() volatile

Set EP8_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void clear_EP8_IN_BUFFER_CONTROL_RESET() volatile

Clear EP8_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void toggle_EP8_IN_BUFFER_CONTROL_RESET() volatile

Toggle EP8_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline bool get_EP8_IN_BUFFER_CONTROL_PID_0() volatile

Get EP8_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void set_EP8_IN_BUFFER_CONTROL_PID_0() volatile

Set EP8_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void clear_EP8_IN_BUFFER_CONTROL_PID_0() volatile

Clear EP8_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void toggle_EP8_IN_BUFFER_CONTROL_PID_0() volatile

Toggle EP8_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline bool get_EP8_IN_BUFFER_CONTROL_LAST_0() volatile

Get EP8_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void set_EP8_IN_BUFFER_CONTROL_LAST_0() volatile

Set EP8_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void clear_EP8_IN_BUFFER_CONTROL_LAST_0() volatile

Clear EP8_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void toggle_EP8_IN_BUFFER_CONTROL_LAST_0() volatile

Toggle EP8_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline bool get_EP8_IN_BUFFER_CONTROL_FULL_0() volatile

Get EP8_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP8_IN_BUFFER_CONTROL_FULL_0() volatile

Set EP8_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP8_IN_BUFFER_CONTROL_FULL_0() volatile

Clear EP8_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP8_IN_BUFFER_CONTROL_FULL_0() volatile

Toggle EP8_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline uint16_t get_EP8_IN_BUFFER_CONTROL_LENGTH_1() volatile

Get EP8_IN_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline void set_EP8_IN_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile

Set EP8_IN_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline bool get_EP8_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Get EP8_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP8_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Set EP8_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP8_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Clear EP8_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP8_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Toggle EP8_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline USBCTRL_DPRAM_EP8_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET get_EP8_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile

Get EP8_IN_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline void set_EP8_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(USBCTRL_DPRAM_EP8_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET value) volatile

Set EP8_IN_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline bool get_EP8_IN_BUFFER_CONTROL_PID_1() volatile

Get EP8_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void set_EP8_IN_BUFFER_CONTROL_PID_1() volatile

Set EP8_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void clear_EP8_IN_BUFFER_CONTROL_PID_1() volatile

Clear EP8_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void toggle_EP8_IN_BUFFER_CONTROL_PID_1() volatile

Toggle EP8_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline bool get_EP8_IN_BUFFER_CONTROL_LAST_1() volatile

Get EP8_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void set_EP8_IN_BUFFER_CONTROL_LAST_1() volatile

Set EP8_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void clear_EP8_IN_BUFFER_CONTROL_LAST_1() volatile

Clear EP8_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void toggle_EP8_IN_BUFFER_CONTROL_LAST_1() volatile

Toggle EP8_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline bool get_EP8_IN_BUFFER_CONTROL_FULL_1() volatile

Get EP8_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP8_IN_BUFFER_CONTROL_FULL_1() volatile

Set EP8_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP8_IN_BUFFER_CONTROL_FULL_1() volatile

Clear EP8_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP8_IN_BUFFER_CONTROL_FULL_1() volatile

Toggle EP8_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void get_EP8_IN_BUFFER_CONTROL(uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET, bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1, bool &AVAILABLE_1, USBCTRL_DPRAM_EP8_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET &DOUBLE_BUFFER_ISO_OFFSET, bool &PID_1, bool &LAST_1, bool &FULL_1) volatile

Get all of EP8_IN_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline void set_EP8_IN_BUFFER_CONTROL(uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET, bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1, bool AVAILABLE_1, USBCTRL_DPRAM_EP8_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET DOUBLE_BUFFER_ISO_OFFSET, bool PID_1, bool LAST_1, bool FULL_1) volatile

Set all of EP8_IN_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline uint16_t get_EP8_OUT_BUFFER_CONTROL_LENGTH_0() volatile

Get EP8_OUT_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline void set_EP8_OUT_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile

Set EP8_OUT_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline bool get_EP8_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Get EP8_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP8_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Set EP8_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP8_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Clear EP8_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP8_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Toggle EP8_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline bool get_EP8_OUT_BUFFER_CONTROL_STALL() volatile

Get EP8_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void set_EP8_OUT_BUFFER_CONTROL_STALL() volatile

Set EP8_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void clear_EP8_OUT_BUFFER_CONTROL_STALL() volatile

Clear EP8_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void toggle_EP8_OUT_BUFFER_CONTROL_STALL() volatile

Toggle EP8_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline bool get_EP8_OUT_BUFFER_CONTROL_RESET() volatile

Get EP8_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void set_EP8_OUT_BUFFER_CONTROL_RESET() volatile

Set EP8_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void clear_EP8_OUT_BUFFER_CONTROL_RESET() volatile

Clear EP8_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void toggle_EP8_OUT_BUFFER_CONTROL_RESET() volatile

Toggle EP8_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline bool get_EP8_OUT_BUFFER_CONTROL_PID_0() volatile

Get EP8_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void set_EP8_OUT_BUFFER_CONTROL_PID_0() volatile

Set EP8_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void clear_EP8_OUT_BUFFER_CONTROL_PID_0() volatile

Clear EP8_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void toggle_EP8_OUT_BUFFER_CONTROL_PID_0() volatile

Toggle EP8_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline bool get_EP8_OUT_BUFFER_CONTROL_LAST_0() volatile

Get EP8_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void set_EP8_OUT_BUFFER_CONTROL_LAST_0() volatile

Set EP8_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void clear_EP8_OUT_BUFFER_CONTROL_LAST_0() volatile

Clear EP8_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void toggle_EP8_OUT_BUFFER_CONTROL_LAST_0() volatile

Toggle EP8_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline bool get_EP8_OUT_BUFFER_CONTROL_FULL_0() volatile

Get EP8_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP8_OUT_BUFFER_CONTROL_FULL_0() volatile

Set EP8_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP8_OUT_BUFFER_CONTROL_FULL_0() volatile

Clear EP8_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP8_OUT_BUFFER_CONTROL_FULL_0() volatile

Toggle EP8_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline uint16_t get_EP8_OUT_BUFFER_CONTROL_LENGTH_1() volatile

Get EP8_OUT_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline void set_EP8_OUT_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile

Set EP8_OUT_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline bool get_EP8_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Get EP8_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP8_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Set EP8_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP8_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Clear EP8_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP8_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Toggle EP8_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline USBCTRL_DPRAM_EP8_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET get_EP8_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile

Get EP8_OUT_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline void set_EP8_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(USBCTRL_DPRAM_EP8_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET value) volatile

Set EP8_OUT_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline bool get_EP8_OUT_BUFFER_CONTROL_PID_1() volatile

Get EP8_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void set_EP8_OUT_BUFFER_CONTROL_PID_1() volatile

Set EP8_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void clear_EP8_OUT_BUFFER_CONTROL_PID_1() volatile

Clear EP8_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void toggle_EP8_OUT_BUFFER_CONTROL_PID_1() volatile

Toggle EP8_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline bool get_EP8_OUT_BUFFER_CONTROL_LAST_1() volatile

Get EP8_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void set_EP8_OUT_BUFFER_CONTROL_LAST_1() volatile

Set EP8_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void clear_EP8_OUT_BUFFER_CONTROL_LAST_1() volatile

Clear EP8_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void toggle_EP8_OUT_BUFFER_CONTROL_LAST_1() volatile

Toggle EP8_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline bool get_EP8_OUT_BUFFER_CONTROL_FULL_1() volatile

Get EP8_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP8_OUT_BUFFER_CONTROL_FULL_1() volatile

Set EP8_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP8_OUT_BUFFER_CONTROL_FULL_1() volatile

Clear EP8_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP8_OUT_BUFFER_CONTROL_FULL_1() volatile

Toggle EP8_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void get_EP8_OUT_BUFFER_CONTROL(uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET, bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1, bool &AVAILABLE_1, USBCTRL_DPRAM_EP8_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET &DOUBLE_BUFFER_ISO_OFFSET, bool &PID_1, bool &LAST_1, bool &FULL_1) volatile

Get all of EP8_OUT_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline void set_EP8_OUT_BUFFER_CONTROL(uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET, bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1, bool AVAILABLE_1, USBCTRL_DPRAM_EP8_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET DOUBLE_BUFFER_ISO_OFFSET, bool PID_1, bool LAST_1, bool FULL_1) volatile

Set all of EP8_OUT_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline uint16_t get_EP9_IN_BUFFER_CONTROL_LENGTH_0() volatile

Get EP9_IN_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline void set_EP9_IN_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile

Set EP9_IN_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline bool get_EP9_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Get EP9_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP9_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Set EP9_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP9_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Clear EP9_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP9_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Toggle EP9_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline bool get_EP9_IN_BUFFER_CONTROL_STALL() volatile

Get EP9_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void set_EP9_IN_BUFFER_CONTROL_STALL() volatile

Set EP9_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void clear_EP9_IN_BUFFER_CONTROL_STALL() volatile

Clear EP9_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void toggle_EP9_IN_BUFFER_CONTROL_STALL() volatile

Toggle EP9_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline bool get_EP9_IN_BUFFER_CONTROL_RESET() volatile

Get EP9_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void set_EP9_IN_BUFFER_CONTROL_RESET() volatile

Set EP9_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void clear_EP9_IN_BUFFER_CONTROL_RESET() volatile

Clear EP9_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void toggle_EP9_IN_BUFFER_CONTROL_RESET() volatile

Toggle EP9_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline bool get_EP9_IN_BUFFER_CONTROL_PID_0() volatile

Get EP9_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void set_EP9_IN_BUFFER_CONTROL_PID_0() volatile

Set EP9_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void clear_EP9_IN_BUFFER_CONTROL_PID_0() volatile

Clear EP9_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void toggle_EP9_IN_BUFFER_CONTROL_PID_0() volatile

Toggle EP9_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline bool get_EP9_IN_BUFFER_CONTROL_LAST_0() volatile

Get EP9_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void set_EP9_IN_BUFFER_CONTROL_LAST_0() volatile

Set EP9_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void clear_EP9_IN_BUFFER_CONTROL_LAST_0() volatile

Clear EP9_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void toggle_EP9_IN_BUFFER_CONTROL_LAST_0() volatile

Toggle EP9_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline bool get_EP9_IN_BUFFER_CONTROL_FULL_0() volatile

Get EP9_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP9_IN_BUFFER_CONTROL_FULL_0() volatile

Set EP9_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP9_IN_BUFFER_CONTROL_FULL_0() volatile

Clear EP9_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP9_IN_BUFFER_CONTROL_FULL_0() volatile

Toggle EP9_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline uint16_t get_EP9_IN_BUFFER_CONTROL_LENGTH_1() volatile

Get EP9_IN_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline void set_EP9_IN_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile

Set EP9_IN_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline bool get_EP9_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Get EP9_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP9_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Set EP9_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP9_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Clear EP9_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP9_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Toggle EP9_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline USBCTRL_DPRAM_EP9_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET get_EP9_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile

Get EP9_IN_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline void set_EP9_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(USBCTRL_DPRAM_EP9_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET value) volatile

Set EP9_IN_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline bool get_EP9_IN_BUFFER_CONTROL_PID_1() volatile

Get EP9_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void set_EP9_IN_BUFFER_CONTROL_PID_1() volatile

Set EP9_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void clear_EP9_IN_BUFFER_CONTROL_PID_1() volatile

Clear EP9_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void toggle_EP9_IN_BUFFER_CONTROL_PID_1() volatile

Toggle EP9_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline bool get_EP9_IN_BUFFER_CONTROL_LAST_1() volatile

Get EP9_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void set_EP9_IN_BUFFER_CONTROL_LAST_1() volatile

Set EP9_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void clear_EP9_IN_BUFFER_CONTROL_LAST_1() volatile

Clear EP9_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void toggle_EP9_IN_BUFFER_CONTROL_LAST_1() volatile

Toggle EP9_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline bool get_EP9_IN_BUFFER_CONTROL_FULL_1() volatile

Get EP9_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP9_IN_BUFFER_CONTROL_FULL_1() volatile

Set EP9_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP9_IN_BUFFER_CONTROL_FULL_1() volatile

Clear EP9_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP9_IN_BUFFER_CONTROL_FULL_1() volatile

Toggle EP9_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void get_EP9_IN_BUFFER_CONTROL(uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET, bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1, bool &AVAILABLE_1, USBCTRL_DPRAM_EP9_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET &DOUBLE_BUFFER_ISO_OFFSET, bool &PID_1, bool &LAST_1, bool &FULL_1) volatile

Get all of EP9_IN_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline void set_EP9_IN_BUFFER_CONTROL(uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET, bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1, bool AVAILABLE_1, USBCTRL_DPRAM_EP9_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET DOUBLE_BUFFER_ISO_OFFSET, bool PID_1, bool LAST_1, bool FULL_1) volatile

Set all of EP9_IN_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline uint16_t get_EP9_OUT_BUFFER_CONTROL_LENGTH_0() volatile

Get EP9_OUT_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline void set_EP9_OUT_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile

Set EP9_OUT_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline bool get_EP9_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Get EP9_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP9_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Set EP9_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP9_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Clear EP9_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP9_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Toggle EP9_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline bool get_EP9_OUT_BUFFER_CONTROL_STALL() volatile

Get EP9_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void set_EP9_OUT_BUFFER_CONTROL_STALL() volatile

Set EP9_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void clear_EP9_OUT_BUFFER_CONTROL_STALL() volatile

Clear EP9_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void toggle_EP9_OUT_BUFFER_CONTROL_STALL() volatile

Toggle EP9_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline bool get_EP9_OUT_BUFFER_CONTROL_RESET() volatile

Get EP9_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void set_EP9_OUT_BUFFER_CONTROL_RESET() volatile

Set EP9_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void clear_EP9_OUT_BUFFER_CONTROL_RESET() volatile

Clear EP9_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void toggle_EP9_OUT_BUFFER_CONTROL_RESET() volatile

Toggle EP9_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline bool get_EP9_OUT_BUFFER_CONTROL_PID_0() volatile

Get EP9_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void set_EP9_OUT_BUFFER_CONTROL_PID_0() volatile

Set EP9_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void clear_EP9_OUT_BUFFER_CONTROL_PID_0() volatile

Clear EP9_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void toggle_EP9_OUT_BUFFER_CONTROL_PID_0() volatile

Toggle EP9_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline bool get_EP9_OUT_BUFFER_CONTROL_LAST_0() volatile

Get EP9_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void set_EP9_OUT_BUFFER_CONTROL_LAST_0() volatile

Set EP9_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void clear_EP9_OUT_BUFFER_CONTROL_LAST_0() volatile

Clear EP9_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void toggle_EP9_OUT_BUFFER_CONTROL_LAST_0() volatile

Toggle EP9_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline bool get_EP9_OUT_BUFFER_CONTROL_FULL_0() volatile

Get EP9_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP9_OUT_BUFFER_CONTROL_FULL_0() volatile

Set EP9_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP9_OUT_BUFFER_CONTROL_FULL_0() volatile

Clear EP9_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP9_OUT_BUFFER_CONTROL_FULL_0() volatile

Toggle EP9_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline uint16_t get_EP9_OUT_BUFFER_CONTROL_LENGTH_1() volatile

Get EP9_OUT_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline void set_EP9_OUT_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile

Set EP9_OUT_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline bool get_EP9_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Get EP9_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP9_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Set EP9_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP9_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Clear EP9_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP9_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Toggle EP9_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline USBCTRL_DPRAM_EP9_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET get_EP9_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile

Get EP9_OUT_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline void set_EP9_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(USBCTRL_DPRAM_EP9_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET value) volatile

Set EP9_OUT_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline bool get_EP9_OUT_BUFFER_CONTROL_PID_1() volatile

Get EP9_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void set_EP9_OUT_BUFFER_CONTROL_PID_1() volatile

Set EP9_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void clear_EP9_OUT_BUFFER_CONTROL_PID_1() volatile

Clear EP9_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void toggle_EP9_OUT_BUFFER_CONTROL_PID_1() volatile

Toggle EP9_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline bool get_EP9_OUT_BUFFER_CONTROL_LAST_1() volatile

Get EP9_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void set_EP9_OUT_BUFFER_CONTROL_LAST_1() volatile

Set EP9_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void clear_EP9_OUT_BUFFER_CONTROL_LAST_1() volatile

Clear EP9_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void toggle_EP9_OUT_BUFFER_CONTROL_LAST_1() volatile

Toggle EP9_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline bool get_EP9_OUT_BUFFER_CONTROL_FULL_1() volatile

Get EP9_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP9_OUT_BUFFER_CONTROL_FULL_1() volatile

Set EP9_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP9_OUT_BUFFER_CONTROL_FULL_1() volatile

Clear EP9_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP9_OUT_BUFFER_CONTROL_FULL_1() volatile

Toggle EP9_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void get_EP9_OUT_BUFFER_CONTROL(uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET, bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1, bool &AVAILABLE_1, USBCTRL_DPRAM_EP9_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET &DOUBLE_BUFFER_ISO_OFFSET, bool &PID_1, bool &LAST_1, bool &FULL_1) volatile

Get all of EP9_OUT_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline void set_EP9_OUT_BUFFER_CONTROL(uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET, bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1, bool AVAILABLE_1, USBCTRL_DPRAM_EP9_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET DOUBLE_BUFFER_ISO_OFFSET, bool PID_1, bool LAST_1, bool FULL_1) volatile

Set all of EP9_OUT_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline uint16_t get_EP10_IN_BUFFER_CONTROL_LENGTH_0() volatile

Get EP10_IN_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline void set_EP10_IN_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile

Set EP10_IN_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline bool get_EP10_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Get EP10_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP10_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Set EP10_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP10_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Clear EP10_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP10_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Toggle EP10_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline bool get_EP10_IN_BUFFER_CONTROL_STALL() volatile

Get EP10_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void set_EP10_IN_BUFFER_CONTROL_STALL() volatile

Set EP10_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void clear_EP10_IN_BUFFER_CONTROL_STALL() volatile

Clear EP10_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void toggle_EP10_IN_BUFFER_CONTROL_STALL() volatile

Toggle EP10_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline bool get_EP10_IN_BUFFER_CONTROL_RESET() volatile

Get EP10_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void set_EP10_IN_BUFFER_CONTROL_RESET() volatile

Set EP10_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void clear_EP10_IN_BUFFER_CONTROL_RESET() volatile

Clear EP10_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void toggle_EP10_IN_BUFFER_CONTROL_RESET() volatile

Toggle EP10_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline bool get_EP10_IN_BUFFER_CONTROL_PID_0() volatile

Get EP10_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void set_EP10_IN_BUFFER_CONTROL_PID_0() volatile

Set EP10_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void clear_EP10_IN_BUFFER_CONTROL_PID_0() volatile

Clear EP10_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void toggle_EP10_IN_BUFFER_CONTROL_PID_0() volatile

Toggle EP10_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline bool get_EP10_IN_BUFFER_CONTROL_LAST_0() volatile

Get EP10_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void set_EP10_IN_BUFFER_CONTROL_LAST_0() volatile

Set EP10_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void clear_EP10_IN_BUFFER_CONTROL_LAST_0() volatile

Clear EP10_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void toggle_EP10_IN_BUFFER_CONTROL_LAST_0() volatile

Toggle EP10_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline bool get_EP10_IN_BUFFER_CONTROL_FULL_0() volatile

Get EP10_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP10_IN_BUFFER_CONTROL_FULL_0() volatile

Set EP10_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP10_IN_BUFFER_CONTROL_FULL_0() volatile

Clear EP10_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP10_IN_BUFFER_CONTROL_FULL_0() volatile

Toggle EP10_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline uint16_t get_EP10_IN_BUFFER_CONTROL_LENGTH_1() volatile

Get EP10_IN_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline void set_EP10_IN_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile

Set EP10_IN_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline bool get_EP10_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Get EP10_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP10_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Set EP10_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP10_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Clear EP10_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP10_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Toggle EP10_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline USBCTRL_DPRAM_EP10_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET get_EP10_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile

Get EP10_IN_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline void set_EP10_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(USBCTRL_DPRAM_EP10_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET value) volatile

Set EP10_IN_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline bool get_EP10_IN_BUFFER_CONTROL_PID_1() volatile

Get EP10_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void set_EP10_IN_BUFFER_CONTROL_PID_1() volatile

Set EP10_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void clear_EP10_IN_BUFFER_CONTROL_PID_1() volatile

Clear EP10_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void toggle_EP10_IN_BUFFER_CONTROL_PID_1() volatile

Toggle EP10_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline bool get_EP10_IN_BUFFER_CONTROL_LAST_1() volatile

Get EP10_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void set_EP10_IN_BUFFER_CONTROL_LAST_1() volatile

Set EP10_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void clear_EP10_IN_BUFFER_CONTROL_LAST_1() volatile

Clear EP10_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void toggle_EP10_IN_BUFFER_CONTROL_LAST_1() volatile

Toggle EP10_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline bool get_EP10_IN_BUFFER_CONTROL_FULL_1() volatile

Get EP10_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP10_IN_BUFFER_CONTROL_FULL_1() volatile

Set EP10_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP10_IN_BUFFER_CONTROL_FULL_1() volatile

Clear EP10_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP10_IN_BUFFER_CONTROL_FULL_1() volatile

Toggle EP10_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void get_EP10_IN_BUFFER_CONTROL(uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET, bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1, bool &AVAILABLE_1, USBCTRL_DPRAM_EP10_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET &DOUBLE_BUFFER_ISO_OFFSET, bool &PID_1, bool &LAST_1, bool &FULL_1) volatile

Get all of EP10_IN_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline void set_EP10_IN_BUFFER_CONTROL(uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET, bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1, bool AVAILABLE_1, USBCTRL_DPRAM_EP10_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET DOUBLE_BUFFER_ISO_OFFSET, bool PID_1, bool LAST_1, bool FULL_1) volatile

Set all of EP10_IN_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline uint16_t get_EP10_OUT_BUFFER_CONTROL_LENGTH_0() volatile

Get EP10_OUT_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline void set_EP10_OUT_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile

Set EP10_OUT_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline bool get_EP10_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Get EP10_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP10_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Set EP10_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP10_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Clear EP10_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP10_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Toggle EP10_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline bool get_EP10_OUT_BUFFER_CONTROL_STALL() volatile

Get EP10_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void set_EP10_OUT_BUFFER_CONTROL_STALL() volatile

Set EP10_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void clear_EP10_OUT_BUFFER_CONTROL_STALL() volatile

Clear EP10_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void toggle_EP10_OUT_BUFFER_CONTROL_STALL() volatile

Toggle EP10_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline bool get_EP10_OUT_BUFFER_CONTROL_RESET() volatile

Get EP10_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void set_EP10_OUT_BUFFER_CONTROL_RESET() volatile

Set EP10_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void clear_EP10_OUT_BUFFER_CONTROL_RESET() volatile

Clear EP10_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void toggle_EP10_OUT_BUFFER_CONTROL_RESET() volatile

Toggle EP10_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline bool get_EP10_OUT_BUFFER_CONTROL_PID_0() volatile

Get EP10_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void set_EP10_OUT_BUFFER_CONTROL_PID_0() volatile

Set EP10_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void clear_EP10_OUT_BUFFER_CONTROL_PID_0() volatile

Clear EP10_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void toggle_EP10_OUT_BUFFER_CONTROL_PID_0() volatile

Toggle EP10_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline bool get_EP10_OUT_BUFFER_CONTROL_LAST_0() volatile

Get EP10_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void set_EP10_OUT_BUFFER_CONTROL_LAST_0() volatile

Set EP10_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void clear_EP10_OUT_BUFFER_CONTROL_LAST_0() volatile

Clear EP10_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void toggle_EP10_OUT_BUFFER_CONTROL_LAST_0() volatile

Toggle EP10_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline bool get_EP10_OUT_BUFFER_CONTROL_FULL_0() volatile

Get EP10_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP10_OUT_BUFFER_CONTROL_FULL_0() volatile

Set EP10_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP10_OUT_BUFFER_CONTROL_FULL_0() volatile

Clear EP10_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP10_OUT_BUFFER_CONTROL_FULL_0() volatile

Toggle EP10_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline uint16_t get_EP10_OUT_BUFFER_CONTROL_LENGTH_1() volatile

Get EP10_OUT_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline void set_EP10_OUT_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile

Set EP10_OUT_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline bool get_EP10_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Get EP10_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP10_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Set EP10_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP10_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Clear EP10_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP10_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Toggle EP10_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline USBCTRL_DPRAM_EP10_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET get_EP10_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile

Get EP10_OUT_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline void set_EP10_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(USBCTRL_DPRAM_EP10_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET value) volatile

Set EP10_OUT_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline bool get_EP10_OUT_BUFFER_CONTROL_PID_1() volatile

Get EP10_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void set_EP10_OUT_BUFFER_CONTROL_PID_1() volatile

Set EP10_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void clear_EP10_OUT_BUFFER_CONTROL_PID_1() volatile

Clear EP10_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void toggle_EP10_OUT_BUFFER_CONTROL_PID_1() volatile

Toggle EP10_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline bool get_EP10_OUT_BUFFER_CONTROL_LAST_1() volatile

Get EP10_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void set_EP10_OUT_BUFFER_CONTROL_LAST_1() volatile

Set EP10_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void clear_EP10_OUT_BUFFER_CONTROL_LAST_1() volatile

Clear EP10_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void toggle_EP10_OUT_BUFFER_CONTROL_LAST_1() volatile

Toggle EP10_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline bool get_EP10_OUT_BUFFER_CONTROL_FULL_1() volatile

Get EP10_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP10_OUT_BUFFER_CONTROL_FULL_1() volatile

Set EP10_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP10_OUT_BUFFER_CONTROL_FULL_1() volatile

Clear EP10_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP10_OUT_BUFFER_CONTROL_FULL_1() volatile

Toggle EP10_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void get_EP10_OUT_BUFFER_CONTROL(uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET, bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1, bool &AVAILABLE_1, USBCTRL_DPRAM_EP10_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET &DOUBLE_BUFFER_ISO_OFFSET, bool &PID_1, bool &LAST_1, bool &FULL_1) volatile

Get all of EP10_OUT_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline void set_EP10_OUT_BUFFER_CONTROL(uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET, bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1, bool AVAILABLE_1, USBCTRL_DPRAM_EP10_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET DOUBLE_BUFFER_ISO_OFFSET, bool PID_1, bool LAST_1, bool FULL_1) volatile

Set all of EP10_OUT_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline uint16_t get_EP11_IN_BUFFER_CONTROL_LENGTH_0() volatile

Get EP11_IN_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline void set_EP11_IN_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile

Set EP11_IN_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline bool get_EP11_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Get EP11_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP11_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Set EP11_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP11_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Clear EP11_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP11_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Toggle EP11_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline bool get_EP11_IN_BUFFER_CONTROL_STALL() volatile

Get EP11_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void set_EP11_IN_BUFFER_CONTROL_STALL() volatile

Set EP11_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void clear_EP11_IN_BUFFER_CONTROL_STALL() volatile

Clear EP11_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void toggle_EP11_IN_BUFFER_CONTROL_STALL() volatile

Toggle EP11_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline bool get_EP11_IN_BUFFER_CONTROL_RESET() volatile

Get EP11_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void set_EP11_IN_BUFFER_CONTROL_RESET() volatile

Set EP11_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void clear_EP11_IN_BUFFER_CONTROL_RESET() volatile

Clear EP11_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void toggle_EP11_IN_BUFFER_CONTROL_RESET() volatile

Toggle EP11_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline bool get_EP11_IN_BUFFER_CONTROL_PID_0() volatile

Get EP11_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void set_EP11_IN_BUFFER_CONTROL_PID_0() volatile

Set EP11_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void clear_EP11_IN_BUFFER_CONTROL_PID_0() volatile

Clear EP11_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void toggle_EP11_IN_BUFFER_CONTROL_PID_0() volatile

Toggle EP11_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline bool get_EP11_IN_BUFFER_CONTROL_LAST_0() volatile

Get EP11_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void set_EP11_IN_BUFFER_CONTROL_LAST_0() volatile

Set EP11_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void clear_EP11_IN_BUFFER_CONTROL_LAST_0() volatile

Clear EP11_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void toggle_EP11_IN_BUFFER_CONTROL_LAST_0() volatile

Toggle EP11_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline bool get_EP11_IN_BUFFER_CONTROL_FULL_0() volatile

Get EP11_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP11_IN_BUFFER_CONTROL_FULL_0() volatile

Set EP11_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP11_IN_BUFFER_CONTROL_FULL_0() volatile

Clear EP11_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP11_IN_BUFFER_CONTROL_FULL_0() volatile

Toggle EP11_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline uint16_t get_EP11_IN_BUFFER_CONTROL_LENGTH_1() volatile

Get EP11_IN_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline void set_EP11_IN_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile

Set EP11_IN_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline bool get_EP11_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Get EP11_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP11_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Set EP11_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP11_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Clear EP11_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP11_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Toggle EP11_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline USBCTRL_DPRAM_EP11_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET get_EP11_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile

Get EP11_IN_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline void set_EP11_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(USBCTRL_DPRAM_EP11_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET value) volatile

Set EP11_IN_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline bool get_EP11_IN_BUFFER_CONTROL_PID_1() volatile

Get EP11_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void set_EP11_IN_BUFFER_CONTROL_PID_1() volatile

Set EP11_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void clear_EP11_IN_BUFFER_CONTROL_PID_1() volatile

Clear EP11_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void toggle_EP11_IN_BUFFER_CONTROL_PID_1() volatile

Toggle EP11_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline bool get_EP11_IN_BUFFER_CONTROL_LAST_1() volatile

Get EP11_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void set_EP11_IN_BUFFER_CONTROL_LAST_1() volatile

Set EP11_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void clear_EP11_IN_BUFFER_CONTROL_LAST_1() volatile

Clear EP11_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void toggle_EP11_IN_BUFFER_CONTROL_LAST_1() volatile

Toggle EP11_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline bool get_EP11_IN_BUFFER_CONTROL_FULL_1() volatile

Get EP11_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP11_IN_BUFFER_CONTROL_FULL_1() volatile

Set EP11_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP11_IN_BUFFER_CONTROL_FULL_1() volatile

Clear EP11_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP11_IN_BUFFER_CONTROL_FULL_1() volatile

Toggle EP11_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void get_EP11_IN_BUFFER_CONTROL(uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET, bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1, bool &AVAILABLE_1, USBCTRL_DPRAM_EP11_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET &DOUBLE_BUFFER_ISO_OFFSET, bool &PID_1, bool &LAST_1, bool &FULL_1) volatile

Get all of EP11_IN_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline void set_EP11_IN_BUFFER_CONTROL(uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET, bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1, bool AVAILABLE_1, USBCTRL_DPRAM_EP11_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET DOUBLE_BUFFER_ISO_OFFSET, bool PID_1, bool LAST_1, bool FULL_1) volatile

Set all of EP11_IN_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline uint16_t get_EP11_OUT_BUFFER_CONTROL_LENGTH_0() volatile

Get EP11_OUT_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline void set_EP11_OUT_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile

Set EP11_OUT_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline bool get_EP11_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Get EP11_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP11_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Set EP11_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP11_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Clear EP11_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP11_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Toggle EP11_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline bool get_EP11_OUT_BUFFER_CONTROL_STALL() volatile

Get EP11_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void set_EP11_OUT_BUFFER_CONTROL_STALL() volatile

Set EP11_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void clear_EP11_OUT_BUFFER_CONTROL_STALL() volatile

Clear EP11_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void toggle_EP11_OUT_BUFFER_CONTROL_STALL() volatile

Toggle EP11_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline bool get_EP11_OUT_BUFFER_CONTROL_RESET() volatile

Get EP11_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void set_EP11_OUT_BUFFER_CONTROL_RESET() volatile

Set EP11_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void clear_EP11_OUT_BUFFER_CONTROL_RESET() volatile

Clear EP11_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void toggle_EP11_OUT_BUFFER_CONTROL_RESET() volatile

Toggle EP11_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline bool get_EP11_OUT_BUFFER_CONTROL_PID_0() volatile

Get EP11_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void set_EP11_OUT_BUFFER_CONTROL_PID_0() volatile

Set EP11_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void clear_EP11_OUT_BUFFER_CONTROL_PID_0() volatile

Clear EP11_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void toggle_EP11_OUT_BUFFER_CONTROL_PID_0() volatile

Toggle EP11_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline bool get_EP11_OUT_BUFFER_CONTROL_LAST_0() volatile

Get EP11_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void set_EP11_OUT_BUFFER_CONTROL_LAST_0() volatile

Set EP11_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void clear_EP11_OUT_BUFFER_CONTROL_LAST_0() volatile

Clear EP11_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void toggle_EP11_OUT_BUFFER_CONTROL_LAST_0() volatile

Toggle EP11_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline bool get_EP11_OUT_BUFFER_CONTROL_FULL_0() volatile

Get EP11_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP11_OUT_BUFFER_CONTROL_FULL_0() volatile

Set EP11_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP11_OUT_BUFFER_CONTROL_FULL_0() volatile

Clear EP11_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP11_OUT_BUFFER_CONTROL_FULL_0() volatile

Toggle EP11_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline uint16_t get_EP11_OUT_BUFFER_CONTROL_LENGTH_1() volatile

Get EP11_OUT_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline void set_EP11_OUT_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile

Set EP11_OUT_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline bool get_EP11_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Get EP11_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP11_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Set EP11_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP11_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Clear EP11_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP11_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Toggle EP11_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline USBCTRL_DPRAM_EP11_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET get_EP11_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile

Get EP11_OUT_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline void set_EP11_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(USBCTRL_DPRAM_EP11_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET value) volatile

Set EP11_OUT_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline bool get_EP11_OUT_BUFFER_CONTROL_PID_1() volatile

Get EP11_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void set_EP11_OUT_BUFFER_CONTROL_PID_1() volatile

Set EP11_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void clear_EP11_OUT_BUFFER_CONTROL_PID_1() volatile

Clear EP11_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void toggle_EP11_OUT_BUFFER_CONTROL_PID_1() volatile

Toggle EP11_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline bool get_EP11_OUT_BUFFER_CONTROL_LAST_1() volatile

Get EP11_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void set_EP11_OUT_BUFFER_CONTROL_LAST_1() volatile

Set EP11_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void clear_EP11_OUT_BUFFER_CONTROL_LAST_1() volatile

Clear EP11_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void toggle_EP11_OUT_BUFFER_CONTROL_LAST_1() volatile

Toggle EP11_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline bool get_EP11_OUT_BUFFER_CONTROL_FULL_1() volatile

Get EP11_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP11_OUT_BUFFER_CONTROL_FULL_1() volatile

Set EP11_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP11_OUT_BUFFER_CONTROL_FULL_1() volatile

Clear EP11_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP11_OUT_BUFFER_CONTROL_FULL_1() volatile

Toggle EP11_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void get_EP11_OUT_BUFFER_CONTROL(uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET, bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1, bool &AVAILABLE_1, USBCTRL_DPRAM_EP11_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET &DOUBLE_BUFFER_ISO_OFFSET, bool &PID_1, bool &LAST_1, bool &FULL_1) volatile

Get all of EP11_OUT_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline void set_EP11_OUT_BUFFER_CONTROL(uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET, bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1, bool AVAILABLE_1, USBCTRL_DPRAM_EP11_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET DOUBLE_BUFFER_ISO_OFFSET, bool PID_1, bool LAST_1, bool FULL_1) volatile

Set all of EP11_OUT_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline uint16_t get_EP12_IN_BUFFER_CONTROL_LENGTH_0() volatile

Get EP12_IN_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline void set_EP12_IN_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile

Set EP12_IN_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline bool get_EP12_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Get EP12_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP12_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Set EP12_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP12_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Clear EP12_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP12_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Toggle EP12_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline bool get_EP12_IN_BUFFER_CONTROL_STALL() volatile

Get EP12_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void set_EP12_IN_BUFFER_CONTROL_STALL() volatile

Set EP12_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void clear_EP12_IN_BUFFER_CONTROL_STALL() volatile

Clear EP12_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void toggle_EP12_IN_BUFFER_CONTROL_STALL() volatile

Toggle EP12_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline bool get_EP12_IN_BUFFER_CONTROL_RESET() volatile

Get EP12_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void set_EP12_IN_BUFFER_CONTROL_RESET() volatile

Set EP12_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void clear_EP12_IN_BUFFER_CONTROL_RESET() volatile

Clear EP12_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void toggle_EP12_IN_BUFFER_CONTROL_RESET() volatile

Toggle EP12_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline bool get_EP12_IN_BUFFER_CONTROL_PID_0() volatile

Get EP12_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void set_EP12_IN_BUFFER_CONTROL_PID_0() volatile

Set EP12_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void clear_EP12_IN_BUFFER_CONTROL_PID_0() volatile

Clear EP12_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void toggle_EP12_IN_BUFFER_CONTROL_PID_0() volatile

Toggle EP12_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline bool get_EP12_IN_BUFFER_CONTROL_LAST_0() volatile

Get EP12_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void set_EP12_IN_BUFFER_CONTROL_LAST_0() volatile

Set EP12_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void clear_EP12_IN_BUFFER_CONTROL_LAST_0() volatile

Clear EP12_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void toggle_EP12_IN_BUFFER_CONTROL_LAST_0() volatile

Toggle EP12_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline bool get_EP12_IN_BUFFER_CONTROL_FULL_0() volatile

Get EP12_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP12_IN_BUFFER_CONTROL_FULL_0() volatile

Set EP12_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP12_IN_BUFFER_CONTROL_FULL_0() volatile

Clear EP12_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP12_IN_BUFFER_CONTROL_FULL_0() volatile

Toggle EP12_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline uint16_t get_EP12_IN_BUFFER_CONTROL_LENGTH_1() volatile

Get EP12_IN_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline void set_EP12_IN_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile

Set EP12_IN_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline bool get_EP12_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Get EP12_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP12_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Set EP12_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP12_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Clear EP12_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP12_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Toggle EP12_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline USBCTRL_DPRAM_EP12_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET get_EP12_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile

Get EP12_IN_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline void set_EP12_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(USBCTRL_DPRAM_EP12_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET value) volatile

Set EP12_IN_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline bool get_EP12_IN_BUFFER_CONTROL_PID_1() volatile

Get EP12_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void set_EP12_IN_BUFFER_CONTROL_PID_1() volatile

Set EP12_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void clear_EP12_IN_BUFFER_CONTROL_PID_1() volatile

Clear EP12_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void toggle_EP12_IN_BUFFER_CONTROL_PID_1() volatile

Toggle EP12_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline bool get_EP12_IN_BUFFER_CONTROL_LAST_1() volatile

Get EP12_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void set_EP12_IN_BUFFER_CONTROL_LAST_1() volatile

Set EP12_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void clear_EP12_IN_BUFFER_CONTROL_LAST_1() volatile

Clear EP12_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void toggle_EP12_IN_BUFFER_CONTROL_LAST_1() volatile

Toggle EP12_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline bool get_EP12_IN_BUFFER_CONTROL_FULL_1() volatile

Get EP12_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP12_IN_BUFFER_CONTROL_FULL_1() volatile

Set EP12_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP12_IN_BUFFER_CONTROL_FULL_1() volatile

Clear EP12_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP12_IN_BUFFER_CONTROL_FULL_1() volatile

Toggle EP12_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void get_EP12_IN_BUFFER_CONTROL(uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET, bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1, bool &AVAILABLE_1, USBCTRL_DPRAM_EP12_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET &DOUBLE_BUFFER_ISO_OFFSET, bool &PID_1, bool &LAST_1, bool &FULL_1) volatile

Get all of EP12_IN_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline void set_EP12_IN_BUFFER_CONTROL(uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET, bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1, bool AVAILABLE_1, USBCTRL_DPRAM_EP12_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET DOUBLE_BUFFER_ISO_OFFSET, bool PID_1, bool LAST_1, bool FULL_1) volatile

Set all of EP12_IN_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline uint16_t get_EP12_OUT_BUFFER_CONTROL_LENGTH_0() volatile

Get EP12_OUT_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline void set_EP12_OUT_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile

Set EP12_OUT_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline bool get_EP12_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Get EP12_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP12_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Set EP12_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP12_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Clear EP12_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP12_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Toggle EP12_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline bool get_EP12_OUT_BUFFER_CONTROL_STALL() volatile

Get EP12_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void set_EP12_OUT_BUFFER_CONTROL_STALL() volatile

Set EP12_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void clear_EP12_OUT_BUFFER_CONTROL_STALL() volatile

Clear EP12_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void toggle_EP12_OUT_BUFFER_CONTROL_STALL() volatile

Toggle EP12_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline bool get_EP12_OUT_BUFFER_CONTROL_RESET() volatile

Get EP12_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void set_EP12_OUT_BUFFER_CONTROL_RESET() volatile

Set EP12_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void clear_EP12_OUT_BUFFER_CONTROL_RESET() volatile

Clear EP12_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void toggle_EP12_OUT_BUFFER_CONTROL_RESET() volatile

Toggle EP12_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline bool get_EP12_OUT_BUFFER_CONTROL_PID_0() volatile

Get EP12_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void set_EP12_OUT_BUFFER_CONTROL_PID_0() volatile

Set EP12_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void clear_EP12_OUT_BUFFER_CONTROL_PID_0() volatile

Clear EP12_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void toggle_EP12_OUT_BUFFER_CONTROL_PID_0() volatile

Toggle EP12_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline bool get_EP12_OUT_BUFFER_CONTROL_LAST_0() volatile

Get EP12_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void set_EP12_OUT_BUFFER_CONTROL_LAST_0() volatile

Set EP12_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void clear_EP12_OUT_BUFFER_CONTROL_LAST_0() volatile

Clear EP12_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void toggle_EP12_OUT_BUFFER_CONTROL_LAST_0() volatile

Toggle EP12_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline bool get_EP12_OUT_BUFFER_CONTROL_FULL_0() volatile

Get EP12_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP12_OUT_BUFFER_CONTROL_FULL_0() volatile

Set EP12_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP12_OUT_BUFFER_CONTROL_FULL_0() volatile

Clear EP12_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP12_OUT_BUFFER_CONTROL_FULL_0() volatile

Toggle EP12_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline uint16_t get_EP12_OUT_BUFFER_CONTROL_LENGTH_1() volatile

Get EP12_OUT_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline void set_EP12_OUT_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile

Set EP12_OUT_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline bool get_EP12_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Get EP12_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP12_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Set EP12_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP12_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Clear EP12_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP12_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Toggle EP12_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline USBCTRL_DPRAM_EP12_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET get_EP12_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile

Get EP12_OUT_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline void set_EP12_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(USBCTRL_DPRAM_EP12_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET value) volatile

Set EP12_OUT_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline bool get_EP12_OUT_BUFFER_CONTROL_PID_1() volatile

Get EP12_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void set_EP12_OUT_BUFFER_CONTROL_PID_1() volatile

Set EP12_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void clear_EP12_OUT_BUFFER_CONTROL_PID_1() volatile

Clear EP12_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void toggle_EP12_OUT_BUFFER_CONTROL_PID_1() volatile

Toggle EP12_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline bool get_EP12_OUT_BUFFER_CONTROL_LAST_1() volatile

Get EP12_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void set_EP12_OUT_BUFFER_CONTROL_LAST_1() volatile

Set EP12_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void clear_EP12_OUT_BUFFER_CONTROL_LAST_1() volatile

Clear EP12_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void toggle_EP12_OUT_BUFFER_CONTROL_LAST_1() volatile

Toggle EP12_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline bool get_EP12_OUT_BUFFER_CONTROL_FULL_1() volatile

Get EP12_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP12_OUT_BUFFER_CONTROL_FULL_1() volatile

Set EP12_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP12_OUT_BUFFER_CONTROL_FULL_1() volatile

Clear EP12_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP12_OUT_BUFFER_CONTROL_FULL_1() volatile

Toggle EP12_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void get_EP12_OUT_BUFFER_CONTROL(uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET, bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1, bool &AVAILABLE_1, USBCTRL_DPRAM_EP12_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET &DOUBLE_BUFFER_ISO_OFFSET, bool &PID_1, bool &LAST_1, bool &FULL_1) volatile

Get all of EP12_OUT_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline void set_EP12_OUT_BUFFER_CONTROL(uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET, bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1, bool AVAILABLE_1, USBCTRL_DPRAM_EP12_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET DOUBLE_BUFFER_ISO_OFFSET, bool PID_1, bool LAST_1, bool FULL_1) volatile

Set all of EP12_OUT_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline uint16_t get_EP13_IN_BUFFER_CONTROL_LENGTH_0() volatile

Get EP13_IN_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline void set_EP13_IN_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile

Set EP13_IN_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline bool get_EP13_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Get EP13_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP13_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Set EP13_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP13_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Clear EP13_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP13_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Toggle EP13_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline bool get_EP13_IN_BUFFER_CONTROL_STALL() volatile

Get EP13_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void set_EP13_IN_BUFFER_CONTROL_STALL() volatile

Set EP13_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void clear_EP13_IN_BUFFER_CONTROL_STALL() volatile

Clear EP13_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void toggle_EP13_IN_BUFFER_CONTROL_STALL() volatile

Toggle EP13_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline bool get_EP13_IN_BUFFER_CONTROL_RESET() volatile

Get EP13_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void set_EP13_IN_BUFFER_CONTROL_RESET() volatile

Set EP13_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void clear_EP13_IN_BUFFER_CONTROL_RESET() volatile

Clear EP13_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void toggle_EP13_IN_BUFFER_CONTROL_RESET() volatile

Toggle EP13_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline bool get_EP13_IN_BUFFER_CONTROL_PID_0() volatile

Get EP13_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void set_EP13_IN_BUFFER_CONTROL_PID_0() volatile

Set EP13_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void clear_EP13_IN_BUFFER_CONTROL_PID_0() volatile

Clear EP13_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void toggle_EP13_IN_BUFFER_CONTROL_PID_0() volatile

Toggle EP13_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline bool get_EP13_IN_BUFFER_CONTROL_LAST_0() volatile

Get EP13_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void set_EP13_IN_BUFFER_CONTROL_LAST_0() volatile

Set EP13_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void clear_EP13_IN_BUFFER_CONTROL_LAST_0() volatile

Clear EP13_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void toggle_EP13_IN_BUFFER_CONTROL_LAST_0() volatile

Toggle EP13_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline bool get_EP13_IN_BUFFER_CONTROL_FULL_0() volatile

Get EP13_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP13_IN_BUFFER_CONTROL_FULL_0() volatile

Set EP13_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP13_IN_BUFFER_CONTROL_FULL_0() volatile

Clear EP13_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP13_IN_BUFFER_CONTROL_FULL_0() volatile

Toggle EP13_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline uint16_t get_EP13_IN_BUFFER_CONTROL_LENGTH_1() volatile

Get EP13_IN_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline void set_EP13_IN_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile

Set EP13_IN_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline bool get_EP13_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Get EP13_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP13_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Set EP13_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP13_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Clear EP13_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP13_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Toggle EP13_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline USBCTRL_DPRAM_EP13_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET get_EP13_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile

Get EP13_IN_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline void set_EP13_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(USBCTRL_DPRAM_EP13_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET value) volatile

Set EP13_IN_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline bool get_EP13_IN_BUFFER_CONTROL_PID_1() volatile

Get EP13_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void set_EP13_IN_BUFFER_CONTROL_PID_1() volatile

Set EP13_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void clear_EP13_IN_BUFFER_CONTROL_PID_1() volatile

Clear EP13_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void toggle_EP13_IN_BUFFER_CONTROL_PID_1() volatile

Toggle EP13_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline bool get_EP13_IN_BUFFER_CONTROL_LAST_1() volatile

Get EP13_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void set_EP13_IN_BUFFER_CONTROL_LAST_1() volatile

Set EP13_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void clear_EP13_IN_BUFFER_CONTROL_LAST_1() volatile

Clear EP13_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void toggle_EP13_IN_BUFFER_CONTROL_LAST_1() volatile

Toggle EP13_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline bool get_EP13_IN_BUFFER_CONTROL_FULL_1() volatile

Get EP13_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP13_IN_BUFFER_CONTROL_FULL_1() volatile

Set EP13_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP13_IN_BUFFER_CONTROL_FULL_1() volatile

Clear EP13_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP13_IN_BUFFER_CONTROL_FULL_1() volatile

Toggle EP13_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void get_EP13_IN_BUFFER_CONTROL(uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET, bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1, bool &AVAILABLE_1, USBCTRL_DPRAM_EP13_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET &DOUBLE_BUFFER_ISO_OFFSET, bool &PID_1, bool &LAST_1, bool &FULL_1) volatile

Get all of EP13_IN_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline void set_EP13_IN_BUFFER_CONTROL(uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET, bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1, bool AVAILABLE_1, USBCTRL_DPRAM_EP13_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET DOUBLE_BUFFER_ISO_OFFSET, bool PID_1, bool LAST_1, bool FULL_1) volatile

Set all of EP13_IN_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline uint16_t get_EP13_OUT_BUFFER_CONTROL_LENGTH_0() volatile

Get EP13_OUT_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline void set_EP13_OUT_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile

Set EP13_OUT_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline bool get_EP13_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Get EP13_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP13_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Set EP13_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP13_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Clear EP13_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP13_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Toggle EP13_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline bool get_EP13_OUT_BUFFER_CONTROL_STALL() volatile

Get EP13_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void set_EP13_OUT_BUFFER_CONTROL_STALL() volatile

Set EP13_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void clear_EP13_OUT_BUFFER_CONTROL_STALL() volatile

Clear EP13_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void toggle_EP13_OUT_BUFFER_CONTROL_STALL() volatile

Toggle EP13_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline bool get_EP13_OUT_BUFFER_CONTROL_RESET() volatile

Get EP13_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void set_EP13_OUT_BUFFER_CONTROL_RESET() volatile

Set EP13_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void clear_EP13_OUT_BUFFER_CONTROL_RESET() volatile

Clear EP13_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void toggle_EP13_OUT_BUFFER_CONTROL_RESET() volatile

Toggle EP13_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline bool get_EP13_OUT_BUFFER_CONTROL_PID_0() volatile

Get EP13_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void set_EP13_OUT_BUFFER_CONTROL_PID_0() volatile

Set EP13_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void clear_EP13_OUT_BUFFER_CONTROL_PID_0() volatile

Clear EP13_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void toggle_EP13_OUT_BUFFER_CONTROL_PID_0() volatile

Toggle EP13_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline bool get_EP13_OUT_BUFFER_CONTROL_LAST_0() volatile

Get EP13_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void set_EP13_OUT_BUFFER_CONTROL_LAST_0() volatile

Set EP13_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void clear_EP13_OUT_BUFFER_CONTROL_LAST_0() volatile

Clear EP13_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void toggle_EP13_OUT_BUFFER_CONTROL_LAST_0() volatile

Toggle EP13_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline bool get_EP13_OUT_BUFFER_CONTROL_FULL_0() volatile

Get EP13_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP13_OUT_BUFFER_CONTROL_FULL_0() volatile

Set EP13_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP13_OUT_BUFFER_CONTROL_FULL_0() volatile

Clear EP13_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP13_OUT_BUFFER_CONTROL_FULL_0() volatile

Toggle EP13_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline uint16_t get_EP13_OUT_BUFFER_CONTROL_LENGTH_1() volatile

Get EP13_OUT_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline void set_EP13_OUT_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile

Set EP13_OUT_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline bool get_EP13_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Get EP13_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP13_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Set EP13_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP13_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Clear EP13_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP13_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Toggle EP13_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline USBCTRL_DPRAM_EP13_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET get_EP13_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile

Get EP13_OUT_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline void set_EP13_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(USBCTRL_DPRAM_EP13_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET value) volatile

Set EP13_OUT_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline bool get_EP13_OUT_BUFFER_CONTROL_PID_1() volatile

Get EP13_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void set_EP13_OUT_BUFFER_CONTROL_PID_1() volatile

Set EP13_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void clear_EP13_OUT_BUFFER_CONTROL_PID_1() volatile

Clear EP13_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void toggle_EP13_OUT_BUFFER_CONTROL_PID_1() volatile

Toggle EP13_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline bool get_EP13_OUT_BUFFER_CONTROL_LAST_1() volatile

Get EP13_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void set_EP13_OUT_BUFFER_CONTROL_LAST_1() volatile

Set EP13_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void clear_EP13_OUT_BUFFER_CONTROL_LAST_1() volatile

Clear EP13_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void toggle_EP13_OUT_BUFFER_CONTROL_LAST_1() volatile

Toggle EP13_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline bool get_EP13_OUT_BUFFER_CONTROL_FULL_1() volatile

Get EP13_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP13_OUT_BUFFER_CONTROL_FULL_1() volatile

Set EP13_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP13_OUT_BUFFER_CONTROL_FULL_1() volatile

Clear EP13_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP13_OUT_BUFFER_CONTROL_FULL_1() volatile

Toggle EP13_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void get_EP13_OUT_BUFFER_CONTROL(uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET, bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1, bool &AVAILABLE_1, USBCTRL_DPRAM_EP13_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET &DOUBLE_BUFFER_ISO_OFFSET, bool &PID_1, bool &LAST_1, bool &FULL_1) volatile

Get all of EP13_OUT_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline void set_EP13_OUT_BUFFER_CONTROL(uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET, bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1, bool AVAILABLE_1, USBCTRL_DPRAM_EP13_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET DOUBLE_BUFFER_ISO_OFFSET, bool PID_1, bool LAST_1, bool FULL_1) volatile

Set all of EP13_OUT_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline uint16_t get_EP14_IN_BUFFER_CONTROL_LENGTH_0() volatile

Get EP14_IN_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline void set_EP14_IN_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile

Set EP14_IN_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline bool get_EP14_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Get EP14_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP14_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Set EP14_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP14_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Clear EP14_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP14_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Toggle EP14_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline bool get_EP14_IN_BUFFER_CONTROL_STALL() volatile

Get EP14_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void set_EP14_IN_BUFFER_CONTROL_STALL() volatile

Set EP14_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void clear_EP14_IN_BUFFER_CONTROL_STALL() volatile

Clear EP14_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void toggle_EP14_IN_BUFFER_CONTROL_STALL() volatile

Toggle EP14_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline bool get_EP14_IN_BUFFER_CONTROL_RESET() volatile

Get EP14_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void set_EP14_IN_BUFFER_CONTROL_RESET() volatile

Set EP14_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void clear_EP14_IN_BUFFER_CONTROL_RESET() volatile

Clear EP14_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void toggle_EP14_IN_BUFFER_CONTROL_RESET() volatile

Toggle EP14_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline bool get_EP14_IN_BUFFER_CONTROL_PID_0() volatile

Get EP14_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void set_EP14_IN_BUFFER_CONTROL_PID_0() volatile

Set EP14_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void clear_EP14_IN_BUFFER_CONTROL_PID_0() volatile

Clear EP14_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void toggle_EP14_IN_BUFFER_CONTROL_PID_0() volatile

Toggle EP14_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline bool get_EP14_IN_BUFFER_CONTROL_LAST_0() volatile

Get EP14_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void set_EP14_IN_BUFFER_CONTROL_LAST_0() volatile

Set EP14_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void clear_EP14_IN_BUFFER_CONTROL_LAST_0() volatile

Clear EP14_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void toggle_EP14_IN_BUFFER_CONTROL_LAST_0() volatile

Toggle EP14_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline bool get_EP14_IN_BUFFER_CONTROL_FULL_0() volatile

Get EP14_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP14_IN_BUFFER_CONTROL_FULL_0() volatile

Set EP14_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP14_IN_BUFFER_CONTROL_FULL_0() volatile

Clear EP14_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP14_IN_BUFFER_CONTROL_FULL_0() volatile

Toggle EP14_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline uint16_t get_EP14_IN_BUFFER_CONTROL_LENGTH_1() volatile

Get EP14_IN_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline void set_EP14_IN_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile

Set EP14_IN_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline bool get_EP14_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Get EP14_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP14_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Set EP14_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP14_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Clear EP14_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP14_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Toggle EP14_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline USBCTRL_DPRAM_EP14_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET get_EP14_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile

Get EP14_IN_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline void set_EP14_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(USBCTRL_DPRAM_EP14_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET value) volatile

Set EP14_IN_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline bool get_EP14_IN_BUFFER_CONTROL_PID_1() volatile

Get EP14_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void set_EP14_IN_BUFFER_CONTROL_PID_1() volatile

Set EP14_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void clear_EP14_IN_BUFFER_CONTROL_PID_1() volatile

Clear EP14_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void toggle_EP14_IN_BUFFER_CONTROL_PID_1() volatile

Toggle EP14_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline bool get_EP14_IN_BUFFER_CONTROL_LAST_1() volatile

Get EP14_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void set_EP14_IN_BUFFER_CONTROL_LAST_1() volatile

Set EP14_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void clear_EP14_IN_BUFFER_CONTROL_LAST_1() volatile

Clear EP14_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void toggle_EP14_IN_BUFFER_CONTROL_LAST_1() volatile

Toggle EP14_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline bool get_EP14_IN_BUFFER_CONTROL_FULL_1() volatile

Get EP14_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP14_IN_BUFFER_CONTROL_FULL_1() volatile

Set EP14_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP14_IN_BUFFER_CONTROL_FULL_1() volatile

Clear EP14_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP14_IN_BUFFER_CONTROL_FULL_1() volatile

Toggle EP14_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void get_EP14_IN_BUFFER_CONTROL(uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET, bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1, bool &AVAILABLE_1, USBCTRL_DPRAM_EP14_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET &DOUBLE_BUFFER_ISO_OFFSET, bool &PID_1, bool &LAST_1, bool &FULL_1) volatile

Get all of EP14_IN_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline void set_EP14_IN_BUFFER_CONTROL(uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET, bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1, bool AVAILABLE_1, USBCTRL_DPRAM_EP14_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET DOUBLE_BUFFER_ISO_OFFSET, bool PID_1, bool LAST_1, bool FULL_1) volatile

Set all of EP14_IN_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline uint16_t get_EP14_OUT_BUFFER_CONTROL_LENGTH_0() volatile

Get EP14_OUT_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline void set_EP14_OUT_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile

Set EP14_OUT_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline bool get_EP14_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Get EP14_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP14_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Set EP14_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP14_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Clear EP14_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP14_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Toggle EP14_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline bool get_EP14_OUT_BUFFER_CONTROL_STALL() volatile

Get EP14_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void set_EP14_OUT_BUFFER_CONTROL_STALL() volatile

Set EP14_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void clear_EP14_OUT_BUFFER_CONTROL_STALL() volatile

Clear EP14_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void toggle_EP14_OUT_BUFFER_CONTROL_STALL() volatile

Toggle EP14_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline bool get_EP14_OUT_BUFFER_CONTROL_RESET() volatile

Get EP14_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void set_EP14_OUT_BUFFER_CONTROL_RESET() volatile

Set EP14_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void clear_EP14_OUT_BUFFER_CONTROL_RESET() volatile

Clear EP14_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void toggle_EP14_OUT_BUFFER_CONTROL_RESET() volatile

Toggle EP14_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline bool get_EP14_OUT_BUFFER_CONTROL_PID_0() volatile

Get EP14_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void set_EP14_OUT_BUFFER_CONTROL_PID_0() volatile

Set EP14_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void clear_EP14_OUT_BUFFER_CONTROL_PID_0() volatile

Clear EP14_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void toggle_EP14_OUT_BUFFER_CONTROL_PID_0() volatile

Toggle EP14_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline bool get_EP14_OUT_BUFFER_CONTROL_LAST_0() volatile

Get EP14_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void set_EP14_OUT_BUFFER_CONTROL_LAST_0() volatile

Set EP14_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void clear_EP14_OUT_BUFFER_CONTROL_LAST_0() volatile

Clear EP14_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void toggle_EP14_OUT_BUFFER_CONTROL_LAST_0() volatile

Toggle EP14_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline bool get_EP14_OUT_BUFFER_CONTROL_FULL_0() volatile

Get EP14_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP14_OUT_BUFFER_CONTROL_FULL_0() volatile

Set EP14_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP14_OUT_BUFFER_CONTROL_FULL_0() volatile

Clear EP14_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP14_OUT_BUFFER_CONTROL_FULL_0() volatile

Toggle EP14_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline uint16_t get_EP14_OUT_BUFFER_CONTROL_LENGTH_1() volatile

Get EP14_OUT_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline void set_EP14_OUT_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile

Set EP14_OUT_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline bool get_EP14_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Get EP14_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP14_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Set EP14_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP14_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Clear EP14_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP14_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Toggle EP14_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline USBCTRL_DPRAM_EP14_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET get_EP14_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile

Get EP14_OUT_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline void set_EP14_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(USBCTRL_DPRAM_EP14_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET value) volatile

Set EP14_OUT_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline bool get_EP14_OUT_BUFFER_CONTROL_PID_1() volatile

Get EP14_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void set_EP14_OUT_BUFFER_CONTROL_PID_1() volatile

Set EP14_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void clear_EP14_OUT_BUFFER_CONTROL_PID_1() volatile

Clear EP14_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void toggle_EP14_OUT_BUFFER_CONTROL_PID_1() volatile

Toggle EP14_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline bool get_EP14_OUT_BUFFER_CONTROL_LAST_1() volatile

Get EP14_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void set_EP14_OUT_BUFFER_CONTROL_LAST_1() volatile

Set EP14_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void clear_EP14_OUT_BUFFER_CONTROL_LAST_1() volatile

Clear EP14_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void toggle_EP14_OUT_BUFFER_CONTROL_LAST_1() volatile

Toggle EP14_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline bool get_EP14_OUT_BUFFER_CONTROL_FULL_1() volatile

Get EP14_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP14_OUT_BUFFER_CONTROL_FULL_1() volatile

Set EP14_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP14_OUT_BUFFER_CONTROL_FULL_1() volatile

Clear EP14_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP14_OUT_BUFFER_CONTROL_FULL_1() volatile

Toggle EP14_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void get_EP14_OUT_BUFFER_CONTROL(uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET, bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1, bool &AVAILABLE_1, USBCTRL_DPRAM_EP14_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET &DOUBLE_BUFFER_ISO_OFFSET, bool &PID_1, bool &LAST_1, bool &FULL_1) volatile

Get all of EP14_OUT_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline void set_EP14_OUT_BUFFER_CONTROL(uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET, bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1, bool AVAILABLE_1, USBCTRL_DPRAM_EP14_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET DOUBLE_BUFFER_ISO_OFFSET, bool PID_1, bool LAST_1, bool FULL_1) volatile

Set all of EP14_OUT_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline uint16_t get_EP15_IN_BUFFER_CONTROL_LENGTH_0() volatile

Get EP15_IN_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline void set_EP15_IN_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile

Set EP15_IN_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline bool get_EP15_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Get EP15_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP15_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Set EP15_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP15_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Clear EP15_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP15_IN_BUFFER_CONTROL_AVAILABLE_0() volatile

Toggle EP15_IN_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline bool get_EP15_IN_BUFFER_CONTROL_STALL() volatile

Get EP15_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void set_EP15_IN_BUFFER_CONTROL_STALL() volatile

Set EP15_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void clear_EP15_IN_BUFFER_CONTROL_STALL() volatile

Clear EP15_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void toggle_EP15_IN_BUFFER_CONTROL_STALL() volatile

Toggle EP15_IN_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline bool get_EP15_IN_BUFFER_CONTROL_RESET() volatile

Get EP15_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void set_EP15_IN_BUFFER_CONTROL_RESET() volatile

Set EP15_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void clear_EP15_IN_BUFFER_CONTROL_RESET() volatile

Clear EP15_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void toggle_EP15_IN_BUFFER_CONTROL_RESET() volatile

Toggle EP15_IN_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline bool get_EP15_IN_BUFFER_CONTROL_PID_0() volatile

Get EP15_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void set_EP15_IN_BUFFER_CONTROL_PID_0() volatile

Set EP15_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void clear_EP15_IN_BUFFER_CONTROL_PID_0() volatile

Clear EP15_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void toggle_EP15_IN_BUFFER_CONTROL_PID_0() volatile

Toggle EP15_IN_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline bool get_EP15_IN_BUFFER_CONTROL_LAST_0() volatile

Get EP15_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void set_EP15_IN_BUFFER_CONTROL_LAST_0() volatile

Set EP15_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void clear_EP15_IN_BUFFER_CONTROL_LAST_0() volatile

Clear EP15_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void toggle_EP15_IN_BUFFER_CONTROL_LAST_0() volatile

Toggle EP15_IN_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline bool get_EP15_IN_BUFFER_CONTROL_FULL_0() volatile

Get EP15_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP15_IN_BUFFER_CONTROL_FULL_0() volatile

Set EP15_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP15_IN_BUFFER_CONTROL_FULL_0() volatile

Clear EP15_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP15_IN_BUFFER_CONTROL_FULL_0() volatile

Toggle EP15_IN_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline uint16_t get_EP15_IN_BUFFER_CONTROL_LENGTH_1() volatile

Get EP15_IN_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline void set_EP15_IN_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile

Set EP15_IN_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline bool get_EP15_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Get EP15_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP15_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Set EP15_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP15_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Clear EP15_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP15_IN_BUFFER_CONTROL_AVAILABLE_1() volatile

Toggle EP15_IN_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline USBCTRL_DPRAM_EP15_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET get_EP15_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile

Get EP15_IN_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline void set_EP15_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(USBCTRL_DPRAM_EP15_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET value) volatile

Set EP15_IN_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline bool get_EP15_IN_BUFFER_CONTROL_PID_1() volatile

Get EP15_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void set_EP15_IN_BUFFER_CONTROL_PID_1() volatile

Set EP15_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void clear_EP15_IN_BUFFER_CONTROL_PID_1() volatile

Clear EP15_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void toggle_EP15_IN_BUFFER_CONTROL_PID_1() volatile

Toggle EP15_IN_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline bool get_EP15_IN_BUFFER_CONTROL_LAST_1() volatile

Get EP15_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void set_EP15_IN_BUFFER_CONTROL_LAST_1() volatile

Set EP15_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void clear_EP15_IN_BUFFER_CONTROL_LAST_1() volatile

Clear EP15_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void toggle_EP15_IN_BUFFER_CONTROL_LAST_1() volatile

Toggle EP15_IN_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline bool get_EP15_IN_BUFFER_CONTROL_FULL_1() volatile

Get EP15_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP15_IN_BUFFER_CONTROL_FULL_1() volatile

Set EP15_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP15_IN_BUFFER_CONTROL_FULL_1() volatile

Clear EP15_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP15_IN_BUFFER_CONTROL_FULL_1() volatile

Toggle EP15_IN_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void get_EP15_IN_BUFFER_CONTROL(uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET, bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1, bool &AVAILABLE_1, USBCTRL_DPRAM_EP15_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET &DOUBLE_BUFFER_ISO_OFFSET, bool &PID_1, bool &LAST_1, bool &FULL_1) volatile

Get all of EP15_IN_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline void set_EP15_IN_BUFFER_CONTROL(uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET, bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1, bool AVAILABLE_1, USBCTRL_DPRAM_EP15_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET DOUBLE_BUFFER_ISO_OFFSET, bool PID_1, bool LAST_1, bool FULL_1) volatile

Set all of EP15_IN_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline uint16_t get_EP15_OUT_BUFFER_CONTROL_LENGTH_0() volatile

Get EP15_OUT_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline void set_EP15_OUT_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile

Set EP15_OUT_BUFFER_CONTROL’s LENGTH_0 field.

The length of the data in buffer 0.

inline bool get_EP15_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Get EP15_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP15_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Set EP15_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP15_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Clear EP15_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP15_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile

Toggle EP15_OUT_BUFFER_CONTROL’s AVAILABLE_0 bit.

Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline bool get_EP15_OUT_BUFFER_CONTROL_STALL() volatile

Get EP15_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void set_EP15_OUT_BUFFER_CONTROL_STALL() volatile

Set EP15_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void clear_EP15_OUT_BUFFER_CONTROL_STALL() volatile

Clear EP15_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline void toggle_EP15_OUT_BUFFER_CONTROL_STALL() volatile

Toggle EP15_OUT_BUFFER_CONTROL’s STALL bit.

Reply with a stall (valid for both buffers).

inline bool get_EP15_OUT_BUFFER_CONTROL_RESET() volatile

Get EP15_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void set_EP15_OUT_BUFFER_CONTROL_RESET() volatile

Set EP15_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void clear_EP15_OUT_BUFFER_CONTROL_RESET() volatile

Clear EP15_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline void toggle_EP15_OUT_BUFFER_CONTROL_RESET() volatile

Toggle EP15_OUT_BUFFER_CONTROL’s RESET bit.

Reset the buffer selector to buffer 0.

inline bool get_EP15_OUT_BUFFER_CONTROL_PID_0() volatile

Get EP15_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void set_EP15_OUT_BUFFER_CONTROL_PID_0() volatile

Set EP15_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void clear_EP15_OUT_BUFFER_CONTROL_PID_0() volatile

Clear EP15_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline void toggle_EP15_OUT_BUFFER_CONTROL_PID_0() volatile

Toggle EP15_OUT_BUFFER_CONTROL’s PID_0 bit.

The data pid of buffer 0.

inline bool get_EP15_OUT_BUFFER_CONTROL_LAST_0() volatile

Get EP15_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void set_EP15_OUT_BUFFER_CONTROL_LAST_0() volatile

Set EP15_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void clear_EP15_OUT_BUFFER_CONTROL_LAST_0() volatile

Clear EP15_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline void toggle_EP15_OUT_BUFFER_CONTROL_LAST_0() volatile

Toggle EP15_OUT_BUFFER_CONTROL’s LAST_0 bit.

Buffer 0 is the last buffer of the transfer.

inline bool get_EP15_OUT_BUFFER_CONTROL_FULL_0() volatile

Get EP15_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP15_OUT_BUFFER_CONTROL_FULL_0() volatile

Set EP15_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP15_OUT_BUFFER_CONTROL_FULL_0() volatile

Clear EP15_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP15_OUT_BUFFER_CONTROL_FULL_0() volatile

Toggle EP15_OUT_BUFFER_CONTROL’s FULL_0 bit.

Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline uint16_t get_EP15_OUT_BUFFER_CONTROL_LENGTH_1() volatile

Get EP15_OUT_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline void set_EP15_OUT_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile

Set EP15_OUT_BUFFER_CONTROL’s LENGTH_1 field.

The length of the data in buffer 1.

inline bool get_EP15_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Get EP15_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void set_EP15_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Set EP15_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void clear_EP15_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Clear EP15_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline void toggle_EP15_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile

Toggle EP15_OUT_BUFFER_CONTROL’s AVAILABLE_1 bit.

Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.

inline USBCTRL_DPRAM_EP15_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET get_EP15_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile

Get EP15_OUT_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline void set_EP15_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(USBCTRL_DPRAM_EP15_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET value) volatile

Set EP15_OUT_BUFFER_CONTROL’s DOUBLE_BUFFER_ISO_OFFSET field.

The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.

For a non Isochronous endpoint the offset is always 64 bytes.

inline bool get_EP15_OUT_BUFFER_CONTROL_PID_1() volatile

Get EP15_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void set_EP15_OUT_BUFFER_CONTROL_PID_1() volatile

Set EP15_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void clear_EP15_OUT_BUFFER_CONTROL_PID_1() volatile

Clear EP15_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline void toggle_EP15_OUT_BUFFER_CONTROL_PID_1() volatile

Toggle EP15_OUT_BUFFER_CONTROL’s PID_1 bit.

The data pid of buffer 1.

inline bool get_EP15_OUT_BUFFER_CONTROL_LAST_1() volatile

Get EP15_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void set_EP15_OUT_BUFFER_CONTROL_LAST_1() volatile

Set EP15_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void clear_EP15_OUT_BUFFER_CONTROL_LAST_1() volatile

Clear EP15_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline void toggle_EP15_OUT_BUFFER_CONTROL_LAST_1() volatile

Toggle EP15_OUT_BUFFER_CONTROL’s LAST_1 bit.

Buffer 1 is the last buffer of the transfer.

inline bool get_EP15_OUT_BUFFER_CONTROL_FULL_1() volatile

Get EP15_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void set_EP15_OUT_BUFFER_CONTROL_FULL_1() volatile

Set EP15_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void clear_EP15_OUT_BUFFER_CONTROL_FULL_1() volatile

Clear EP15_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void toggle_EP15_OUT_BUFFER_CONTROL_FULL_1() volatile

Toggle EP15_OUT_BUFFER_CONTROL’s FULL_1 bit.

Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.

inline void get_EP15_OUT_BUFFER_CONTROL(uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET, bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1, bool &AVAILABLE_1, USBCTRL_DPRAM_EP15_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET &DOUBLE_BUFFER_ISO_OFFSET, bool &PID_1, bool &LAST_1, bool &FULL_1) volatile

Get all of EP15_OUT_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

inline void set_EP15_OUT_BUFFER_CONTROL(uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET, bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1, bool AVAILABLE_1, USBCTRL_DPRAM_EP15_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET DOUBLE_BUFFER_ISO_OFFSET, bool PID_1, bool LAST_1, bool FULL_1) volatile

Set all of EP15_OUT_BUFFER_CONTROL’s bit fields.

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

Public Members

uint32_t SETUP_PACKET_LOW

(read-write) Bytes 0-3 of the SETUP packet from the host.

uint32_t SETUP_PACKET_HIGH

(read-write) Bytes 4-7 of the setup packet from the host.

uint32_t EP1_IN_CONTROL

uint32_t EP1_OUT_CONTROL

uint32_t EP2_IN_CONTROL

uint32_t EP2_OUT_CONTROL

uint32_t EP3_IN_CONTROL

uint32_t EP3_OUT_CONTROL

uint32_t EP4_IN_CONTROL

uint32_t EP4_OUT_CONTROL

uint32_t EP5_IN_CONTROL

uint32_t EP5_OUT_CONTROL

uint32_t EP6_IN_CONTROL

uint32_t EP6_OUT_CONTROL

uint32_t EP7_IN_CONTROL

uint32_t EP7_OUT_CONTROL

uint32_t EP8_IN_CONTROL

uint32_t EP8_OUT_CONTROL

uint32_t EP9_IN_CONTROL

uint32_t EP9_OUT_CONTROL

uint32_t EP10_IN_CONTROL

uint32_t EP10_OUT_CONTROL

uint32_t EP11_IN_CONTROL

uint32_t EP11_OUT_CONTROL

uint32_t EP12_IN_CONTROL

uint32_t EP12_OUT_CONTROL

uint32_t EP13_IN_CONTROL

uint32_t EP13_OUT_CONTROL

uint32_t EP14_IN_CONTROL

uint32_t EP14_OUT_CONTROL

uint32_t EP15_IN_CONTROL

uint32_t EP15_OUT_CONTROL

uint32_t EP0_IN_BUFFER_CONTROL

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

uint32_t EP0_OUT_BUFFER_CONTROL

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

uint32_t EP1_IN_BUFFER_CONTROL

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

uint32_t EP1_OUT_BUFFER_CONTROL

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

uint32_t EP2_IN_BUFFER_CONTROL

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

uint32_t EP2_OUT_BUFFER_CONTROL

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

uint32_t EP3_IN_BUFFER_CONTROL

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

uint32_t EP3_OUT_BUFFER_CONTROL

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

uint32_t EP4_IN_BUFFER_CONTROL

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

uint32_t EP4_OUT_BUFFER_CONTROL

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

uint32_t EP5_IN_BUFFER_CONTROL

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

uint32_t EP5_OUT_BUFFER_CONTROL

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

uint32_t EP6_IN_BUFFER_CONTROL

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

uint32_t EP6_OUT_BUFFER_CONTROL

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

uint32_t EP7_IN_BUFFER_CONTROL

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

uint32_t EP7_OUT_BUFFER_CONTROL

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

uint32_t EP8_IN_BUFFER_CONTROL

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

uint32_t EP8_OUT_BUFFER_CONTROL

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

uint32_t EP9_IN_BUFFER_CONTROL

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

uint32_t EP9_OUT_BUFFER_CONTROL

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

uint32_t EP10_IN_BUFFER_CONTROL

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

uint32_t EP10_OUT_BUFFER_CONTROL

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

uint32_t EP11_IN_BUFFER_CONTROL

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

uint32_t EP11_OUT_BUFFER_CONTROL

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

uint32_t EP12_IN_BUFFER_CONTROL

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

uint32_t EP12_OUT_BUFFER_CONTROL

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

uint32_t EP13_IN_BUFFER_CONTROL

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

uint32_t EP13_OUT_BUFFER_CONTROL

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

uint32_t EP14_IN_BUFFER_CONTROL

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

uint32_t EP14_OUT_BUFFER_CONTROL

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

uint32_t EP15_IN_BUFFER_CONTROL

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

uint32_t EP15_OUT_BUFFER_CONTROL

(read-write) Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.

Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.

Public Static Attributes

static constexpr std::size_t size = 256

usbctrl_dpram’s size in bytes.