Struct watchdog#

Defined in File watchdog.h

Struct Documentation#

struct watchdog#

Public Functions

inline uint32_t get_CTRL_TIME() volatile#

Get CTRL’s TIME field.

Indicates the number of ticks / 2 (see errata RP2040-E1) before a watchdog reset will be triggered

inline bool get_CTRL_PAUSE_JTAG() volatile#

Get CTRL’s PAUSE_JTAG bit.

Pause the watchdog timer when JTAG is accessing the bus fabric

inline void set_CTRL_PAUSE_JTAG() volatile#

Set CTRL’s PAUSE_JTAG bit.

Pause the watchdog timer when JTAG is accessing the bus fabric

inline void clear_CTRL_PAUSE_JTAG() volatile#

Clear CTRL’s PAUSE_JTAG bit.

Pause the watchdog timer when JTAG is accessing the bus fabric

inline void toggle_CTRL_PAUSE_JTAG() volatile#

Toggle CTRL’s PAUSE_JTAG bit.

Pause the watchdog timer when JTAG is accessing the bus fabric

inline bool get_CTRL_PAUSE_DBG0() volatile#

Get CTRL’s PAUSE_DBG0 bit.

Pause the watchdog timer when processor 0 is in debug mode

inline void set_CTRL_PAUSE_DBG0() volatile#

Set CTRL’s PAUSE_DBG0 bit.

Pause the watchdog timer when processor 0 is in debug mode

inline void clear_CTRL_PAUSE_DBG0() volatile#

Clear CTRL’s PAUSE_DBG0 bit.

Pause the watchdog timer when processor 0 is in debug mode

inline void toggle_CTRL_PAUSE_DBG0() volatile#

Toggle CTRL’s PAUSE_DBG0 bit.

Pause the watchdog timer when processor 0 is in debug mode

inline bool get_CTRL_PAUSE_DBG1() volatile#

Get CTRL’s PAUSE_DBG1 bit.

Pause the watchdog timer when processor 1 is in debug mode

inline void set_CTRL_PAUSE_DBG1() volatile#

Set CTRL’s PAUSE_DBG1 bit.

Pause the watchdog timer when processor 1 is in debug mode

inline void clear_CTRL_PAUSE_DBG1() volatile#

Clear CTRL’s PAUSE_DBG1 bit.

Pause the watchdog timer when processor 1 is in debug mode

inline void toggle_CTRL_PAUSE_DBG1() volatile#

Toggle CTRL’s PAUSE_DBG1 bit.

Pause the watchdog timer when processor 1 is in debug mode

inline bool get_CTRL_ENABLE() volatile#

Get CTRL’s ENABLE bit.

When not enabled the watchdog timer is paused

inline void set_CTRL_ENABLE() volatile#

Set CTRL’s ENABLE bit.

When not enabled the watchdog timer is paused

inline void clear_CTRL_ENABLE() volatile#

Clear CTRL’s ENABLE bit.

When not enabled the watchdog timer is paused

inline void toggle_CTRL_ENABLE() volatile#

Toggle CTRL’s ENABLE bit.

When not enabled the watchdog timer is paused

inline bool get_CTRL_TRIGGER() volatile#

Get CTRL’s TRIGGER bit.

Trigger a watchdog reset

inline void set_CTRL_TRIGGER() volatile#

Set CTRL’s TRIGGER bit.

Trigger a watchdog reset

inline void clear_CTRL_TRIGGER() volatile#

Clear CTRL’s TRIGGER bit.

Trigger a watchdog reset

inline void toggle_CTRL_TRIGGER() volatile#

Toggle CTRL’s TRIGGER bit.

Trigger a watchdog reset

inline void get_CTRL(uint32_t &TIME, bool &PAUSE_JTAG, bool &PAUSE_DBG0, bool &PAUSE_DBG1, bool &ENABLE, bool &TRIGGER) volatile#

Get all of CTRL’s bit fields.

(read-write) Watchdog control

The rst_wdsel register determines which subsystems are reset when the watchdog is triggered.

The watchdog can be triggered in software.

inline void set_CTRL(bool PAUSE_JTAG, bool PAUSE_DBG0, bool PAUSE_DBG1, bool ENABLE, bool TRIGGER) volatile#

Set all of CTRL’s bit fields.

(read-write) Watchdog control

The rst_wdsel register determines which subsystems are reset when the watchdog is triggered.

The watchdog can be triggered in software.

inline void set_LOAD_LOAD(uint32_t value) volatile#: Set LOAD’s LOAD field.

inline bool get_REASON_TIMER() volatile#: Get REASON’s TIMER bit.

inline bool get_REASON_FORCE() volatile#: Get REASON’s FORCE bit.

inline void get_REASON(bool &TIMER, bool &FORCE) volatile#

Get all of REASON’s bit fields.

(read-only) Logs the reason for the last reset. Both bits are zero for the case of a hardware reset.

inline uint16_t get_TICK_CYCLES() volatile#

Get TICK’s CYCLES field.

Total number of clk_tick cycles before the next tick.

inline void set_TICK_CYCLES(uint16_t value) volatile#

Set TICK’s CYCLES field.

Total number of clk_tick cycles before the next tick.

inline bool get_TICK_ENABLE() volatile#

Get TICK’s ENABLE bit.

start / stop tick generation

inline void set_TICK_ENABLE() volatile#

Set TICK’s ENABLE bit.

start / stop tick generation

inline void clear_TICK_ENABLE() volatile#

Clear TICK’s ENABLE bit.

start / stop tick generation

inline void toggle_TICK_ENABLE() volatile#

Toggle TICK’s ENABLE bit.

start / stop tick generation

inline bool get_TICK_RUNNING() volatile#

Get TICK’s RUNNING bit.

Is the tick generator running?

inline uint16_t get_TICK_COUNT() volatile#

Get TICK’s COUNT field.

Count down timer: the remaining number clk_tick cycles before the next tick is generated.

inline void get_TICK(uint16_t &CYCLES, bool &ENABLE, bool &RUNNING, uint16_t &COUNT) volatile#

Get all of TICK’s bit fields.

(read-write) Controls the tick generator

inline void set_TICK(uint16_t CYCLES, bool ENABLE) volatile#

Set all of TICK’s bit fields.

(read-write) Controls the tick generator

Public Members

uint32_t CTRL#

(read-write) Watchdog control

The rst_wdsel register determines which subsystems are reset when the watchdog is triggered.

The watchdog can be triggered in software.

uint32_t LOAD#: (write-only) Load the watchdog timer. The maximum setting is 0xffffff which corresponds to 0xffffff / 2 ticks before triggering a watchdog reset (see errata RP2040-E1).

const uint32_t REASON = {}#: (read-only) Logs the reason for the last reset. Both bits are zero for the case of a hardware reset.

uint32_t SCRATCH0#: (read-write) Scratch register. Information persists through soft reset of the chip.

uint32_t SCRATCH1#: (read-write) Scratch register. Information persists through soft reset of the chip.

uint32_t SCRATCH2#: (read-write) Scratch register. Information persists through soft reset of the chip.

uint32_t SCRATCH3#: (read-write) Scratch register. Information persists through soft reset of the chip.

uint32_t SCRATCH4#: (read-write) Scratch register. Information persists through soft reset of the chip.

uint32_t SCRATCH5#: (read-write) Scratch register. Information persists through soft reset of the chip.

uint32_t SCRATCH6#: (read-write) Scratch register. Information persists through soft reset of the chip.

uint32_t SCRATCH7#: (read-write) Scratch register. Information persists through soft reset of the chip.

uint32_t TICK#: (read-write) Controls the tick generator

Public Static Attributes

static constexpr std::size_t size = 48#: watchdog’s size in bytes.

Struct watchdog

Contents

Struct watchdog#

Struct Documentation#