Program Listing for File usbctrl_dpram.h

↰ Return to documentation for file (src/generated/structs/usbctrl_dpram.h)

#pragma once

#include "../enums/USBCTRL_DPRAM_EP0_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET.h"
#include "../enums/USBCTRL_DPRAM_EP0_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET.h"
#include "../enums/USBCTRL_DPRAM_EP10_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET.h"
#include "../enums/USBCTRL_DPRAM_EP10_IN_CONTROL_ENDPOINT_TYPE.h"
#include "../enums/USBCTRL_DPRAM_EP10_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET.h"
#include "../enums/USBCTRL_DPRAM_EP10_OUT_CONTROL_ENDPOINT_TYPE.h"
#include "../enums/USBCTRL_DPRAM_EP11_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET.h"
#include "../enums/USBCTRL_DPRAM_EP11_IN_CONTROL_ENDPOINT_TYPE.h"
#include "../enums/USBCTRL_DPRAM_EP11_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET.h"
#include "../enums/USBCTRL_DPRAM_EP11_OUT_CONTROL_ENDPOINT_TYPE.h"
#include "../enums/USBCTRL_DPRAM_EP12_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET.h"
#include "../enums/USBCTRL_DPRAM_EP12_IN_CONTROL_ENDPOINT_TYPE.h"
#include "../enums/USBCTRL_DPRAM_EP12_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET.h"
#include "../enums/USBCTRL_DPRAM_EP12_OUT_CONTROL_ENDPOINT_TYPE.h"
#include "../enums/USBCTRL_DPRAM_EP13_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET.h"
#include "../enums/USBCTRL_DPRAM_EP13_IN_CONTROL_ENDPOINT_TYPE.h"
#include "../enums/USBCTRL_DPRAM_EP13_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET.h"
#include "../enums/USBCTRL_DPRAM_EP13_OUT_CONTROL_ENDPOINT_TYPE.h"
#include "../enums/USBCTRL_DPRAM_EP14_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET.h"
#include "../enums/USBCTRL_DPRAM_EP14_IN_CONTROL_ENDPOINT_TYPE.h"
#include "../enums/USBCTRL_DPRAM_EP14_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET.h"
#include "../enums/USBCTRL_DPRAM_EP14_OUT_CONTROL_ENDPOINT_TYPE.h"
#include "../enums/USBCTRL_DPRAM_EP15_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET.h"
#include "../enums/USBCTRL_DPRAM_EP15_IN_CONTROL_ENDPOINT_TYPE.h"
#include "../enums/USBCTRL_DPRAM_EP15_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET.h"
#include "../enums/USBCTRL_DPRAM_EP15_OUT_CONTROL_ENDPOINT_TYPE.h"
#include "../enums/USBCTRL_DPRAM_EP1_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET.h"
#include "../enums/USBCTRL_DPRAM_EP1_IN_CONTROL_ENDPOINT_TYPE.h"
#include "../enums/USBCTRL_DPRAM_EP1_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET.h"
#include "../enums/USBCTRL_DPRAM_EP1_OUT_CONTROL_ENDPOINT_TYPE.h"
#include "../enums/USBCTRL_DPRAM_EP2_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET.h"
#include "../enums/USBCTRL_DPRAM_EP2_IN_CONTROL_ENDPOINT_TYPE.h"
#include "../enums/USBCTRL_DPRAM_EP2_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET.h"
#include "../enums/USBCTRL_DPRAM_EP2_OUT_CONTROL_ENDPOINT_TYPE.h"
#include "../enums/USBCTRL_DPRAM_EP3_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET.h"
#include "../enums/USBCTRL_DPRAM_EP3_IN_CONTROL_ENDPOINT_TYPE.h"
#include "../enums/USBCTRL_DPRAM_EP3_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET.h"
#include "../enums/USBCTRL_DPRAM_EP3_OUT_CONTROL_ENDPOINT_TYPE.h"
#include "../enums/USBCTRL_DPRAM_EP4_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET.h"
#include "../enums/USBCTRL_DPRAM_EP4_IN_CONTROL_ENDPOINT_TYPE.h"
#include "../enums/USBCTRL_DPRAM_EP4_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET.h"
#include "../enums/USBCTRL_DPRAM_EP4_OUT_CONTROL_ENDPOINT_TYPE.h"
#include "../enums/USBCTRL_DPRAM_EP5_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET.h"
#include "../enums/USBCTRL_DPRAM_EP5_IN_CONTROL_ENDPOINT_TYPE.h"
#include "../enums/USBCTRL_DPRAM_EP5_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET.h"
#include "../enums/USBCTRL_DPRAM_EP5_OUT_CONTROL_ENDPOINT_TYPE.h"
#include "../enums/USBCTRL_DPRAM_EP6_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET.h"
#include "../enums/USBCTRL_DPRAM_EP6_IN_CONTROL_ENDPOINT_TYPE.h"
#include "../enums/USBCTRL_DPRAM_EP6_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET.h"
#include "../enums/USBCTRL_DPRAM_EP6_OUT_CONTROL_ENDPOINT_TYPE.h"
#include "../enums/USBCTRL_DPRAM_EP7_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET.h"
#include "../enums/USBCTRL_DPRAM_EP7_IN_CONTROL_ENDPOINT_TYPE.h"
#include "../enums/USBCTRL_DPRAM_EP7_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET.h"
#include "../enums/USBCTRL_DPRAM_EP7_OUT_CONTROL_ENDPOINT_TYPE.h"
#include "../enums/USBCTRL_DPRAM_EP8_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET.h"
#include "../enums/USBCTRL_DPRAM_EP8_IN_CONTROL_ENDPOINT_TYPE.h"
#include "../enums/USBCTRL_DPRAM_EP8_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET.h"
#include "../enums/USBCTRL_DPRAM_EP8_OUT_CONTROL_ENDPOINT_TYPE.h"
#include "../enums/USBCTRL_DPRAM_EP9_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET.h"
#include "../enums/USBCTRL_DPRAM_EP9_IN_CONTROL_ENDPOINT_TYPE.h"
#include "../enums/USBCTRL_DPRAM_EP9_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET.h"
#include "../enums/USBCTRL_DPRAM_EP9_OUT_CONTROL_ENDPOINT_TYPE.h"
#include "../ifgen/common.h"

namespace RP2040
{

struct [[gnu::packed]] usbctrl_dpram
{
    /* Constant attributes. */
    static constexpr std::size_t size =
        256;
    /* Fields. */
    uint32_t SETUP_PACKET_LOW;
    uint32_t SETUP_PACKET_HIGH;
    uint32_t EP1_IN_CONTROL;
    uint32_t EP1_OUT_CONTROL;
    uint32_t EP2_IN_CONTROL;
    uint32_t EP2_OUT_CONTROL;
    uint32_t EP3_IN_CONTROL;
    uint32_t EP3_OUT_CONTROL;
    uint32_t EP4_IN_CONTROL;
    uint32_t EP4_OUT_CONTROL;
    uint32_t EP5_IN_CONTROL;
    uint32_t EP5_OUT_CONTROL;
    uint32_t EP6_IN_CONTROL;
    uint32_t EP6_OUT_CONTROL;
    uint32_t EP7_IN_CONTROL;
    uint32_t EP7_OUT_CONTROL;
    uint32_t EP8_IN_CONTROL;
    uint32_t EP8_OUT_CONTROL;
    uint32_t EP9_IN_CONTROL;
    uint32_t EP9_OUT_CONTROL;
    uint32_t EP10_IN_CONTROL;
    uint32_t EP10_OUT_CONTROL;
    uint32_t EP11_IN_CONTROL;
    uint32_t EP11_OUT_CONTROL;
    uint32_t EP12_IN_CONTROL;
    uint32_t EP12_OUT_CONTROL;
    uint32_t EP13_IN_CONTROL;
    uint32_t EP13_OUT_CONTROL;
    uint32_t EP14_IN_CONTROL;
    uint32_t EP14_OUT_CONTROL;
    uint32_t EP15_IN_CONTROL;
    uint32_t EP15_OUT_CONTROL;
    uint32_t EP0_IN_BUFFER_CONTROL;
    uint32_t
        EP0_OUT_BUFFER_CONTROL;
    uint32_t EP1_IN_BUFFER_CONTROL;
    uint32_t
        EP1_OUT_BUFFER_CONTROL;
    uint32_t EP2_IN_BUFFER_CONTROL;
    uint32_t
        EP2_OUT_BUFFER_CONTROL;
    uint32_t EP3_IN_BUFFER_CONTROL;
    uint32_t
        EP3_OUT_BUFFER_CONTROL;
    uint32_t EP4_IN_BUFFER_CONTROL;
    uint32_t
        EP4_OUT_BUFFER_CONTROL;
    uint32_t EP5_IN_BUFFER_CONTROL;
    uint32_t
        EP5_OUT_BUFFER_CONTROL;
    uint32_t EP6_IN_BUFFER_CONTROL;
    uint32_t
        EP6_OUT_BUFFER_CONTROL;
    uint32_t EP7_IN_BUFFER_CONTROL;
    uint32_t
        EP7_OUT_BUFFER_CONTROL;
    uint32_t EP8_IN_BUFFER_CONTROL;
    uint32_t
        EP8_OUT_BUFFER_CONTROL;
    uint32_t EP9_IN_BUFFER_CONTROL;
    uint32_t
        EP9_OUT_BUFFER_CONTROL;
    uint32_t
        EP10_IN_BUFFER_CONTROL;
    uint32_t
        EP10_OUT_BUFFER_CONTROL;
    uint32_t
        EP11_IN_BUFFER_CONTROL;
    uint32_t
        EP11_OUT_BUFFER_CONTROL;
    uint32_t
        EP12_IN_BUFFER_CONTROL;
    uint32_t
        EP12_OUT_BUFFER_CONTROL;
    uint32_t
        EP13_IN_BUFFER_CONTROL;
    uint32_t
        EP13_OUT_BUFFER_CONTROL;
    uint32_t
        EP14_IN_BUFFER_CONTROL;
    uint32_t
        EP14_OUT_BUFFER_CONTROL;
    uint32_t
        EP15_IN_BUFFER_CONTROL;
    uint32_t
        EP15_OUT_BUFFER_CONTROL;
    /* Methods. */

    inline uint8_t get_SETUP_PACKET_LOW_BMREQUESTTYPE() volatile
    {
        return (SETUP_PACKET_LOW >> 0u) & 0b11111111u;
    }

    inline void set_SETUP_PACKET_LOW_BMREQUESTTYPE(uint8_t value) volatile
    {
        uint32_t curr = SETUP_PACKET_LOW;

        curr &= ~(0b11111111u << 0u);
        curr |= (value & 0b11111111u) << 0u;

        SETUP_PACKET_LOW = curr;
    }

    inline uint8_t get_SETUP_PACKET_LOW_BREQUEST() volatile
    {
        return (SETUP_PACKET_LOW >> 8u) & 0b11111111u;
    }

    inline void set_SETUP_PACKET_LOW_BREQUEST(uint8_t value) volatile
    {
        uint32_t curr = SETUP_PACKET_LOW;

        curr &= ~(0b11111111u << 8u);
        curr |= (value & 0b11111111u) << 8u;

        SETUP_PACKET_LOW = curr;
    }

    inline uint16_t get_SETUP_PACKET_LOW_WVALUE() volatile
    {
        return (SETUP_PACKET_LOW >> 16u) & 0b1111111111111111u;
    }

    inline void set_SETUP_PACKET_LOW_WVALUE(uint16_t value) volatile
    {
        uint32_t curr = SETUP_PACKET_LOW;

        curr &= ~(0b1111111111111111u << 16u);
        curr |= (value & 0b1111111111111111u) << 16u;

        SETUP_PACKET_LOW = curr;
    }

    inline void get_SETUP_PACKET_LOW(uint8_t &BMREQUESTTYPE, uint8_t &BREQUEST,
                                     uint16_t &WVALUE) volatile
    {
        uint32_t curr = SETUP_PACKET_LOW;

        BMREQUESTTYPE = (curr >> 0u) & 0b11111111u;
        BREQUEST = (curr >> 8u) & 0b11111111u;
        WVALUE = (curr >> 16u) & 0b1111111111111111u;
    }

    inline void set_SETUP_PACKET_LOW(uint8_t BMREQUESTTYPE, uint8_t BREQUEST,
                                     uint16_t WVALUE) volatile
    {
        uint32_t curr = SETUP_PACKET_LOW;

        curr &= ~(0b11111111u << 0u);
        curr |= (BMREQUESTTYPE & 0b11111111u) << 0u;
        curr &= ~(0b11111111u << 8u);
        curr |= (BREQUEST & 0b11111111u) << 8u;
        curr &= ~(0b1111111111111111u << 16u);
        curr |= (WVALUE & 0b1111111111111111u) << 16u;

        SETUP_PACKET_LOW = curr;
    }

    inline uint16_t get_SETUP_PACKET_HIGH_WINDEX() volatile
    {
        return (SETUP_PACKET_HIGH >> 0u) & 0b1111111111111111u;
    }

    inline void set_SETUP_PACKET_HIGH_WINDEX(uint16_t value) volatile
    {
        uint32_t curr = SETUP_PACKET_HIGH;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (value & 0b1111111111111111u) << 0u;

        SETUP_PACKET_HIGH = curr;
    }

    inline uint16_t get_SETUP_PACKET_HIGH_WLENGTH() volatile
    {
        return (SETUP_PACKET_HIGH >> 16u) & 0b1111111111111111u;
    }

    inline void set_SETUP_PACKET_HIGH_WLENGTH(uint16_t value) volatile
    {
        uint32_t curr = SETUP_PACKET_HIGH;

        curr &= ~(0b1111111111111111u << 16u);
        curr |= (value & 0b1111111111111111u) << 16u;

        SETUP_PACKET_HIGH = curr;
    }

    inline void get_SETUP_PACKET_HIGH(uint16_t &WINDEX,
                                      uint16_t &WLENGTH) volatile
    {
        uint32_t curr = SETUP_PACKET_HIGH;

        WINDEX = (curr >> 0u) & 0b1111111111111111u;
        WLENGTH = (curr >> 16u) & 0b1111111111111111u;
    }

    inline void set_SETUP_PACKET_HIGH(uint16_t WINDEX,
                                      uint16_t WLENGTH) volatile
    {
        uint32_t curr = SETUP_PACKET_HIGH;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (WINDEX & 0b1111111111111111u) << 0u;
        curr &= ~(0b1111111111111111u << 16u);
        curr |= (WLENGTH & 0b1111111111111111u) << 16u;

        SETUP_PACKET_HIGH = curr;
    }

    inline uint16_t get_EP1_IN_CONTROL_BUFFER_ADDRESS() volatile
    {
        return (EP1_IN_CONTROL >> 0u) & 0b1111111111111111u;
    }

    inline void set_EP1_IN_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile
    {
        uint32_t curr = EP1_IN_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (value & 0b1111111111111111u) << 0u;

        EP1_IN_CONTROL = curr;
    }

    inline bool get_EP1_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        return EP1_IN_CONTROL & (1u << 16u);
    }

    inline void set_EP1_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP1_IN_CONTROL |= 1u << 16u;
    }

    inline void clear_EP1_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP1_IN_CONTROL &= ~(1u << 16u);
    }

    inline void toggle_EP1_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP1_IN_CONTROL ^= 1u << 16u;
    }

    inline bool get_EP1_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        return EP1_IN_CONTROL & (1u << 17u);
    }

    inline void set_EP1_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP1_IN_CONTROL |= 1u << 17u;
    }

    inline void clear_EP1_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP1_IN_CONTROL &= ~(1u << 17u);
    }

    inline void toggle_EP1_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP1_IN_CONTROL ^= 1u << 17u;
    }

    inline USBCTRL_DPRAM_EP1_IN_CONTROL_ENDPOINT_TYPE
    get_EP1_IN_CONTROL_ENDPOINT_TYPE() volatile
    {
        return USBCTRL_DPRAM_EP1_IN_CONTROL_ENDPOINT_TYPE(
            (EP1_IN_CONTROL >> 26u) & 0b11u);
    }

    inline void set_EP1_IN_CONTROL_ENDPOINT_TYPE(
        USBCTRL_DPRAM_EP1_IN_CONTROL_ENDPOINT_TYPE value) volatile
    {
        uint32_t curr = EP1_IN_CONTROL;

        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(value) & 0b11u) << 26u;

        EP1_IN_CONTROL = curr;
    }

    inline bool get_EP1_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        return EP1_IN_CONTROL & (1u << 28u);
    }

    inline void set_EP1_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP1_IN_CONTROL |= 1u << 28u;
    }

    inline void clear_EP1_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP1_IN_CONTROL &= ~(1u << 28u);
    }

    inline void toggle_EP1_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP1_IN_CONTROL ^= 1u << 28u;
    }

    inline bool get_EP1_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        return EP1_IN_CONTROL & (1u << 29u);
    }

    inline void set_EP1_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP1_IN_CONTROL |= 1u << 29u;
    }

    inline void clear_EP1_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP1_IN_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP1_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP1_IN_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP1_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        return EP1_IN_CONTROL & (1u << 30u);
    }

    inline void set_EP1_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP1_IN_CONTROL |= 1u << 30u;
    }

    inline void clear_EP1_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP1_IN_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP1_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP1_IN_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP1_IN_CONTROL_ENABLE() volatile
    {
        return EP1_IN_CONTROL & (1u << 31u);
    }

    inline void set_EP1_IN_CONTROL_ENABLE() volatile
    {
        EP1_IN_CONTROL |= 1u << 31u;
    }

    inline void clear_EP1_IN_CONTROL_ENABLE() volatile
    {
        EP1_IN_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP1_IN_CONTROL_ENABLE() volatile
    {
        EP1_IN_CONTROL ^= 1u << 31u;
    }

    inline void get_EP1_IN_CONTROL(
        uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK,
        bool &INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP1_IN_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE,
        bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF,
        bool &DOUBLE_BUFFERED, bool &ENABLE) volatile
    {
        uint32_t curr = EP1_IN_CONTROL;

        BUFFER_ADDRESS = (curr >> 0u) & 0b1111111111111111u;
        INTERRUPT_ON_NAK = curr & (1u << 16u);
        INTERRUPT_ON_STALL = curr & (1u << 17u);
        ENDPOINT_TYPE =
            USBCTRL_DPRAM_EP1_IN_CONTROL_ENDPOINT_TYPE((curr >> 26u) & 0b11u);
        INTERRUPT_PER_DOUBLE_BUFF = curr & (1u << 28u);
        INTERRUPT_PER_BUFF = curr & (1u << 29u);
        DOUBLE_BUFFERED = curr & (1u << 30u);
        ENABLE = curr & (1u << 31u);
    }

    inline void set_EP1_IN_CONTROL(
        uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK,
        bool INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP1_IN_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE,
        bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF,
        bool DOUBLE_BUFFERED, bool ENABLE) volatile
    {
        uint32_t curr = EP1_IN_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (BUFFER_ADDRESS & 0b1111111111111111u) << 0u;
        curr &= ~(0b1u << 16u);
        curr |= (INTERRUPT_ON_NAK & 0b1u) << 16u;
        curr &= ~(0b1u << 17u);
        curr |= (INTERRUPT_ON_STALL & 0b1u) << 17u;
        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(ENDPOINT_TYPE) & 0b11u) << 26u;
        curr &= ~(0b1u << 28u);
        curr |= (INTERRUPT_PER_DOUBLE_BUFF & 0b1u) << 28u;
        curr &= ~(0b1u << 29u);
        curr |= (INTERRUPT_PER_BUFF & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (DOUBLE_BUFFERED & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (ENABLE & 0b1u) << 31u;

        EP1_IN_CONTROL = curr;
    }

    inline uint16_t get_EP1_OUT_CONTROL_BUFFER_ADDRESS() volatile
    {
        return (EP1_OUT_CONTROL >> 0u) & 0b1111111111111111u;
    }

    inline void set_EP1_OUT_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile
    {
        uint32_t curr = EP1_OUT_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (value & 0b1111111111111111u) << 0u;

        EP1_OUT_CONTROL = curr;
    }

    inline bool get_EP1_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        return EP1_OUT_CONTROL & (1u << 16u);
    }

    inline void set_EP1_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP1_OUT_CONTROL |= 1u << 16u;
    }

    inline void clear_EP1_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP1_OUT_CONTROL &= ~(1u << 16u);
    }

    inline void toggle_EP1_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP1_OUT_CONTROL ^= 1u << 16u;
    }

    inline bool get_EP1_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        return EP1_OUT_CONTROL & (1u << 17u);
    }

    inline void set_EP1_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP1_OUT_CONTROL |= 1u << 17u;
    }

    inline void clear_EP1_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP1_OUT_CONTROL &= ~(1u << 17u);
    }

    inline void toggle_EP1_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP1_OUT_CONTROL ^= 1u << 17u;
    }

    inline USBCTRL_DPRAM_EP1_OUT_CONTROL_ENDPOINT_TYPE
    get_EP1_OUT_CONTROL_ENDPOINT_TYPE() volatile
    {
        return USBCTRL_DPRAM_EP1_OUT_CONTROL_ENDPOINT_TYPE(
            (EP1_OUT_CONTROL >> 26u) & 0b11u);
    }

    inline void set_EP1_OUT_CONTROL_ENDPOINT_TYPE(
        USBCTRL_DPRAM_EP1_OUT_CONTROL_ENDPOINT_TYPE value) volatile
    {
        uint32_t curr = EP1_OUT_CONTROL;

        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(value) & 0b11u) << 26u;

        EP1_OUT_CONTROL = curr;
    }

    inline bool get_EP1_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        return EP1_OUT_CONTROL & (1u << 28u);
    }

    inline void set_EP1_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP1_OUT_CONTROL |= 1u << 28u;
    }

    inline void clear_EP1_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP1_OUT_CONTROL &= ~(1u << 28u);
    }

    inline void toggle_EP1_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP1_OUT_CONTROL ^= 1u << 28u;
    }

    inline bool get_EP1_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        return EP1_OUT_CONTROL & (1u << 29u);
    }

    inline void set_EP1_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP1_OUT_CONTROL |= 1u << 29u;
    }

    inline void clear_EP1_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP1_OUT_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP1_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP1_OUT_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP1_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        return EP1_OUT_CONTROL & (1u << 30u);
    }

    inline void set_EP1_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP1_OUT_CONTROL |= 1u << 30u;
    }

    inline void clear_EP1_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP1_OUT_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP1_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP1_OUT_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP1_OUT_CONTROL_ENABLE() volatile
    {
        return EP1_OUT_CONTROL & (1u << 31u);
    }

    inline void set_EP1_OUT_CONTROL_ENABLE() volatile
    {
        EP1_OUT_CONTROL |= 1u << 31u;
    }

    inline void clear_EP1_OUT_CONTROL_ENABLE() volatile
    {
        EP1_OUT_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP1_OUT_CONTROL_ENABLE() volatile
    {
        EP1_OUT_CONTROL ^= 1u << 31u;
    }

    inline void get_EP1_OUT_CONTROL(
        uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK,
        bool &INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP1_OUT_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE,
        bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF,
        bool &DOUBLE_BUFFERED, bool &ENABLE) volatile
    {
        uint32_t curr = EP1_OUT_CONTROL;

        BUFFER_ADDRESS = (curr >> 0u) & 0b1111111111111111u;
        INTERRUPT_ON_NAK = curr & (1u << 16u);
        INTERRUPT_ON_STALL = curr & (1u << 17u);
        ENDPOINT_TYPE =
            USBCTRL_DPRAM_EP1_OUT_CONTROL_ENDPOINT_TYPE((curr >> 26u) & 0b11u);
        INTERRUPT_PER_DOUBLE_BUFF = curr & (1u << 28u);
        INTERRUPT_PER_BUFF = curr & (1u << 29u);
        DOUBLE_BUFFERED = curr & (1u << 30u);
        ENABLE = curr & (1u << 31u);
    }

    inline void set_EP1_OUT_CONTROL(
        uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK,
        bool INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP1_OUT_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE,
        bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF,
        bool DOUBLE_BUFFERED, bool ENABLE) volatile
    {
        uint32_t curr = EP1_OUT_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (BUFFER_ADDRESS & 0b1111111111111111u) << 0u;
        curr &= ~(0b1u << 16u);
        curr |= (INTERRUPT_ON_NAK & 0b1u) << 16u;
        curr &= ~(0b1u << 17u);
        curr |= (INTERRUPT_ON_STALL & 0b1u) << 17u;
        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(ENDPOINT_TYPE) & 0b11u) << 26u;
        curr &= ~(0b1u << 28u);
        curr |= (INTERRUPT_PER_DOUBLE_BUFF & 0b1u) << 28u;
        curr &= ~(0b1u << 29u);
        curr |= (INTERRUPT_PER_BUFF & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (DOUBLE_BUFFERED & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (ENABLE & 0b1u) << 31u;

        EP1_OUT_CONTROL = curr;
    }

    inline uint16_t get_EP2_IN_CONTROL_BUFFER_ADDRESS() volatile
    {
        return (EP2_IN_CONTROL >> 0u) & 0b1111111111111111u;
    }

    inline void set_EP2_IN_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile
    {
        uint32_t curr = EP2_IN_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (value & 0b1111111111111111u) << 0u;

        EP2_IN_CONTROL = curr;
    }

    inline bool get_EP2_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        return EP2_IN_CONTROL & (1u << 16u);
    }

    inline void set_EP2_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP2_IN_CONTROL |= 1u << 16u;
    }

    inline void clear_EP2_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP2_IN_CONTROL &= ~(1u << 16u);
    }

    inline void toggle_EP2_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP2_IN_CONTROL ^= 1u << 16u;
    }

    inline bool get_EP2_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        return EP2_IN_CONTROL & (1u << 17u);
    }

    inline void set_EP2_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP2_IN_CONTROL |= 1u << 17u;
    }

    inline void clear_EP2_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP2_IN_CONTROL &= ~(1u << 17u);
    }

    inline void toggle_EP2_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP2_IN_CONTROL ^= 1u << 17u;
    }

    inline USBCTRL_DPRAM_EP2_IN_CONTROL_ENDPOINT_TYPE
    get_EP2_IN_CONTROL_ENDPOINT_TYPE() volatile
    {
        return USBCTRL_DPRAM_EP2_IN_CONTROL_ENDPOINT_TYPE(
            (EP2_IN_CONTROL >> 26u) & 0b11u);
    }

    inline void set_EP2_IN_CONTROL_ENDPOINT_TYPE(
        USBCTRL_DPRAM_EP2_IN_CONTROL_ENDPOINT_TYPE value) volatile
    {
        uint32_t curr = EP2_IN_CONTROL;

        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(value) & 0b11u) << 26u;

        EP2_IN_CONTROL = curr;
    }

    inline bool get_EP2_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        return EP2_IN_CONTROL & (1u << 28u);
    }

    inline void set_EP2_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP2_IN_CONTROL |= 1u << 28u;
    }

    inline void clear_EP2_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP2_IN_CONTROL &= ~(1u << 28u);
    }

    inline void toggle_EP2_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP2_IN_CONTROL ^= 1u << 28u;
    }

    inline bool get_EP2_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        return EP2_IN_CONTROL & (1u << 29u);
    }

    inline void set_EP2_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP2_IN_CONTROL |= 1u << 29u;
    }

    inline void clear_EP2_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP2_IN_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP2_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP2_IN_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP2_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        return EP2_IN_CONTROL & (1u << 30u);
    }

    inline void set_EP2_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP2_IN_CONTROL |= 1u << 30u;
    }

    inline void clear_EP2_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP2_IN_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP2_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP2_IN_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP2_IN_CONTROL_ENABLE() volatile
    {
        return EP2_IN_CONTROL & (1u << 31u);
    }

    inline void set_EP2_IN_CONTROL_ENABLE() volatile
    {
        EP2_IN_CONTROL |= 1u << 31u;
    }

    inline void clear_EP2_IN_CONTROL_ENABLE() volatile
    {
        EP2_IN_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP2_IN_CONTROL_ENABLE() volatile
    {
        EP2_IN_CONTROL ^= 1u << 31u;
    }

    inline void get_EP2_IN_CONTROL(
        uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK,
        bool &INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP2_IN_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE,
        bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF,
        bool &DOUBLE_BUFFERED, bool &ENABLE) volatile
    {
        uint32_t curr = EP2_IN_CONTROL;

        BUFFER_ADDRESS = (curr >> 0u) & 0b1111111111111111u;
        INTERRUPT_ON_NAK = curr & (1u << 16u);
        INTERRUPT_ON_STALL = curr & (1u << 17u);
        ENDPOINT_TYPE =
            USBCTRL_DPRAM_EP2_IN_CONTROL_ENDPOINT_TYPE((curr >> 26u) & 0b11u);
        INTERRUPT_PER_DOUBLE_BUFF = curr & (1u << 28u);
        INTERRUPT_PER_BUFF = curr & (1u << 29u);
        DOUBLE_BUFFERED = curr & (1u << 30u);
        ENABLE = curr & (1u << 31u);
    }

    inline void set_EP2_IN_CONTROL(
        uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK,
        bool INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP2_IN_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE,
        bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF,
        bool DOUBLE_BUFFERED, bool ENABLE) volatile
    {
        uint32_t curr = EP2_IN_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (BUFFER_ADDRESS & 0b1111111111111111u) << 0u;
        curr &= ~(0b1u << 16u);
        curr |= (INTERRUPT_ON_NAK & 0b1u) << 16u;
        curr &= ~(0b1u << 17u);
        curr |= (INTERRUPT_ON_STALL & 0b1u) << 17u;
        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(ENDPOINT_TYPE) & 0b11u) << 26u;
        curr &= ~(0b1u << 28u);
        curr |= (INTERRUPT_PER_DOUBLE_BUFF & 0b1u) << 28u;
        curr &= ~(0b1u << 29u);
        curr |= (INTERRUPT_PER_BUFF & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (DOUBLE_BUFFERED & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (ENABLE & 0b1u) << 31u;

        EP2_IN_CONTROL = curr;
    }

    inline uint16_t get_EP2_OUT_CONTROL_BUFFER_ADDRESS() volatile
    {
        return (EP2_OUT_CONTROL >> 0u) & 0b1111111111111111u;
    }

    inline void set_EP2_OUT_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile
    {
        uint32_t curr = EP2_OUT_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (value & 0b1111111111111111u) << 0u;

        EP2_OUT_CONTROL = curr;
    }

    inline bool get_EP2_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        return EP2_OUT_CONTROL & (1u << 16u);
    }

    inline void set_EP2_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP2_OUT_CONTROL |= 1u << 16u;
    }

    inline void clear_EP2_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP2_OUT_CONTROL &= ~(1u << 16u);
    }

    inline void toggle_EP2_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP2_OUT_CONTROL ^= 1u << 16u;
    }

    inline bool get_EP2_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        return EP2_OUT_CONTROL & (1u << 17u);
    }

    inline void set_EP2_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP2_OUT_CONTROL |= 1u << 17u;
    }

    inline void clear_EP2_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP2_OUT_CONTROL &= ~(1u << 17u);
    }

    inline void toggle_EP2_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP2_OUT_CONTROL ^= 1u << 17u;
    }

    inline USBCTRL_DPRAM_EP2_OUT_CONTROL_ENDPOINT_TYPE
    get_EP2_OUT_CONTROL_ENDPOINT_TYPE() volatile
    {
        return USBCTRL_DPRAM_EP2_OUT_CONTROL_ENDPOINT_TYPE(
            (EP2_OUT_CONTROL >> 26u) & 0b11u);
    }

    inline void set_EP2_OUT_CONTROL_ENDPOINT_TYPE(
        USBCTRL_DPRAM_EP2_OUT_CONTROL_ENDPOINT_TYPE value) volatile
    {
        uint32_t curr = EP2_OUT_CONTROL;

        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(value) & 0b11u) << 26u;

        EP2_OUT_CONTROL = curr;
    }

    inline bool get_EP2_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        return EP2_OUT_CONTROL & (1u << 28u);
    }

    inline void set_EP2_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP2_OUT_CONTROL |= 1u << 28u;
    }

    inline void clear_EP2_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP2_OUT_CONTROL &= ~(1u << 28u);
    }

    inline void toggle_EP2_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP2_OUT_CONTROL ^= 1u << 28u;
    }

    inline bool get_EP2_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        return EP2_OUT_CONTROL & (1u << 29u);
    }

    inline void set_EP2_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP2_OUT_CONTROL |= 1u << 29u;
    }

    inline void clear_EP2_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP2_OUT_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP2_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP2_OUT_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP2_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        return EP2_OUT_CONTROL & (1u << 30u);
    }

    inline void set_EP2_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP2_OUT_CONTROL |= 1u << 30u;
    }

    inline void clear_EP2_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP2_OUT_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP2_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP2_OUT_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP2_OUT_CONTROL_ENABLE() volatile
    {
        return EP2_OUT_CONTROL & (1u << 31u);
    }

    inline void set_EP2_OUT_CONTROL_ENABLE() volatile
    {
        EP2_OUT_CONTROL |= 1u << 31u;
    }

    inline void clear_EP2_OUT_CONTROL_ENABLE() volatile
    {
        EP2_OUT_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP2_OUT_CONTROL_ENABLE() volatile
    {
        EP2_OUT_CONTROL ^= 1u << 31u;
    }

    inline void get_EP2_OUT_CONTROL(
        uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK,
        bool &INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP2_OUT_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE,
        bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF,
        bool &DOUBLE_BUFFERED, bool &ENABLE) volatile
    {
        uint32_t curr = EP2_OUT_CONTROL;

        BUFFER_ADDRESS = (curr >> 0u) & 0b1111111111111111u;
        INTERRUPT_ON_NAK = curr & (1u << 16u);
        INTERRUPT_ON_STALL = curr & (1u << 17u);
        ENDPOINT_TYPE =
            USBCTRL_DPRAM_EP2_OUT_CONTROL_ENDPOINT_TYPE((curr >> 26u) & 0b11u);
        INTERRUPT_PER_DOUBLE_BUFF = curr & (1u << 28u);
        INTERRUPT_PER_BUFF = curr & (1u << 29u);
        DOUBLE_BUFFERED = curr & (1u << 30u);
        ENABLE = curr & (1u << 31u);
    }

    inline void set_EP2_OUT_CONTROL(
        uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK,
        bool INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP2_OUT_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE,
        bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF,
        bool DOUBLE_BUFFERED, bool ENABLE) volatile
    {
        uint32_t curr = EP2_OUT_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (BUFFER_ADDRESS & 0b1111111111111111u) << 0u;
        curr &= ~(0b1u << 16u);
        curr |= (INTERRUPT_ON_NAK & 0b1u) << 16u;
        curr &= ~(0b1u << 17u);
        curr |= (INTERRUPT_ON_STALL & 0b1u) << 17u;
        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(ENDPOINT_TYPE) & 0b11u) << 26u;
        curr &= ~(0b1u << 28u);
        curr |= (INTERRUPT_PER_DOUBLE_BUFF & 0b1u) << 28u;
        curr &= ~(0b1u << 29u);
        curr |= (INTERRUPT_PER_BUFF & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (DOUBLE_BUFFERED & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (ENABLE & 0b1u) << 31u;

        EP2_OUT_CONTROL = curr;
    }

    inline uint16_t get_EP3_IN_CONTROL_BUFFER_ADDRESS() volatile
    {
        return (EP3_IN_CONTROL >> 0u) & 0b1111111111111111u;
    }

    inline void set_EP3_IN_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile
    {
        uint32_t curr = EP3_IN_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (value & 0b1111111111111111u) << 0u;

        EP3_IN_CONTROL = curr;
    }

    inline bool get_EP3_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        return EP3_IN_CONTROL & (1u << 16u);
    }

    inline void set_EP3_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP3_IN_CONTROL |= 1u << 16u;
    }

    inline void clear_EP3_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP3_IN_CONTROL &= ~(1u << 16u);
    }

    inline void toggle_EP3_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP3_IN_CONTROL ^= 1u << 16u;
    }

    inline bool get_EP3_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        return EP3_IN_CONTROL & (1u << 17u);
    }

    inline void set_EP3_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP3_IN_CONTROL |= 1u << 17u;
    }

    inline void clear_EP3_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP3_IN_CONTROL &= ~(1u << 17u);
    }

    inline void toggle_EP3_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP3_IN_CONTROL ^= 1u << 17u;
    }

    inline USBCTRL_DPRAM_EP3_IN_CONTROL_ENDPOINT_TYPE
    get_EP3_IN_CONTROL_ENDPOINT_TYPE() volatile
    {
        return USBCTRL_DPRAM_EP3_IN_CONTROL_ENDPOINT_TYPE(
            (EP3_IN_CONTROL >> 26u) & 0b11u);
    }

    inline void set_EP3_IN_CONTROL_ENDPOINT_TYPE(
        USBCTRL_DPRAM_EP3_IN_CONTROL_ENDPOINT_TYPE value) volatile
    {
        uint32_t curr = EP3_IN_CONTROL;

        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(value) & 0b11u) << 26u;

        EP3_IN_CONTROL = curr;
    }

    inline bool get_EP3_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        return EP3_IN_CONTROL & (1u << 28u);
    }

    inline void set_EP3_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP3_IN_CONTROL |= 1u << 28u;
    }

    inline void clear_EP3_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP3_IN_CONTROL &= ~(1u << 28u);
    }

    inline void toggle_EP3_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP3_IN_CONTROL ^= 1u << 28u;
    }

    inline bool get_EP3_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        return EP3_IN_CONTROL & (1u << 29u);
    }

    inline void set_EP3_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP3_IN_CONTROL |= 1u << 29u;
    }

    inline void clear_EP3_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP3_IN_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP3_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP3_IN_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP3_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        return EP3_IN_CONTROL & (1u << 30u);
    }

    inline void set_EP3_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP3_IN_CONTROL |= 1u << 30u;
    }

    inline void clear_EP3_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP3_IN_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP3_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP3_IN_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP3_IN_CONTROL_ENABLE() volatile
    {
        return EP3_IN_CONTROL & (1u << 31u);
    }

    inline void set_EP3_IN_CONTROL_ENABLE() volatile
    {
        EP3_IN_CONTROL |= 1u << 31u;
    }

    inline void clear_EP3_IN_CONTROL_ENABLE() volatile
    {
        EP3_IN_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP3_IN_CONTROL_ENABLE() volatile
    {
        EP3_IN_CONTROL ^= 1u << 31u;
    }

    inline void get_EP3_IN_CONTROL(
        uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK,
        bool &INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP3_IN_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE,
        bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF,
        bool &DOUBLE_BUFFERED, bool &ENABLE) volatile
    {
        uint32_t curr = EP3_IN_CONTROL;

        BUFFER_ADDRESS = (curr >> 0u) & 0b1111111111111111u;
        INTERRUPT_ON_NAK = curr & (1u << 16u);
        INTERRUPT_ON_STALL = curr & (1u << 17u);
        ENDPOINT_TYPE =
            USBCTRL_DPRAM_EP3_IN_CONTROL_ENDPOINT_TYPE((curr >> 26u) & 0b11u);
        INTERRUPT_PER_DOUBLE_BUFF = curr & (1u << 28u);
        INTERRUPT_PER_BUFF = curr & (1u << 29u);
        DOUBLE_BUFFERED = curr & (1u << 30u);
        ENABLE = curr & (1u << 31u);
    }

    inline void set_EP3_IN_CONTROL(
        uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK,
        bool INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP3_IN_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE,
        bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF,
        bool DOUBLE_BUFFERED, bool ENABLE) volatile
    {
        uint32_t curr = EP3_IN_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (BUFFER_ADDRESS & 0b1111111111111111u) << 0u;
        curr &= ~(0b1u << 16u);
        curr |= (INTERRUPT_ON_NAK & 0b1u) << 16u;
        curr &= ~(0b1u << 17u);
        curr |= (INTERRUPT_ON_STALL & 0b1u) << 17u;
        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(ENDPOINT_TYPE) & 0b11u) << 26u;
        curr &= ~(0b1u << 28u);
        curr |= (INTERRUPT_PER_DOUBLE_BUFF & 0b1u) << 28u;
        curr &= ~(0b1u << 29u);
        curr |= (INTERRUPT_PER_BUFF & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (DOUBLE_BUFFERED & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (ENABLE & 0b1u) << 31u;

        EP3_IN_CONTROL = curr;
    }

    inline uint16_t get_EP3_OUT_CONTROL_BUFFER_ADDRESS() volatile
    {
        return (EP3_OUT_CONTROL >> 0u) & 0b1111111111111111u;
    }

    inline void set_EP3_OUT_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile
    {
        uint32_t curr = EP3_OUT_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (value & 0b1111111111111111u) << 0u;

        EP3_OUT_CONTROL = curr;
    }

    inline bool get_EP3_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        return EP3_OUT_CONTROL & (1u << 16u);
    }

    inline void set_EP3_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP3_OUT_CONTROL |= 1u << 16u;
    }

    inline void clear_EP3_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP3_OUT_CONTROL &= ~(1u << 16u);
    }

    inline void toggle_EP3_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP3_OUT_CONTROL ^= 1u << 16u;
    }

    inline bool get_EP3_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        return EP3_OUT_CONTROL & (1u << 17u);
    }

    inline void set_EP3_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP3_OUT_CONTROL |= 1u << 17u;
    }

    inline void clear_EP3_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP3_OUT_CONTROL &= ~(1u << 17u);
    }

    inline void toggle_EP3_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP3_OUT_CONTROL ^= 1u << 17u;
    }

    inline USBCTRL_DPRAM_EP3_OUT_CONTROL_ENDPOINT_TYPE
    get_EP3_OUT_CONTROL_ENDPOINT_TYPE() volatile
    {
        return USBCTRL_DPRAM_EP3_OUT_CONTROL_ENDPOINT_TYPE(
            (EP3_OUT_CONTROL >> 26u) & 0b11u);
    }

    inline void set_EP3_OUT_CONTROL_ENDPOINT_TYPE(
        USBCTRL_DPRAM_EP3_OUT_CONTROL_ENDPOINT_TYPE value) volatile
    {
        uint32_t curr = EP3_OUT_CONTROL;

        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(value) & 0b11u) << 26u;

        EP3_OUT_CONTROL = curr;
    }

    inline bool get_EP3_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        return EP3_OUT_CONTROL & (1u << 28u);
    }

    inline void set_EP3_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP3_OUT_CONTROL |= 1u << 28u;
    }

    inline void clear_EP3_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP3_OUT_CONTROL &= ~(1u << 28u);
    }

    inline void toggle_EP3_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP3_OUT_CONTROL ^= 1u << 28u;
    }

    inline bool get_EP3_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        return EP3_OUT_CONTROL & (1u << 29u);
    }

    inline void set_EP3_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP3_OUT_CONTROL |= 1u << 29u;
    }

    inline void clear_EP3_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP3_OUT_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP3_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP3_OUT_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP3_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        return EP3_OUT_CONTROL & (1u << 30u);
    }

    inline void set_EP3_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP3_OUT_CONTROL |= 1u << 30u;
    }

    inline void clear_EP3_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP3_OUT_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP3_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP3_OUT_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP3_OUT_CONTROL_ENABLE() volatile
    {
        return EP3_OUT_CONTROL & (1u << 31u);
    }

    inline void set_EP3_OUT_CONTROL_ENABLE() volatile
    {
        EP3_OUT_CONTROL |= 1u << 31u;
    }

    inline void clear_EP3_OUT_CONTROL_ENABLE() volatile
    {
        EP3_OUT_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP3_OUT_CONTROL_ENABLE() volatile
    {
        EP3_OUT_CONTROL ^= 1u << 31u;
    }

    inline void get_EP3_OUT_CONTROL(
        uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK,
        bool &INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP3_OUT_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE,
        bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF,
        bool &DOUBLE_BUFFERED, bool &ENABLE) volatile
    {
        uint32_t curr = EP3_OUT_CONTROL;

        BUFFER_ADDRESS = (curr >> 0u) & 0b1111111111111111u;
        INTERRUPT_ON_NAK = curr & (1u << 16u);
        INTERRUPT_ON_STALL = curr & (1u << 17u);
        ENDPOINT_TYPE =
            USBCTRL_DPRAM_EP3_OUT_CONTROL_ENDPOINT_TYPE((curr >> 26u) & 0b11u);
        INTERRUPT_PER_DOUBLE_BUFF = curr & (1u << 28u);
        INTERRUPT_PER_BUFF = curr & (1u << 29u);
        DOUBLE_BUFFERED = curr & (1u << 30u);
        ENABLE = curr & (1u << 31u);
    }

    inline void set_EP3_OUT_CONTROL(
        uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK,
        bool INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP3_OUT_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE,
        bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF,
        bool DOUBLE_BUFFERED, bool ENABLE) volatile
    {
        uint32_t curr = EP3_OUT_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (BUFFER_ADDRESS & 0b1111111111111111u) << 0u;
        curr &= ~(0b1u << 16u);
        curr |= (INTERRUPT_ON_NAK & 0b1u) << 16u;
        curr &= ~(0b1u << 17u);
        curr |= (INTERRUPT_ON_STALL & 0b1u) << 17u;
        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(ENDPOINT_TYPE) & 0b11u) << 26u;
        curr &= ~(0b1u << 28u);
        curr |= (INTERRUPT_PER_DOUBLE_BUFF & 0b1u) << 28u;
        curr &= ~(0b1u << 29u);
        curr |= (INTERRUPT_PER_BUFF & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (DOUBLE_BUFFERED & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (ENABLE & 0b1u) << 31u;

        EP3_OUT_CONTROL = curr;
    }

    inline uint16_t get_EP4_IN_CONTROL_BUFFER_ADDRESS() volatile
    {
        return (EP4_IN_CONTROL >> 0u) & 0b1111111111111111u;
    }

    inline void set_EP4_IN_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile
    {
        uint32_t curr = EP4_IN_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (value & 0b1111111111111111u) << 0u;

        EP4_IN_CONTROL = curr;
    }

    inline bool get_EP4_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        return EP4_IN_CONTROL & (1u << 16u);
    }

    inline void set_EP4_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP4_IN_CONTROL |= 1u << 16u;
    }

    inline void clear_EP4_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP4_IN_CONTROL &= ~(1u << 16u);
    }

    inline void toggle_EP4_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP4_IN_CONTROL ^= 1u << 16u;
    }

    inline bool get_EP4_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        return EP4_IN_CONTROL & (1u << 17u);
    }

    inline void set_EP4_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP4_IN_CONTROL |= 1u << 17u;
    }

    inline void clear_EP4_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP4_IN_CONTROL &= ~(1u << 17u);
    }

    inline void toggle_EP4_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP4_IN_CONTROL ^= 1u << 17u;
    }

    inline USBCTRL_DPRAM_EP4_IN_CONTROL_ENDPOINT_TYPE
    get_EP4_IN_CONTROL_ENDPOINT_TYPE() volatile
    {
        return USBCTRL_DPRAM_EP4_IN_CONTROL_ENDPOINT_TYPE(
            (EP4_IN_CONTROL >> 26u) & 0b11u);
    }

    inline void set_EP4_IN_CONTROL_ENDPOINT_TYPE(
        USBCTRL_DPRAM_EP4_IN_CONTROL_ENDPOINT_TYPE value) volatile
    {
        uint32_t curr = EP4_IN_CONTROL;

        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(value) & 0b11u) << 26u;

        EP4_IN_CONTROL = curr;
    }

    inline bool get_EP4_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        return EP4_IN_CONTROL & (1u << 28u);
    }

    inline void set_EP4_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP4_IN_CONTROL |= 1u << 28u;
    }

    inline void clear_EP4_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP4_IN_CONTROL &= ~(1u << 28u);
    }

    inline void toggle_EP4_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP4_IN_CONTROL ^= 1u << 28u;
    }

    inline bool get_EP4_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        return EP4_IN_CONTROL & (1u << 29u);
    }

    inline void set_EP4_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP4_IN_CONTROL |= 1u << 29u;
    }

    inline void clear_EP4_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP4_IN_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP4_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP4_IN_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP4_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        return EP4_IN_CONTROL & (1u << 30u);
    }

    inline void set_EP4_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP4_IN_CONTROL |= 1u << 30u;
    }

    inline void clear_EP4_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP4_IN_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP4_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP4_IN_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP4_IN_CONTROL_ENABLE() volatile
    {
        return EP4_IN_CONTROL & (1u << 31u);
    }

    inline void set_EP4_IN_CONTROL_ENABLE() volatile
    {
        EP4_IN_CONTROL |= 1u << 31u;
    }

    inline void clear_EP4_IN_CONTROL_ENABLE() volatile
    {
        EP4_IN_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP4_IN_CONTROL_ENABLE() volatile
    {
        EP4_IN_CONTROL ^= 1u << 31u;
    }

    inline void get_EP4_IN_CONTROL(
        uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK,
        bool &INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP4_IN_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE,
        bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF,
        bool &DOUBLE_BUFFERED, bool &ENABLE) volatile
    {
        uint32_t curr = EP4_IN_CONTROL;

        BUFFER_ADDRESS = (curr >> 0u) & 0b1111111111111111u;
        INTERRUPT_ON_NAK = curr & (1u << 16u);
        INTERRUPT_ON_STALL = curr & (1u << 17u);
        ENDPOINT_TYPE =
            USBCTRL_DPRAM_EP4_IN_CONTROL_ENDPOINT_TYPE((curr >> 26u) & 0b11u);
        INTERRUPT_PER_DOUBLE_BUFF = curr & (1u << 28u);
        INTERRUPT_PER_BUFF = curr & (1u << 29u);
        DOUBLE_BUFFERED = curr & (1u << 30u);
        ENABLE = curr & (1u << 31u);
    }

    inline void set_EP4_IN_CONTROL(
        uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK,
        bool INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP4_IN_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE,
        bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF,
        bool DOUBLE_BUFFERED, bool ENABLE) volatile
    {
        uint32_t curr = EP4_IN_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (BUFFER_ADDRESS & 0b1111111111111111u) << 0u;
        curr &= ~(0b1u << 16u);
        curr |= (INTERRUPT_ON_NAK & 0b1u) << 16u;
        curr &= ~(0b1u << 17u);
        curr |= (INTERRUPT_ON_STALL & 0b1u) << 17u;
        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(ENDPOINT_TYPE) & 0b11u) << 26u;
        curr &= ~(0b1u << 28u);
        curr |= (INTERRUPT_PER_DOUBLE_BUFF & 0b1u) << 28u;
        curr &= ~(0b1u << 29u);
        curr |= (INTERRUPT_PER_BUFF & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (DOUBLE_BUFFERED & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (ENABLE & 0b1u) << 31u;

        EP4_IN_CONTROL = curr;
    }

    inline uint16_t get_EP4_OUT_CONTROL_BUFFER_ADDRESS() volatile
    {
        return (EP4_OUT_CONTROL >> 0u) & 0b1111111111111111u;
    }

    inline void set_EP4_OUT_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile
    {
        uint32_t curr = EP4_OUT_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (value & 0b1111111111111111u) << 0u;

        EP4_OUT_CONTROL = curr;
    }

    inline bool get_EP4_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        return EP4_OUT_CONTROL & (1u << 16u);
    }

    inline void set_EP4_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP4_OUT_CONTROL |= 1u << 16u;
    }

    inline void clear_EP4_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP4_OUT_CONTROL &= ~(1u << 16u);
    }

    inline void toggle_EP4_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP4_OUT_CONTROL ^= 1u << 16u;
    }

    inline bool get_EP4_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        return EP4_OUT_CONTROL & (1u << 17u);
    }

    inline void set_EP4_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP4_OUT_CONTROL |= 1u << 17u;
    }

    inline void clear_EP4_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP4_OUT_CONTROL &= ~(1u << 17u);
    }

    inline void toggle_EP4_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP4_OUT_CONTROL ^= 1u << 17u;
    }

    inline USBCTRL_DPRAM_EP4_OUT_CONTROL_ENDPOINT_TYPE
    get_EP4_OUT_CONTROL_ENDPOINT_TYPE() volatile
    {
        return USBCTRL_DPRAM_EP4_OUT_CONTROL_ENDPOINT_TYPE(
            (EP4_OUT_CONTROL >> 26u) & 0b11u);
    }

    inline void set_EP4_OUT_CONTROL_ENDPOINT_TYPE(
        USBCTRL_DPRAM_EP4_OUT_CONTROL_ENDPOINT_TYPE value) volatile
    {
        uint32_t curr = EP4_OUT_CONTROL;

        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(value) & 0b11u) << 26u;

        EP4_OUT_CONTROL = curr;
    }

    inline bool get_EP4_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        return EP4_OUT_CONTROL & (1u << 28u);
    }

    inline void set_EP4_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP4_OUT_CONTROL |= 1u << 28u;
    }

    inline void clear_EP4_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP4_OUT_CONTROL &= ~(1u << 28u);
    }

    inline void toggle_EP4_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP4_OUT_CONTROL ^= 1u << 28u;
    }

    inline bool get_EP4_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        return EP4_OUT_CONTROL & (1u << 29u);
    }

    inline void set_EP4_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP4_OUT_CONTROL |= 1u << 29u;
    }

    inline void clear_EP4_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP4_OUT_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP4_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP4_OUT_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP4_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        return EP4_OUT_CONTROL & (1u << 30u);
    }

    inline void set_EP4_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP4_OUT_CONTROL |= 1u << 30u;
    }

    inline void clear_EP4_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP4_OUT_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP4_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP4_OUT_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP4_OUT_CONTROL_ENABLE() volatile
    {
        return EP4_OUT_CONTROL & (1u << 31u);
    }

    inline void set_EP4_OUT_CONTROL_ENABLE() volatile
    {
        EP4_OUT_CONTROL |= 1u << 31u;
    }

    inline void clear_EP4_OUT_CONTROL_ENABLE() volatile
    {
        EP4_OUT_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP4_OUT_CONTROL_ENABLE() volatile
    {
        EP4_OUT_CONTROL ^= 1u << 31u;
    }

    inline void get_EP4_OUT_CONTROL(
        uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK,
        bool &INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP4_OUT_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE,
        bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF,
        bool &DOUBLE_BUFFERED, bool &ENABLE) volatile
    {
        uint32_t curr = EP4_OUT_CONTROL;

        BUFFER_ADDRESS = (curr >> 0u) & 0b1111111111111111u;
        INTERRUPT_ON_NAK = curr & (1u << 16u);
        INTERRUPT_ON_STALL = curr & (1u << 17u);
        ENDPOINT_TYPE =
            USBCTRL_DPRAM_EP4_OUT_CONTROL_ENDPOINT_TYPE((curr >> 26u) & 0b11u);
        INTERRUPT_PER_DOUBLE_BUFF = curr & (1u << 28u);
        INTERRUPT_PER_BUFF = curr & (1u << 29u);
        DOUBLE_BUFFERED = curr & (1u << 30u);
        ENABLE = curr & (1u << 31u);
    }

    inline void set_EP4_OUT_CONTROL(
        uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK,
        bool INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP4_OUT_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE,
        bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF,
        bool DOUBLE_BUFFERED, bool ENABLE) volatile
    {
        uint32_t curr = EP4_OUT_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (BUFFER_ADDRESS & 0b1111111111111111u) << 0u;
        curr &= ~(0b1u << 16u);
        curr |= (INTERRUPT_ON_NAK & 0b1u) << 16u;
        curr &= ~(0b1u << 17u);
        curr |= (INTERRUPT_ON_STALL & 0b1u) << 17u;
        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(ENDPOINT_TYPE) & 0b11u) << 26u;
        curr &= ~(0b1u << 28u);
        curr |= (INTERRUPT_PER_DOUBLE_BUFF & 0b1u) << 28u;
        curr &= ~(0b1u << 29u);
        curr |= (INTERRUPT_PER_BUFF & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (DOUBLE_BUFFERED & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (ENABLE & 0b1u) << 31u;

        EP4_OUT_CONTROL = curr;
    }

    inline uint16_t get_EP5_IN_CONTROL_BUFFER_ADDRESS() volatile
    {
        return (EP5_IN_CONTROL >> 0u) & 0b1111111111111111u;
    }

    inline void set_EP5_IN_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile
    {
        uint32_t curr = EP5_IN_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (value & 0b1111111111111111u) << 0u;

        EP5_IN_CONTROL = curr;
    }

    inline bool get_EP5_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        return EP5_IN_CONTROL & (1u << 16u);
    }

    inline void set_EP5_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP5_IN_CONTROL |= 1u << 16u;
    }

    inline void clear_EP5_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP5_IN_CONTROL &= ~(1u << 16u);
    }

    inline void toggle_EP5_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP5_IN_CONTROL ^= 1u << 16u;
    }

    inline bool get_EP5_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        return EP5_IN_CONTROL & (1u << 17u);
    }

    inline void set_EP5_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP5_IN_CONTROL |= 1u << 17u;
    }

    inline void clear_EP5_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP5_IN_CONTROL &= ~(1u << 17u);
    }

    inline void toggle_EP5_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP5_IN_CONTROL ^= 1u << 17u;
    }

    inline USBCTRL_DPRAM_EP5_IN_CONTROL_ENDPOINT_TYPE
    get_EP5_IN_CONTROL_ENDPOINT_TYPE() volatile
    {
        return USBCTRL_DPRAM_EP5_IN_CONTROL_ENDPOINT_TYPE(
            (EP5_IN_CONTROL >> 26u) & 0b11u);
    }

    inline void set_EP5_IN_CONTROL_ENDPOINT_TYPE(
        USBCTRL_DPRAM_EP5_IN_CONTROL_ENDPOINT_TYPE value) volatile
    {
        uint32_t curr = EP5_IN_CONTROL;

        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(value) & 0b11u) << 26u;

        EP5_IN_CONTROL = curr;
    }

    inline bool get_EP5_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        return EP5_IN_CONTROL & (1u << 28u);
    }

    inline void set_EP5_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP5_IN_CONTROL |= 1u << 28u;
    }

    inline void clear_EP5_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP5_IN_CONTROL &= ~(1u << 28u);
    }

    inline void toggle_EP5_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP5_IN_CONTROL ^= 1u << 28u;
    }

    inline bool get_EP5_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        return EP5_IN_CONTROL & (1u << 29u);
    }

    inline void set_EP5_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP5_IN_CONTROL |= 1u << 29u;
    }

    inline void clear_EP5_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP5_IN_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP5_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP5_IN_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP5_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        return EP5_IN_CONTROL & (1u << 30u);
    }

    inline void set_EP5_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP5_IN_CONTROL |= 1u << 30u;
    }

    inline void clear_EP5_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP5_IN_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP5_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP5_IN_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP5_IN_CONTROL_ENABLE() volatile
    {
        return EP5_IN_CONTROL & (1u << 31u);
    }

    inline void set_EP5_IN_CONTROL_ENABLE() volatile
    {
        EP5_IN_CONTROL |= 1u << 31u;
    }

    inline void clear_EP5_IN_CONTROL_ENABLE() volatile
    {
        EP5_IN_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP5_IN_CONTROL_ENABLE() volatile
    {
        EP5_IN_CONTROL ^= 1u << 31u;
    }

    inline void get_EP5_IN_CONTROL(
        uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK,
        bool &INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP5_IN_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE,
        bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF,
        bool &DOUBLE_BUFFERED, bool &ENABLE) volatile
    {
        uint32_t curr = EP5_IN_CONTROL;

        BUFFER_ADDRESS = (curr >> 0u) & 0b1111111111111111u;
        INTERRUPT_ON_NAK = curr & (1u << 16u);
        INTERRUPT_ON_STALL = curr & (1u << 17u);
        ENDPOINT_TYPE =
            USBCTRL_DPRAM_EP5_IN_CONTROL_ENDPOINT_TYPE((curr >> 26u) & 0b11u);
        INTERRUPT_PER_DOUBLE_BUFF = curr & (1u << 28u);
        INTERRUPT_PER_BUFF = curr & (1u << 29u);
        DOUBLE_BUFFERED = curr & (1u << 30u);
        ENABLE = curr & (1u << 31u);
    }

    inline void set_EP5_IN_CONTROL(
        uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK,
        bool INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP5_IN_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE,
        bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF,
        bool DOUBLE_BUFFERED, bool ENABLE) volatile
    {
        uint32_t curr = EP5_IN_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (BUFFER_ADDRESS & 0b1111111111111111u) << 0u;
        curr &= ~(0b1u << 16u);
        curr |= (INTERRUPT_ON_NAK & 0b1u) << 16u;
        curr &= ~(0b1u << 17u);
        curr |= (INTERRUPT_ON_STALL & 0b1u) << 17u;
        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(ENDPOINT_TYPE) & 0b11u) << 26u;
        curr &= ~(0b1u << 28u);
        curr |= (INTERRUPT_PER_DOUBLE_BUFF & 0b1u) << 28u;
        curr &= ~(0b1u << 29u);
        curr |= (INTERRUPT_PER_BUFF & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (DOUBLE_BUFFERED & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (ENABLE & 0b1u) << 31u;

        EP5_IN_CONTROL = curr;
    }

    inline uint16_t get_EP5_OUT_CONTROL_BUFFER_ADDRESS() volatile
    {
        return (EP5_OUT_CONTROL >> 0u) & 0b1111111111111111u;
    }

    inline void set_EP5_OUT_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile
    {
        uint32_t curr = EP5_OUT_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (value & 0b1111111111111111u) << 0u;

        EP5_OUT_CONTROL = curr;
    }

    inline bool get_EP5_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        return EP5_OUT_CONTROL & (1u << 16u);
    }

    inline void set_EP5_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP5_OUT_CONTROL |= 1u << 16u;
    }

    inline void clear_EP5_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP5_OUT_CONTROL &= ~(1u << 16u);
    }

    inline void toggle_EP5_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP5_OUT_CONTROL ^= 1u << 16u;
    }

    inline bool get_EP5_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        return EP5_OUT_CONTROL & (1u << 17u);
    }

    inline void set_EP5_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP5_OUT_CONTROL |= 1u << 17u;
    }

    inline void clear_EP5_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP5_OUT_CONTROL &= ~(1u << 17u);
    }

    inline void toggle_EP5_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP5_OUT_CONTROL ^= 1u << 17u;
    }

    inline USBCTRL_DPRAM_EP5_OUT_CONTROL_ENDPOINT_TYPE
    get_EP5_OUT_CONTROL_ENDPOINT_TYPE() volatile
    {
        return USBCTRL_DPRAM_EP5_OUT_CONTROL_ENDPOINT_TYPE(
            (EP5_OUT_CONTROL >> 26u) & 0b11u);
    }

    inline void set_EP5_OUT_CONTROL_ENDPOINT_TYPE(
        USBCTRL_DPRAM_EP5_OUT_CONTROL_ENDPOINT_TYPE value) volatile
    {
        uint32_t curr = EP5_OUT_CONTROL;

        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(value) & 0b11u) << 26u;

        EP5_OUT_CONTROL = curr;
    }

    inline bool get_EP5_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        return EP5_OUT_CONTROL & (1u << 28u);
    }

    inline void set_EP5_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP5_OUT_CONTROL |= 1u << 28u;
    }

    inline void clear_EP5_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP5_OUT_CONTROL &= ~(1u << 28u);
    }

    inline void toggle_EP5_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP5_OUT_CONTROL ^= 1u << 28u;
    }

    inline bool get_EP5_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        return EP5_OUT_CONTROL & (1u << 29u);
    }

    inline void set_EP5_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP5_OUT_CONTROL |= 1u << 29u;
    }

    inline void clear_EP5_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP5_OUT_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP5_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP5_OUT_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP5_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        return EP5_OUT_CONTROL & (1u << 30u);
    }

    inline void set_EP5_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP5_OUT_CONTROL |= 1u << 30u;
    }

    inline void clear_EP5_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP5_OUT_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP5_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP5_OUT_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP5_OUT_CONTROL_ENABLE() volatile
    {
        return EP5_OUT_CONTROL & (1u << 31u);
    }

    inline void set_EP5_OUT_CONTROL_ENABLE() volatile
    {
        EP5_OUT_CONTROL |= 1u << 31u;
    }

    inline void clear_EP5_OUT_CONTROL_ENABLE() volatile
    {
        EP5_OUT_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP5_OUT_CONTROL_ENABLE() volatile
    {
        EP5_OUT_CONTROL ^= 1u << 31u;
    }

    inline void get_EP5_OUT_CONTROL(
        uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK,
        bool &INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP5_OUT_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE,
        bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF,
        bool &DOUBLE_BUFFERED, bool &ENABLE) volatile
    {
        uint32_t curr = EP5_OUT_CONTROL;

        BUFFER_ADDRESS = (curr >> 0u) & 0b1111111111111111u;
        INTERRUPT_ON_NAK = curr & (1u << 16u);
        INTERRUPT_ON_STALL = curr & (1u << 17u);
        ENDPOINT_TYPE =
            USBCTRL_DPRAM_EP5_OUT_CONTROL_ENDPOINT_TYPE((curr >> 26u) & 0b11u);
        INTERRUPT_PER_DOUBLE_BUFF = curr & (1u << 28u);
        INTERRUPT_PER_BUFF = curr & (1u << 29u);
        DOUBLE_BUFFERED = curr & (1u << 30u);
        ENABLE = curr & (1u << 31u);
    }

    inline void set_EP5_OUT_CONTROL(
        uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK,
        bool INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP5_OUT_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE,
        bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF,
        bool DOUBLE_BUFFERED, bool ENABLE) volatile
    {
        uint32_t curr = EP5_OUT_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (BUFFER_ADDRESS & 0b1111111111111111u) << 0u;
        curr &= ~(0b1u << 16u);
        curr |= (INTERRUPT_ON_NAK & 0b1u) << 16u;
        curr &= ~(0b1u << 17u);
        curr |= (INTERRUPT_ON_STALL & 0b1u) << 17u;
        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(ENDPOINT_TYPE) & 0b11u) << 26u;
        curr &= ~(0b1u << 28u);
        curr |= (INTERRUPT_PER_DOUBLE_BUFF & 0b1u) << 28u;
        curr &= ~(0b1u << 29u);
        curr |= (INTERRUPT_PER_BUFF & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (DOUBLE_BUFFERED & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (ENABLE & 0b1u) << 31u;

        EP5_OUT_CONTROL = curr;
    }

    inline uint16_t get_EP6_IN_CONTROL_BUFFER_ADDRESS() volatile
    {
        return (EP6_IN_CONTROL >> 0u) & 0b1111111111111111u;
    }

    inline void set_EP6_IN_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile
    {
        uint32_t curr = EP6_IN_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (value & 0b1111111111111111u) << 0u;

        EP6_IN_CONTROL = curr;
    }

    inline bool get_EP6_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        return EP6_IN_CONTROL & (1u << 16u);
    }

    inline void set_EP6_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP6_IN_CONTROL |= 1u << 16u;
    }

    inline void clear_EP6_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP6_IN_CONTROL &= ~(1u << 16u);
    }

    inline void toggle_EP6_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP6_IN_CONTROL ^= 1u << 16u;
    }

    inline bool get_EP6_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        return EP6_IN_CONTROL & (1u << 17u);
    }

    inline void set_EP6_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP6_IN_CONTROL |= 1u << 17u;
    }

    inline void clear_EP6_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP6_IN_CONTROL &= ~(1u << 17u);
    }

    inline void toggle_EP6_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP6_IN_CONTROL ^= 1u << 17u;
    }

    inline USBCTRL_DPRAM_EP6_IN_CONTROL_ENDPOINT_TYPE
    get_EP6_IN_CONTROL_ENDPOINT_TYPE() volatile
    {
        return USBCTRL_DPRAM_EP6_IN_CONTROL_ENDPOINT_TYPE(
            (EP6_IN_CONTROL >> 26u) & 0b11u);
    }

    inline void set_EP6_IN_CONTROL_ENDPOINT_TYPE(
        USBCTRL_DPRAM_EP6_IN_CONTROL_ENDPOINT_TYPE value) volatile
    {
        uint32_t curr = EP6_IN_CONTROL;

        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(value) & 0b11u) << 26u;

        EP6_IN_CONTROL = curr;
    }

    inline bool get_EP6_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        return EP6_IN_CONTROL & (1u << 28u);
    }

    inline void set_EP6_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP6_IN_CONTROL |= 1u << 28u;
    }

    inline void clear_EP6_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP6_IN_CONTROL &= ~(1u << 28u);
    }

    inline void toggle_EP6_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP6_IN_CONTROL ^= 1u << 28u;
    }

    inline bool get_EP6_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        return EP6_IN_CONTROL & (1u << 29u);
    }

    inline void set_EP6_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP6_IN_CONTROL |= 1u << 29u;
    }

    inline void clear_EP6_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP6_IN_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP6_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP6_IN_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP6_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        return EP6_IN_CONTROL & (1u << 30u);
    }

    inline void set_EP6_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP6_IN_CONTROL |= 1u << 30u;
    }

    inline void clear_EP6_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP6_IN_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP6_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP6_IN_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP6_IN_CONTROL_ENABLE() volatile
    {
        return EP6_IN_CONTROL & (1u << 31u);
    }

    inline void set_EP6_IN_CONTROL_ENABLE() volatile
    {
        EP6_IN_CONTROL |= 1u << 31u;
    }

    inline void clear_EP6_IN_CONTROL_ENABLE() volatile
    {
        EP6_IN_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP6_IN_CONTROL_ENABLE() volatile
    {
        EP6_IN_CONTROL ^= 1u << 31u;
    }

    inline void get_EP6_IN_CONTROL(
        uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK,
        bool &INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP6_IN_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE,
        bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF,
        bool &DOUBLE_BUFFERED, bool &ENABLE) volatile
    {
        uint32_t curr = EP6_IN_CONTROL;

        BUFFER_ADDRESS = (curr >> 0u) & 0b1111111111111111u;
        INTERRUPT_ON_NAK = curr & (1u << 16u);
        INTERRUPT_ON_STALL = curr & (1u << 17u);
        ENDPOINT_TYPE =
            USBCTRL_DPRAM_EP6_IN_CONTROL_ENDPOINT_TYPE((curr >> 26u) & 0b11u);
        INTERRUPT_PER_DOUBLE_BUFF = curr & (1u << 28u);
        INTERRUPT_PER_BUFF = curr & (1u << 29u);
        DOUBLE_BUFFERED = curr & (1u << 30u);
        ENABLE = curr & (1u << 31u);
    }

    inline void set_EP6_IN_CONTROL(
        uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK,
        bool INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP6_IN_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE,
        bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF,
        bool DOUBLE_BUFFERED, bool ENABLE) volatile
    {
        uint32_t curr = EP6_IN_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (BUFFER_ADDRESS & 0b1111111111111111u) << 0u;
        curr &= ~(0b1u << 16u);
        curr |= (INTERRUPT_ON_NAK & 0b1u) << 16u;
        curr &= ~(0b1u << 17u);
        curr |= (INTERRUPT_ON_STALL & 0b1u) << 17u;
        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(ENDPOINT_TYPE) & 0b11u) << 26u;
        curr &= ~(0b1u << 28u);
        curr |= (INTERRUPT_PER_DOUBLE_BUFF & 0b1u) << 28u;
        curr &= ~(0b1u << 29u);
        curr |= (INTERRUPT_PER_BUFF & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (DOUBLE_BUFFERED & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (ENABLE & 0b1u) << 31u;

        EP6_IN_CONTROL = curr;
    }

    inline uint16_t get_EP6_OUT_CONTROL_BUFFER_ADDRESS() volatile
    {
        return (EP6_OUT_CONTROL >> 0u) & 0b1111111111111111u;
    }

    inline void set_EP6_OUT_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile
    {
        uint32_t curr = EP6_OUT_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (value & 0b1111111111111111u) << 0u;

        EP6_OUT_CONTROL = curr;
    }

    inline bool get_EP6_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        return EP6_OUT_CONTROL & (1u << 16u);
    }

    inline void set_EP6_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP6_OUT_CONTROL |= 1u << 16u;
    }

    inline void clear_EP6_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP6_OUT_CONTROL &= ~(1u << 16u);
    }

    inline void toggle_EP6_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP6_OUT_CONTROL ^= 1u << 16u;
    }

    inline bool get_EP6_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        return EP6_OUT_CONTROL & (1u << 17u);
    }

    inline void set_EP6_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP6_OUT_CONTROL |= 1u << 17u;
    }

    inline void clear_EP6_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP6_OUT_CONTROL &= ~(1u << 17u);
    }

    inline void toggle_EP6_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP6_OUT_CONTROL ^= 1u << 17u;
    }

    inline USBCTRL_DPRAM_EP6_OUT_CONTROL_ENDPOINT_TYPE
    get_EP6_OUT_CONTROL_ENDPOINT_TYPE() volatile
    {
        return USBCTRL_DPRAM_EP6_OUT_CONTROL_ENDPOINT_TYPE(
            (EP6_OUT_CONTROL >> 26u) & 0b11u);
    }

    inline void set_EP6_OUT_CONTROL_ENDPOINT_TYPE(
        USBCTRL_DPRAM_EP6_OUT_CONTROL_ENDPOINT_TYPE value) volatile
    {
        uint32_t curr = EP6_OUT_CONTROL;

        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(value) & 0b11u) << 26u;

        EP6_OUT_CONTROL = curr;
    }

    inline bool get_EP6_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        return EP6_OUT_CONTROL & (1u << 28u);
    }

    inline void set_EP6_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP6_OUT_CONTROL |= 1u << 28u;
    }

    inline void clear_EP6_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP6_OUT_CONTROL &= ~(1u << 28u);
    }

    inline void toggle_EP6_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP6_OUT_CONTROL ^= 1u << 28u;
    }

    inline bool get_EP6_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        return EP6_OUT_CONTROL & (1u << 29u);
    }

    inline void set_EP6_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP6_OUT_CONTROL |= 1u << 29u;
    }

    inline void clear_EP6_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP6_OUT_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP6_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP6_OUT_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP6_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        return EP6_OUT_CONTROL & (1u << 30u);
    }

    inline void set_EP6_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP6_OUT_CONTROL |= 1u << 30u;
    }

    inline void clear_EP6_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP6_OUT_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP6_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP6_OUT_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP6_OUT_CONTROL_ENABLE() volatile
    {
        return EP6_OUT_CONTROL & (1u << 31u);
    }

    inline void set_EP6_OUT_CONTROL_ENABLE() volatile
    {
        EP6_OUT_CONTROL |= 1u << 31u;
    }

    inline void clear_EP6_OUT_CONTROL_ENABLE() volatile
    {
        EP6_OUT_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP6_OUT_CONTROL_ENABLE() volatile
    {
        EP6_OUT_CONTROL ^= 1u << 31u;
    }

    inline void get_EP6_OUT_CONTROL(
        uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK,
        bool &INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP6_OUT_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE,
        bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF,
        bool &DOUBLE_BUFFERED, bool &ENABLE) volatile
    {
        uint32_t curr = EP6_OUT_CONTROL;

        BUFFER_ADDRESS = (curr >> 0u) & 0b1111111111111111u;
        INTERRUPT_ON_NAK = curr & (1u << 16u);
        INTERRUPT_ON_STALL = curr & (1u << 17u);
        ENDPOINT_TYPE =
            USBCTRL_DPRAM_EP6_OUT_CONTROL_ENDPOINT_TYPE((curr >> 26u) & 0b11u);
        INTERRUPT_PER_DOUBLE_BUFF = curr & (1u << 28u);
        INTERRUPT_PER_BUFF = curr & (1u << 29u);
        DOUBLE_BUFFERED = curr & (1u << 30u);
        ENABLE = curr & (1u << 31u);
    }

    inline void set_EP6_OUT_CONTROL(
        uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK,
        bool INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP6_OUT_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE,
        bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF,
        bool DOUBLE_BUFFERED, bool ENABLE) volatile
    {
        uint32_t curr = EP6_OUT_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (BUFFER_ADDRESS & 0b1111111111111111u) << 0u;
        curr &= ~(0b1u << 16u);
        curr |= (INTERRUPT_ON_NAK & 0b1u) << 16u;
        curr &= ~(0b1u << 17u);
        curr |= (INTERRUPT_ON_STALL & 0b1u) << 17u;
        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(ENDPOINT_TYPE) & 0b11u) << 26u;
        curr &= ~(0b1u << 28u);
        curr |= (INTERRUPT_PER_DOUBLE_BUFF & 0b1u) << 28u;
        curr &= ~(0b1u << 29u);
        curr |= (INTERRUPT_PER_BUFF & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (DOUBLE_BUFFERED & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (ENABLE & 0b1u) << 31u;

        EP6_OUT_CONTROL = curr;
    }

    inline uint16_t get_EP7_IN_CONTROL_BUFFER_ADDRESS() volatile
    {
        return (EP7_IN_CONTROL >> 0u) & 0b1111111111111111u;
    }

    inline void set_EP7_IN_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile
    {
        uint32_t curr = EP7_IN_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (value & 0b1111111111111111u) << 0u;

        EP7_IN_CONTROL = curr;
    }

    inline bool get_EP7_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        return EP7_IN_CONTROL & (1u << 16u);
    }

    inline void set_EP7_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP7_IN_CONTROL |= 1u << 16u;
    }

    inline void clear_EP7_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP7_IN_CONTROL &= ~(1u << 16u);
    }

    inline void toggle_EP7_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP7_IN_CONTROL ^= 1u << 16u;
    }

    inline bool get_EP7_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        return EP7_IN_CONTROL & (1u << 17u);
    }

    inline void set_EP7_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP7_IN_CONTROL |= 1u << 17u;
    }

    inline void clear_EP7_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP7_IN_CONTROL &= ~(1u << 17u);
    }

    inline void toggle_EP7_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP7_IN_CONTROL ^= 1u << 17u;
    }

    inline USBCTRL_DPRAM_EP7_IN_CONTROL_ENDPOINT_TYPE
    get_EP7_IN_CONTROL_ENDPOINT_TYPE() volatile
    {
        return USBCTRL_DPRAM_EP7_IN_CONTROL_ENDPOINT_TYPE(
            (EP7_IN_CONTROL >> 26u) & 0b11u);
    }

    inline void set_EP7_IN_CONTROL_ENDPOINT_TYPE(
        USBCTRL_DPRAM_EP7_IN_CONTROL_ENDPOINT_TYPE value) volatile
    {
        uint32_t curr = EP7_IN_CONTROL;

        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(value) & 0b11u) << 26u;

        EP7_IN_CONTROL = curr;
    }

    inline bool get_EP7_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        return EP7_IN_CONTROL & (1u << 28u);
    }

    inline void set_EP7_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP7_IN_CONTROL |= 1u << 28u;
    }

    inline void clear_EP7_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP7_IN_CONTROL &= ~(1u << 28u);
    }

    inline void toggle_EP7_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP7_IN_CONTROL ^= 1u << 28u;
    }

    inline bool get_EP7_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        return EP7_IN_CONTROL & (1u << 29u);
    }

    inline void set_EP7_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP7_IN_CONTROL |= 1u << 29u;
    }

    inline void clear_EP7_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP7_IN_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP7_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP7_IN_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP7_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        return EP7_IN_CONTROL & (1u << 30u);
    }

    inline void set_EP7_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP7_IN_CONTROL |= 1u << 30u;
    }

    inline void clear_EP7_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP7_IN_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP7_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP7_IN_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP7_IN_CONTROL_ENABLE() volatile
    {
        return EP7_IN_CONTROL & (1u << 31u);
    }

    inline void set_EP7_IN_CONTROL_ENABLE() volatile
    {
        EP7_IN_CONTROL |= 1u << 31u;
    }

    inline void clear_EP7_IN_CONTROL_ENABLE() volatile
    {
        EP7_IN_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP7_IN_CONTROL_ENABLE() volatile
    {
        EP7_IN_CONTROL ^= 1u << 31u;
    }

    inline void get_EP7_IN_CONTROL(
        uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK,
        bool &INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP7_IN_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE,
        bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF,
        bool &DOUBLE_BUFFERED, bool &ENABLE) volatile
    {
        uint32_t curr = EP7_IN_CONTROL;

        BUFFER_ADDRESS = (curr >> 0u) & 0b1111111111111111u;
        INTERRUPT_ON_NAK = curr & (1u << 16u);
        INTERRUPT_ON_STALL = curr & (1u << 17u);
        ENDPOINT_TYPE =
            USBCTRL_DPRAM_EP7_IN_CONTROL_ENDPOINT_TYPE((curr >> 26u) & 0b11u);
        INTERRUPT_PER_DOUBLE_BUFF = curr & (1u << 28u);
        INTERRUPT_PER_BUFF = curr & (1u << 29u);
        DOUBLE_BUFFERED = curr & (1u << 30u);
        ENABLE = curr & (1u << 31u);
    }

    inline void set_EP7_IN_CONTROL(
        uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK,
        bool INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP7_IN_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE,
        bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF,
        bool DOUBLE_BUFFERED, bool ENABLE) volatile
    {
        uint32_t curr = EP7_IN_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (BUFFER_ADDRESS & 0b1111111111111111u) << 0u;
        curr &= ~(0b1u << 16u);
        curr |= (INTERRUPT_ON_NAK & 0b1u) << 16u;
        curr &= ~(0b1u << 17u);
        curr |= (INTERRUPT_ON_STALL & 0b1u) << 17u;
        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(ENDPOINT_TYPE) & 0b11u) << 26u;
        curr &= ~(0b1u << 28u);
        curr |= (INTERRUPT_PER_DOUBLE_BUFF & 0b1u) << 28u;
        curr &= ~(0b1u << 29u);
        curr |= (INTERRUPT_PER_BUFF & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (DOUBLE_BUFFERED & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (ENABLE & 0b1u) << 31u;

        EP7_IN_CONTROL = curr;
    }

    inline uint16_t get_EP7_OUT_CONTROL_BUFFER_ADDRESS() volatile
    {
        return (EP7_OUT_CONTROL >> 0u) & 0b1111111111111111u;
    }

    inline void set_EP7_OUT_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile
    {
        uint32_t curr = EP7_OUT_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (value & 0b1111111111111111u) << 0u;

        EP7_OUT_CONTROL = curr;
    }

    inline bool get_EP7_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        return EP7_OUT_CONTROL & (1u << 16u);
    }

    inline void set_EP7_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP7_OUT_CONTROL |= 1u << 16u;
    }

    inline void clear_EP7_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP7_OUT_CONTROL &= ~(1u << 16u);
    }

    inline void toggle_EP7_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP7_OUT_CONTROL ^= 1u << 16u;
    }

    inline bool get_EP7_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        return EP7_OUT_CONTROL & (1u << 17u);
    }

    inline void set_EP7_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP7_OUT_CONTROL |= 1u << 17u;
    }

    inline void clear_EP7_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP7_OUT_CONTROL &= ~(1u << 17u);
    }

    inline void toggle_EP7_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP7_OUT_CONTROL ^= 1u << 17u;
    }

    inline USBCTRL_DPRAM_EP7_OUT_CONTROL_ENDPOINT_TYPE
    get_EP7_OUT_CONTROL_ENDPOINT_TYPE() volatile
    {
        return USBCTRL_DPRAM_EP7_OUT_CONTROL_ENDPOINT_TYPE(
            (EP7_OUT_CONTROL >> 26u) & 0b11u);
    }

    inline void set_EP7_OUT_CONTROL_ENDPOINT_TYPE(
        USBCTRL_DPRAM_EP7_OUT_CONTROL_ENDPOINT_TYPE value) volatile
    {
        uint32_t curr = EP7_OUT_CONTROL;

        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(value) & 0b11u) << 26u;

        EP7_OUT_CONTROL = curr;
    }

    inline bool get_EP7_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        return EP7_OUT_CONTROL & (1u << 28u);
    }

    inline void set_EP7_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP7_OUT_CONTROL |= 1u << 28u;
    }

    inline void clear_EP7_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP7_OUT_CONTROL &= ~(1u << 28u);
    }

    inline void toggle_EP7_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP7_OUT_CONTROL ^= 1u << 28u;
    }

    inline bool get_EP7_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        return EP7_OUT_CONTROL & (1u << 29u);
    }

    inline void set_EP7_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP7_OUT_CONTROL |= 1u << 29u;
    }

    inline void clear_EP7_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP7_OUT_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP7_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP7_OUT_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP7_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        return EP7_OUT_CONTROL & (1u << 30u);
    }

    inline void set_EP7_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP7_OUT_CONTROL |= 1u << 30u;
    }

    inline void clear_EP7_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP7_OUT_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP7_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP7_OUT_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP7_OUT_CONTROL_ENABLE() volatile
    {
        return EP7_OUT_CONTROL & (1u << 31u);
    }

    inline void set_EP7_OUT_CONTROL_ENABLE() volatile
    {
        EP7_OUT_CONTROL |= 1u << 31u;
    }

    inline void clear_EP7_OUT_CONTROL_ENABLE() volatile
    {
        EP7_OUT_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP7_OUT_CONTROL_ENABLE() volatile
    {
        EP7_OUT_CONTROL ^= 1u << 31u;
    }

    inline void get_EP7_OUT_CONTROL(
        uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK,
        bool &INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP7_OUT_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE,
        bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF,
        bool &DOUBLE_BUFFERED, bool &ENABLE) volatile
    {
        uint32_t curr = EP7_OUT_CONTROL;

        BUFFER_ADDRESS = (curr >> 0u) & 0b1111111111111111u;
        INTERRUPT_ON_NAK = curr & (1u << 16u);
        INTERRUPT_ON_STALL = curr & (1u << 17u);
        ENDPOINT_TYPE =
            USBCTRL_DPRAM_EP7_OUT_CONTROL_ENDPOINT_TYPE((curr >> 26u) & 0b11u);
        INTERRUPT_PER_DOUBLE_BUFF = curr & (1u << 28u);
        INTERRUPT_PER_BUFF = curr & (1u << 29u);
        DOUBLE_BUFFERED = curr & (1u << 30u);
        ENABLE = curr & (1u << 31u);
    }

    inline void set_EP7_OUT_CONTROL(
        uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK,
        bool INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP7_OUT_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE,
        bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF,
        bool DOUBLE_BUFFERED, bool ENABLE) volatile
    {
        uint32_t curr = EP7_OUT_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (BUFFER_ADDRESS & 0b1111111111111111u) << 0u;
        curr &= ~(0b1u << 16u);
        curr |= (INTERRUPT_ON_NAK & 0b1u) << 16u;
        curr &= ~(0b1u << 17u);
        curr |= (INTERRUPT_ON_STALL & 0b1u) << 17u;
        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(ENDPOINT_TYPE) & 0b11u) << 26u;
        curr &= ~(0b1u << 28u);
        curr |= (INTERRUPT_PER_DOUBLE_BUFF & 0b1u) << 28u;
        curr &= ~(0b1u << 29u);
        curr |= (INTERRUPT_PER_BUFF & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (DOUBLE_BUFFERED & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (ENABLE & 0b1u) << 31u;

        EP7_OUT_CONTROL = curr;
    }

    inline uint16_t get_EP8_IN_CONTROL_BUFFER_ADDRESS() volatile
    {
        return (EP8_IN_CONTROL >> 0u) & 0b1111111111111111u;
    }

    inline void set_EP8_IN_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile
    {
        uint32_t curr = EP8_IN_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (value & 0b1111111111111111u) << 0u;

        EP8_IN_CONTROL = curr;
    }

    inline bool get_EP8_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        return EP8_IN_CONTROL & (1u << 16u);
    }

    inline void set_EP8_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP8_IN_CONTROL |= 1u << 16u;
    }

    inline void clear_EP8_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP8_IN_CONTROL &= ~(1u << 16u);
    }

    inline void toggle_EP8_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP8_IN_CONTROL ^= 1u << 16u;
    }

    inline bool get_EP8_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        return EP8_IN_CONTROL & (1u << 17u);
    }

    inline void set_EP8_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP8_IN_CONTROL |= 1u << 17u;
    }

    inline void clear_EP8_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP8_IN_CONTROL &= ~(1u << 17u);
    }

    inline void toggle_EP8_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP8_IN_CONTROL ^= 1u << 17u;
    }

    inline USBCTRL_DPRAM_EP8_IN_CONTROL_ENDPOINT_TYPE
    get_EP8_IN_CONTROL_ENDPOINT_TYPE() volatile
    {
        return USBCTRL_DPRAM_EP8_IN_CONTROL_ENDPOINT_TYPE(
            (EP8_IN_CONTROL >> 26u) & 0b11u);
    }

    inline void set_EP8_IN_CONTROL_ENDPOINT_TYPE(
        USBCTRL_DPRAM_EP8_IN_CONTROL_ENDPOINT_TYPE value) volatile
    {
        uint32_t curr = EP8_IN_CONTROL;

        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(value) & 0b11u) << 26u;

        EP8_IN_CONTROL = curr;
    }

    inline bool get_EP8_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        return EP8_IN_CONTROL & (1u << 28u);
    }

    inline void set_EP8_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP8_IN_CONTROL |= 1u << 28u;
    }

    inline void clear_EP8_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP8_IN_CONTROL &= ~(1u << 28u);
    }

    inline void toggle_EP8_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP8_IN_CONTROL ^= 1u << 28u;
    }

    inline bool get_EP8_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        return EP8_IN_CONTROL & (1u << 29u);
    }

    inline void set_EP8_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP8_IN_CONTROL |= 1u << 29u;
    }

    inline void clear_EP8_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP8_IN_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP8_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP8_IN_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP8_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        return EP8_IN_CONTROL & (1u << 30u);
    }

    inline void set_EP8_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP8_IN_CONTROL |= 1u << 30u;
    }

    inline void clear_EP8_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP8_IN_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP8_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP8_IN_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP8_IN_CONTROL_ENABLE() volatile
    {
        return EP8_IN_CONTROL & (1u << 31u);
    }

    inline void set_EP8_IN_CONTROL_ENABLE() volatile
    {
        EP8_IN_CONTROL |= 1u << 31u;
    }

    inline void clear_EP8_IN_CONTROL_ENABLE() volatile
    {
        EP8_IN_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP8_IN_CONTROL_ENABLE() volatile
    {
        EP8_IN_CONTROL ^= 1u << 31u;
    }

    inline void get_EP8_IN_CONTROL(
        uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK,
        bool &INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP8_IN_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE,
        bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF,
        bool &DOUBLE_BUFFERED, bool &ENABLE) volatile
    {
        uint32_t curr = EP8_IN_CONTROL;

        BUFFER_ADDRESS = (curr >> 0u) & 0b1111111111111111u;
        INTERRUPT_ON_NAK = curr & (1u << 16u);
        INTERRUPT_ON_STALL = curr & (1u << 17u);
        ENDPOINT_TYPE =
            USBCTRL_DPRAM_EP8_IN_CONTROL_ENDPOINT_TYPE((curr >> 26u) & 0b11u);
        INTERRUPT_PER_DOUBLE_BUFF = curr & (1u << 28u);
        INTERRUPT_PER_BUFF = curr & (1u << 29u);
        DOUBLE_BUFFERED = curr & (1u << 30u);
        ENABLE = curr & (1u << 31u);
    }

    inline void set_EP8_IN_CONTROL(
        uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK,
        bool INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP8_IN_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE,
        bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF,
        bool DOUBLE_BUFFERED, bool ENABLE) volatile
    {
        uint32_t curr = EP8_IN_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (BUFFER_ADDRESS & 0b1111111111111111u) << 0u;
        curr &= ~(0b1u << 16u);
        curr |= (INTERRUPT_ON_NAK & 0b1u) << 16u;
        curr &= ~(0b1u << 17u);
        curr |= (INTERRUPT_ON_STALL & 0b1u) << 17u;
        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(ENDPOINT_TYPE) & 0b11u) << 26u;
        curr &= ~(0b1u << 28u);
        curr |= (INTERRUPT_PER_DOUBLE_BUFF & 0b1u) << 28u;
        curr &= ~(0b1u << 29u);
        curr |= (INTERRUPT_PER_BUFF & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (DOUBLE_BUFFERED & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (ENABLE & 0b1u) << 31u;

        EP8_IN_CONTROL = curr;
    }

    inline uint16_t get_EP8_OUT_CONTROL_BUFFER_ADDRESS() volatile
    {
        return (EP8_OUT_CONTROL >> 0u) & 0b1111111111111111u;
    }

    inline void set_EP8_OUT_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile
    {
        uint32_t curr = EP8_OUT_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (value & 0b1111111111111111u) << 0u;

        EP8_OUT_CONTROL = curr;
    }

    inline bool get_EP8_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        return EP8_OUT_CONTROL & (1u << 16u);
    }

    inline void set_EP8_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP8_OUT_CONTROL |= 1u << 16u;
    }

    inline void clear_EP8_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP8_OUT_CONTROL &= ~(1u << 16u);
    }

    inline void toggle_EP8_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP8_OUT_CONTROL ^= 1u << 16u;
    }

    inline bool get_EP8_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        return EP8_OUT_CONTROL & (1u << 17u);
    }

    inline void set_EP8_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP8_OUT_CONTROL |= 1u << 17u;
    }

    inline void clear_EP8_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP8_OUT_CONTROL &= ~(1u << 17u);
    }

    inline void toggle_EP8_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP8_OUT_CONTROL ^= 1u << 17u;
    }

    inline USBCTRL_DPRAM_EP8_OUT_CONTROL_ENDPOINT_TYPE
    get_EP8_OUT_CONTROL_ENDPOINT_TYPE() volatile
    {
        return USBCTRL_DPRAM_EP8_OUT_CONTROL_ENDPOINT_TYPE(
            (EP8_OUT_CONTROL >> 26u) & 0b11u);
    }

    inline void set_EP8_OUT_CONTROL_ENDPOINT_TYPE(
        USBCTRL_DPRAM_EP8_OUT_CONTROL_ENDPOINT_TYPE value) volatile
    {
        uint32_t curr = EP8_OUT_CONTROL;

        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(value) & 0b11u) << 26u;

        EP8_OUT_CONTROL = curr;
    }

    inline bool get_EP8_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        return EP8_OUT_CONTROL & (1u << 28u);
    }

    inline void set_EP8_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP8_OUT_CONTROL |= 1u << 28u;
    }

    inline void clear_EP8_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP8_OUT_CONTROL &= ~(1u << 28u);
    }

    inline void toggle_EP8_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP8_OUT_CONTROL ^= 1u << 28u;
    }

    inline bool get_EP8_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        return EP8_OUT_CONTROL & (1u << 29u);
    }

    inline void set_EP8_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP8_OUT_CONTROL |= 1u << 29u;
    }

    inline void clear_EP8_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP8_OUT_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP8_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP8_OUT_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP8_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        return EP8_OUT_CONTROL & (1u << 30u);
    }

    inline void set_EP8_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP8_OUT_CONTROL |= 1u << 30u;
    }

    inline void clear_EP8_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP8_OUT_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP8_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP8_OUT_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP8_OUT_CONTROL_ENABLE() volatile
    {
        return EP8_OUT_CONTROL & (1u << 31u);
    }

    inline void set_EP8_OUT_CONTROL_ENABLE() volatile
    {
        EP8_OUT_CONTROL |= 1u << 31u;
    }

    inline void clear_EP8_OUT_CONTROL_ENABLE() volatile
    {
        EP8_OUT_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP8_OUT_CONTROL_ENABLE() volatile
    {
        EP8_OUT_CONTROL ^= 1u << 31u;
    }

    inline void get_EP8_OUT_CONTROL(
        uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK,
        bool &INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP8_OUT_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE,
        bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF,
        bool &DOUBLE_BUFFERED, bool &ENABLE) volatile
    {
        uint32_t curr = EP8_OUT_CONTROL;

        BUFFER_ADDRESS = (curr >> 0u) & 0b1111111111111111u;
        INTERRUPT_ON_NAK = curr & (1u << 16u);
        INTERRUPT_ON_STALL = curr & (1u << 17u);
        ENDPOINT_TYPE =
            USBCTRL_DPRAM_EP8_OUT_CONTROL_ENDPOINT_TYPE((curr >> 26u) & 0b11u);
        INTERRUPT_PER_DOUBLE_BUFF = curr & (1u << 28u);
        INTERRUPT_PER_BUFF = curr & (1u << 29u);
        DOUBLE_BUFFERED = curr & (1u << 30u);
        ENABLE = curr & (1u << 31u);
    }

    inline void set_EP8_OUT_CONTROL(
        uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK,
        bool INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP8_OUT_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE,
        bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF,
        bool DOUBLE_BUFFERED, bool ENABLE) volatile
    {
        uint32_t curr = EP8_OUT_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (BUFFER_ADDRESS & 0b1111111111111111u) << 0u;
        curr &= ~(0b1u << 16u);
        curr |= (INTERRUPT_ON_NAK & 0b1u) << 16u;
        curr &= ~(0b1u << 17u);
        curr |= (INTERRUPT_ON_STALL & 0b1u) << 17u;
        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(ENDPOINT_TYPE) & 0b11u) << 26u;
        curr &= ~(0b1u << 28u);
        curr |= (INTERRUPT_PER_DOUBLE_BUFF & 0b1u) << 28u;
        curr &= ~(0b1u << 29u);
        curr |= (INTERRUPT_PER_BUFF & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (DOUBLE_BUFFERED & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (ENABLE & 0b1u) << 31u;

        EP8_OUT_CONTROL = curr;
    }

    inline uint16_t get_EP9_IN_CONTROL_BUFFER_ADDRESS() volatile
    {
        return (EP9_IN_CONTROL >> 0u) & 0b1111111111111111u;
    }

    inline void set_EP9_IN_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile
    {
        uint32_t curr = EP9_IN_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (value & 0b1111111111111111u) << 0u;

        EP9_IN_CONTROL = curr;
    }

    inline bool get_EP9_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        return EP9_IN_CONTROL & (1u << 16u);
    }

    inline void set_EP9_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP9_IN_CONTROL |= 1u << 16u;
    }

    inline void clear_EP9_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP9_IN_CONTROL &= ~(1u << 16u);
    }

    inline void toggle_EP9_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP9_IN_CONTROL ^= 1u << 16u;
    }

    inline bool get_EP9_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        return EP9_IN_CONTROL & (1u << 17u);
    }

    inline void set_EP9_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP9_IN_CONTROL |= 1u << 17u;
    }

    inline void clear_EP9_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP9_IN_CONTROL &= ~(1u << 17u);
    }

    inline void toggle_EP9_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP9_IN_CONTROL ^= 1u << 17u;
    }

    inline USBCTRL_DPRAM_EP9_IN_CONTROL_ENDPOINT_TYPE
    get_EP9_IN_CONTROL_ENDPOINT_TYPE() volatile
    {
        return USBCTRL_DPRAM_EP9_IN_CONTROL_ENDPOINT_TYPE(
            (EP9_IN_CONTROL >> 26u) & 0b11u);
    }

    inline void set_EP9_IN_CONTROL_ENDPOINT_TYPE(
        USBCTRL_DPRAM_EP9_IN_CONTROL_ENDPOINT_TYPE value) volatile
    {
        uint32_t curr = EP9_IN_CONTROL;

        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(value) & 0b11u) << 26u;

        EP9_IN_CONTROL = curr;
    }

    inline bool get_EP9_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        return EP9_IN_CONTROL & (1u << 28u);
    }

    inline void set_EP9_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP9_IN_CONTROL |= 1u << 28u;
    }

    inline void clear_EP9_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP9_IN_CONTROL &= ~(1u << 28u);
    }

    inline void toggle_EP9_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP9_IN_CONTROL ^= 1u << 28u;
    }

    inline bool get_EP9_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        return EP9_IN_CONTROL & (1u << 29u);
    }

    inline void set_EP9_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP9_IN_CONTROL |= 1u << 29u;
    }

    inline void clear_EP9_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP9_IN_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP9_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP9_IN_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP9_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        return EP9_IN_CONTROL & (1u << 30u);
    }

    inline void set_EP9_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP9_IN_CONTROL |= 1u << 30u;
    }

    inline void clear_EP9_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP9_IN_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP9_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP9_IN_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP9_IN_CONTROL_ENABLE() volatile
    {
        return EP9_IN_CONTROL & (1u << 31u);
    }

    inline void set_EP9_IN_CONTROL_ENABLE() volatile
    {
        EP9_IN_CONTROL |= 1u << 31u;
    }

    inline void clear_EP9_IN_CONTROL_ENABLE() volatile
    {
        EP9_IN_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP9_IN_CONTROL_ENABLE() volatile
    {
        EP9_IN_CONTROL ^= 1u << 31u;
    }

    inline void get_EP9_IN_CONTROL(
        uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK,
        bool &INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP9_IN_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE,
        bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF,
        bool &DOUBLE_BUFFERED, bool &ENABLE) volatile
    {
        uint32_t curr = EP9_IN_CONTROL;

        BUFFER_ADDRESS = (curr >> 0u) & 0b1111111111111111u;
        INTERRUPT_ON_NAK = curr & (1u << 16u);
        INTERRUPT_ON_STALL = curr & (1u << 17u);
        ENDPOINT_TYPE =
            USBCTRL_DPRAM_EP9_IN_CONTROL_ENDPOINT_TYPE((curr >> 26u) & 0b11u);
        INTERRUPT_PER_DOUBLE_BUFF = curr & (1u << 28u);
        INTERRUPT_PER_BUFF = curr & (1u << 29u);
        DOUBLE_BUFFERED = curr & (1u << 30u);
        ENABLE = curr & (1u << 31u);
    }

    inline void set_EP9_IN_CONTROL(
        uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK,
        bool INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP9_IN_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE,
        bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF,
        bool DOUBLE_BUFFERED, bool ENABLE) volatile
    {
        uint32_t curr = EP9_IN_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (BUFFER_ADDRESS & 0b1111111111111111u) << 0u;
        curr &= ~(0b1u << 16u);
        curr |= (INTERRUPT_ON_NAK & 0b1u) << 16u;
        curr &= ~(0b1u << 17u);
        curr |= (INTERRUPT_ON_STALL & 0b1u) << 17u;
        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(ENDPOINT_TYPE) & 0b11u) << 26u;
        curr &= ~(0b1u << 28u);
        curr |= (INTERRUPT_PER_DOUBLE_BUFF & 0b1u) << 28u;
        curr &= ~(0b1u << 29u);
        curr |= (INTERRUPT_PER_BUFF & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (DOUBLE_BUFFERED & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (ENABLE & 0b1u) << 31u;

        EP9_IN_CONTROL = curr;
    }

    inline uint16_t get_EP9_OUT_CONTROL_BUFFER_ADDRESS() volatile
    {
        return (EP9_OUT_CONTROL >> 0u) & 0b1111111111111111u;
    }

    inline void set_EP9_OUT_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile
    {
        uint32_t curr = EP9_OUT_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (value & 0b1111111111111111u) << 0u;

        EP9_OUT_CONTROL = curr;
    }

    inline bool get_EP9_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        return EP9_OUT_CONTROL & (1u << 16u);
    }

    inline void set_EP9_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP9_OUT_CONTROL |= 1u << 16u;
    }

    inline void clear_EP9_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP9_OUT_CONTROL &= ~(1u << 16u);
    }

    inline void toggle_EP9_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP9_OUT_CONTROL ^= 1u << 16u;
    }

    inline bool get_EP9_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        return EP9_OUT_CONTROL & (1u << 17u);
    }

    inline void set_EP9_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP9_OUT_CONTROL |= 1u << 17u;
    }

    inline void clear_EP9_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP9_OUT_CONTROL &= ~(1u << 17u);
    }

    inline void toggle_EP9_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP9_OUT_CONTROL ^= 1u << 17u;
    }

    inline USBCTRL_DPRAM_EP9_OUT_CONTROL_ENDPOINT_TYPE
    get_EP9_OUT_CONTROL_ENDPOINT_TYPE() volatile
    {
        return USBCTRL_DPRAM_EP9_OUT_CONTROL_ENDPOINT_TYPE(
            (EP9_OUT_CONTROL >> 26u) & 0b11u);
    }

    inline void set_EP9_OUT_CONTROL_ENDPOINT_TYPE(
        USBCTRL_DPRAM_EP9_OUT_CONTROL_ENDPOINT_TYPE value) volatile
    {
        uint32_t curr = EP9_OUT_CONTROL;

        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(value) & 0b11u) << 26u;

        EP9_OUT_CONTROL = curr;
    }

    inline bool get_EP9_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        return EP9_OUT_CONTROL & (1u << 28u);
    }

    inline void set_EP9_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP9_OUT_CONTROL |= 1u << 28u;
    }

    inline void clear_EP9_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP9_OUT_CONTROL &= ~(1u << 28u);
    }

    inline void toggle_EP9_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP9_OUT_CONTROL ^= 1u << 28u;
    }

    inline bool get_EP9_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        return EP9_OUT_CONTROL & (1u << 29u);
    }

    inline void set_EP9_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP9_OUT_CONTROL |= 1u << 29u;
    }

    inline void clear_EP9_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP9_OUT_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP9_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP9_OUT_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP9_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        return EP9_OUT_CONTROL & (1u << 30u);
    }

    inline void set_EP9_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP9_OUT_CONTROL |= 1u << 30u;
    }

    inline void clear_EP9_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP9_OUT_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP9_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP9_OUT_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP9_OUT_CONTROL_ENABLE() volatile
    {
        return EP9_OUT_CONTROL & (1u << 31u);
    }

    inline void set_EP9_OUT_CONTROL_ENABLE() volatile
    {
        EP9_OUT_CONTROL |= 1u << 31u;
    }

    inline void clear_EP9_OUT_CONTROL_ENABLE() volatile
    {
        EP9_OUT_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP9_OUT_CONTROL_ENABLE() volatile
    {
        EP9_OUT_CONTROL ^= 1u << 31u;
    }

    inline void get_EP9_OUT_CONTROL(
        uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK,
        bool &INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP9_OUT_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE,
        bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF,
        bool &DOUBLE_BUFFERED, bool &ENABLE) volatile
    {
        uint32_t curr = EP9_OUT_CONTROL;

        BUFFER_ADDRESS = (curr >> 0u) & 0b1111111111111111u;
        INTERRUPT_ON_NAK = curr & (1u << 16u);
        INTERRUPT_ON_STALL = curr & (1u << 17u);
        ENDPOINT_TYPE =
            USBCTRL_DPRAM_EP9_OUT_CONTROL_ENDPOINT_TYPE((curr >> 26u) & 0b11u);
        INTERRUPT_PER_DOUBLE_BUFF = curr & (1u << 28u);
        INTERRUPT_PER_BUFF = curr & (1u << 29u);
        DOUBLE_BUFFERED = curr & (1u << 30u);
        ENABLE = curr & (1u << 31u);
    }

    inline void set_EP9_OUT_CONTROL(
        uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK,
        bool INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP9_OUT_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE,
        bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF,
        bool DOUBLE_BUFFERED, bool ENABLE) volatile
    {
        uint32_t curr = EP9_OUT_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (BUFFER_ADDRESS & 0b1111111111111111u) << 0u;
        curr &= ~(0b1u << 16u);
        curr |= (INTERRUPT_ON_NAK & 0b1u) << 16u;
        curr &= ~(0b1u << 17u);
        curr |= (INTERRUPT_ON_STALL & 0b1u) << 17u;
        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(ENDPOINT_TYPE) & 0b11u) << 26u;
        curr &= ~(0b1u << 28u);
        curr |= (INTERRUPT_PER_DOUBLE_BUFF & 0b1u) << 28u;
        curr &= ~(0b1u << 29u);
        curr |= (INTERRUPT_PER_BUFF & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (DOUBLE_BUFFERED & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (ENABLE & 0b1u) << 31u;

        EP9_OUT_CONTROL = curr;
    }

    inline uint16_t get_EP10_IN_CONTROL_BUFFER_ADDRESS() volatile
    {
        return (EP10_IN_CONTROL >> 0u) & 0b1111111111111111u;
    }

    inline void set_EP10_IN_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile
    {
        uint32_t curr = EP10_IN_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (value & 0b1111111111111111u) << 0u;

        EP10_IN_CONTROL = curr;
    }

    inline bool get_EP10_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        return EP10_IN_CONTROL & (1u << 16u);
    }

    inline void set_EP10_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP10_IN_CONTROL |= 1u << 16u;
    }

    inline void clear_EP10_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP10_IN_CONTROL &= ~(1u << 16u);
    }

    inline void toggle_EP10_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP10_IN_CONTROL ^= 1u << 16u;
    }

    inline bool get_EP10_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        return EP10_IN_CONTROL & (1u << 17u);
    }

    inline void set_EP10_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP10_IN_CONTROL |= 1u << 17u;
    }

    inline void clear_EP10_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP10_IN_CONTROL &= ~(1u << 17u);
    }

    inline void toggle_EP10_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP10_IN_CONTROL ^= 1u << 17u;
    }

    inline USBCTRL_DPRAM_EP10_IN_CONTROL_ENDPOINT_TYPE
    get_EP10_IN_CONTROL_ENDPOINT_TYPE() volatile
    {
        return USBCTRL_DPRAM_EP10_IN_CONTROL_ENDPOINT_TYPE(
            (EP10_IN_CONTROL >> 26u) & 0b11u);
    }

    inline void set_EP10_IN_CONTROL_ENDPOINT_TYPE(
        USBCTRL_DPRAM_EP10_IN_CONTROL_ENDPOINT_TYPE value) volatile
    {
        uint32_t curr = EP10_IN_CONTROL;

        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(value) & 0b11u) << 26u;

        EP10_IN_CONTROL = curr;
    }

    inline bool get_EP10_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        return EP10_IN_CONTROL & (1u << 28u);
    }

    inline void set_EP10_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP10_IN_CONTROL |= 1u << 28u;
    }

    inline void clear_EP10_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP10_IN_CONTROL &= ~(1u << 28u);
    }

    inline void toggle_EP10_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP10_IN_CONTROL ^= 1u << 28u;
    }

    inline bool get_EP10_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        return EP10_IN_CONTROL & (1u << 29u);
    }

    inline void set_EP10_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP10_IN_CONTROL |= 1u << 29u;
    }

    inline void clear_EP10_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP10_IN_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP10_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP10_IN_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP10_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        return EP10_IN_CONTROL & (1u << 30u);
    }

    inline void set_EP10_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP10_IN_CONTROL |= 1u << 30u;
    }

    inline void clear_EP10_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP10_IN_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP10_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP10_IN_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP10_IN_CONTROL_ENABLE() volatile
    {
        return EP10_IN_CONTROL & (1u << 31u);
    }

    inline void set_EP10_IN_CONTROL_ENABLE() volatile
    {
        EP10_IN_CONTROL |= 1u << 31u;
    }

    inline void clear_EP10_IN_CONTROL_ENABLE() volatile
    {
        EP10_IN_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP10_IN_CONTROL_ENABLE() volatile
    {
        EP10_IN_CONTROL ^= 1u << 31u;
    }

    inline void get_EP10_IN_CONTROL(
        uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK,
        bool &INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP10_IN_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE,
        bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF,
        bool &DOUBLE_BUFFERED, bool &ENABLE) volatile
    {
        uint32_t curr = EP10_IN_CONTROL;

        BUFFER_ADDRESS = (curr >> 0u) & 0b1111111111111111u;
        INTERRUPT_ON_NAK = curr & (1u << 16u);
        INTERRUPT_ON_STALL = curr & (1u << 17u);
        ENDPOINT_TYPE =
            USBCTRL_DPRAM_EP10_IN_CONTROL_ENDPOINT_TYPE((curr >> 26u) & 0b11u);
        INTERRUPT_PER_DOUBLE_BUFF = curr & (1u << 28u);
        INTERRUPT_PER_BUFF = curr & (1u << 29u);
        DOUBLE_BUFFERED = curr & (1u << 30u);
        ENABLE = curr & (1u << 31u);
    }

    inline void set_EP10_IN_CONTROL(
        uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK,
        bool INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP10_IN_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE,
        bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF,
        bool DOUBLE_BUFFERED, bool ENABLE) volatile
    {
        uint32_t curr = EP10_IN_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (BUFFER_ADDRESS & 0b1111111111111111u) << 0u;
        curr &= ~(0b1u << 16u);
        curr |= (INTERRUPT_ON_NAK & 0b1u) << 16u;
        curr &= ~(0b1u << 17u);
        curr |= (INTERRUPT_ON_STALL & 0b1u) << 17u;
        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(ENDPOINT_TYPE) & 0b11u) << 26u;
        curr &= ~(0b1u << 28u);
        curr |= (INTERRUPT_PER_DOUBLE_BUFF & 0b1u) << 28u;
        curr &= ~(0b1u << 29u);
        curr |= (INTERRUPT_PER_BUFF & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (DOUBLE_BUFFERED & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (ENABLE & 0b1u) << 31u;

        EP10_IN_CONTROL = curr;
    }

    inline uint16_t get_EP10_OUT_CONTROL_BUFFER_ADDRESS() volatile
    {
        return (EP10_OUT_CONTROL >> 0u) & 0b1111111111111111u;
    }

    inline void set_EP10_OUT_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile
    {
        uint32_t curr = EP10_OUT_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (value & 0b1111111111111111u) << 0u;

        EP10_OUT_CONTROL = curr;
    }

    inline bool get_EP10_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        return EP10_OUT_CONTROL & (1u << 16u);
    }

    inline void set_EP10_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP10_OUT_CONTROL |= 1u << 16u;
    }

    inline void clear_EP10_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP10_OUT_CONTROL &= ~(1u << 16u);
    }

    inline void toggle_EP10_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP10_OUT_CONTROL ^= 1u << 16u;
    }

    inline bool get_EP10_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        return EP10_OUT_CONTROL & (1u << 17u);
    }

    inline void set_EP10_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP10_OUT_CONTROL |= 1u << 17u;
    }

    inline void clear_EP10_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP10_OUT_CONTROL &= ~(1u << 17u);
    }

    inline void toggle_EP10_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP10_OUT_CONTROL ^= 1u << 17u;
    }

    inline USBCTRL_DPRAM_EP10_OUT_CONTROL_ENDPOINT_TYPE
    get_EP10_OUT_CONTROL_ENDPOINT_TYPE() volatile
    {
        return USBCTRL_DPRAM_EP10_OUT_CONTROL_ENDPOINT_TYPE(
            (EP10_OUT_CONTROL >> 26u) & 0b11u);
    }

    inline void set_EP10_OUT_CONTROL_ENDPOINT_TYPE(
        USBCTRL_DPRAM_EP10_OUT_CONTROL_ENDPOINT_TYPE value) volatile
    {
        uint32_t curr = EP10_OUT_CONTROL;

        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(value) & 0b11u) << 26u;

        EP10_OUT_CONTROL = curr;
    }

    inline bool get_EP10_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        return EP10_OUT_CONTROL & (1u << 28u);
    }

    inline void set_EP10_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP10_OUT_CONTROL |= 1u << 28u;
    }

    inline void clear_EP10_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP10_OUT_CONTROL &= ~(1u << 28u);
    }

    inline void toggle_EP10_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP10_OUT_CONTROL ^= 1u << 28u;
    }

    inline bool get_EP10_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        return EP10_OUT_CONTROL & (1u << 29u);
    }

    inline void set_EP10_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP10_OUT_CONTROL |= 1u << 29u;
    }

    inline void clear_EP10_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP10_OUT_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP10_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP10_OUT_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP10_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        return EP10_OUT_CONTROL & (1u << 30u);
    }

    inline void set_EP10_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP10_OUT_CONTROL |= 1u << 30u;
    }

    inline void clear_EP10_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP10_OUT_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP10_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP10_OUT_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP10_OUT_CONTROL_ENABLE() volatile
    {
        return EP10_OUT_CONTROL & (1u << 31u);
    }

    inline void set_EP10_OUT_CONTROL_ENABLE() volatile
    {
        EP10_OUT_CONTROL |= 1u << 31u;
    }

    inline void clear_EP10_OUT_CONTROL_ENABLE() volatile
    {
        EP10_OUT_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP10_OUT_CONTROL_ENABLE() volatile
    {
        EP10_OUT_CONTROL ^= 1u << 31u;
    }

    inline void get_EP10_OUT_CONTROL(
        uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK,
        bool &INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP10_OUT_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE,
        bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF,
        bool &DOUBLE_BUFFERED, bool &ENABLE) volatile
    {
        uint32_t curr = EP10_OUT_CONTROL;

        BUFFER_ADDRESS = (curr >> 0u) & 0b1111111111111111u;
        INTERRUPT_ON_NAK = curr & (1u << 16u);
        INTERRUPT_ON_STALL = curr & (1u << 17u);
        ENDPOINT_TYPE = USBCTRL_DPRAM_EP10_OUT_CONTROL_ENDPOINT_TYPE(
            (curr >> 26u) & 0b11u);
        INTERRUPT_PER_DOUBLE_BUFF = curr & (1u << 28u);
        INTERRUPT_PER_BUFF = curr & (1u << 29u);
        DOUBLE_BUFFERED = curr & (1u << 30u);
        ENABLE = curr & (1u << 31u);
    }

    inline void set_EP10_OUT_CONTROL(
        uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK,
        bool INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP10_OUT_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE,
        bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF,
        bool DOUBLE_BUFFERED, bool ENABLE) volatile
    {
        uint32_t curr = EP10_OUT_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (BUFFER_ADDRESS & 0b1111111111111111u) << 0u;
        curr &= ~(0b1u << 16u);
        curr |= (INTERRUPT_ON_NAK & 0b1u) << 16u;
        curr &= ~(0b1u << 17u);
        curr |= (INTERRUPT_ON_STALL & 0b1u) << 17u;
        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(ENDPOINT_TYPE) & 0b11u) << 26u;
        curr &= ~(0b1u << 28u);
        curr |= (INTERRUPT_PER_DOUBLE_BUFF & 0b1u) << 28u;
        curr &= ~(0b1u << 29u);
        curr |= (INTERRUPT_PER_BUFF & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (DOUBLE_BUFFERED & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (ENABLE & 0b1u) << 31u;

        EP10_OUT_CONTROL = curr;
    }

    inline uint16_t get_EP11_IN_CONTROL_BUFFER_ADDRESS() volatile
    {
        return (EP11_IN_CONTROL >> 0u) & 0b1111111111111111u;
    }

    inline void set_EP11_IN_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile
    {
        uint32_t curr = EP11_IN_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (value & 0b1111111111111111u) << 0u;

        EP11_IN_CONTROL = curr;
    }

    inline bool get_EP11_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        return EP11_IN_CONTROL & (1u << 16u);
    }

    inline void set_EP11_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP11_IN_CONTROL |= 1u << 16u;
    }

    inline void clear_EP11_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP11_IN_CONTROL &= ~(1u << 16u);
    }

    inline void toggle_EP11_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP11_IN_CONTROL ^= 1u << 16u;
    }

    inline bool get_EP11_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        return EP11_IN_CONTROL & (1u << 17u);
    }

    inline void set_EP11_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP11_IN_CONTROL |= 1u << 17u;
    }

    inline void clear_EP11_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP11_IN_CONTROL &= ~(1u << 17u);
    }

    inline void toggle_EP11_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP11_IN_CONTROL ^= 1u << 17u;
    }

    inline USBCTRL_DPRAM_EP11_IN_CONTROL_ENDPOINT_TYPE
    get_EP11_IN_CONTROL_ENDPOINT_TYPE() volatile
    {
        return USBCTRL_DPRAM_EP11_IN_CONTROL_ENDPOINT_TYPE(
            (EP11_IN_CONTROL >> 26u) & 0b11u);
    }

    inline void set_EP11_IN_CONTROL_ENDPOINT_TYPE(
        USBCTRL_DPRAM_EP11_IN_CONTROL_ENDPOINT_TYPE value) volatile
    {
        uint32_t curr = EP11_IN_CONTROL;

        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(value) & 0b11u) << 26u;

        EP11_IN_CONTROL = curr;
    }

    inline bool get_EP11_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        return EP11_IN_CONTROL & (1u << 28u);
    }

    inline void set_EP11_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP11_IN_CONTROL |= 1u << 28u;
    }

    inline void clear_EP11_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP11_IN_CONTROL &= ~(1u << 28u);
    }

    inline void toggle_EP11_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP11_IN_CONTROL ^= 1u << 28u;
    }

    inline bool get_EP11_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        return EP11_IN_CONTROL & (1u << 29u);
    }

    inline void set_EP11_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP11_IN_CONTROL |= 1u << 29u;
    }

    inline void clear_EP11_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP11_IN_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP11_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP11_IN_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP11_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        return EP11_IN_CONTROL & (1u << 30u);
    }

    inline void set_EP11_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP11_IN_CONTROL |= 1u << 30u;
    }

    inline void clear_EP11_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP11_IN_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP11_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP11_IN_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP11_IN_CONTROL_ENABLE() volatile
    {
        return EP11_IN_CONTROL & (1u << 31u);
    }

    inline void set_EP11_IN_CONTROL_ENABLE() volatile
    {
        EP11_IN_CONTROL |= 1u << 31u;
    }

    inline void clear_EP11_IN_CONTROL_ENABLE() volatile
    {
        EP11_IN_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP11_IN_CONTROL_ENABLE() volatile
    {
        EP11_IN_CONTROL ^= 1u << 31u;
    }

    inline void get_EP11_IN_CONTROL(
        uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK,
        bool &INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP11_IN_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE,
        bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF,
        bool &DOUBLE_BUFFERED, bool &ENABLE) volatile
    {
        uint32_t curr = EP11_IN_CONTROL;

        BUFFER_ADDRESS = (curr >> 0u) & 0b1111111111111111u;
        INTERRUPT_ON_NAK = curr & (1u << 16u);
        INTERRUPT_ON_STALL = curr & (1u << 17u);
        ENDPOINT_TYPE =
            USBCTRL_DPRAM_EP11_IN_CONTROL_ENDPOINT_TYPE((curr >> 26u) & 0b11u);
        INTERRUPT_PER_DOUBLE_BUFF = curr & (1u << 28u);
        INTERRUPT_PER_BUFF = curr & (1u << 29u);
        DOUBLE_BUFFERED = curr & (1u << 30u);
        ENABLE = curr & (1u << 31u);
    }

    inline void set_EP11_IN_CONTROL(
        uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK,
        bool INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP11_IN_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE,
        bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF,
        bool DOUBLE_BUFFERED, bool ENABLE) volatile
    {
        uint32_t curr = EP11_IN_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (BUFFER_ADDRESS & 0b1111111111111111u) << 0u;
        curr &= ~(0b1u << 16u);
        curr |= (INTERRUPT_ON_NAK & 0b1u) << 16u;
        curr &= ~(0b1u << 17u);
        curr |= (INTERRUPT_ON_STALL & 0b1u) << 17u;
        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(ENDPOINT_TYPE) & 0b11u) << 26u;
        curr &= ~(0b1u << 28u);
        curr |= (INTERRUPT_PER_DOUBLE_BUFF & 0b1u) << 28u;
        curr &= ~(0b1u << 29u);
        curr |= (INTERRUPT_PER_BUFF & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (DOUBLE_BUFFERED & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (ENABLE & 0b1u) << 31u;

        EP11_IN_CONTROL = curr;
    }

    inline uint16_t get_EP11_OUT_CONTROL_BUFFER_ADDRESS() volatile
    {
        return (EP11_OUT_CONTROL >> 0u) & 0b1111111111111111u;
    }

    inline void set_EP11_OUT_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile
    {
        uint32_t curr = EP11_OUT_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (value & 0b1111111111111111u) << 0u;

        EP11_OUT_CONTROL = curr;
    }

    inline bool get_EP11_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        return EP11_OUT_CONTROL & (1u << 16u);
    }

    inline void set_EP11_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP11_OUT_CONTROL |= 1u << 16u;
    }

    inline void clear_EP11_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP11_OUT_CONTROL &= ~(1u << 16u);
    }

    inline void toggle_EP11_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP11_OUT_CONTROL ^= 1u << 16u;
    }

    inline bool get_EP11_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        return EP11_OUT_CONTROL & (1u << 17u);
    }

    inline void set_EP11_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP11_OUT_CONTROL |= 1u << 17u;
    }

    inline void clear_EP11_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP11_OUT_CONTROL &= ~(1u << 17u);
    }

    inline void toggle_EP11_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP11_OUT_CONTROL ^= 1u << 17u;
    }

    inline USBCTRL_DPRAM_EP11_OUT_CONTROL_ENDPOINT_TYPE
    get_EP11_OUT_CONTROL_ENDPOINT_TYPE() volatile
    {
        return USBCTRL_DPRAM_EP11_OUT_CONTROL_ENDPOINT_TYPE(
            (EP11_OUT_CONTROL >> 26u) & 0b11u);
    }

    inline void set_EP11_OUT_CONTROL_ENDPOINT_TYPE(
        USBCTRL_DPRAM_EP11_OUT_CONTROL_ENDPOINT_TYPE value) volatile
    {
        uint32_t curr = EP11_OUT_CONTROL;

        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(value) & 0b11u) << 26u;

        EP11_OUT_CONTROL = curr;
    }

    inline bool get_EP11_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        return EP11_OUT_CONTROL & (1u << 28u);
    }

    inline void set_EP11_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP11_OUT_CONTROL |= 1u << 28u;
    }

    inline void clear_EP11_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP11_OUT_CONTROL &= ~(1u << 28u);
    }

    inline void toggle_EP11_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP11_OUT_CONTROL ^= 1u << 28u;
    }

    inline bool get_EP11_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        return EP11_OUT_CONTROL & (1u << 29u);
    }

    inline void set_EP11_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP11_OUT_CONTROL |= 1u << 29u;
    }

    inline void clear_EP11_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP11_OUT_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP11_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP11_OUT_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP11_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        return EP11_OUT_CONTROL & (1u << 30u);
    }

    inline void set_EP11_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP11_OUT_CONTROL |= 1u << 30u;
    }

    inline void clear_EP11_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP11_OUT_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP11_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP11_OUT_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP11_OUT_CONTROL_ENABLE() volatile
    {
        return EP11_OUT_CONTROL & (1u << 31u);
    }

    inline void set_EP11_OUT_CONTROL_ENABLE() volatile
    {
        EP11_OUT_CONTROL |= 1u << 31u;
    }

    inline void clear_EP11_OUT_CONTROL_ENABLE() volatile
    {
        EP11_OUT_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP11_OUT_CONTROL_ENABLE() volatile
    {
        EP11_OUT_CONTROL ^= 1u << 31u;
    }

    inline void get_EP11_OUT_CONTROL(
        uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK,
        bool &INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP11_OUT_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE,
        bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF,
        bool &DOUBLE_BUFFERED, bool &ENABLE) volatile
    {
        uint32_t curr = EP11_OUT_CONTROL;

        BUFFER_ADDRESS = (curr >> 0u) & 0b1111111111111111u;
        INTERRUPT_ON_NAK = curr & (1u << 16u);
        INTERRUPT_ON_STALL = curr & (1u << 17u);
        ENDPOINT_TYPE = USBCTRL_DPRAM_EP11_OUT_CONTROL_ENDPOINT_TYPE(
            (curr >> 26u) & 0b11u);
        INTERRUPT_PER_DOUBLE_BUFF = curr & (1u << 28u);
        INTERRUPT_PER_BUFF = curr & (1u << 29u);
        DOUBLE_BUFFERED = curr & (1u << 30u);
        ENABLE = curr & (1u << 31u);
    }

    inline void set_EP11_OUT_CONTROL(
        uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK,
        bool INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP11_OUT_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE,
        bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF,
        bool DOUBLE_BUFFERED, bool ENABLE) volatile
    {
        uint32_t curr = EP11_OUT_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (BUFFER_ADDRESS & 0b1111111111111111u) << 0u;
        curr &= ~(0b1u << 16u);
        curr |= (INTERRUPT_ON_NAK & 0b1u) << 16u;
        curr &= ~(0b1u << 17u);
        curr |= (INTERRUPT_ON_STALL & 0b1u) << 17u;
        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(ENDPOINT_TYPE) & 0b11u) << 26u;
        curr &= ~(0b1u << 28u);
        curr |= (INTERRUPT_PER_DOUBLE_BUFF & 0b1u) << 28u;
        curr &= ~(0b1u << 29u);
        curr |= (INTERRUPT_PER_BUFF & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (DOUBLE_BUFFERED & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (ENABLE & 0b1u) << 31u;

        EP11_OUT_CONTROL = curr;
    }

    inline uint16_t get_EP12_IN_CONTROL_BUFFER_ADDRESS() volatile
    {
        return (EP12_IN_CONTROL >> 0u) & 0b1111111111111111u;
    }

    inline void set_EP12_IN_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile
    {
        uint32_t curr = EP12_IN_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (value & 0b1111111111111111u) << 0u;

        EP12_IN_CONTROL = curr;
    }

    inline bool get_EP12_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        return EP12_IN_CONTROL & (1u << 16u);
    }

    inline void set_EP12_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP12_IN_CONTROL |= 1u << 16u;
    }

    inline void clear_EP12_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP12_IN_CONTROL &= ~(1u << 16u);
    }

    inline void toggle_EP12_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP12_IN_CONTROL ^= 1u << 16u;
    }

    inline bool get_EP12_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        return EP12_IN_CONTROL & (1u << 17u);
    }

    inline void set_EP12_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP12_IN_CONTROL |= 1u << 17u;
    }

    inline void clear_EP12_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP12_IN_CONTROL &= ~(1u << 17u);
    }

    inline void toggle_EP12_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP12_IN_CONTROL ^= 1u << 17u;
    }

    inline USBCTRL_DPRAM_EP12_IN_CONTROL_ENDPOINT_TYPE
    get_EP12_IN_CONTROL_ENDPOINT_TYPE() volatile
    {
        return USBCTRL_DPRAM_EP12_IN_CONTROL_ENDPOINT_TYPE(
            (EP12_IN_CONTROL >> 26u) & 0b11u);
    }

    inline void set_EP12_IN_CONTROL_ENDPOINT_TYPE(
        USBCTRL_DPRAM_EP12_IN_CONTROL_ENDPOINT_TYPE value) volatile
    {
        uint32_t curr = EP12_IN_CONTROL;

        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(value) & 0b11u) << 26u;

        EP12_IN_CONTROL = curr;
    }

    inline bool get_EP12_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        return EP12_IN_CONTROL & (1u << 28u);
    }

    inline void set_EP12_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP12_IN_CONTROL |= 1u << 28u;
    }

    inline void clear_EP12_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP12_IN_CONTROL &= ~(1u << 28u);
    }

    inline void toggle_EP12_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP12_IN_CONTROL ^= 1u << 28u;
    }

    inline bool get_EP12_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        return EP12_IN_CONTROL & (1u << 29u);
    }

    inline void set_EP12_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP12_IN_CONTROL |= 1u << 29u;
    }

    inline void clear_EP12_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP12_IN_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP12_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP12_IN_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP12_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        return EP12_IN_CONTROL & (1u << 30u);
    }

    inline void set_EP12_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP12_IN_CONTROL |= 1u << 30u;
    }

    inline void clear_EP12_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP12_IN_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP12_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP12_IN_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP12_IN_CONTROL_ENABLE() volatile
    {
        return EP12_IN_CONTROL & (1u << 31u);
    }

    inline void set_EP12_IN_CONTROL_ENABLE() volatile
    {
        EP12_IN_CONTROL |= 1u << 31u;
    }

    inline void clear_EP12_IN_CONTROL_ENABLE() volatile
    {
        EP12_IN_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP12_IN_CONTROL_ENABLE() volatile
    {
        EP12_IN_CONTROL ^= 1u << 31u;
    }

    inline void get_EP12_IN_CONTROL(
        uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK,
        bool &INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP12_IN_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE,
        bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF,
        bool &DOUBLE_BUFFERED, bool &ENABLE) volatile
    {
        uint32_t curr = EP12_IN_CONTROL;

        BUFFER_ADDRESS = (curr >> 0u) & 0b1111111111111111u;
        INTERRUPT_ON_NAK = curr & (1u << 16u);
        INTERRUPT_ON_STALL = curr & (1u << 17u);
        ENDPOINT_TYPE =
            USBCTRL_DPRAM_EP12_IN_CONTROL_ENDPOINT_TYPE((curr >> 26u) & 0b11u);
        INTERRUPT_PER_DOUBLE_BUFF = curr & (1u << 28u);
        INTERRUPT_PER_BUFF = curr & (1u << 29u);
        DOUBLE_BUFFERED = curr & (1u << 30u);
        ENABLE = curr & (1u << 31u);
    }

    inline void set_EP12_IN_CONTROL(
        uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK,
        bool INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP12_IN_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE,
        bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF,
        bool DOUBLE_BUFFERED, bool ENABLE) volatile
    {
        uint32_t curr = EP12_IN_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (BUFFER_ADDRESS & 0b1111111111111111u) << 0u;
        curr &= ~(0b1u << 16u);
        curr |= (INTERRUPT_ON_NAK & 0b1u) << 16u;
        curr &= ~(0b1u << 17u);
        curr |= (INTERRUPT_ON_STALL & 0b1u) << 17u;
        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(ENDPOINT_TYPE) & 0b11u) << 26u;
        curr &= ~(0b1u << 28u);
        curr |= (INTERRUPT_PER_DOUBLE_BUFF & 0b1u) << 28u;
        curr &= ~(0b1u << 29u);
        curr |= (INTERRUPT_PER_BUFF & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (DOUBLE_BUFFERED & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (ENABLE & 0b1u) << 31u;

        EP12_IN_CONTROL = curr;
    }

    inline uint16_t get_EP12_OUT_CONTROL_BUFFER_ADDRESS() volatile
    {
        return (EP12_OUT_CONTROL >> 0u) & 0b1111111111111111u;
    }

    inline void set_EP12_OUT_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile
    {
        uint32_t curr = EP12_OUT_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (value & 0b1111111111111111u) << 0u;

        EP12_OUT_CONTROL = curr;
    }

    inline bool get_EP12_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        return EP12_OUT_CONTROL & (1u << 16u);
    }

    inline void set_EP12_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP12_OUT_CONTROL |= 1u << 16u;
    }

    inline void clear_EP12_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP12_OUT_CONTROL &= ~(1u << 16u);
    }

    inline void toggle_EP12_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP12_OUT_CONTROL ^= 1u << 16u;
    }

    inline bool get_EP12_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        return EP12_OUT_CONTROL & (1u << 17u);
    }

    inline void set_EP12_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP12_OUT_CONTROL |= 1u << 17u;
    }

    inline void clear_EP12_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP12_OUT_CONTROL &= ~(1u << 17u);
    }

    inline void toggle_EP12_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP12_OUT_CONTROL ^= 1u << 17u;
    }

    inline USBCTRL_DPRAM_EP12_OUT_CONTROL_ENDPOINT_TYPE
    get_EP12_OUT_CONTROL_ENDPOINT_TYPE() volatile
    {
        return USBCTRL_DPRAM_EP12_OUT_CONTROL_ENDPOINT_TYPE(
            (EP12_OUT_CONTROL >> 26u) & 0b11u);
    }

    inline void set_EP12_OUT_CONTROL_ENDPOINT_TYPE(
        USBCTRL_DPRAM_EP12_OUT_CONTROL_ENDPOINT_TYPE value) volatile
    {
        uint32_t curr = EP12_OUT_CONTROL;

        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(value) & 0b11u) << 26u;

        EP12_OUT_CONTROL = curr;
    }

    inline bool get_EP12_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        return EP12_OUT_CONTROL & (1u << 28u);
    }

    inline void set_EP12_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP12_OUT_CONTROL |= 1u << 28u;
    }

    inline void clear_EP12_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP12_OUT_CONTROL &= ~(1u << 28u);
    }

    inline void toggle_EP12_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP12_OUT_CONTROL ^= 1u << 28u;
    }

    inline bool get_EP12_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        return EP12_OUT_CONTROL & (1u << 29u);
    }

    inline void set_EP12_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP12_OUT_CONTROL |= 1u << 29u;
    }

    inline void clear_EP12_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP12_OUT_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP12_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP12_OUT_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP12_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        return EP12_OUT_CONTROL & (1u << 30u);
    }

    inline void set_EP12_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP12_OUT_CONTROL |= 1u << 30u;
    }

    inline void clear_EP12_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP12_OUT_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP12_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP12_OUT_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP12_OUT_CONTROL_ENABLE() volatile
    {
        return EP12_OUT_CONTROL & (1u << 31u);
    }

    inline void set_EP12_OUT_CONTROL_ENABLE() volatile
    {
        EP12_OUT_CONTROL |= 1u << 31u;
    }

    inline void clear_EP12_OUT_CONTROL_ENABLE() volatile
    {
        EP12_OUT_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP12_OUT_CONTROL_ENABLE() volatile
    {
        EP12_OUT_CONTROL ^= 1u << 31u;
    }

    inline void get_EP12_OUT_CONTROL(
        uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK,
        bool &INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP12_OUT_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE,
        bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF,
        bool &DOUBLE_BUFFERED, bool &ENABLE) volatile
    {
        uint32_t curr = EP12_OUT_CONTROL;

        BUFFER_ADDRESS = (curr >> 0u) & 0b1111111111111111u;
        INTERRUPT_ON_NAK = curr & (1u << 16u);
        INTERRUPT_ON_STALL = curr & (1u << 17u);
        ENDPOINT_TYPE = USBCTRL_DPRAM_EP12_OUT_CONTROL_ENDPOINT_TYPE(
            (curr >> 26u) & 0b11u);
        INTERRUPT_PER_DOUBLE_BUFF = curr & (1u << 28u);
        INTERRUPT_PER_BUFF = curr & (1u << 29u);
        DOUBLE_BUFFERED = curr & (1u << 30u);
        ENABLE = curr & (1u << 31u);
    }

    inline void set_EP12_OUT_CONTROL(
        uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK,
        bool INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP12_OUT_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE,
        bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF,
        bool DOUBLE_BUFFERED, bool ENABLE) volatile
    {
        uint32_t curr = EP12_OUT_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (BUFFER_ADDRESS & 0b1111111111111111u) << 0u;
        curr &= ~(0b1u << 16u);
        curr |= (INTERRUPT_ON_NAK & 0b1u) << 16u;
        curr &= ~(0b1u << 17u);
        curr |= (INTERRUPT_ON_STALL & 0b1u) << 17u;
        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(ENDPOINT_TYPE) & 0b11u) << 26u;
        curr &= ~(0b1u << 28u);
        curr |= (INTERRUPT_PER_DOUBLE_BUFF & 0b1u) << 28u;
        curr &= ~(0b1u << 29u);
        curr |= (INTERRUPT_PER_BUFF & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (DOUBLE_BUFFERED & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (ENABLE & 0b1u) << 31u;

        EP12_OUT_CONTROL = curr;
    }

    inline uint16_t get_EP13_IN_CONTROL_BUFFER_ADDRESS() volatile
    {
        return (EP13_IN_CONTROL >> 0u) & 0b1111111111111111u;
    }

    inline void set_EP13_IN_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile
    {
        uint32_t curr = EP13_IN_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (value & 0b1111111111111111u) << 0u;

        EP13_IN_CONTROL = curr;
    }

    inline bool get_EP13_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        return EP13_IN_CONTROL & (1u << 16u);
    }

    inline void set_EP13_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP13_IN_CONTROL |= 1u << 16u;
    }

    inline void clear_EP13_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP13_IN_CONTROL &= ~(1u << 16u);
    }

    inline void toggle_EP13_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP13_IN_CONTROL ^= 1u << 16u;
    }

    inline bool get_EP13_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        return EP13_IN_CONTROL & (1u << 17u);
    }

    inline void set_EP13_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP13_IN_CONTROL |= 1u << 17u;
    }

    inline void clear_EP13_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP13_IN_CONTROL &= ~(1u << 17u);
    }

    inline void toggle_EP13_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP13_IN_CONTROL ^= 1u << 17u;
    }

    inline USBCTRL_DPRAM_EP13_IN_CONTROL_ENDPOINT_TYPE
    get_EP13_IN_CONTROL_ENDPOINT_TYPE() volatile
    {
        return USBCTRL_DPRAM_EP13_IN_CONTROL_ENDPOINT_TYPE(
            (EP13_IN_CONTROL >> 26u) & 0b11u);
    }

    inline void set_EP13_IN_CONTROL_ENDPOINT_TYPE(
        USBCTRL_DPRAM_EP13_IN_CONTROL_ENDPOINT_TYPE value) volatile
    {
        uint32_t curr = EP13_IN_CONTROL;

        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(value) & 0b11u) << 26u;

        EP13_IN_CONTROL = curr;
    }

    inline bool get_EP13_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        return EP13_IN_CONTROL & (1u << 28u);
    }

    inline void set_EP13_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP13_IN_CONTROL |= 1u << 28u;
    }

    inline void clear_EP13_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP13_IN_CONTROL &= ~(1u << 28u);
    }

    inline void toggle_EP13_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP13_IN_CONTROL ^= 1u << 28u;
    }

    inline bool get_EP13_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        return EP13_IN_CONTROL & (1u << 29u);
    }

    inline void set_EP13_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP13_IN_CONTROL |= 1u << 29u;
    }

    inline void clear_EP13_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP13_IN_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP13_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP13_IN_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP13_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        return EP13_IN_CONTROL & (1u << 30u);
    }

    inline void set_EP13_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP13_IN_CONTROL |= 1u << 30u;
    }

    inline void clear_EP13_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP13_IN_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP13_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP13_IN_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP13_IN_CONTROL_ENABLE() volatile
    {
        return EP13_IN_CONTROL & (1u << 31u);
    }

    inline void set_EP13_IN_CONTROL_ENABLE() volatile
    {
        EP13_IN_CONTROL |= 1u << 31u;
    }

    inline void clear_EP13_IN_CONTROL_ENABLE() volatile
    {
        EP13_IN_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP13_IN_CONTROL_ENABLE() volatile
    {
        EP13_IN_CONTROL ^= 1u << 31u;
    }

    inline void get_EP13_IN_CONTROL(
        uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK,
        bool &INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP13_IN_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE,
        bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF,
        bool &DOUBLE_BUFFERED, bool &ENABLE) volatile
    {
        uint32_t curr = EP13_IN_CONTROL;

        BUFFER_ADDRESS = (curr >> 0u) & 0b1111111111111111u;
        INTERRUPT_ON_NAK = curr & (1u << 16u);
        INTERRUPT_ON_STALL = curr & (1u << 17u);
        ENDPOINT_TYPE =
            USBCTRL_DPRAM_EP13_IN_CONTROL_ENDPOINT_TYPE((curr >> 26u) & 0b11u);
        INTERRUPT_PER_DOUBLE_BUFF = curr & (1u << 28u);
        INTERRUPT_PER_BUFF = curr & (1u << 29u);
        DOUBLE_BUFFERED = curr & (1u << 30u);
        ENABLE = curr & (1u << 31u);
    }

    inline void set_EP13_IN_CONTROL(
        uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK,
        bool INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP13_IN_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE,
        bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF,
        bool DOUBLE_BUFFERED, bool ENABLE) volatile
    {
        uint32_t curr = EP13_IN_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (BUFFER_ADDRESS & 0b1111111111111111u) << 0u;
        curr &= ~(0b1u << 16u);
        curr |= (INTERRUPT_ON_NAK & 0b1u) << 16u;
        curr &= ~(0b1u << 17u);
        curr |= (INTERRUPT_ON_STALL & 0b1u) << 17u;
        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(ENDPOINT_TYPE) & 0b11u) << 26u;
        curr &= ~(0b1u << 28u);
        curr |= (INTERRUPT_PER_DOUBLE_BUFF & 0b1u) << 28u;
        curr &= ~(0b1u << 29u);
        curr |= (INTERRUPT_PER_BUFF & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (DOUBLE_BUFFERED & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (ENABLE & 0b1u) << 31u;

        EP13_IN_CONTROL = curr;
    }

    inline uint16_t get_EP13_OUT_CONTROL_BUFFER_ADDRESS() volatile
    {
        return (EP13_OUT_CONTROL >> 0u) & 0b1111111111111111u;
    }

    inline void set_EP13_OUT_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile
    {
        uint32_t curr = EP13_OUT_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (value & 0b1111111111111111u) << 0u;

        EP13_OUT_CONTROL = curr;
    }

    inline bool get_EP13_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        return EP13_OUT_CONTROL & (1u << 16u);
    }

    inline void set_EP13_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP13_OUT_CONTROL |= 1u << 16u;
    }

    inline void clear_EP13_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP13_OUT_CONTROL &= ~(1u << 16u);
    }

    inline void toggle_EP13_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP13_OUT_CONTROL ^= 1u << 16u;
    }

    inline bool get_EP13_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        return EP13_OUT_CONTROL & (1u << 17u);
    }

    inline void set_EP13_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP13_OUT_CONTROL |= 1u << 17u;
    }

    inline void clear_EP13_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP13_OUT_CONTROL &= ~(1u << 17u);
    }

    inline void toggle_EP13_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP13_OUT_CONTROL ^= 1u << 17u;
    }

    inline USBCTRL_DPRAM_EP13_OUT_CONTROL_ENDPOINT_TYPE
    get_EP13_OUT_CONTROL_ENDPOINT_TYPE() volatile
    {
        return USBCTRL_DPRAM_EP13_OUT_CONTROL_ENDPOINT_TYPE(
            (EP13_OUT_CONTROL >> 26u) & 0b11u);
    }

    inline void set_EP13_OUT_CONTROL_ENDPOINT_TYPE(
        USBCTRL_DPRAM_EP13_OUT_CONTROL_ENDPOINT_TYPE value) volatile
    {
        uint32_t curr = EP13_OUT_CONTROL;

        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(value) & 0b11u) << 26u;

        EP13_OUT_CONTROL = curr;
    }

    inline bool get_EP13_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        return EP13_OUT_CONTROL & (1u << 28u);
    }

    inline void set_EP13_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP13_OUT_CONTROL |= 1u << 28u;
    }

    inline void clear_EP13_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP13_OUT_CONTROL &= ~(1u << 28u);
    }

    inline void toggle_EP13_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP13_OUT_CONTROL ^= 1u << 28u;
    }

    inline bool get_EP13_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        return EP13_OUT_CONTROL & (1u << 29u);
    }

    inline void set_EP13_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP13_OUT_CONTROL |= 1u << 29u;
    }

    inline void clear_EP13_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP13_OUT_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP13_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP13_OUT_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP13_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        return EP13_OUT_CONTROL & (1u << 30u);
    }

    inline void set_EP13_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP13_OUT_CONTROL |= 1u << 30u;
    }

    inline void clear_EP13_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP13_OUT_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP13_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP13_OUT_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP13_OUT_CONTROL_ENABLE() volatile
    {
        return EP13_OUT_CONTROL & (1u << 31u);
    }

    inline void set_EP13_OUT_CONTROL_ENABLE() volatile
    {
        EP13_OUT_CONTROL |= 1u << 31u;
    }

    inline void clear_EP13_OUT_CONTROL_ENABLE() volatile
    {
        EP13_OUT_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP13_OUT_CONTROL_ENABLE() volatile
    {
        EP13_OUT_CONTROL ^= 1u << 31u;
    }

    inline void get_EP13_OUT_CONTROL(
        uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK,
        bool &INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP13_OUT_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE,
        bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF,
        bool &DOUBLE_BUFFERED, bool &ENABLE) volatile
    {
        uint32_t curr = EP13_OUT_CONTROL;

        BUFFER_ADDRESS = (curr >> 0u) & 0b1111111111111111u;
        INTERRUPT_ON_NAK = curr & (1u << 16u);
        INTERRUPT_ON_STALL = curr & (1u << 17u);
        ENDPOINT_TYPE = USBCTRL_DPRAM_EP13_OUT_CONTROL_ENDPOINT_TYPE(
            (curr >> 26u) & 0b11u);
        INTERRUPT_PER_DOUBLE_BUFF = curr & (1u << 28u);
        INTERRUPT_PER_BUFF = curr & (1u << 29u);
        DOUBLE_BUFFERED = curr & (1u << 30u);
        ENABLE = curr & (1u << 31u);
    }

    inline void set_EP13_OUT_CONTROL(
        uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK,
        bool INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP13_OUT_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE,
        bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF,
        bool DOUBLE_BUFFERED, bool ENABLE) volatile
    {
        uint32_t curr = EP13_OUT_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (BUFFER_ADDRESS & 0b1111111111111111u) << 0u;
        curr &= ~(0b1u << 16u);
        curr |= (INTERRUPT_ON_NAK & 0b1u) << 16u;
        curr &= ~(0b1u << 17u);
        curr |= (INTERRUPT_ON_STALL & 0b1u) << 17u;
        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(ENDPOINT_TYPE) & 0b11u) << 26u;
        curr &= ~(0b1u << 28u);
        curr |= (INTERRUPT_PER_DOUBLE_BUFF & 0b1u) << 28u;
        curr &= ~(0b1u << 29u);
        curr |= (INTERRUPT_PER_BUFF & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (DOUBLE_BUFFERED & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (ENABLE & 0b1u) << 31u;

        EP13_OUT_CONTROL = curr;
    }

    inline uint16_t get_EP14_IN_CONTROL_BUFFER_ADDRESS() volatile
    {
        return (EP14_IN_CONTROL >> 0u) & 0b1111111111111111u;
    }

    inline void set_EP14_IN_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile
    {
        uint32_t curr = EP14_IN_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (value & 0b1111111111111111u) << 0u;

        EP14_IN_CONTROL = curr;
    }

    inline bool get_EP14_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        return EP14_IN_CONTROL & (1u << 16u);
    }

    inline void set_EP14_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP14_IN_CONTROL |= 1u << 16u;
    }

    inline void clear_EP14_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP14_IN_CONTROL &= ~(1u << 16u);
    }

    inline void toggle_EP14_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP14_IN_CONTROL ^= 1u << 16u;
    }

    inline bool get_EP14_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        return EP14_IN_CONTROL & (1u << 17u);
    }

    inline void set_EP14_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP14_IN_CONTROL |= 1u << 17u;
    }

    inline void clear_EP14_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP14_IN_CONTROL &= ~(1u << 17u);
    }

    inline void toggle_EP14_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP14_IN_CONTROL ^= 1u << 17u;
    }

    inline USBCTRL_DPRAM_EP14_IN_CONTROL_ENDPOINT_TYPE
    get_EP14_IN_CONTROL_ENDPOINT_TYPE() volatile
    {
        return USBCTRL_DPRAM_EP14_IN_CONTROL_ENDPOINT_TYPE(
            (EP14_IN_CONTROL >> 26u) & 0b11u);
    }

    inline void set_EP14_IN_CONTROL_ENDPOINT_TYPE(
        USBCTRL_DPRAM_EP14_IN_CONTROL_ENDPOINT_TYPE value) volatile
    {
        uint32_t curr = EP14_IN_CONTROL;

        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(value) & 0b11u) << 26u;

        EP14_IN_CONTROL = curr;
    }

    inline bool get_EP14_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        return EP14_IN_CONTROL & (1u << 28u);
    }

    inline void set_EP14_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP14_IN_CONTROL |= 1u << 28u;
    }

    inline void clear_EP14_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP14_IN_CONTROL &= ~(1u << 28u);
    }

    inline void toggle_EP14_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP14_IN_CONTROL ^= 1u << 28u;
    }

    inline bool get_EP14_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        return EP14_IN_CONTROL & (1u << 29u);
    }

    inline void set_EP14_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP14_IN_CONTROL |= 1u << 29u;
    }

    inline void clear_EP14_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP14_IN_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP14_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP14_IN_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP14_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        return EP14_IN_CONTROL & (1u << 30u);
    }

    inline void set_EP14_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP14_IN_CONTROL |= 1u << 30u;
    }

    inline void clear_EP14_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP14_IN_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP14_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP14_IN_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP14_IN_CONTROL_ENABLE() volatile
    {
        return EP14_IN_CONTROL & (1u << 31u);
    }

    inline void set_EP14_IN_CONTROL_ENABLE() volatile
    {
        EP14_IN_CONTROL |= 1u << 31u;
    }

    inline void clear_EP14_IN_CONTROL_ENABLE() volatile
    {
        EP14_IN_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP14_IN_CONTROL_ENABLE() volatile
    {
        EP14_IN_CONTROL ^= 1u << 31u;
    }

    inline void get_EP14_IN_CONTROL(
        uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK,
        bool &INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP14_IN_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE,
        bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF,
        bool &DOUBLE_BUFFERED, bool &ENABLE) volatile
    {
        uint32_t curr = EP14_IN_CONTROL;

        BUFFER_ADDRESS = (curr >> 0u) & 0b1111111111111111u;
        INTERRUPT_ON_NAK = curr & (1u << 16u);
        INTERRUPT_ON_STALL = curr & (1u << 17u);
        ENDPOINT_TYPE =
            USBCTRL_DPRAM_EP14_IN_CONTROL_ENDPOINT_TYPE((curr >> 26u) & 0b11u);
        INTERRUPT_PER_DOUBLE_BUFF = curr & (1u << 28u);
        INTERRUPT_PER_BUFF = curr & (1u << 29u);
        DOUBLE_BUFFERED = curr & (1u << 30u);
        ENABLE = curr & (1u << 31u);
    }

    inline void set_EP14_IN_CONTROL(
        uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK,
        bool INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP14_IN_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE,
        bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF,
        bool DOUBLE_BUFFERED, bool ENABLE) volatile
    {
        uint32_t curr = EP14_IN_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (BUFFER_ADDRESS & 0b1111111111111111u) << 0u;
        curr &= ~(0b1u << 16u);
        curr |= (INTERRUPT_ON_NAK & 0b1u) << 16u;
        curr &= ~(0b1u << 17u);
        curr |= (INTERRUPT_ON_STALL & 0b1u) << 17u;
        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(ENDPOINT_TYPE) & 0b11u) << 26u;
        curr &= ~(0b1u << 28u);
        curr |= (INTERRUPT_PER_DOUBLE_BUFF & 0b1u) << 28u;
        curr &= ~(0b1u << 29u);
        curr |= (INTERRUPT_PER_BUFF & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (DOUBLE_BUFFERED & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (ENABLE & 0b1u) << 31u;

        EP14_IN_CONTROL = curr;
    }

    inline uint16_t get_EP14_OUT_CONTROL_BUFFER_ADDRESS() volatile
    {
        return (EP14_OUT_CONTROL >> 0u) & 0b1111111111111111u;
    }

    inline void set_EP14_OUT_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile
    {
        uint32_t curr = EP14_OUT_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (value & 0b1111111111111111u) << 0u;

        EP14_OUT_CONTROL = curr;
    }

    inline bool get_EP14_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        return EP14_OUT_CONTROL & (1u << 16u);
    }

    inline void set_EP14_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP14_OUT_CONTROL |= 1u << 16u;
    }

    inline void clear_EP14_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP14_OUT_CONTROL &= ~(1u << 16u);
    }

    inline void toggle_EP14_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP14_OUT_CONTROL ^= 1u << 16u;
    }

    inline bool get_EP14_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        return EP14_OUT_CONTROL & (1u << 17u);
    }

    inline void set_EP14_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP14_OUT_CONTROL |= 1u << 17u;
    }

    inline void clear_EP14_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP14_OUT_CONTROL &= ~(1u << 17u);
    }

    inline void toggle_EP14_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP14_OUT_CONTROL ^= 1u << 17u;
    }

    inline USBCTRL_DPRAM_EP14_OUT_CONTROL_ENDPOINT_TYPE
    get_EP14_OUT_CONTROL_ENDPOINT_TYPE() volatile
    {
        return USBCTRL_DPRAM_EP14_OUT_CONTROL_ENDPOINT_TYPE(
            (EP14_OUT_CONTROL >> 26u) & 0b11u);
    }

    inline void set_EP14_OUT_CONTROL_ENDPOINT_TYPE(
        USBCTRL_DPRAM_EP14_OUT_CONTROL_ENDPOINT_TYPE value) volatile
    {
        uint32_t curr = EP14_OUT_CONTROL;

        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(value) & 0b11u) << 26u;

        EP14_OUT_CONTROL = curr;
    }

    inline bool get_EP14_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        return EP14_OUT_CONTROL & (1u << 28u);
    }

    inline void set_EP14_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP14_OUT_CONTROL |= 1u << 28u;
    }

    inline void clear_EP14_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP14_OUT_CONTROL &= ~(1u << 28u);
    }

    inline void toggle_EP14_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP14_OUT_CONTROL ^= 1u << 28u;
    }

    inline bool get_EP14_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        return EP14_OUT_CONTROL & (1u << 29u);
    }

    inline void set_EP14_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP14_OUT_CONTROL |= 1u << 29u;
    }

    inline void clear_EP14_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP14_OUT_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP14_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP14_OUT_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP14_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        return EP14_OUT_CONTROL & (1u << 30u);
    }

    inline void set_EP14_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP14_OUT_CONTROL |= 1u << 30u;
    }

    inline void clear_EP14_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP14_OUT_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP14_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP14_OUT_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP14_OUT_CONTROL_ENABLE() volatile
    {
        return EP14_OUT_CONTROL & (1u << 31u);
    }

    inline void set_EP14_OUT_CONTROL_ENABLE() volatile
    {
        EP14_OUT_CONTROL |= 1u << 31u;
    }

    inline void clear_EP14_OUT_CONTROL_ENABLE() volatile
    {
        EP14_OUT_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP14_OUT_CONTROL_ENABLE() volatile
    {
        EP14_OUT_CONTROL ^= 1u << 31u;
    }

    inline void get_EP14_OUT_CONTROL(
        uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK,
        bool &INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP14_OUT_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE,
        bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF,
        bool &DOUBLE_BUFFERED, bool &ENABLE) volatile
    {
        uint32_t curr = EP14_OUT_CONTROL;

        BUFFER_ADDRESS = (curr >> 0u) & 0b1111111111111111u;
        INTERRUPT_ON_NAK = curr & (1u << 16u);
        INTERRUPT_ON_STALL = curr & (1u << 17u);
        ENDPOINT_TYPE = USBCTRL_DPRAM_EP14_OUT_CONTROL_ENDPOINT_TYPE(
            (curr >> 26u) & 0b11u);
        INTERRUPT_PER_DOUBLE_BUFF = curr & (1u << 28u);
        INTERRUPT_PER_BUFF = curr & (1u << 29u);
        DOUBLE_BUFFERED = curr & (1u << 30u);
        ENABLE = curr & (1u << 31u);
    }

    inline void set_EP14_OUT_CONTROL(
        uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK,
        bool INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP14_OUT_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE,
        bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF,
        bool DOUBLE_BUFFERED, bool ENABLE) volatile
    {
        uint32_t curr = EP14_OUT_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (BUFFER_ADDRESS & 0b1111111111111111u) << 0u;
        curr &= ~(0b1u << 16u);
        curr |= (INTERRUPT_ON_NAK & 0b1u) << 16u;
        curr &= ~(0b1u << 17u);
        curr |= (INTERRUPT_ON_STALL & 0b1u) << 17u;
        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(ENDPOINT_TYPE) & 0b11u) << 26u;
        curr &= ~(0b1u << 28u);
        curr |= (INTERRUPT_PER_DOUBLE_BUFF & 0b1u) << 28u;
        curr &= ~(0b1u << 29u);
        curr |= (INTERRUPT_PER_BUFF & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (DOUBLE_BUFFERED & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (ENABLE & 0b1u) << 31u;

        EP14_OUT_CONTROL = curr;
    }

    inline uint16_t get_EP15_IN_CONTROL_BUFFER_ADDRESS() volatile
    {
        return (EP15_IN_CONTROL >> 0u) & 0b1111111111111111u;
    }

    inline void set_EP15_IN_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile
    {
        uint32_t curr = EP15_IN_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (value & 0b1111111111111111u) << 0u;

        EP15_IN_CONTROL = curr;
    }

    inline bool get_EP15_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        return EP15_IN_CONTROL & (1u << 16u);
    }

    inline void set_EP15_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP15_IN_CONTROL |= 1u << 16u;
    }

    inline void clear_EP15_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP15_IN_CONTROL &= ~(1u << 16u);
    }

    inline void toggle_EP15_IN_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP15_IN_CONTROL ^= 1u << 16u;
    }

    inline bool get_EP15_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        return EP15_IN_CONTROL & (1u << 17u);
    }

    inline void set_EP15_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP15_IN_CONTROL |= 1u << 17u;
    }

    inline void clear_EP15_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP15_IN_CONTROL &= ~(1u << 17u);
    }

    inline void toggle_EP15_IN_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP15_IN_CONTROL ^= 1u << 17u;
    }

    inline USBCTRL_DPRAM_EP15_IN_CONTROL_ENDPOINT_TYPE
    get_EP15_IN_CONTROL_ENDPOINT_TYPE() volatile
    {
        return USBCTRL_DPRAM_EP15_IN_CONTROL_ENDPOINT_TYPE(
            (EP15_IN_CONTROL >> 26u) & 0b11u);
    }

    inline void set_EP15_IN_CONTROL_ENDPOINT_TYPE(
        USBCTRL_DPRAM_EP15_IN_CONTROL_ENDPOINT_TYPE value) volatile
    {
        uint32_t curr = EP15_IN_CONTROL;

        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(value) & 0b11u) << 26u;

        EP15_IN_CONTROL = curr;
    }

    inline bool get_EP15_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        return EP15_IN_CONTROL & (1u << 28u);
    }

    inline void set_EP15_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP15_IN_CONTROL |= 1u << 28u;
    }

    inline void clear_EP15_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP15_IN_CONTROL &= ~(1u << 28u);
    }

    inline void toggle_EP15_IN_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP15_IN_CONTROL ^= 1u << 28u;
    }

    inline bool get_EP15_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        return EP15_IN_CONTROL & (1u << 29u);
    }

    inline void set_EP15_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP15_IN_CONTROL |= 1u << 29u;
    }

    inline void clear_EP15_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP15_IN_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP15_IN_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP15_IN_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP15_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        return EP15_IN_CONTROL & (1u << 30u);
    }

    inline void set_EP15_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP15_IN_CONTROL |= 1u << 30u;
    }

    inline void clear_EP15_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP15_IN_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP15_IN_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP15_IN_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP15_IN_CONTROL_ENABLE() volatile
    {
        return EP15_IN_CONTROL & (1u << 31u);
    }

    inline void set_EP15_IN_CONTROL_ENABLE() volatile
    {
        EP15_IN_CONTROL |= 1u << 31u;
    }

    inline void clear_EP15_IN_CONTROL_ENABLE() volatile
    {
        EP15_IN_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP15_IN_CONTROL_ENABLE() volatile
    {
        EP15_IN_CONTROL ^= 1u << 31u;
    }

    inline void get_EP15_IN_CONTROL(
        uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK,
        bool &INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP15_IN_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE,
        bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF,
        bool &DOUBLE_BUFFERED, bool &ENABLE) volatile
    {
        uint32_t curr = EP15_IN_CONTROL;

        BUFFER_ADDRESS = (curr >> 0u) & 0b1111111111111111u;
        INTERRUPT_ON_NAK = curr & (1u << 16u);
        INTERRUPT_ON_STALL = curr & (1u << 17u);
        ENDPOINT_TYPE =
            USBCTRL_DPRAM_EP15_IN_CONTROL_ENDPOINT_TYPE((curr >> 26u) & 0b11u);
        INTERRUPT_PER_DOUBLE_BUFF = curr & (1u << 28u);
        INTERRUPT_PER_BUFF = curr & (1u << 29u);
        DOUBLE_BUFFERED = curr & (1u << 30u);
        ENABLE = curr & (1u << 31u);
    }

    inline void set_EP15_IN_CONTROL(
        uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK,
        bool INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP15_IN_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE,
        bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF,
        bool DOUBLE_BUFFERED, bool ENABLE) volatile
    {
        uint32_t curr = EP15_IN_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (BUFFER_ADDRESS & 0b1111111111111111u) << 0u;
        curr &= ~(0b1u << 16u);
        curr |= (INTERRUPT_ON_NAK & 0b1u) << 16u;
        curr &= ~(0b1u << 17u);
        curr |= (INTERRUPT_ON_STALL & 0b1u) << 17u;
        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(ENDPOINT_TYPE) & 0b11u) << 26u;
        curr &= ~(0b1u << 28u);
        curr |= (INTERRUPT_PER_DOUBLE_BUFF & 0b1u) << 28u;
        curr &= ~(0b1u << 29u);
        curr |= (INTERRUPT_PER_BUFF & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (DOUBLE_BUFFERED & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (ENABLE & 0b1u) << 31u;

        EP15_IN_CONTROL = curr;
    }

    inline uint16_t get_EP15_OUT_CONTROL_BUFFER_ADDRESS() volatile
    {
        return (EP15_OUT_CONTROL >> 0u) & 0b1111111111111111u;
    }

    inline void set_EP15_OUT_CONTROL_BUFFER_ADDRESS(uint16_t value) volatile
    {
        uint32_t curr = EP15_OUT_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (value & 0b1111111111111111u) << 0u;

        EP15_OUT_CONTROL = curr;
    }

    inline bool get_EP15_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        return EP15_OUT_CONTROL & (1u << 16u);
    }

    inline void set_EP15_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP15_OUT_CONTROL |= 1u << 16u;
    }

    inline void clear_EP15_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP15_OUT_CONTROL &= ~(1u << 16u);
    }

    inline void toggle_EP15_OUT_CONTROL_INTERRUPT_ON_NAK() volatile
    {
        EP15_OUT_CONTROL ^= 1u << 16u;
    }

    inline bool get_EP15_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        return EP15_OUT_CONTROL & (1u << 17u);
    }

    inline void set_EP15_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP15_OUT_CONTROL |= 1u << 17u;
    }

    inline void clear_EP15_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP15_OUT_CONTROL &= ~(1u << 17u);
    }

    inline void toggle_EP15_OUT_CONTROL_INTERRUPT_ON_STALL() volatile
    {
        EP15_OUT_CONTROL ^= 1u << 17u;
    }

    inline USBCTRL_DPRAM_EP15_OUT_CONTROL_ENDPOINT_TYPE
    get_EP15_OUT_CONTROL_ENDPOINT_TYPE() volatile
    {
        return USBCTRL_DPRAM_EP15_OUT_CONTROL_ENDPOINT_TYPE(
            (EP15_OUT_CONTROL >> 26u) & 0b11u);
    }

    inline void set_EP15_OUT_CONTROL_ENDPOINT_TYPE(
        USBCTRL_DPRAM_EP15_OUT_CONTROL_ENDPOINT_TYPE value) volatile
    {
        uint32_t curr = EP15_OUT_CONTROL;

        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(value) & 0b11u) << 26u;

        EP15_OUT_CONTROL = curr;
    }

    inline bool get_EP15_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        return EP15_OUT_CONTROL & (1u << 28u);
    }

    inline void set_EP15_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP15_OUT_CONTROL |= 1u << 28u;
    }

    inline void clear_EP15_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP15_OUT_CONTROL &= ~(1u << 28u);
    }

    inline void toggle_EP15_OUT_CONTROL_INTERRUPT_PER_DOUBLE_BUFF() volatile
    {
        EP15_OUT_CONTROL ^= 1u << 28u;
    }

    inline bool get_EP15_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        return EP15_OUT_CONTROL & (1u << 29u);
    }

    inline void set_EP15_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP15_OUT_CONTROL |= 1u << 29u;
    }

    inline void clear_EP15_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP15_OUT_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP15_OUT_CONTROL_INTERRUPT_PER_BUFF() volatile
    {
        EP15_OUT_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP15_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        return EP15_OUT_CONTROL & (1u << 30u);
    }

    inline void set_EP15_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP15_OUT_CONTROL |= 1u << 30u;
    }

    inline void clear_EP15_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP15_OUT_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP15_OUT_CONTROL_DOUBLE_BUFFERED() volatile
    {
        EP15_OUT_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP15_OUT_CONTROL_ENABLE() volatile
    {
        return EP15_OUT_CONTROL & (1u << 31u);
    }

    inline void set_EP15_OUT_CONTROL_ENABLE() volatile
    {
        EP15_OUT_CONTROL |= 1u << 31u;
    }

    inline void clear_EP15_OUT_CONTROL_ENABLE() volatile
    {
        EP15_OUT_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP15_OUT_CONTROL_ENABLE() volatile
    {
        EP15_OUT_CONTROL ^= 1u << 31u;
    }

    inline void get_EP15_OUT_CONTROL(
        uint16_t &BUFFER_ADDRESS, bool &INTERRUPT_ON_NAK,
        bool &INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP15_OUT_CONTROL_ENDPOINT_TYPE &ENDPOINT_TYPE,
        bool &INTERRUPT_PER_DOUBLE_BUFF, bool &INTERRUPT_PER_BUFF,
        bool &DOUBLE_BUFFERED, bool &ENABLE) volatile
    {
        uint32_t curr = EP15_OUT_CONTROL;

        BUFFER_ADDRESS = (curr >> 0u) & 0b1111111111111111u;
        INTERRUPT_ON_NAK = curr & (1u << 16u);
        INTERRUPT_ON_STALL = curr & (1u << 17u);
        ENDPOINT_TYPE = USBCTRL_DPRAM_EP15_OUT_CONTROL_ENDPOINT_TYPE(
            (curr >> 26u) & 0b11u);
        INTERRUPT_PER_DOUBLE_BUFF = curr & (1u << 28u);
        INTERRUPT_PER_BUFF = curr & (1u << 29u);
        DOUBLE_BUFFERED = curr & (1u << 30u);
        ENABLE = curr & (1u << 31u);
    }

    inline void set_EP15_OUT_CONTROL(
        uint16_t BUFFER_ADDRESS, bool INTERRUPT_ON_NAK,
        bool INTERRUPT_ON_STALL,
        USBCTRL_DPRAM_EP15_OUT_CONTROL_ENDPOINT_TYPE ENDPOINT_TYPE,
        bool INTERRUPT_PER_DOUBLE_BUFF, bool INTERRUPT_PER_BUFF,
        bool DOUBLE_BUFFERED, bool ENABLE) volatile
    {
        uint32_t curr = EP15_OUT_CONTROL;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (BUFFER_ADDRESS & 0b1111111111111111u) << 0u;
        curr &= ~(0b1u << 16u);
        curr |= (INTERRUPT_ON_NAK & 0b1u) << 16u;
        curr &= ~(0b1u << 17u);
        curr |= (INTERRUPT_ON_STALL & 0b1u) << 17u;
        curr &= ~(0b11u << 26u);
        curr |= (std::to_underlying(ENDPOINT_TYPE) & 0b11u) << 26u;
        curr &= ~(0b1u << 28u);
        curr |= (INTERRUPT_PER_DOUBLE_BUFF & 0b1u) << 28u;
        curr &= ~(0b1u << 29u);
        curr |= (INTERRUPT_PER_BUFF & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (DOUBLE_BUFFERED & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (ENABLE & 0b1u) << 31u;

        EP15_OUT_CONTROL = curr;
    }

    inline uint16_t get_EP0_IN_BUFFER_CONTROL_LENGTH_0() volatile
    {
        return (EP0_IN_BUFFER_CONTROL >> 0u) & 0b1111111111u;
    }

    inline void set_EP0_IN_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile
    {
        uint32_t curr = EP0_IN_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (value & 0b1111111111u) << 0u;

        EP0_IN_BUFFER_CONTROL = curr;
    }

    inline bool get_EP0_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        return EP0_IN_BUFFER_CONTROL & (1u << 10u);
    }

    inline void set_EP0_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP0_IN_BUFFER_CONTROL |= 1u << 10u;
    }

    inline void clear_EP0_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP0_IN_BUFFER_CONTROL &= ~(1u << 10u);
    }

    inline void toggle_EP0_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP0_IN_BUFFER_CONTROL ^= 1u << 10u;
    }

    inline bool get_EP0_IN_BUFFER_CONTROL_STALL() volatile
    {
        return EP0_IN_BUFFER_CONTROL & (1u << 11u);
    }

    inline void set_EP0_IN_BUFFER_CONTROL_STALL() volatile
    {
        EP0_IN_BUFFER_CONTROL |= 1u << 11u;
    }

    inline void clear_EP0_IN_BUFFER_CONTROL_STALL() volatile
    {
        EP0_IN_BUFFER_CONTROL &= ~(1u << 11u);
    }

    inline void toggle_EP0_IN_BUFFER_CONTROL_STALL() volatile
    {
        EP0_IN_BUFFER_CONTROL ^= 1u << 11u;
    }

    inline bool get_EP0_IN_BUFFER_CONTROL_RESET() volatile
    {
        return EP0_IN_BUFFER_CONTROL & (1u << 12u);
    }

    inline void set_EP0_IN_BUFFER_CONTROL_RESET() volatile
    {
        EP0_IN_BUFFER_CONTROL |= 1u << 12u;
    }

    inline void clear_EP0_IN_BUFFER_CONTROL_RESET() volatile
    {
        EP0_IN_BUFFER_CONTROL &= ~(1u << 12u);
    }

    inline void toggle_EP0_IN_BUFFER_CONTROL_RESET() volatile
    {
        EP0_IN_BUFFER_CONTROL ^= 1u << 12u;
    }

    inline bool get_EP0_IN_BUFFER_CONTROL_PID_0() volatile
    {
        return EP0_IN_BUFFER_CONTROL & (1u << 13u);
    }

    inline void set_EP0_IN_BUFFER_CONTROL_PID_0() volatile
    {
        EP0_IN_BUFFER_CONTROL |= 1u << 13u;
    }

    inline void clear_EP0_IN_BUFFER_CONTROL_PID_0() volatile
    {
        EP0_IN_BUFFER_CONTROL &= ~(1u << 13u);
    }

    inline void toggle_EP0_IN_BUFFER_CONTROL_PID_0() volatile
    {
        EP0_IN_BUFFER_CONTROL ^= 1u << 13u;
    }

    inline bool get_EP0_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        return EP0_IN_BUFFER_CONTROL & (1u << 14u);
    }

    inline void set_EP0_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        EP0_IN_BUFFER_CONTROL |= 1u << 14u;
    }

    inline void clear_EP0_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        EP0_IN_BUFFER_CONTROL &= ~(1u << 14u);
    }

    inline void toggle_EP0_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        EP0_IN_BUFFER_CONTROL ^= 1u << 14u;
    }

    inline bool get_EP0_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        return EP0_IN_BUFFER_CONTROL & (1u << 15u);
    }

    inline void set_EP0_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        EP0_IN_BUFFER_CONTROL |= 1u << 15u;
    }

    inline void clear_EP0_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        EP0_IN_BUFFER_CONTROL &= ~(1u << 15u);
    }

    inline void toggle_EP0_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        EP0_IN_BUFFER_CONTROL ^= 1u << 15u;
    }

    inline uint16_t get_EP0_IN_BUFFER_CONTROL_LENGTH_1() volatile
    {
        return (EP0_IN_BUFFER_CONTROL >> 16u) & 0b1111111111u;
    }

    inline void set_EP0_IN_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile
    {
        uint32_t curr = EP0_IN_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 16u);
        curr |= (value & 0b1111111111u) << 16u;

        EP0_IN_BUFFER_CONTROL = curr;
    }

    inline bool get_EP0_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        return EP0_IN_BUFFER_CONTROL & (1u << 26u);
    }

    inline void set_EP0_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP0_IN_BUFFER_CONTROL |= 1u << 26u;
    }

    inline void clear_EP0_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP0_IN_BUFFER_CONTROL &= ~(1u << 26u);
    }

    inline void toggle_EP0_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP0_IN_BUFFER_CONTROL ^= 1u << 26u;
    }

    inline USBCTRL_DPRAM_EP0_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
    get_EP0_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile
    {
        return USBCTRL_DPRAM_EP0_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
            (EP0_IN_BUFFER_CONTROL >> 27u) & 0b11u);
    }

    inline void set_EP0_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
        USBCTRL_DPRAM_EP0_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            value) volatile
    {
        uint32_t curr = EP0_IN_BUFFER_CONTROL;

        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(value) & 0b11u) << 27u;

        EP0_IN_BUFFER_CONTROL = curr;
    }

    inline bool get_EP0_IN_BUFFER_CONTROL_PID_1() volatile
    {
        return EP0_IN_BUFFER_CONTROL & (1u << 29u);
    }

    inline void set_EP0_IN_BUFFER_CONTROL_PID_1() volatile
    {
        EP0_IN_BUFFER_CONTROL |= 1u << 29u;
    }

    inline void clear_EP0_IN_BUFFER_CONTROL_PID_1() volatile
    {
        EP0_IN_BUFFER_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP0_IN_BUFFER_CONTROL_PID_1() volatile
    {
        EP0_IN_BUFFER_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP0_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        return EP0_IN_BUFFER_CONTROL & (1u << 30u);
    }

    inline void set_EP0_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        EP0_IN_BUFFER_CONTROL |= 1u << 30u;
    }

    inline void clear_EP0_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        EP0_IN_BUFFER_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP0_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        EP0_IN_BUFFER_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP0_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        return EP0_IN_BUFFER_CONTROL & (1u << 31u);
    }

    inline void set_EP0_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        EP0_IN_BUFFER_CONTROL |= 1u << 31u;
    }

    inline void clear_EP0_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        EP0_IN_BUFFER_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP0_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        EP0_IN_BUFFER_CONTROL ^= 1u << 31u;
    }

    inline void get_EP0_IN_BUFFER_CONTROL(
        uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET,
        bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1,
        bool &AVAILABLE_1,
        USBCTRL_DPRAM_EP0_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            &DOUBLE_BUFFER_ISO_OFFSET,
        bool &PID_1, bool &LAST_1, bool &FULL_1) volatile
    {
        uint32_t curr = EP0_IN_BUFFER_CONTROL;

        LENGTH_0 = (curr >> 0u) & 0b1111111111u;
        AVAILABLE_0 = curr & (1u << 10u);
        STALL = curr & (1u << 11u);
        RESET = curr & (1u << 12u);
        PID_0 = curr & (1u << 13u);
        LAST_0 = curr & (1u << 14u);
        FULL_0 = curr & (1u << 15u);
        LENGTH_1 = (curr >> 16u) & 0b1111111111u;
        AVAILABLE_1 = curr & (1u << 26u);
        DOUBLE_BUFFER_ISO_OFFSET =
            USBCTRL_DPRAM_EP0_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
                (curr >> 27u) & 0b11u);
        PID_1 = curr & (1u << 29u);
        LAST_1 = curr & (1u << 30u);
        FULL_1 = curr & (1u << 31u);
    }

    inline void set_EP0_IN_BUFFER_CONTROL(
        uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET,
        bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1,
        bool AVAILABLE_1,
        USBCTRL_DPRAM_EP0_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            DOUBLE_BUFFER_ISO_OFFSET,
        bool PID_1, bool LAST_1, bool FULL_1) volatile
    {
        uint32_t curr = EP0_IN_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (LENGTH_0 & 0b1111111111u) << 0u;
        curr &= ~(0b1u << 10u);
        curr |= (AVAILABLE_0 & 0b1u) << 10u;
        curr &= ~(0b1u << 11u);
        curr |= (STALL & 0b1u) << 11u;
        curr &= ~(0b1u << 12u);
        curr |= (RESET & 0b1u) << 12u;
        curr &= ~(0b1u << 13u);
        curr |= (PID_0 & 0b1u) << 13u;
        curr &= ~(0b1u << 14u);
        curr |= (LAST_0 & 0b1u) << 14u;
        curr &= ~(0b1u << 15u);
        curr |= (FULL_0 & 0b1u) << 15u;
        curr &= ~(0b1111111111u << 16u);
        curr |= (LENGTH_1 & 0b1111111111u) << 16u;
        curr &= ~(0b1u << 26u);
        curr |= (AVAILABLE_1 & 0b1u) << 26u;
        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(DOUBLE_BUFFER_ISO_OFFSET) & 0b11u) << 27u;
        curr &= ~(0b1u << 29u);
        curr |= (PID_1 & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (LAST_1 & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (FULL_1 & 0b1u) << 31u;

        EP0_IN_BUFFER_CONTROL = curr;
    }

    inline uint16_t get_EP0_OUT_BUFFER_CONTROL_LENGTH_0() volatile
    {
        return (EP0_OUT_BUFFER_CONTROL >> 0u) & 0b1111111111u;
    }

    inline void set_EP0_OUT_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile
    {
        uint32_t curr = EP0_OUT_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (value & 0b1111111111u) << 0u;

        EP0_OUT_BUFFER_CONTROL = curr;
    }

    inline bool get_EP0_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        return EP0_OUT_BUFFER_CONTROL & (1u << 10u);
    }

    inline void set_EP0_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP0_OUT_BUFFER_CONTROL |= 1u << 10u;
    }

    inline void clear_EP0_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP0_OUT_BUFFER_CONTROL &= ~(1u << 10u);
    }

    inline void toggle_EP0_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP0_OUT_BUFFER_CONTROL ^= 1u << 10u;
    }

    inline bool get_EP0_OUT_BUFFER_CONTROL_STALL() volatile
    {
        return EP0_OUT_BUFFER_CONTROL & (1u << 11u);
    }

    inline void set_EP0_OUT_BUFFER_CONTROL_STALL() volatile
    {
        EP0_OUT_BUFFER_CONTROL |= 1u << 11u;
    }

    inline void clear_EP0_OUT_BUFFER_CONTROL_STALL() volatile
    {
        EP0_OUT_BUFFER_CONTROL &= ~(1u << 11u);
    }

    inline void toggle_EP0_OUT_BUFFER_CONTROL_STALL() volatile
    {
        EP0_OUT_BUFFER_CONTROL ^= 1u << 11u;
    }

    inline bool get_EP0_OUT_BUFFER_CONTROL_RESET() volatile
    {
        return EP0_OUT_BUFFER_CONTROL & (1u << 12u);
    }

    inline void set_EP0_OUT_BUFFER_CONTROL_RESET() volatile
    {
        EP0_OUT_BUFFER_CONTROL |= 1u << 12u;
    }

    inline void clear_EP0_OUT_BUFFER_CONTROL_RESET() volatile
    {
        EP0_OUT_BUFFER_CONTROL &= ~(1u << 12u);
    }

    inline void toggle_EP0_OUT_BUFFER_CONTROL_RESET() volatile
    {
        EP0_OUT_BUFFER_CONTROL ^= 1u << 12u;
    }

    inline bool get_EP0_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        return EP0_OUT_BUFFER_CONTROL & (1u << 13u);
    }

    inline void set_EP0_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        EP0_OUT_BUFFER_CONTROL |= 1u << 13u;
    }

    inline void clear_EP0_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        EP0_OUT_BUFFER_CONTROL &= ~(1u << 13u);
    }

    inline void toggle_EP0_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        EP0_OUT_BUFFER_CONTROL ^= 1u << 13u;
    }

    inline bool get_EP0_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        return EP0_OUT_BUFFER_CONTROL & (1u << 14u);
    }

    inline void set_EP0_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        EP0_OUT_BUFFER_CONTROL |= 1u << 14u;
    }

    inline void clear_EP0_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        EP0_OUT_BUFFER_CONTROL &= ~(1u << 14u);
    }

    inline void toggle_EP0_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        EP0_OUT_BUFFER_CONTROL ^= 1u << 14u;
    }

    inline bool get_EP0_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        return EP0_OUT_BUFFER_CONTROL & (1u << 15u);
    }

    inline void set_EP0_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        EP0_OUT_BUFFER_CONTROL |= 1u << 15u;
    }

    inline void clear_EP0_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        EP0_OUT_BUFFER_CONTROL &= ~(1u << 15u);
    }

    inline void toggle_EP0_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        EP0_OUT_BUFFER_CONTROL ^= 1u << 15u;
    }

    inline uint16_t get_EP0_OUT_BUFFER_CONTROL_LENGTH_1() volatile
    {
        return (EP0_OUT_BUFFER_CONTROL >> 16u) & 0b1111111111u;
    }

    inline void set_EP0_OUT_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile
    {
        uint32_t curr = EP0_OUT_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 16u);
        curr |= (value & 0b1111111111u) << 16u;

        EP0_OUT_BUFFER_CONTROL = curr;
    }

    inline bool get_EP0_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        return EP0_OUT_BUFFER_CONTROL & (1u << 26u);
    }

    inline void set_EP0_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP0_OUT_BUFFER_CONTROL |= 1u << 26u;
    }

    inline void clear_EP0_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP0_OUT_BUFFER_CONTROL &= ~(1u << 26u);
    }

    inline void toggle_EP0_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP0_OUT_BUFFER_CONTROL ^= 1u << 26u;
    }

    inline USBCTRL_DPRAM_EP0_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
    get_EP0_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile
    {
        return USBCTRL_DPRAM_EP0_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
            (EP0_OUT_BUFFER_CONTROL >> 27u) & 0b11u);
    }

    inline void set_EP0_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
        USBCTRL_DPRAM_EP0_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            value) volatile
    {
        uint32_t curr = EP0_OUT_BUFFER_CONTROL;

        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(value) & 0b11u) << 27u;

        EP0_OUT_BUFFER_CONTROL = curr;
    }

    inline bool get_EP0_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        return EP0_OUT_BUFFER_CONTROL & (1u << 29u);
    }

    inline void set_EP0_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        EP0_OUT_BUFFER_CONTROL |= 1u << 29u;
    }

    inline void clear_EP0_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        EP0_OUT_BUFFER_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP0_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        EP0_OUT_BUFFER_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP0_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        return EP0_OUT_BUFFER_CONTROL & (1u << 30u);
    }

    inline void set_EP0_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        EP0_OUT_BUFFER_CONTROL |= 1u << 30u;
    }

    inline void clear_EP0_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        EP0_OUT_BUFFER_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP0_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        EP0_OUT_BUFFER_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP0_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        return EP0_OUT_BUFFER_CONTROL & (1u << 31u);
    }

    inline void set_EP0_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        EP0_OUT_BUFFER_CONTROL |= 1u << 31u;
    }

    inline void clear_EP0_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        EP0_OUT_BUFFER_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP0_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        EP0_OUT_BUFFER_CONTROL ^= 1u << 31u;
    }

    inline void get_EP0_OUT_BUFFER_CONTROL(
        uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET,
        bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1,
        bool &AVAILABLE_1,
        USBCTRL_DPRAM_EP0_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            &DOUBLE_BUFFER_ISO_OFFSET,
        bool &PID_1, bool &LAST_1, bool &FULL_1) volatile
    {
        uint32_t curr = EP0_OUT_BUFFER_CONTROL;

        LENGTH_0 = (curr >> 0u) & 0b1111111111u;
        AVAILABLE_0 = curr & (1u << 10u);
        STALL = curr & (1u << 11u);
        RESET = curr & (1u << 12u);
        PID_0 = curr & (1u << 13u);
        LAST_0 = curr & (1u << 14u);
        FULL_0 = curr & (1u << 15u);
        LENGTH_1 = (curr >> 16u) & 0b1111111111u;
        AVAILABLE_1 = curr & (1u << 26u);
        DOUBLE_BUFFER_ISO_OFFSET =
            USBCTRL_DPRAM_EP0_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
                (curr >> 27u) & 0b11u);
        PID_1 = curr & (1u << 29u);
        LAST_1 = curr & (1u << 30u);
        FULL_1 = curr & (1u << 31u);
    }

    inline void set_EP0_OUT_BUFFER_CONTROL(
        uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET,
        bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1,
        bool AVAILABLE_1,
        USBCTRL_DPRAM_EP0_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            DOUBLE_BUFFER_ISO_OFFSET,
        bool PID_1, bool LAST_1, bool FULL_1) volatile
    {
        uint32_t curr = EP0_OUT_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (LENGTH_0 & 0b1111111111u) << 0u;
        curr &= ~(0b1u << 10u);
        curr |= (AVAILABLE_0 & 0b1u) << 10u;
        curr &= ~(0b1u << 11u);
        curr |= (STALL & 0b1u) << 11u;
        curr &= ~(0b1u << 12u);
        curr |= (RESET & 0b1u) << 12u;
        curr &= ~(0b1u << 13u);
        curr |= (PID_0 & 0b1u) << 13u;
        curr &= ~(0b1u << 14u);
        curr |= (LAST_0 & 0b1u) << 14u;
        curr &= ~(0b1u << 15u);
        curr |= (FULL_0 & 0b1u) << 15u;
        curr &= ~(0b1111111111u << 16u);
        curr |= (LENGTH_1 & 0b1111111111u) << 16u;
        curr &= ~(0b1u << 26u);
        curr |= (AVAILABLE_1 & 0b1u) << 26u;
        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(DOUBLE_BUFFER_ISO_OFFSET) & 0b11u) << 27u;
        curr &= ~(0b1u << 29u);
        curr |= (PID_1 & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (LAST_1 & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (FULL_1 & 0b1u) << 31u;

        EP0_OUT_BUFFER_CONTROL = curr;
    }

    inline uint16_t get_EP1_IN_BUFFER_CONTROL_LENGTH_0() volatile
    {
        return (EP1_IN_BUFFER_CONTROL >> 0u) & 0b1111111111u;
    }

    inline void set_EP1_IN_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile
    {
        uint32_t curr = EP1_IN_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (value & 0b1111111111u) << 0u;

        EP1_IN_BUFFER_CONTROL = curr;
    }

    inline bool get_EP1_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        return EP1_IN_BUFFER_CONTROL & (1u << 10u);
    }

    inline void set_EP1_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP1_IN_BUFFER_CONTROL |= 1u << 10u;
    }

    inline void clear_EP1_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP1_IN_BUFFER_CONTROL &= ~(1u << 10u);
    }

    inline void toggle_EP1_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP1_IN_BUFFER_CONTROL ^= 1u << 10u;
    }

    inline bool get_EP1_IN_BUFFER_CONTROL_STALL() volatile
    {
        return EP1_IN_BUFFER_CONTROL & (1u << 11u);
    }

    inline void set_EP1_IN_BUFFER_CONTROL_STALL() volatile
    {
        EP1_IN_BUFFER_CONTROL |= 1u << 11u;
    }

    inline void clear_EP1_IN_BUFFER_CONTROL_STALL() volatile
    {
        EP1_IN_BUFFER_CONTROL &= ~(1u << 11u);
    }

    inline void toggle_EP1_IN_BUFFER_CONTROL_STALL() volatile
    {
        EP1_IN_BUFFER_CONTROL ^= 1u << 11u;
    }

    inline bool get_EP1_IN_BUFFER_CONTROL_RESET() volatile
    {
        return EP1_IN_BUFFER_CONTROL & (1u << 12u);
    }

    inline void set_EP1_IN_BUFFER_CONTROL_RESET() volatile
    {
        EP1_IN_BUFFER_CONTROL |= 1u << 12u;
    }

    inline void clear_EP1_IN_BUFFER_CONTROL_RESET() volatile
    {
        EP1_IN_BUFFER_CONTROL &= ~(1u << 12u);
    }

    inline void toggle_EP1_IN_BUFFER_CONTROL_RESET() volatile
    {
        EP1_IN_BUFFER_CONTROL ^= 1u << 12u;
    }

    inline bool get_EP1_IN_BUFFER_CONTROL_PID_0() volatile
    {
        return EP1_IN_BUFFER_CONTROL & (1u << 13u);
    }

    inline void set_EP1_IN_BUFFER_CONTROL_PID_0() volatile
    {
        EP1_IN_BUFFER_CONTROL |= 1u << 13u;
    }

    inline void clear_EP1_IN_BUFFER_CONTROL_PID_0() volatile
    {
        EP1_IN_BUFFER_CONTROL &= ~(1u << 13u);
    }

    inline void toggle_EP1_IN_BUFFER_CONTROL_PID_0() volatile
    {
        EP1_IN_BUFFER_CONTROL ^= 1u << 13u;
    }

    inline bool get_EP1_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        return EP1_IN_BUFFER_CONTROL & (1u << 14u);
    }

    inline void set_EP1_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        EP1_IN_BUFFER_CONTROL |= 1u << 14u;
    }

    inline void clear_EP1_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        EP1_IN_BUFFER_CONTROL &= ~(1u << 14u);
    }

    inline void toggle_EP1_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        EP1_IN_BUFFER_CONTROL ^= 1u << 14u;
    }

    inline bool get_EP1_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        return EP1_IN_BUFFER_CONTROL & (1u << 15u);
    }

    inline void set_EP1_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        EP1_IN_BUFFER_CONTROL |= 1u << 15u;
    }

    inline void clear_EP1_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        EP1_IN_BUFFER_CONTROL &= ~(1u << 15u);
    }

    inline void toggle_EP1_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        EP1_IN_BUFFER_CONTROL ^= 1u << 15u;
    }

    inline uint16_t get_EP1_IN_BUFFER_CONTROL_LENGTH_1() volatile
    {
        return (EP1_IN_BUFFER_CONTROL >> 16u) & 0b1111111111u;
    }

    inline void set_EP1_IN_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile
    {
        uint32_t curr = EP1_IN_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 16u);
        curr |= (value & 0b1111111111u) << 16u;

        EP1_IN_BUFFER_CONTROL = curr;
    }

    inline bool get_EP1_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        return EP1_IN_BUFFER_CONTROL & (1u << 26u);
    }

    inline void set_EP1_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP1_IN_BUFFER_CONTROL |= 1u << 26u;
    }

    inline void clear_EP1_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP1_IN_BUFFER_CONTROL &= ~(1u << 26u);
    }

    inline void toggle_EP1_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP1_IN_BUFFER_CONTROL ^= 1u << 26u;
    }

    inline USBCTRL_DPRAM_EP1_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
    get_EP1_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile
    {
        return USBCTRL_DPRAM_EP1_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
            (EP1_IN_BUFFER_CONTROL >> 27u) & 0b11u);
    }

    inline void set_EP1_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
        USBCTRL_DPRAM_EP1_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            value) volatile
    {
        uint32_t curr = EP1_IN_BUFFER_CONTROL;

        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(value) & 0b11u) << 27u;

        EP1_IN_BUFFER_CONTROL = curr;
    }

    inline bool get_EP1_IN_BUFFER_CONTROL_PID_1() volatile
    {
        return EP1_IN_BUFFER_CONTROL & (1u << 29u);
    }

    inline void set_EP1_IN_BUFFER_CONTROL_PID_1() volatile
    {
        EP1_IN_BUFFER_CONTROL |= 1u << 29u;
    }

    inline void clear_EP1_IN_BUFFER_CONTROL_PID_1() volatile
    {
        EP1_IN_BUFFER_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP1_IN_BUFFER_CONTROL_PID_1() volatile
    {
        EP1_IN_BUFFER_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP1_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        return EP1_IN_BUFFER_CONTROL & (1u << 30u);
    }

    inline void set_EP1_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        EP1_IN_BUFFER_CONTROL |= 1u << 30u;
    }

    inline void clear_EP1_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        EP1_IN_BUFFER_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP1_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        EP1_IN_BUFFER_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP1_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        return EP1_IN_BUFFER_CONTROL & (1u << 31u);
    }

    inline void set_EP1_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        EP1_IN_BUFFER_CONTROL |= 1u << 31u;
    }

    inline void clear_EP1_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        EP1_IN_BUFFER_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP1_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        EP1_IN_BUFFER_CONTROL ^= 1u << 31u;
    }

    inline void get_EP1_IN_BUFFER_CONTROL(
        uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET,
        bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1,
        bool &AVAILABLE_1,
        USBCTRL_DPRAM_EP1_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            &DOUBLE_BUFFER_ISO_OFFSET,
        bool &PID_1, bool &LAST_1, bool &FULL_1) volatile
    {
        uint32_t curr = EP1_IN_BUFFER_CONTROL;

        LENGTH_0 = (curr >> 0u) & 0b1111111111u;
        AVAILABLE_0 = curr & (1u << 10u);
        STALL = curr & (1u << 11u);
        RESET = curr & (1u << 12u);
        PID_0 = curr & (1u << 13u);
        LAST_0 = curr & (1u << 14u);
        FULL_0 = curr & (1u << 15u);
        LENGTH_1 = (curr >> 16u) & 0b1111111111u;
        AVAILABLE_1 = curr & (1u << 26u);
        DOUBLE_BUFFER_ISO_OFFSET =
            USBCTRL_DPRAM_EP1_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
                (curr >> 27u) & 0b11u);
        PID_1 = curr & (1u << 29u);
        LAST_1 = curr & (1u << 30u);
        FULL_1 = curr & (1u << 31u);
    }

    inline void set_EP1_IN_BUFFER_CONTROL(
        uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET,
        bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1,
        bool AVAILABLE_1,
        USBCTRL_DPRAM_EP1_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            DOUBLE_BUFFER_ISO_OFFSET,
        bool PID_1, bool LAST_1, bool FULL_1) volatile
    {
        uint32_t curr = EP1_IN_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (LENGTH_0 & 0b1111111111u) << 0u;
        curr &= ~(0b1u << 10u);
        curr |= (AVAILABLE_0 & 0b1u) << 10u;
        curr &= ~(0b1u << 11u);
        curr |= (STALL & 0b1u) << 11u;
        curr &= ~(0b1u << 12u);
        curr |= (RESET & 0b1u) << 12u;
        curr &= ~(0b1u << 13u);
        curr |= (PID_0 & 0b1u) << 13u;
        curr &= ~(0b1u << 14u);
        curr |= (LAST_0 & 0b1u) << 14u;
        curr &= ~(0b1u << 15u);
        curr |= (FULL_0 & 0b1u) << 15u;
        curr &= ~(0b1111111111u << 16u);
        curr |= (LENGTH_1 & 0b1111111111u) << 16u;
        curr &= ~(0b1u << 26u);
        curr |= (AVAILABLE_1 & 0b1u) << 26u;
        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(DOUBLE_BUFFER_ISO_OFFSET) & 0b11u) << 27u;
        curr &= ~(0b1u << 29u);
        curr |= (PID_1 & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (LAST_1 & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (FULL_1 & 0b1u) << 31u;

        EP1_IN_BUFFER_CONTROL = curr;
    }

    inline uint16_t get_EP1_OUT_BUFFER_CONTROL_LENGTH_0() volatile
    {
        return (EP1_OUT_BUFFER_CONTROL >> 0u) & 0b1111111111u;
    }

    inline void set_EP1_OUT_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile
    {
        uint32_t curr = EP1_OUT_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (value & 0b1111111111u) << 0u;

        EP1_OUT_BUFFER_CONTROL = curr;
    }

    inline bool get_EP1_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        return EP1_OUT_BUFFER_CONTROL & (1u << 10u);
    }

    inline void set_EP1_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP1_OUT_BUFFER_CONTROL |= 1u << 10u;
    }

    inline void clear_EP1_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP1_OUT_BUFFER_CONTROL &= ~(1u << 10u);
    }

    inline void toggle_EP1_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP1_OUT_BUFFER_CONTROL ^= 1u << 10u;
    }

    inline bool get_EP1_OUT_BUFFER_CONTROL_STALL() volatile
    {
        return EP1_OUT_BUFFER_CONTROL & (1u << 11u);
    }

    inline void set_EP1_OUT_BUFFER_CONTROL_STALL() volatile
    {
        EP1_OUT_BUFFER_CONTROL |= 1u << 11u;
    }

    inline void clear_EP1_OUT_BUFFER_CONTROL_STALL() volatile
    {
        EP1_OUT_BUFFER_CONTROL &= ~(1u << 11u);
    }

    inline void toggle_EP1_OUT_BUFFER_CONTROL_STALL() volatile
    {
        EP1_OUT_BUFFER_CONTROL ^= 1u << 11u;
    }

    inline bool get_EP1_OUT_BUFFER_CONTROL_RESET() volatile
    {
        return EP1_OUT_BUFFER_CONTROL & (1u << 12u);
    }

    inline void set_EP1_OUT_BUFFER_CONTROL_RESET() volatile
    {
        EP1_OUT_BUFFER_CONTROL |= 1u << 12u;
    }

    inline void clear_EP1_OUT_BUFFER_CONTROL_RESET() volatile
    {
        EP1_OUT_BUFFER_CONTROL &= ~(1u << 12u);
    }

    inline void toggle_EP1_OUT_BUFFER_CONTROL_RESET() volatile
    {
        EP1_OUT_BUFFER_CONTROL ^= 1u << 12u;
    }

    inline bool get_EP1_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        return EP1_OUT_BUFFER_CONTROL & (1u << 13u);
    }

    inline void set_EP1_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        EP1_OUT_BUFFER_CONTROL |= 1u << 13u;
    }

    inline void clear_EP1_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        EP1_OUT_BUFFER_CONTROL &= ~(1u << 13u);
    }

    inline void toggle_EP1_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        EP1_OUT_BUFFER_CONTROL ^= 1u << 13u;
    }

    inline bool get_EP1_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        return EP1_OUT_BUFFER_CONTROL & (1u << 14u);
    }

    inline void set_EP1_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        EP1_OUT_BUFFER_CONTROL |= 1u << 14u;
    }

    inline void clear_EP1_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        EP1_OUT_BUFFER_CONTROL &= ~(1u << 14u);
    }

    inline void toggle_EP1_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        EP1_OUT_BUFFER_CONTROL ^= 1u << 14u;
    }

    inline bool get_EP1_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        return EP1_OUT_BUFFER_CONTROL & (1u << 15u);
    }

    inline void set_EP1_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        EP1_OUT_BUFFER_CONTROL |= 1u << 15u;
    }

    inline void clear_EP1_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        EP1_OUT_BUFFER_CONTROL &= ~(1u << 15u);
    }

    inline void toggle_EP1_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        EP1_OUT_BUFFER_CONTROL ^= 1u << 15u;
    }

    inline uint16_t get_EP1_OUT_BUFFER_CONTROL_LENGTH_1() volatile
    {
        return (EP1_OUT_BUFFER_CONTROL >> 16u) & 0b1111111111u;
    }

    inline void set_EP1_OUT_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile
    {
        uint32_t curr = EP1_OUT_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 16u);
        curr |= (value & 0b1111111111u) << 16u;

        EP1_OUT_BUFFER_CONTROL = curr;
    }

    inline bool get_EP1_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        return EP1_OUT_BUFFER_CONTROL & (1u << 26u);
    }

    inline void set_EP1_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP1_OUT_BUFFER_CONTROL |= 1u << 26u;
    }

    inline void clear_EP1_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP1_OUT_BUFFER_CONTROL &= ~(1u << 26u);
    }

    inline void toggle_EP1_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP1_OUT_BUFFER_CONTROL ^= 1u << 26u;
    }

    inline USBCTRL_DPRAM_EP1_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
    get_EP1_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile
    {
        return USBCTRL_DPRAM_EP1_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
            (EP1_OUT_BUFFER_CONTROL >> 27u) & 0b11u);
    }

    inline void set_EP1_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
        USBCTRL_DPRAM_EP1_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            value) volatile
    {
        uint32_t curr = EP1_OUT_BUFFER_CONTROL;

        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(value) & 0b11u) << 27u;

        EP1_OUT_BUFFER_CONTROL = curr;
    }

    inline bool get_EP1_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        return EP1_OUT_BUFFER_CONTROL & (1u << 29u);
    }

    inline void set_EP1_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        EP1_OUT_BUFFER_CONTROL |= 1u << 29u;
    }

    inline void clear_EP1_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        EP1_OUT_BUFFER_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP1_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        EP1_OUT_BUFFER_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP1_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        return EP1_OUT_BUFFER_CONTROL & (1u << 30u);
    }

    inline void set_EP1_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        EP1_OUT_BUFFER_CONTROL |= 1u << 30u;
    }

    inline void clear_EP1_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        EP1_OUT_BUFFER_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP1_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        EP1_OUT_BUFFER_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP1_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        return EP1_OUT_BUFFER_CONTROL & (1u << 31u);
    }

    inline void set_EP1_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        EP1_OUT_BUFFER_CONTROL |= 1u << 31u;
    }

    inline void clear_EP1_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        EP1_OUT_BUFFER_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP1_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        EP1_OUT_BUFFER_CONTROL ^= 1u << 31u;
    }

    inline void get_EP1_OUT_BUFFER_CONTROL(
        uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET,
        bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1,
        bool &AVAILABLE_1,
        USBCTRL_DPRAM_EP1_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            &DOUBLE_BUFFER_ISO_OFFSET,
        bool &PID_1, bool &LAST_1, bool &FULL_1) volatile
    {
        uint32_t curr = EP1_OUT_BUFFER_CONTROL;

        LENGTH_0 = (curr >> 0u) & 0b1111111111u;
        AVAILABLE_0 = curr & (1u << 10u);
        STALL = curr & (1u << 11u);
        RESET = curr & (1u << 12u);
        PID_0 = curr & (1u << 13u);
        LAST_0 = curr & (1u << 14u);
        FULL_0 = curr & (1u << 15u);
        LENGTH_1 = (curr >> 16u) & 0b1111111111u;
        AVAILABLE_1 = curr & (1u << 26u);
        DOUBLE_BUFFER_ISO_OFFSET =
            USBCTRL_DPRAM_EP1_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
                (curr >> 27u) & 0b11u);
        PID_1 = curr & (1u << 29u);
        LAST_1 = curr & (1u << 30u);
        FULL_1 = curr & (1u << 31u);
    }

    inline void set_EP1_OUT_BUFFER_CONTROL(
        uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET,
        bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1,
        bool AVAILABLE_1,
        USBCTRL_DPRAM_EP1_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            DOUBLE_BUFFER_ISO_OFFSET,
        bool PID_1, bool LAST_1, bool FULL_1) volatile
    {
        uint32_t curr = EP1_OUT_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (LENGTH_0 & 0b1111111111u) << 0u;
        curr &= ~(0b1u << 10u);
        curr |= (AVAILABLE_0 & 0b1u) << 10u;
        curr &= ~(0b1u << 11u);
        curr |= (STALL & 0b1u) << 11u;
        curr &= ~(0b1u << 12u);
        curr |= (RESET & 0b1u) << 12u;
        curr &= ~(0b1u << 13u);
        curr |= (PID_0 & 0b1u) << 13u;
        curr &= ~(0b1u << 14u);
        curr |= (LAST_0 & 0b1u) << 14u;
        curr &= ~(0b1u << 15u);
        curr |= (FULL_0 & 0b1u) << 15u;
        curr &= ~(0b1111111111u << 16u);
        curr |= (LENGTH_1 & 0b1111111111u) << 16u;
        curr &= ~(0b1u << 26u);
        curr |= (AVAILABLE_1 & 0b1u) << 26u;
        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(DOUBLE_BUFFER_ISO_OFFSET) & 0b11u) << 27u;
        curr &= ~(0b1u << 29u);
        curr |= (PID_1 & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (LAST_1 & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (FULL_1 & 0b1u) << 31u;

        EP1_OUT_BUFFER_CONTROL = curr;
    }

    inline uint16_t get_EP2_IN_BUFFER_CONTROL_LENGTH_0() volatile
    {
        return (EP2_IN_BUFFER_CONTROL >> 0u) & 0b1111111111u;
    }

    inline void set_EP2_IN_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile
    {
        uint32_t curr = EP2_IN_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (value & 0b1111111111u) << 0u;

        EP2_IN_BUFFER_CONTROL = curr;
    }

    inline bool get_EP2_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        return EP2_IN_BUFFER_CONTROL & (1u << 10u);
    }

    inline void set_EP2_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP2_IN_BUFFER_CONTROL |= 1u << 10u;
    }

    inline void clear_EP2_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP2_IN_BUFFER_CONTROL &= ~(1u << 10u);
    }

    inline void toggle_EP2_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP2_IN_BUFFER_CONTROL ^= 1u << 10u;
    }

    inline bool get_EP2_IN_BUFFER_CONTROL_STALL() volatile
    {
        return EP2_IN_BUFFER_CONTROL & (1u << 11u);
    }

    inline void set_EP2_IN_BUFFER_CONTROL_STALL() volatile
    {
        EP2_IN_BUFFER_CONTROL |= 1u << 11u;
    }

    inline void clear_EP2_IN_BUFFER_CONTROL_STALL() volatile
    {
        EP2_IN_BUFFER_CONTROL &= ~(1u << 11u);
    }

    inline void toggle_EP2_IN_BUFFER_CONTROL_STALL() volatile
    {
        EP2_IN_BUFFER_CONTROL ^= 1u << 11u;
    }

    inline bool get_EP2_IN_BUFFER_CONTROL_RESET() volatile
    {
        return EP2_IN_BUFFER_CONTROL & (1u << 12u);
    }

    inline void set_EP2_IN_BUFFER_CONTROL_RESET() volatile
    {
        EP2_IN_BUFFER_CONTROL |= 1u << 12u;
    }

    inline void clear_EP2_IN_BUFFER_CONTROL_RESET() volatile
    {
        EP2_IN_BUFFER_CONTROL &= ~(1u << 12u);
    }

    inline void toggle_EP2_IN_BUFFER_CONTROL_RESET() volatile
    {
        EP2_IN_BUFFER_CONTROL ^= 1u << 12u;
    }

    inline bool get_EP2_IN_BUFFER_CONTROL_PID_0() volatile
    {
        return EP2_IN_BUFFER_CONTROL & (1u << 13u);
    }

    inline void set_EP2_IN_BUFFER_CONTROL_PID_0() volatile
    {
        EP2_IN_BUFFER_CONTROL |= 1u << 13u;
    }

    inline void clear_EP2_IN_BUFFER_CONTROL_PID_0() volatile
    {
        EP2_IN_BUFFER_CONTROL &= ~(1u << 13u);
    }

    inline void toggle_EP2_IN_BUFFER_CONTROL_PID_0() volatile
    {
        EP2_IN_BUFFER_CONTROL ^= 1u << 13u;
    }

    inline bool get_EP2_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        return EP2_IN_BUFFER_CONTROL & (1u << 14u);
    }

    inline void set_EP2_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        EP2_IN_BUFFER_CONTROL |= 1u << 14u;
    }

    inline void clear_EP2_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        EP2_IN_BUFFER_CONTROL &= ~(1u << 14u);
    }

    inline void toggle_EP2_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        EP2_IN_BUFFER_CONTROL ^= 1u << 14u;
    }

    inline bool get_EP2_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        return EP2_IN_BUFFER_CONTROL & (1u << 15u);
    }

    inline void set_EP2_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        EP2_IN_BUFFER_CONTROL |= 1u << 15u;
    }

    inline void clear_EP2_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        EP2_IN_BUFFER_CONTROL &= ~(1u << 15u);
    }

    inline void toggle_EP2_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        EP2_IN_BUFFER_CONTROL ^= 1u << 15u;
    }

    inline uint16_t get_EP2_IN_BUFFER_CONTROL_LENGTH_1() volatile
    {
        return (EP2_IN_BUFFER_CONTROL >> 16u) & 0b1111111111u;
    }

    inline void set_EP2_IN_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile
    {
        uint32_t curr = EP2_IN_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 16u);
        curr |= (value & 0b1111111111u) << 16u;

        EP2_IN_BUFFER_CONTROL = curr;
    }

    inline bool get_EP2_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        return EP2_IN_BUFFER_CONTROL & (1u << 26u);
    }

    inline void set_EP2_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP2_IN_BUFFER_CONTROL |= 1u << 26u;
    }

    inline void clear_EP2_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP2_IN_BUFFER_CONTROL &= ~(1u << 26u);
    }

    inline void toggle_EP2_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP2_IN_BUFFER_CONTROL ^= 1u << 26u;
    }

    inline USBCTRL_DPRAM_EP2_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
    get_EP2_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile
    {
        return USBCTRL_DPRAM_EP2_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
            (EP2_IN_BUFFER_CONTROL >> 27u) & 0b11u);
    }

    inline void set_EP2_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
        USBCTRL_DPRAM_EP2_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            value) volatile
    {
        uint32_t curr = EP2_IN_BUFFER_CONTROL;

        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(value) & 0b11u) << 27u;

        EP2_IN_BUFFER_CONTROL = curr;
    }

    inline bool get_EP2_IN_BUFFER_CONTROL_PID_1() volatile
    {
        return EP2_IN_BUFFER_CONTROL & (1u << 29u);
    }

    inline void set_EP2_IN_BUFFER_CONTROL_PID_1() volatile
    {
        EP2_IN_BUFFER_CONTROL |= 1u << 29u;
    }

    inline void clear_EP2_IN_BUFFER_CONTROL_PID_1() volatile
    {
        EP2_IN_BUFFER_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP2_IN_BUFFER_CONTROL_PID_1() volatile
    {
        EP2_IN_BUFFER_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP2_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        return EP2_IN_BUFFER_CONTROL & (1u << 30u);
    }

    inline void set_EP2_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        EP2_IN_BUFFER_CONTROL |= 1u << 30u;
    }

    inline void clear_EP2_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        EP2_IN_BUFFER_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP2_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        EP2_IN_BUFFER_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP2_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        return EP2_IN_BUFFER_CONTROL & (1u << 31u);
    }

    inline void set_EP2_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        EP2_IN_BUFFER_CONTROL |= 1u << 31u;
    }

    inline void clear_EP2_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        EP2_IN_BUFFER_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP2_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        EP2_IN_BUFFER_CONTROL ^= 1u << 31u;
    }

    inline void get_EP2_IN_BUFFER_CONTROL(
        uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET,
        bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1,
        bool &AVAILABLE_1,
        USBCTRL_DPRAM_EP2_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            &DOUBLE_BUFFER_ISO_OFFSET,
        bool &PID_1, bool &LAST_1, bool &FULL_1) volatile
    {
        uint32_t curr = EP2_IN_BUFFER_CONTROL;

        LENGTH_0 = (curr >> 0u) & 0b1111111111u;
        AVAILABLE_0 = curr & (1u << 10u);
        STALL = curr & (1u << 11u);
        RESET = curr & (1u << 12u);
        PID_0 = curr & (1u << 13u);
        LAST_0 = curr & (1u << 14u);
        FULL_0 = curr & (1u << 15u);
        LENGTH_1 = (curr >> 16u) & 0b1111111111u;
        AVAILABLE_1 = curr & (1u << 26u);
        DOUBLE_BUFFER_ISO_OFFSET =
            USBCTRL_DPRAM_EP2_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
                (curr >> 27u) & 0b11u);
        PID_1 = curr & (1u << 29u);
        LAST_1 = curr & (1u << 30u);
        FULL_1 = curr & (1u << 31u);
    }

    inline void set_EP2_IN_BUFFER_CONTROL(
        uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET,
        bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1,
        bool AVAILABLE_1,
        USBCTRL_DPRAM_EP2_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            DOUBLE_BUFFER_ISO_OFFSET,
        bool PID_1, bool LAST_1, bool FULL_1) volatile
    {
        uint32_t curr = EP2_IN_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (LENGTH_0 & 0b1111111111u) << 0u;
        curr &= ~(0b1u << 10u);
        curr |= (AVAILABLE_0 & 0b1u) << 10u;
        curr &= ~(0b1u << 11u);
        curr |= (STALL & 0b1u) << 11u;
        curr &= ~(0b1u << 12u);
        curr |= (RESET & 0b1u) << 12u;
        curr &= ~(0b1u << 13u);
        curr |= (PID_0 & 0b1u) << 13u;
        curr &= ~(0b1u << 14u);
        curr |= (LAST_0 & 0b1u) << 14u;
        curr &= ~(0b1u << 15u);
        curr |= (FULL_0 & 0b1u) << 15u;
        curr &= ~(0b1111111111u << 16u);
        curr |= (LENGTH_1 & 0b1111111111u) << 16u;
        curr &= ~(0b1u << 26u);
        curr |= (AVAILABLE_1 & 0b1u) << 26u;
        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(DOUBLE_BUFFER_ISO_OFFSET) & 0b11u) << 27u;
        curr &= ~(0b1u << 29u);
        curr |= (PID_1 & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (LAST_1 & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (FULL_1 & 0b1u) << 31u;

        EP2_IN_BUFFER_CONTROL = curr;
    }

    inline uint16_t get_EP2_OUT_BUFFER_CONTROL_LENGTH_0() volatile
    {
        return (EP2_OUT_BUFFER_CONTROL >> 0u) & 0b1111111111u;
    }

    inline void set_EP2_OUT_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile
    {
        uint32_t curr = EP2_OUT_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (value & 0b1111111111u) << 0u;

        EP2_OUT_BUFFER_CONTROL = curr;
    }

    inline bool get_EP2_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        return EP2_OUT_BUFFER_CONTROL & (1u << 10u);
    }

    inline void set_EP2_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP2_OUT_BUFFER_CONTROL |= 1u << 10u;
    }

    inline void clear_EP2_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP2_OUT_BUFFER_CONTROL &= ~(1u << 10u);
    }

    inline void toggle_EP2_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP2_OUT_BUFFER_CONTROL ^= 1u << 10u;
    }

    inline bool get_EP2_OUT_BUFFER_CONTROL_STALL() volatile
    {
        return EP2_OUT_BUFFER_CONTROL & (1u << 11u);
    }

    inline void set_EP2_OUT_BUFFER_CONTROL_STALL() volatile
    {
        EP2_OUT_BUFFER_CONTROL |= 1u << 11u;
    }

    inline void clear_EP2_OUT_BUFFER_CONTROL_STALL() volatile
    {
        EP2_OUT_BUFFER_CONTROL &= ~(1u << 11u);
    }

    inline void toggle_EP2_OUT_BUFFER_CONTROL_STALL() volatile
    {
        EP2_OUT_BUFFER_CONTROL ^= 1u << 11u;
    }

    inline bool get_EP2_OUT_BUFFER_CONTROL_RESET() volatile
    {
        return EP2_OUT_BUFFER_CONTROL & (1u << 12u);
    }

    inline void set_EP2_OUT_BUFFER_CONTROL_RESET() volatile
    {
        EP2_OUT_BUFFER_CONTROL |= 1u << 12u;
    }

    inline void clear_EP2_OUT_BUFFER_CONTROL_RESET() volatile
    {
        EP2_OUT_BUFFER_CONTROL &= ~(1u << 12u);
    }

    inline void toggle_EP2_OUT_BUFFER_CONTROL_RESET() volatile
    {
        EP2_OUT_BUFFER_CONTROL ^= 1u << 12u;
    }

    inline bool get_EP2_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        return EP2_OUT_BUFFER_CONTROL & (1u << 13u);
    }

    inline void set_EP2_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        EP2_OUT_BUFFER_CONTROL |= 1u << 13u;
    }

    inline void clear_EP2_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        EP2_OUT_BUFFER_CONTROL &= ~(1u << 13u);
    }

    inline void toggle_EP2_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        EP2_OUT_BUFFER_CONTROL ^= 1u << 13u;
    }

    inline bool get_EP2_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        return EP2_OUT_BUFFER_CONTROL & (1u << 14u);
    }

    inline void set_EP2_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        EP2_OUT_BUFFER_CONTROL |= 1u << 14u;
    }

    inline void clear_EP2_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        EP2_OUT_BUFFER_CONTROL &= ~(1u << 14u);
    }

    inline void toggle_EP2_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        EP2_OUT_BUFFER_CONTROL ^= 1u << 14u;
    }

    inline bool get_EP2_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        return EP2_OUT_BUFFER_CONTROL & (1u << 15u);
    }

    inline void set_EP2_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        EP2_OUT_BUFFER_CONTROL |= 1u << 15u;
    }

    inline void clear_EP2_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        EP2_OUT_BUFFER_CONTROL &= ~(1u << 15u);
    }

    inline void toggle_EP2_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        EP2_OUT_BUFFER_CONTROL ^= 1u << 15u;
    }

    inline uint16_t get_EP2_OUT_BUFFER_CONTROL_LENGTH_1() volatile
    {
        return (EP2_OUT_BUFFER_CONTROL >> 16u) & 0b1111111111u;
    }

    inline void set_EP2_OUT_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile
    {
        uint32_t curr = EP2_OUT_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 16u);
        curr |= (value & 0b1111111111u) << 16u;

        EP2_OUT_BUFFER_CONTROL = curr;
    }

    inline bool get_EP2_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        return EP2_OUT_BUFFER_CONTROL & (1u << 26u);
    }

    inline void set_EP2_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP2_OUT_BUFFER_CONTROL |= 1u << 26u;
    }

    inline void clear_EP2_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP2_OUT_BUFFER_CONTROL &= ~(1u << 26u);
    }

    inline void toggle_EP2_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP2_OUT_BUFFER_CONTROL ^= 1u << 26u;
    }

    inline USBCTRL_DPRAM_EP2_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
    get_EP2_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile
    {
        return USBCTRL_DPRAM_EP2_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
            (EP2_OUT_BUFFER_CONTROL >> 27u) & 0b11u);
    }

    inline void set_EP2_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
        USBCTRL_DPRAM_EP2_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            value) volatile
    {
        uint32_t curr = EP2_OUT_BUFFER_CONTROL;

        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(value) & 0b11u) << 27u;

        EP2_OUT_BUFFER_CONTROL = curr;
    }

    inline bool get_EP2_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        return EP2_OUT_BUFFER_CONTROL & (1u << 29u);
    }

    inline void set_EP2_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        EP2_OUT_BUFFER_CONTROL |= 1u << 29u;
    }

    inline void clear_EP2_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        EP2_OUT_BUFFER_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP2_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        EP2_OUT_BUFFER_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP2_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        return EP2_OUT_BUFFER_CONTROL & (1u << 30u);
    }

    inline void set_EP2_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        EP2_OUT_BUFFER_CONTROL |= 1u << 30u;
    }

    inline void clear_EP2_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        EP2_OUT_BUFFER_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP2_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        EP2_OUT_BUFFER_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP2_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        return EP2_OUT_BUFFER_CONTROL & (1u << 31u);
    }

    inline void set_EP2_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        EP2_OUT_BUFFER_CONTROL |= 1u << 31u;
    }

    inline void clear_EP2_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        EP2_OUT_BUFFER_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP2_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        EP2_OUT_BUFFER_CONTROL ^= 1u << 31u;
    }

    inline void get_EP2_OUT_BUFFER_CONTROL(
        uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET,
        bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1,
        bool &AVAILABLE_1,
        USBCTRL_DPRAM_EP2_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            &DOUBLE_BUFFER_ISO_OFFSET,
        bool &PID_1, bool &LAST_1, bool &FULL_1) volatile
    {
        uint32_t curr = EP2_OUT_BUFFER_CONTROL;

        LENGTH_0 = (curr >> 0u) & 0b1111111111u;
        AVAILABLE_0 = curr & (1u << 10u);
        STALL = curr & (1u << 11u);
        RESET = curr & (1u << 12u);
        PID_0 = curr & (1u << 13u);
        LAST_0 = curr & (1u << 14u);
        FULL_0 = curr & (1u << 15u);
        LENGTH_1 = (curr >> 16u) & 0b1111111111u;
        AVAILABLE_1 = curr & (1u << 26u);
        DOUBLE_BUFFER_ISO_OFFSET =
            USBCTRL_DPRAM_EP2_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
                (curr >> 27u) & 0b11u);
        PID_1 = curr & (1u << 29u);
        LAST_1 = curr & (1u << 30u);
        FULL_1 = curr & (1u << 31u);
    }

    inline void set_EP2_OUT_BUFFER_CONTROL(
        uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET,
        bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1,
        bool AVAILABLE_1,
        USBCTRL_DPRAM_EP2_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            DOUBLE_BUFFER_ISO_OFFSET,
        bool PID_1, bool LAST_1, bool FULL_1) volatile
    {
        uint32_t curr = EP2_OUT_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (LENGTH_0 & 0b1111111111u) << 0u;
        curr &= ~(0b1u << 10u);
        curr |= (AVAILABLE_0 & 0b1u) << 10u;
        curr &= ~(0b1u << 11u);
        curr |= (STALL & 0b1u) << 11u;
        curr &= ~(0b1u << 12u);
        curr |= (RESET & 0b1u) << 12u;
        curr &= ~(0b1u << 13u);
        curr |= (PID_0 & 0b1u) << 13u;
        curr &= ~(0b1u << 14u);
        curr |= (LAST_0 & 0b1u) << 14u;
        curr &= ~(0b1u << 15u);
        curr |= (FULL_0 & 0b1u) << 15u;
        curr &= ~(0b1111111111u << 16u);
        curr |= (LENGTH_1 & 0b1111111111u) << 16u;
        curr &= ~(0b1u << 26u);
        curr |= (AVAILABLE_1 & 0b1u) << 26u;
        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(DOUBLE_BUFFER_ISO_OFFSET) & 0b11u) << 27u;
        curr &= ~(0b1u << 29u);
        curr |= (PID_1 & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (LAST_1 & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (FULL_1 & 0b1u) << 31u;

        EP2_OUT_BUFFER_CONTROL = curr;
    }

    inline uint16_t get_EP3_IN_BUFFER_CONTROL_LENGTH_0() volatile
    {
        return (EP3_IN_BUFFER_CONTROL >> 0u) & 0b1111111111u;
    }

    inline void set_EP3_IN_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile
    {
        uint32_t curr = EP3_IN_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (value & 0b1111111111u) << 0u;

        EP3_IN_BUFFER_CONTROL = curr;
    }

    inline bool get_EP3_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        return EP3_IN_BUFFER_CONTROL & (1u << 10u);
    }

    inline void set_EP3_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP3_IN_BUFFER_CONTROL |= 1u << 10u;
    }

    inline void clear_EP3_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP3_IN_BUFFER_CONTROL &= ~(1u << 10u);
    }

    inline void toggle_EP3_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP3_IN_BUFFER_CONTROL ^= 1u << 10u;
    }

    inline bool get_EP3_IN_BUFFER_CONTROL_STALL() volatile
    {
        return EP3_IN_BUFFER_CONTROL & (1u << 11u);
    }

    inline void set_EP3_IN_BUFFER_CONTROL_STALL() volatile
    {
        EP3_IN_BUFFER_CONTROL |= 1u << 11u;
    }

    inline void clear_EP3_IN_BUFFER_CONTROL_STALL() volatile
    {
        EP3_IN_BUFFER_CONTROL &= ~(1u << 11u);
    }

    inline void toggle_EP3_IN_BUFFER_CONTROL_STALL() volatile
    {
        EP3_IN_BUFFER_CONTROL ^= 1u << 11u;
    }

    inline bool get_EP3_IN_BUFFER_CONTROL_RESET() volatile
    {
        return EP3_IN_BUFFER_CONTROL & (1u << 12u);
    }

    inline void set_EP3_IN_BUFFER_CONTROL_RESET() volatile
    {
        EP3_IN_BUFFER_CONTROL |= 1u << 12u;
    }

    inline void clear_EP3_IN_BUFFER_CONTROL_RESET() volatile
    {
        EP3_IN_BUFFER_CONTROL &= ~(1u << 12u);
    }

    inline void toggle_EP3_IN_BUFFER_CONTROL_RESET() volatile
    {
        EP3_IN_BUFFER_CONTROL ^= 1u << 12u;
    }

    inline bool get_EP3_IN_BUFFER_CONTROL_PID_0() volatile
    {
        return EP3_IN_BUFFER_CONTROL & (1u << 13u);
    }

    inline void set_EP3_IN_BUFFER_CONTROL_PID_0() volatile
    {
        EP3_IN_BUFFER_CONTROL |= 1u << 13u;
    }

    inline void clear_EP3_IN_BUFFER_CONTROL_PID_0() volatile
    {
        EP3_IN_BUFFER_CONTROL &= ~(1u << 13u);
    }

    inline void toggle_EP3_IN_BUFFER_CONTROL_PID_0() volatile
    {
        EP3_IN_BUFFER_CONTROL ^= 1u << 13u;
    }

    inline bool get_EP3_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        return EP3_IN_BUFFER_CONTROL & (1u << 14u);
    }

    inline void set_EP3_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        EP3_IN_BUFFER_CONTROL |= 1u << 14u;
    }

    inline void clear_EP3_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        EP3_IN_BUFFER_CONTROL &= ~(1u << 14u);
    }

    inline void toggle_EP3_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        EP3_IN_BUFFER_CONTROL ^= 1u << 14u;
    }

    inline bool get_EP3_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        return EP3_IN_BUFFER_CONTROL & (1u << 15u);
    }

    inline void set_EP3_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        EP3_IN_BUFFER_CONTROL |= 1u << 15u;
    }

    inline void clear_EP3_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        EP3_IN_BUFFER_CONTROL &= ~(1u << 15u);
    }

    inline void toggle_EP3_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        EP3_IN_BUFFER_CONTROL ^= 1u << 15u;
    }

    inline uint16_t get_EP3_IN_BUFFER_CONTROL_LENGTH_1() volatile
    {
        return (EP3_IN_BUFFER_CONTROL >> 16u) & 0b1111111111u;
    }

    inline void set_EP3_IN_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile
    {
        uint32_t curr = EP3_IN_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 16u);
        curr |= (value & 0b1111111111u) << 16u;

        EP3_IN_BUFFER_CONTROL = curr;
    }

    inline bool get_EP3_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        return EP3_IN_BUFFER_CONTROL & (1u << 26u);
    }

    inline void set_EP3_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP3_IN_BUFFER_CONTROL |= 1u << 26u;
    }

    inline void clear_EP3_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP3_IN_BUFFER_CONTROL &= ~(1u << 26u);
    }

    inline void toggle_EP3_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP3_IN_BUFFER_CONTROL ^= 1u << 26u;
    }

    inline USBCTRL_DPRAM_EP3_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
    get_EP3_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile
    {
        return USBCTRL_DPRAM_EP3_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
            (EP3_IN_BUFFER_CONTROL >> 27u) & 0b11u);
    }

    inline void set_EP3_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
        USBCTRL_DPRAM_EP3_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            value) volatile
    {
        uint32_t curr = EP3_IN_BUFFER_CONTROL;

        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(value) & 0b11u) << 27u;

        EP3_IN_BUFFER_CONTROL = curr;
    }

    inline bool get_EP3_IN_BUFFER_CONTROL_PID_1() volatile
    {
        return EP3_IN_BUFFER_CONTROL & (1u << 29u);
    }

    inline void set_EP3_IN_BUFFER_CONTROL_PID_1() volatile
    {
        EP3_IN_BUFFER_CONTROL |= 1u << 29u;
    }

    inline void clear_EP3_IN_BUFFER_CONTROL_PID_1() volatile
    {
        EP3_IN_BUFFER_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP3_IN_BUFFER_CONTROL_PID_1() volatile
    {
        EP3_IN_BUFFER_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP3_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        return EP3_IN_BUFFER_CONTROL & (1u << 30u);
    }

    inline void set_EP3_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        EP3_IN_BUFFER_CONTROL |= 1u << 30u;
    }

    inline void clear_EP3_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        EP3_IN_BUFFER_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP3_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        EP3_IN_BUFFER_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP3_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        return EP3_IN_BUFFER_CONTROL & (1u << 31u);
    }

    inline void set_EP3_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        EP3_IN_BUFFER_CONTROL |= 1u << 31u;
    }

    inline void clear_EP3_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        EP3_IN_BUFFER_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP3_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        EP3_IN_BUFFER_CONTROL ^= 1u << 31u;
    }

    inline void get_EP3_IN_BUFFER_CONTROL(
        uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET,
        bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1,
        bool &AVAILABLE_1,
        USBCTRL_DPRAM_EP3_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            &DOUBLE_BUFFER_ISO_OFFSET,
        bool &PID_1, bool &LAST_1, bool &FULL_1) volatile
    {
        uint32_t curr = EP3_IN_BUFFER_CONTROL;

        LENGTH_0 = (curr >> 0u) & 0b1111111111u;
        AVAILABLE_0 = curr & (1u << 10u);
        STALL = curr & (1u << 11u);
        RESET = curr & (1u << 12u);
        PID_0 = curr & (1u << 13u);
        LAST_0 = curr & (1u << 14u);
        FULL_0 = curr & (1u << 15u);
        LENGTH_1 = (curr >> 16u) & 0b1111111111u;
        AVAILABLE_1 = curr & (1u << 26u);
        DOUBLE_BUFFER_ISO_OFFSET =
            USBCTRL_DPRAM_EP3_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
                (curr >> 27u) & 0b11u);
        PID_1 = curr & (1u << 29u);
        LAST_1 = curr & (1u << 30u);
        FULL_1 = curr & (1u << 31u);
    }

    inline void set_EP3_IN_BUFFER_CONTROL(
        uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET,
        bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1,
        bool AVAILABLE_1,
        USBCTRL_DPRAM_EP3_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            DOUBLE_BUFFER_ISO_OFFSET,
        bool PID_1, bool LAST_1, bool FULL_1) volatile
    {
        uint32_t curr = EP3_IN_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (LENGTH_0 & 0b1111111111u) << 0u;
        curr &= ~(0b1u << 10u);
        curr |= (AVAILABLE_0 & 0b1u) << 10u;
        curr &= ~(0b1u << 11u);
        curr |= (STALL & 0b1u) << 11u;
        curr &= ~(0b1u << 12u);
        curr |= (RESET & 0b1u) << 12u;
        curr &= ~(0b1u << 13u);
        curr |= (PID_0 & 0b1u) << 13u;
        curr &= ~(0b1u << 14u);
        curr |= (LAST_0 & 0b1u) << 14u;
        curr &= ~(0b1u << 15u);
        curr |= (FULL_0 & 0b1u) << 15u;
        curr &= ~(0b1111111111u << 16u);
        curr |= (LENGTH_1 & 0b1111111111u) << 16u;
        curr &= ~(0b1u << 26u);
        curr |= (AVAILABLE_1 & 0b1u) << 26u;
        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(DOUBLE_BUFFER_ISO_OFFSET) & 0b11u) << 27u;
        curr &= ~(0b1u << 29u);
        curr |= (PID_1 & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (LAST_1 & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (FULL_1 & 0b1u) << 31u;

        EP3_IN_BUFFER_CONTROL = curr;
    }

    inline uint16_t get_EP3_OUT_BUFFER_CONTROL_LENGTH_0() volatile
    {
        return (EP3_OUT_BUFFER_CONTROL >> 0u) & 0b1111111111u;
    }

    inline void set_EP3_OUT_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile
    {
        uint32_t curr = EP3_OUT_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (value & 0b1111111111u) << 0u;

        EP3_OUT_BUFFER_CONTROL = curr;
    }

    inline bool get_EP3_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        return EP3_OUT_BUFFER_CONTROL & (1u << 10u);
    }

    inline void set_EP3_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP3_OUT_BUFFER_CONTROL |= 1u << 10u;
    }

    inline void clear_EP3_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP3_OUT_BUFFER_CONTROL &= ~(1u << 10u);
    }

    inline void toggle_EP3_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP3_OUT_BUFFER_CONTROL ^= 1u << 10u;
    }

    inline bool get_EP3_OUT_BUFFER_CONTROL_STALL() volatile
    {
        return EP3_OUT_BUFFER_CONTROL & (1u << 11u);
    }

    inline void set_EP3_OUT_BUFFER_CONTROL_STALL() volatile
    {
        EP3_OUT_BUFFER_CONTROL |= 1u << 11u;
    }

    inline void clear_EP3_OUT_BUFFER_CONTROL_STALL() volatile
    {
        EP3_OUT_BUFFER_CONTROL &= ~(1u << 11u);
    }

    inline void toggle_EP3_OUT_BUFFER_CONTROL_STALL() volatile
    {
        EP3_OUT_BUFFER_CONTROL ^= 1u << 11u;
    }

    inline bool get_EP3_OUT_BUFFER_CONTROL_RESET() volatile
    {
        return EP3_OUT_BUFFER_CONTROL & (1u << 12u);
    }

    inline void set_EP3_OUT_BUFFER_CONTROL_RESET() volatile
    {
        EP3_OUT_BUFFER_CONTROL |= 1u << 12u;
    }

    inline void clear_EP3_OUT_BUFFER_CONTROL_RESET() volatile
    {
        EP3_OUT_BUFFER_CONTROL &= ~(1u << 12u);
    }

    inline void toggle_EP3_OUT_BUFFER_CONTROL_RESET() volatile
    {
        EP3_OUT_BUFFER_CONTROL ^= 1u << 12u;
    }

    inline bool get_EP3_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        return EP3_OUT_BUFFER_CONTROL & (1u << 13u);
    }

    inline void set_EP3_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        EP3_OUT_BUFFER_CONTROL |= 1u << 13u;
    }

    inline void clear_EP3_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        EP3_OUT_BUFFER_CONTROL &= ~(1u << 13u);
    }

    inline void toggle_EP3_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        EP3_OUT_BUFFER_CONTROL ^= 1u << 13u;
    }

    inline bool get_EP3_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        return EP3_OUT_BUFFER_CONTROL & (1u << 14u);
    }

    inline void set_EP3_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        EP3_OUT_BUFFER_CONTROL |= 1u << 14u;
    }

    inline void clear_EP3_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        EP3_OUT_BUFFER_CONTROL &= ~(1u << 14u);
    }

    inline void toggle_EP3_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        EP3_OUT_BUFFER_CONTROL ^= 1u << 14u;
    }

    inline bool get_EP3_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        return EP3_OUT_BUFFER_CONTROL & (1u << 15u);
    }

    inline void set_EP3_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        EP3_OUT_BUFFER_CONTROL |= 1u << 15u;
    }

    inline void clear_EP3_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        EP3_OUT_BUFFER_CONTROL &= ~(1u << 15u);
    }

    inline void toggle_EP3_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        EP3_OUT_BUFFER_CONTROL ^= 1u << 15u;
    }

    inline uint16_t get_EP3_OUT_BUFFER_CONTROL_LENGTH_1() volatile
    {
        return (EP3_OUT_BUFFER_CONTROL >> 16u) & 0b1111111111u;
    }

    inline void set_EP3_OUT_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile
    {
        uint32_t curr = EP3_OUT_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 16u);
        curr |= (value & 0b1111111111u) << 16u;

        EP3_OUT_BUFFER_CONTROL = curr;
    }

    inline bool get_EP3_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        return EP3_OUT_BUFFER_CONTROL & (1u << 26u);
    }

    inline void set_EP3_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP3_OUT_BUFFER_CONTROL |= 1u << 26u;
    }

    inline void clear_EP3_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP3_OUT_BUFFER_CONTROL &= ~(1u << 26u);
    }

    inline void toggle_EP3_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP3_OUT_BUFFER_CONTROL ^= 1u << 26u;
    }

    inline USBCTRL_DPRAM_EP3_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
    get_EP3_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile
    {
        return USBCTRL_DPRAM_EP3_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
            (EP3_OUT_BUFFER_CONTROL >> 27u) & 0b11u);
    }

    inline void set_EP3_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
        USBCTRL_DPRAM_EP3_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            value) volatile
    {
        uint32_t curr = EP3_OUT_BUFFER_CONTROL;

        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(value) & 0b11u) << 27u;

        EP3_OUT_BUFFER_CONTROL = curr;
    }

    inline bool get_EP3_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        return EP3_OUT_BUFFER_CONTROL & (1u << 29u);
    }

    inline void set_EP3_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        EP3_OUT_BUFFER_CONTROL |= 1u << 29u;
    }

    inline void clear_EP3_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        EP3_OUT_BUFFER_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP3_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        EP3_OUT_BUFFER_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP3_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        return EP3_OUT_BUFFER_CONTROL & (1u << 30u);
    }

    inline void set_EP3_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        EP3_OUT_BUFFER_CONTROL |= 1u << 30u;
    }

    inline void clear_EP3_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        EP3_OUT_BUFFER_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP3_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        EP3_OUT_BUFFER_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP3_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        return EP3_OUT_BUFFER_CONTROL & (1u << 31u);
    }

    inline void set_EP3_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        EP3_OUT_BUFFER_CONTROL |= 1u << 31u;
    }

    inline void clear_EP3_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        EP3_OUT_BUFFER_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP3_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        EP3_OUT_BUFFER_CONTROL ^= 1u << 31u;
    }

    inline void get_EP3_OUT_BUFFER_CONTROL(
        uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET,
        bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1,
        bool &AVAILABLE_1,
        USBCTRL_DPRAM_EP3_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            &DOUBLE_BUFFER_ISO_OFFSET,
        bool &PID_1, bool &LAST_1, bool &FULL_1) volatile
    {
        uint32_t curr = EP3_OUT_BUFFER_CONTROL;

        LENGTH_0 = (curr >> 0u) & 0b1111111111u;
        AVAILABLE_0 = curr & (1u << 10u);
        STALL = curr & (1u << 11u);
        RESET = curr & (1u << 12u);
        PID_0 = curr & (1u << 13u);
        LAST_0 = curr & (1u << 14u);
        FULL_0 = curr & (1u << 15u);
        LENGTH_1 = (curr >> 16u) & 0b1111111111u;
        AVAILABLE_1 = curr & (1u << 26u);
        DOUBLE_BUFFER_ISO_OFFSET =
            USBCTRL_DPRAM_EP3_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
                (curr >> 27u) & 0b11u);
        PID_1 = curr & (1u << 29u);
        LAST_1 = curr & (1u << 30u);
        FULL_1 = curr & (1u << 31u);
    }

    inline void set_EP3_OUT_BUFFER_CONTROL(
        uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET,
        bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1,
        bool AVAILABLE_1,
        USBCTRL_DPRAM_EP3_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            DOUBLE_BUFFER_ISO_OFFSET,
        bool PID_1, bool LAST_1, bool FULL_1) volatile
    {
        uint32_t curr = EP3_OUT_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (LENGTH_0 & 0b1111111111u) << 0u;
        curr &= ~(0b1u << 10u);
        curr |= (AVAILABLE_0 & 0b1u) << 10u;
        curr &= ~(0b1u << 11u);
        curr |= (STALL & 0b1u) << 11u;
        curr &= ~(0b1u << 12u);
        curr |= (RESET & 0b1u) << 12u;
        curr &= ~(0b1u << 13u);
        curr |= (PID_0 & 0b1u) << 13u;
        curr &= ~(0b1u << 14u);
        curr |= (LAST_0 & 0b1u) << 14u;
        curr &= ~(0b1u << 15u);
        curr |= (FULL_0 & 0b1u) << 15u;
        curr &= ~(0b1111111111u << 16u);
        curr |= (LENGTH_1 & 0b1111111111u) << 16u;
        curr &= ~(0b1u << 26u);
        curr |= (AVAILABLE_1 & 0b1u) << 26u;
        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(DOUBLE_BUFFER_ISO_OFFSET) & 0b11u) << 27u;
        curr &= ~(0b1u << 29u);
        curr |= (PID_1 & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (LAST_1 & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (FULL_1 & 0b1u) << 31u;

        EP3_OUT_BUFFER_CONTROL = curr;
    }

    inline uint16_t get_EP4_IN_BUFFER_CONTROL_LENGTH_0() volatile
    {
        return (EP4_IN_BUFFER_CONTROL >> 0u) & 0b1111111111u;
    }

    inline void set_EP4_IN_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile
    {
        uint32_t curr = EP4_IN_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (value & 0b1111111111u) << 0u;

        EP4_IN_BUFFER_CONTROL = curr;
    }

    inline bool get_EP4_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        return EP4_IN_BUFFER_CONTROL & (1u << 10u);
    }

    inline void set_EP4_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP4_IN_BUFFER_CONTROL |= 1u << 10u;
    }

    inline void clear_EP4_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP4_IN_BUFFER_CONTROL &= ~(1u << 10u);
    }

    inline void toggle_EP4_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP4_IN_BUFFER_CONTROL ^= 1u << 10u;
    }

    inline bool get_EP4_IN_BUFFER_CONTROL_STALL() volatile
    {
        return EP4_IN_BUFFER_CONTROL & (1u << 11u);
    }

    inline void set_EP4_IN_BUFFER_CONTROL_STALL() volatile
    {
        EP4_IN_BUFFER_CONTROL |= 1u << 11u;
    }

    inline void clear_EP4_IN_BUFFER_CONTROL_STALL() volatile
    {
        EP4_IN_BUFFER_CONTROL &= ~(1u << 11u);
    }

    inline void toggle_EP4_IN_BUFFER_CONTROL_STALL() volatile
    {
        EP4_IN_BUFFER_CONTROL ^= 1u << 11u;
    }

    inline bool get_EP4_IN_BUFFER_CONTROL_RESET() volatile
    {
        return EP4_IN_BUFFER_CONTROL & (1u << 12u);
    }

    inline void set_EP4_IN_BUFFER_CONTROL_RESET() volatile
    {
        EP4_IN_BUFFER_CONTROL |= 1u << 12u;
    }

    inline void clear_EP4_IN_BUFFER_CONTROL_RESET() volatile
    {
        EP4_IN_BUFFER_CONTROL &= ~(1u << 12u);
    }

    inline void toggle_EP4_IN_BUFFER_CONTROL_RESET() volatile
    {
        EP4_IN_BUFFER_CONTROL ^= 1u << 12u;
    }

    inline bool get_EP4_IN_BUFFER_CONTROL_PID_0() volatile
    {
        return EP4_IN_BUFFER_CONTROL & (1u << 13u);
    }

    inline void set_EP4_IN_BUFFER_CONTROL_PID_0() volatile
    {
        EP4_IN_BUFFER_CONTROL |= 1u << 13u;
    }

    inline void clear_EP4_IN_BUFFER_CONTROL_PID_0() volatile
    {
        EP4_IN_BUFFER_CONTROL &= ~(1u << 13u);
    }

    inline void toggle_EP4_IN_BUFFER_CONTROL_PID_0() volatile
    {
        EP4_IN_BUFFER_CONTROL ^= 1u << 13u;
    }

    inline bool get_EP4_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        return EP4_IN_BUFFER_CONTROL & (1u << 14u);
    }

    inline void set_EP4_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        EP4_IN_BUFFER_CONTROL |= 1u << 14u;
    }

    inline void clear_EP4_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        EP4_IN_BUFFER_CONTROL &= ~(1u << 14u);
    }

    inline void toggle_EP4_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        EP4_IN_BUFFER_CONTROL ^= 1u << 14u;
    }

    inline bool get_EP4_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        return EP4_IN_BUFFER_CONTROL & (1u << 15u);
    }

    inline void set_EP4_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        EP4_IN_BUFFER_CONTROL |= 1u << 15u;
    }

    inline void clear_EP4_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        EP4_IN_BUFFER_CONTROL &= ~(1u << 15u);
    }

    inline void toggle_EP4_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        EP4_IN_BUFFER_CONTROL ^= 1u << 15u;
    }

    inline uint16_t get_EP4_IN_BUFFER_CONTROL_LENGTH_1() volatile
    {
        return (EP4_IN_BUFFER_CONTROL >> 16u) & 0b1111111111u;
    }

    inline void set_EP4_IN_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile
    {
        uint32_t curr = EP4_IN_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 16u);
        curr |= (value & 0b1111111111u) << 16u;

        EP4_IN_BUFFER_CONTROL = curr;
    }

    inline bool get_EP4_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        return EP4_IN_BUFFER_CONTROL & (1u << 26u);
    }

    inline void set_EP4_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP4_IN_BUFFER_CONTROL |= 1u << 26u;
    }

    inline void clear_EP4_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP4_IN_BUFFER_CONTROL &= ~(1u << 26u);
    }

    inline void toggle_EP4_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP4_IN_BUFFER_CONTROL ^= 1u << 26u;
    }

    inline USBCTRL_DPRAM_EP4_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
    get_EP4_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile
    {
        return USBCTRL_DPRAM_EP4_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
            (EP4_IN_BUFFER_CONTROL >> 27u) & 0b11u);
    }

    inline void set_EP4_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
        USBCTRL_DPRAM_EP4_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            value) volatile
    {
        uint32_t curr = EP4_IN_BUFFER_CONTROL;

        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(value) & 0b11u) << 27u;

        EP4_IN_BUFFER_CONTROL = curr;
    }

    inline bool get_EP4_IN_BUFFER_CONTROL_PID_1() volatile
    {
        return EP4_IN_BUFFER_CONTROL & (1u << 29u);
    }

    inline void set_EP4_IN_BUFFER_CONTROL_PID_1() volatile
    {
        EP4_IN_BUFFER_CONTROL |= 1u << 29u;
    }

    inline void clear_EP4_IN_BUFFER_CONTROL_PID_1() volatile
    {
        EP4_IN_BUFFER_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP4_IN_BUFFER_CONTROL_PID_1() volatile
    {
        EP4_IN_BUFFER_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP4_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        return EP4_IN_BUFFER_CONTROL & (1u << 30u);
    }

    inline void set_EP4_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        EP4_IN_BUFFER_CONTROL |= 1u << 30u;
    }

    inline void clear_EP4_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        EP4_IN_BUFFER_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP4_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        EP4_IN_BUFFER_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP4_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        return EP4_IN_BUFFER_CONTROL & (1u << 31u);
    }

    inline void set_EP4_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        EP4_IN_BUFFER_CONTROL |= 1u << 31u;
    }

    inline void clear_EP4_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        EP4_IN_BUFFER_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP4_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        EP4_IN_BUFFER_CONTROL ^= 1u << 31u;
    }

    inline void get_EP4_IN_BUFFER_CONTROL(
        uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET,
        bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1,
        bool &AVAILABLE_1,
        USBCTRL_DPRAM_EP4_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            &DOUBLE_BUFFER_ISO_OFFSET,
        bool &PID_1, bool &LAST_1, bool &FULL_1) volatile
    {
        uint32_t curr = EP4_IN_BUFFER_CONTROL;

        LENGTH_0 = (curr >> 0u) & 0b1111111111u;
        AVAILABLE_0 = curr & (1u << 10u);
        STALL = curr & (1u << 11u);
        RESET = curr & (1u << 12u);
        PID_0 = curr & (1u << 13u);
        LAST_0 = curr & (1u << 14u);
        FULL_0 = curr & (1u << 15u);
        LENGTH_1 = (curr >> 16u) & 0b1111111111u;
        AVAILABLE_1 = curr & (1u << 26u);
        DOUBLE_BUFFER_ISO_OFFSET =
            USBCTRL_DPRAM_EP4_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
                (curr >> 27u) & 0b11u);
        PID_1 = curr & (1u << 29u);
        LAST_1 = curr & (1u << 30u);
        FULL_1 = curr & (1u << 31u);
    }

    inline void set_EP4_IN_BUFFER_CONTROL(
        uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET,
        bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1,
        bool AVAILABLE_1,
        USBCTRL_DPRAM_EP4_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            DOUBLE_BUFFER_ISO_OFFSET,
        bool PID_1, bool LAST_1, bool FULL_1) volatile
    {
        uint32_t curr = EP4_IN_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (LENGTH_0 & 0b1111111111u) << 0u;
        curr &= ~(0b1u << 10u);
        curr |= (AVAILABLE_0 & 0b1u) << 10u;
        curr &= ~(0b1u << 11u);
        curr |= (STALL & 0b1u) << 11u;
        curr &= ~(0b1u << 12u);
        curr |= (RESET & 0b1u) << 12u;
        curr &= ~(0b1u << 13u);
        curr |= (PID_0 & 0b1u) << 13u;
        curr &= ~(0b1u << 14u);
        curr |= (LAST_0 & 0b1u) << 14u;
        curr &= ~(0b1u << 15u);
        curr |= (FULL_0 & 0b1u) << 15u;
        curr &= ~(0b1111111111u << 16u);
        curr |= (LENGTH_1 & 0b1111111111u) << 16u;
        curr &= ~(0b1u << 26u);
        curr |= (AVAILABLE_1 & 0b1u) << 26u;
        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(DOUBLE_BUFFER_ISO_OFFSET) & 0b11u) << 27u;
        curr &= ~(0b1u << 29u);
        curr |= (PID_1 & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (LAST_1 & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (FULL_1 & 0b1u) << 31u;

        EP4_IN_BUFFER_CONTROL = curr;
    }

    inline uint16_t get_EP4_OUT_BUFFER_CONTROL_LENGTH_0() volatile
    {
        return (EP4_OUT_BUFFER_CONTROL >> 0u) & 0b1111111111u;
    }

    inline void set_EP4_OUT_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile
    {
        uint32_t curr = EP4_OUT_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (value & 0b1111111111u) << 0u;

        EP4_OUT_BUFFER_CONTROL = curr;
    }

    inline bool get_EP4_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        return EP4_OUT_BUFFER_CONTROL & (1u << 10u);
    }

    inline void set_EP4_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP4_OUT_BUFFER_CONTROL |= 1u << 10u;
    }

    inline void clear_EP4_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP4_OUT_BUFFER_CONTROL &= ~(1u << 10u);
    }

    inline void toggle_EP4_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP4_OUT_BUFFER_CONTROL ^= 1u << 10u;
    }

    inline bool get_EP4_OUT_BUFFER_CONTROL_STALL() volatile
    {
        return EP4_OUT_BUFFER_CONTROL & (1u << 11u);
    }

    inline void set_EP4_OUT_BUFFER_CONTROL_STALL() volatile
    {
        EP4_OUT_BUFFER_CONTROL |= 1u << 11u;
    }

    inline void clear_EP4_OUT_BUFFER_CONTROL_STALL() volatile
    {
        EP4_OUT_BUFFER_CONTROL &= ~(1u << 11u);
    }

    inline void toggle_EP4_OUT_BUFFER_CONTROL_STALL() volatile
    {
        EP4_OUT_BUFFER_CONTROL ^= 1u << 11u;
    }

    inline bool get_EP4_OUT_BUFFER_CONTROL_RESET() volatile
    {
        return EP4_OUT_BUFFER_CONTROL & (1u << 12u);
    }

    inline void set_EP4_OUT_BUFFER_CONTROL_RESET() volatile
    {
        EP4_OUT_BUFFER_CONTROL |= 1u << 12u;
    }

    inline void clear_EP4_OUT_BUFFER_CONTROL_RESET() volatile
    {
        EP4_OUT_BUFFER_CONTROL &= ~(1u << 12u);
    }

    inline void toggle_EP4_OUT_BUFFER_CONTROL_RESET() volatile
    {
        EP4_OUT_BUFFER_CONTROL ^= 1u << 12u;
    }

    inline bool get_EP4_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        return EP4_OUT_BUFFER_CONTROL & (1u << 13u);
    }

    inline void set_EP4_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        EP4_OUT_BUFFER_CONTROL |= 1u << 13u;
    }

    inline void clear_EP4_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        EP4_OUT_BUFFER_CONTROL &= ~(1u << 13u);
    }

    inline void toggle_EP4_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        EP4_OUT_BUFFER_CONTROL ^= 1u << 13u;
    }

    inline bool get_EP4_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        return EP4_OUT_BUFFER_CONTROL & (1u << 14u);
    }

    inline void set_EP4_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        EP4_OUT_BUFFER_CONTROL |= 1u << 14u;
    }

    inline void clear_EP4_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        EP4_OUT_BUFFER_CONTROL &= ~(1u << 14u);
    }

    inline void toggle_EP4_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        EP4_OUT_BUFFER_CONTROL ^= 1u << 14u;
    }

    inline bool get_EP4_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        return EP4_OUT_BUFFER_CONTROL & (1u << 15u);
    }

    inline void set_EP4_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        EP4_OUT_BUFFER_CONTROL |= 1u << 15u;
    }

    inline void clear_EP4_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        EP4_OUT_BUFFER_CONTROL &= ~(1u << 15u);
    }

    inline void toggle_EP4_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        EP4_OUT_BUFFER_CONTROL ^= 1u << 15u;
    }

    inline uint16_t get_EP4_OUT_BUFFER_CONTROL_LENGTH_1() volatile
    {
        return (EP4_OUT_BUFFER_CONTROL >> 16u) & 0b1111111111u;
    }

    inline void set_EP4_OUT_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile
    {
        uint32_t curr = EP4_OUT_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 16u);
        curr |= (value & 0b1111111111u) << 16u;

        EP4_OUT_BUFFER_CONTROL = curr;
    }

    inline bool get_EP4_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        return EP4_OUT_BUFFER_CONTROL & (1u << 26u);
    }

    inline void set_EP4_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP4_OUT_BUFFER_CONTROL |= 1u << 26u;
    }

    inline void clear_EP4_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP4_OUT_BUFFER_CONTROL &= ~(1u << 26u);
    }

    inline void toggle_EP4_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP4_OUT_BUFFER_CONTROL ^= 1u << 26u;
    }

    inline USBCTRL_DPRAM_EP4_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
    get_EP4_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile
    {
        return USBCTRL_DPRAM_EP4_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
            (EP4_OUT_BUFFER_CONTROL >> 27u) & 0b11u);
    }

    inline void set_EP4_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
        USBCTRL_DPRAM_EP4_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            value) volatile
    {
        uint32_t curr = EP4_OUT_BUFFER_CONTROL;

        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(value) & 0b11u) << 27u;

        EP4_OUT_BUFFER_CONTROL = curr;
    }

    inline bool get_EP4_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        return EP4_OUT_BUFFER_CONTROL & (1u << 29u);
    }

    inline void set_EP4_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        EP4_OUT_BUFFER_CONTROL |= 1u << 29u;
    }

    inline void clear_EP4_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        EP4_OUT_BUFFER_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP4_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        EP4_OUT_BUFFER_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP4_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        return EP4_OUT_BUFFER_CONTROL & (1u << 30u);
    }

    inline void set_EP4_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        EP4_OUT_BUFFER_CONTROL |= 1u << 30u;
    }

    inline void clear_EP4_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        EP4_OUT_BUFFER_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP4_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        EP4_OUT_BUFFER_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP4_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        return EP4_OUT_BUFFER_CONTROL & (1u << 31u);
    }

    inline void set_EP4_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        EP4_OUT_BUFFER_CONTROL |= 1u << 31u;
    }

    inline void clear_EP4_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        EP4_OUT_BUFFER_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP4_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        EP4_OUT_BUFFER_CONTROL ^= 1u << 31u;
    }

    inline void get_EP4_OUT_BUFFER_CONTROL(
        uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET,
        bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1,
        bool &AVAILABLE_1,
        USBCTRL_DPRAM_EP4_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            &DOUBLE_BUFFER_ISO_OFFSET,
        bool &PID_1, bool &LAST_1, bool &FULL_1) volatile
    {
        uint32_t curr = EP4_OUT_BUFFER_CONTROL;

        LENGTH_0 = (curr >> 0u) & 0b1111111111u;
        AVAILABLE_0 = curr & (1u << 10u);
        STALL = curr & (1u << 11u);
        RESET = curr & (1u << 12u);
        PID_0 = curr & (1u << 13u);
        LAST_0 = curr & (1u << 14u);
        FULL_0 = curr & (1u << 15u);
        LENGTH_1 = (curr >> 16u) & 0b1111111111u;
        AVAILABLE_1 = curr & (1u << 26u);
        DOUBLE_BUFFER_ISO_OFFSET =
            USBCTRL_DPRAM_EP4_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
                (curr >> 27u) & 0b11u);
        PID_1 = curr & (1u << 29u);
        LAST_1 = curr & (1u << 30u);
        FULL_1 = curr & (1u << 31u);
    }

    inline void set_EP4_OUT_BUFFER_CONTROL(
        uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET,
        bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1,
        bool AVAILABLE_1,
        USBCTRL_DPRAM_EP4_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            DOUBLE_BUFFER_ISO_OFFSET,
        bool PID_1, bool LAST_1, bool FULL_1) volatile
    {
        uint32_t curr = EP4_OUT_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (LENGTH_0 & 0b1111111111u) << 0u;
        curr &= ~(0b1u << 10u);
        curr |= (AVAILABLE_0 & 0b1u) << 10u;
        curr &= ~(0b1u << 11u);
        curr |= (STALL & 0b1u) << 11u;
        curr &= ~(0b1u << 12u);
        curr |= (RESET & 0b1u) << 12u;
        curr &= ~(0b1u << 13u);
        curr |= (PID_0 & 0b1u) << 13u;
        curr &= ~(0b1u << 14u);
        curr |= (LAST_0 & 0b1u) << 14u;
        curr &= ~(0b1u << 15u);
        curr |= (FULL_0 & 0b1u) << 15u;
        curr &= ~(0b1111111111u << 16u);
        curr |= (LENGTH_1 & 0b1111111111u) << 16u;
        curr &= ~(0b1u << 26u);
        curr |= (AVAILABLE_1 & 0b1u) << 26u;
        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(DOUBLE_BUFFER_ISO_OFFSET) & 0b11u) << 27u;
        curr &= ~(0b1u << 29u);
        curr |= (PID_1 & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (LAST_1 & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (FULL_1 & 0b1u) << 31u;

        EP4_OUT_BUFFER_CONTROL = curr;
    }

    inline uint16_t get_EP5_IN_BUFFER_CONTROL_LENGTH_0() volatile
    {
        return (EP5_IN_BUFFER_CONTROL >> 0u) & 0b1111111111u;
    }

    inline void set_EP5_IN_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile
    {
        uint32_t curr = EP5_IN_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (value & 0b1111111111u) << 0u;

        EP5_IN_BUFFER_CONTROL = curr;
    }

    inline bool get_EP5_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        return EP5_IN_BUFFER_CONTROL & (1u << 10u);
    }

    inline void set_EP5_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP5_IN_BUFFER_CONTROL |= 1u << 10u;
    }

    inline void clear_EP5_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP5_IN_BUFFER_CONTROL &= ~(1u << 10u);
    }

    inline void toggle_EP5_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP5_IN_BUFFER_CONTROL ^= 1u << 10u;
    }

    inline bool get_EP5_IN_BUFFER_CONTROL_STALL() volatile
    {
        return EP5_IN_BUFFER_CONTROL & (1u << 11u);
    }

    inline void set_EP5_IN_BUFFER_CONTROL_STALL() volatile
    {
        EP5_IN_BUFFER_CONTROL |= 1u << 11u;
    }

    inline void clear_EP5_IN_BUFFER_CONTROL_STALL() volatile
    {
        EP5_IN_BUFFER_CONTROL &= ~(1u << 11u);
    }

    inline void toggle_EP5_IN_BUFFER_CONTROL_STALL() volatile
    {
        EP5_IN_BUFFER_CONTROL ^= 1u << 11u;
    }

    inline bool get_EP5_IN_BUFFER_CONTROL_RESET() volatile
    {
        return EP5_IN_BUFFER_CONTROL & (1u << 12u);
    }

    inline void set_EP5_IN_BUFFER_CONTROL_RESET() volatile
    {
        EP5_IN_BUFFER_CONTROL |= 1u << 12u;
    }

    inline void clear_EP5_IN_BUFFER_CONTROL_RESET() volatile
    {
        EP5_IN_BUFFER_CONTROL &= ~(1u << 12u);
    }

    inline void toggle_EP5_IN_BUFFER_CONTROL_RESET() volatile
    {
        EP5_IN_BUFFER_CONTROL ^= 1u << 12u;
    }

    inline bool get_EP5_IN_BUFFER_CONTROL_PID_0() volatile
    {
        return EP5_IN_BUFFER_CONTROL & (1u << 13u);
    }

    inline void set_EP5_IN_BUFFER_CONTROL_PID_0() volatile
    {
        EP5_IN_BUFFER_CONTROL |= 1u << 13u;
    }

    inline void clear_EP5_IN_BUFFER_CONTROL_PID_0() volatile
    {
        EP5_IN_BUFFER_CONTROL &= ~(1u << 13u);
    }

    inline void toggle_EP5_IN_BUFFER_CONTROL_PID_0() volatile
    {
        EP5_IN_BUFFER_CONTROL ^= 1u << 13u;
    }

    inline bool get_EP5_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        return EP5_IN_BUFFER_CONTROL & (1u << 14u);
    }

    inline void set_EP5_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        EP5_IN_BUFFER_CONTROL |= 1u << 14u;
    }

    inline void clear_EP5_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        EP5_IN_BUFFER_CONTROL &= ~(1u << 14u);
    }

    inline void toggle_EP5_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        EP5_IN_BUFFER_CONTROL ^= 1u << 14u;
    }

    inline bool get_EP5_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        return EP5_IN_BUFFER_CONTROL & (1u << 15u);
    }

    inline void set_EP5_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        EP5_IN_BUFFER_CONTROL |= 1u << 15u;
    }

    inline void clear_EP5_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        EP5_IN_BUFFER_CONTROL &= ~(1u << 15u);
    }

    inline void toggle_EP5_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        EP5_IN_BUFFER_CONTROL ^= 1u << 15u;
    }

    inline uint16_t get_EP5_IN_BUFFER_CONTROL_LENGTH_1() volatile
    {
        return (EP5_IN_BUFFER_CONTROL >> 16u) & 0b1111111111u;
    }

    inline void set_EP5_IN_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile
    {
        uint32_t curr = EP5_IN_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 16u);
        curr |= (value & 0b1111111111u) << 16u;

        EP5_IN_BUFFER_CONTROL = curr;
    }

    inline bool get_EP5_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        return EP5_IN_BUFFER_CONTROL & (1u << 26u);
    }

    inline void set_EP5_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP5_IN_BUFFER_CONTROL |= 1u << 26u;
    }

    inline void clear_EP5_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP5_IN_BUFFER_CONTROL &= ~(1u << 26u);
    }

    inline void toggle_EP5_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP5_IN_BUFFER_CONTROL ^= 1u << 26u;
    }

    inline USBCTRL_DPRAM_EP5_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
    get_EP5_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile
    {
        return USBCTRL_DPRAM_EP5_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
            (EP5_IN_BUFFER_CONTROL >> 27u) & 0b11u);
    }

    inline void set_EP5_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
        USBCTRL_DPRAM_EP5_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            value) volatile
    {
        uint32_t curr = EP5_IN_BUFFER_CONTROL;

        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(value) & 0b11u) << 27u;

        EP5_IN_BUFFER_CONTROL = curr;
    }

    inline bool get_EP5_IN_BUFFER_CONTROL_PID_1() volatile
    {
        return EP5_IN_BUFFER_CONTROL & (1u << 29u);
    }

    inline void set_EP5_IN_BUFFER_CONTROL_PID_1() volatile
    {
        EP5_IN_BUFFER_CONTROL |= 1u << 29u;
    }

    inline void clear_EP5_IN_BUFFER_CONTROL_PID_1() volatile
    {
        EP5_IN_BUFFER_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP5_IN_BUFFER_CONTROL_PID_1() volatile
    {
        EP5_IN_BUFFER_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP5_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        return EP5_IN_BUFFER_CONTROL & (1u << 30u);
    }

    inline void set_EP5_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        EP5_IN_BUFFER_CONTROL |= 1u << 30u;
    }

    inline void clear_EP5_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        EP5_IN_BUFFER_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP5_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        EP5_IN_BUFFER_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP5_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        return EP5_IN_BUFFER_CONTROL & (1u << 31u);
    }

    inline void set_EP5_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        EP5_IN_BUFFER_CONTROL |= 1u << 31u;
    }

    inline void clear_EP5_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        EP5_IN_BUFFER_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP5_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        EP5_IN_BUFFER_CONTROL ^= 1u << 31u;
    }

    inline void get_EP5_IN_BUFFER_CONTROL(
        uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET,
        bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1,
        bool &AVAILABLE_1,
        USBCTRL_DPRAM_EP5_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            &DOUBLE_BUFFER_ISO_OFFSET,
        bool &PID_1, bool &LAST_1, bool &FULL_1) volatile
    {
        uint32_t curr = EP5_IN_BUFFER_CONTROL;

        LENGTH_0 = (curr >> 0u) & 0b1111111111u;
        AVAILABLE_0 = curr & (1u << 10u);
        STALL = curr & (1u << 11u);
        RESET = curr & (1u << 12u);
        PID_0 = curr & (1u << 13u);
        LAST_0 = curr & (1u << 14u);
        FULL_0 = curr & (1u << 15u);
        LENGTH_1 = (curr >> 16u) & 0b1111111111u;
        AVAILABLE_1 = curr & (1u << 26u);
        DOUBLE_BUFFER_ISO_OFFSET =
            USBCTRL_DPRAM_EP5_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
                (curr >> 27u) & 0b11u);
        PID_1 = curr & (1u << 29u);
        LAST_1 = curr & (1u << 30u);
        FULL_1 = curr & (1u << 31u);
    }

    inline void set_EP5_IN_BUFFER_CONTROL(
        uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET,
        bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1,
        bool AVAILABLE_1,
        USBCTRL_DPRAM_EP5_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            DOUBLE_BUFFER_ISO_OFFSET,
        bool PID_1, bool LAST_1, bool FULL_1) volatile
    {
        uint32_t curr = EP5_IN_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (LENGTH_0 & 0b1111111111u) << 0u;
        curr &= ~(0b1u << 10u);
        curr |= (AVAILABLE_0 & 0b1u) << 10u;
        curr &= ~(0b1u << 11u);
        curr |= (STALL & 0b1u) << 11u;
        curr &= ~(0b1u << 12u);
        curr |= (RESET & 0b1u) << 12u;
        curr &= ~(0b1u << 13u);
        curr |= (PID_0 & 0b1u) << 13u;
        curr &= ~(0b1u << 14u);
        curr |= (LAST_0 & 0b1u) << 14u;
        curr &= ~(0b1u << 15u);
        curr |= (FULL_0 & 0b1u) << 15u;
        curr &= ~(0b1111111111u << 16u);
        curr |= (LENGTH_1 & 0b1111111111u) << 16u;
        curr &= ~(0b1u << 26u);
        curr |= (AVAILABLE_1 & 0b1u) << 26u;
        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(DOUBLE_BUFFER_ISO_OFFSET) & 0b11u) << 27u;
        curr &= ~(0b1u << 29u);
        curr |= (PID_1 & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (LAST_1 & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (FULL_1 & 0b1u) << 31u;

        EP5_IN_BUFFER_CONTROL = curr;
    }

    inline uint16_t get_EP5_OUT_BUFFER_CONTROL_LENGTH_0() volatile
    {
        return (EP5_OUT_BUFFER_CONTROL >> 0u) & 0b1111111111u;
    }

    inline void set_EP5_OUT_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile
    {
        uint32_t curr = EP5_OUT_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (value & 0b1111111111u) << 0u;

        EP5_OUT_BUFFER_CONTROL = curr;
    }

    inline bool get_EP5_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        return EP5_OUT_BUFFER_CONTROL & (1u << 10u);
    }

    inline void set_EP5_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP5_OUT_BUFFER_CONTROL |= 1u << 10u;
    }

    inline void clear_EP5_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP5_OUT_BUFFER_CONTROL &= ~(1u << 10u);
    }

    inline void toggle_EP5_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP5_OUT_BUFFER_CONTROL ^= 1u << 10u;
    }

    inline bool get_EP5_OUT_BUFFER_CONTROL_STALL() volatile
    {
        return EP5_OUT_BUFFER_CONTROL & (1u << 11u);
    }

    inline void set_EP5_OUT_BUFFER_CONTROL_STALL() volatile
    {
        EP5_OUT_BUFFER_CONTROL |= 1u << 11u;
    }

    inline void clear_EP5_OUT_BUFFER_CONTROL_STALL() volatile
    {
        EP5_OUT_BUFFER_CONTROL &= ~(1u << 11u);
    }

    inline void toggle_EP5_OUT_BUFFER_CONTROL_STALL() volatile
    {
        EP5_OUT_BUFFER_CONTROL ^= 1u << 11u;
    }

    inline bool get_EP5_OUT_BUFFER_CONTROL_RESET() volatile
    {
        return EP5_OUT_BUFFER_CONTROL & (1u << 12u);
    }

    inline void set_EP5_OUT_BUFFER_CONTROL_RESET() volatile
    {
        EP5_OUT_BUFFER_CONTROL |= 1u << 12u;
    }

    inline void clear_EP5_OUT_BUFFER_CONTROL_RESET() volatile
    {
        EP5_OUT_BUFFER_CONTROL &= ~(1u << 12u);
    }

    inline void toggle_EP5_OUT_BUFFER_CONTROL_RESET() volatile
    {
        EP5_OUT_BUFFER_CONTROL ^= 1u << 12u;
    }

    inline bool get_EP5_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        return EP5_OUT_BUFFER_CONTROL & (1u << 13u);
    }

    inline void set_EP5_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        EP5_OUT_BUFFER_CONTROL |= 1u << 13u;
    }

    inline void clear_EP5_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        EP5_OUT_BUFFER_CONTROL &= ~(1u << 13u);
    }

    inline void toggle_EP5_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        EP5_OUT_BUFFER_CONTROL ^= 1u << 13u;
    }

    inline bool get_EP5_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        return EP5_OUT_BUFFER_CONTROL & (1u << 14u);
    }

    inline void set_EP5_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        EP5_OUT_BUFFER_CONTROL |= 1u << 14u;
    }

    inline void clear_EP5_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        EP5_OUT_BUFFER_CONTROL &= ~(1u << 14u);
    }

    inline void toggle_EP5_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        EP5_OUT_BUFFER_CONTROL ^= 1u << 14u;
    }

    inline bool get_EP5_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        return EP5_OUT_BUFFER_CONTROL & (1u << 15u);
    }

    inline void set_EP5_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        EP5_OUT_BUFFER_CONTROL |= 1u << 15u;
    }

    inline void clear_EP5_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        EP5_OUT_BUFFER_CONTROL &= ~(1u << 15u);
    }

    inline void toggle_EP5_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        EP5_OUT_BUFFER_CONTROL ^= 1u << 15u;
    }

    inline uint16_t get_EP5_OUT_BUFFER_CONTROL_LENGTH_1() volatile
    {
        return (EP5_OUT_BUFFER_CONTROL >> 16u) & 0b1111111111u;
    }

    inline void set_EP5_OUT_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile
    {
        uint32_t curr = EP5_OUT_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 16u);
        curr |= (value & 0b1111111111u) << 16u;

        EP5_OUT_BUFFER_CONTROL = curr;
    }

    inline bool get_EP5_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        return EP5_OUT_BUFFER_CONTROL & (1u << 26u);
    }

    inline void set_EP5_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP5_OUT_BUFFER_CONTROL |= 1u << 26u;
    }

    inline void clear_EP5_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP5_OUT_BUFFER_CONTROL &= ~(1u << 26u);
    }

    inline void toggle_EP5_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP5_OUT_BUFFER_CONTROL ^= 1u << 26u;
    }

    inline USBCTRL_DPRAM_EP5_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
    get_EP5_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile
    {
        return USBCTRL_DPRAM_EP5_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
            (EP5_OUT_BUFFER_CONTROL >> 27u) & 0b11u);
    }

    inline void set_EP5_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
        USBCTRL_DPRAM_EP5_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            value) volatile
    {
        uint32_t curr = EP5_OUT_BUFFER_CONTROL;

        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(value) & 0b11u) << 27u;

        EP5_OUT_BUFFER_CONTROL = curr;
    }

    inline bool get_EP5_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        return EP5_OUT_BUFFER_CONTROL & (1u << 29u);
    }

    inline void set_EP5_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        EP5_OUT_BUFFER_CONTROL |= 1u << 29u;
    }

    inline void clear_EP5_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        EP5_OUT_BUFFER_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP5_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        EP5_OUT_BUFFER_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP5_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        return EP5_OUT_BUFFER_CONTROL & (1u << 30u);
    }

    inline void set_EP5_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        EP5_OUT_BUFFER_CONTROL |= 1u << 30u;
    }

    inline void clear_EP5_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        EP5_OUT_BUFFER_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP5_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        EP5_OUT_BUFFER_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP5_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        return EP5_OUT_BUFFER_CONTROL & (1u << 31u);
    }

    inline void set_EP5_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        EP5_OUT_BUFFER_CONTROL |= 1u << 31u;
    }

    inline void clear_EP5_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        EP5_OUT_BUFFER_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP5_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        EP5_OUT_BUFFER_CONTROL ^= 1u << 31u;
    }

    inline void get_EP5_OUT_BUFFER_CONTROL(
        uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET,
        bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1,
        bool &AVAILABLE_1,
        USBCTRL_DPRAM_EP5_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            &DOUBLE_BUFFER_ISO_OFFSET,
        bool &PID_1, bool &LAST_1, bool &FULL_1) volatile
    {
        uint32_t curr = EP5_OUT_BUFFER_CONTROL;

        LENGTH_0 = (curr >> 0u) & 0b1111111111u;
        AVAILABLE_0 = curr & (1u << 10u);
        STALL = curr & (1u << 11u);
        RESET = curr & (1u << 12u);
        PID_0 = curr & (1u << 13u);
        LAST_0 = curr & (1u << 14u);
        FULL_0 = curr & (1u << 15u);
        LENGTH_1 = (curr >> 16u) & 0b1111111111u;
        AVAILABLE_1 = curr & (1u << 26u);
        DOUBLE_BUFFER_ISO_OFFSET =
            USBCTRL_DPRAM_EP5_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
                (curr >> 27u) & 0b11u);
        PID_1 = curr & (1u << 29u);
        LAST_1 = curr & (1u << 30u);
        FULL_1 = curr & (1u << 31u);
    }

    inline void set_EP5_OUT_BUFFER_CONTROL(
        uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET,
        bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1,
        bool AVAILABLE_1,
        USBCTRL_DPRAM_EP5_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            DOUBLE_BUFFER_ISO_OFFSET,
        bool PID_1, bool LAST_1, bool FULL_1) volatile
    {
        uint32_t curr = EP5_OUT_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (LENGTH_0 & 0b1111111111u) << 0u;
        curr &= ~(0b1u << 10u);
        curr |= (AVAILABLE_0 & 0b1u) << 10u;
        curr &= ~(0b1u << 11u);
        curr |= (STALL & 0b1u) << 11u;
        curr &= ~(0b1u << 12u);
        curr |= (RESET & 0b1u) << 12u;
        curr &= ~(0b1u << 13u);
        curr |= (PID_0 & 0b1u) << 13u;
        curr &= ~(0b1u << 14u);
        curr |= (LAST_0 & 0b1u) << 14u;
        curr &= ~(0b1u << 15u);
        curr |= (FULL_0 & 0b1u) << 15u;
        curr &= ~(0b1111111111u << 16u);
        curr |= (LENGTH_1 & 0b1111111111u) << 16u;
        curr &= ~(0b1u << 26u);
        curr |= (AVAILABLE_1 & 0b1u) << 26u;
        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(DOUBLE_BUFFER_ISO_OFFSET) & 0b11u) << 27u;
        curr &= ~(0b1u << 29u);
        curr |= (PID_1 & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (LAST_1 & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (FULL_1 & 0b1u) << 31u;

        EP5_OUT_BUFFER_CONTROL = curr;
    }

    inline uint16_t get_EP6_IN_BUFFER_CONTROL_LENGTH_0() volatile
    {
        return (EP6_IN_BUFFER_CONTROL >> 0u) & 0b1111111111u;
    }

    inline void set_EP6_IN_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile
    {
        uint32_t curr = EP6_IN_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (value & 0b1111111111u) << 0u;

        EP6_IN_BUFFER_CONTROL = curr;
    }

    inline bool get_EP6_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        return EP6_IN_BUFFER_CONTROL & (1u << 10u);
    }

    inline void set_EP6_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP6_IN_BUFFER_CONTROL |= 1u << 10u;
    }

    inline void clear_EP6_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP6_IN_BUFFER_CONTROL &= ~(1u << 10u);
    }

    inline void toggle_EP6_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP6_IN_BUFFER_CONTROL ^= 1u << 10u;
    }

    inline bool get_EP6_IN_BUFFER_CONTROL_STALL() volatile
    {
        return EP6_IN_BUFFER_CONTROL & (1u << 11u);
    }

    inline void set_EP6_IN_BUFFER_CONTROL_STALL() volatile
    {
        EP6_IN_BUFFER_CONTROL |= 1u << 11u;
    }

    inline void clear_EP6_IN_BUFFER_CONTROL_STALL() volatile
    {
        EP6_IN_BUFFER_CONTROL &= ~(1u << 11u);
    }

    inline void toggle_EP6_IN_BUFFER_CONTROL_STALL() volatile
    {
        EP6_IN_BUFFER_CONTROL ^= 1u << 11u;
    }

    inline bool get_EP6_IN_BUFFER_CONTROL_RESET() volatile
    {
        return EP6_IN_BUFFER_CONTROL & (1u << 12u);
    }

    inline void set_EP6_IN_BUFFER_CONTROL_RESET() volatile
    {
        EP6_IN_BUFFER_CONTROL |= 1u << 12u;
    }

    inline void clear_EP6_IN_BUFFER_CONTROL_RESET() volatile
    {
        EP6_IN_BUFFER_CONTROL &= ~(1u << 12u);
    }

    inline void toggle_EP6_IN_BUFFER_CONTROL_RESET() volatile
    {
        EP6_IN_BUFFER_CONTROL ^= 1u << 12u;
    }

    inline bool get_EP6_IN_BUFFER_CONTROL_PID_0() volatile
    {
        return EP6_IN_BUFFER_CONTROL & (1u << 13u);
    }

    inline void set_EP6_IN_BUFFER_CONTROL_PID_0() volatile
    {
        EP6_IN_BUFFER_CONTROL |= 1u << 13u;
    }

    inline void clear_EP6_IN_BUFFER_CONTROL_PID_0() volatile
    {
        EP6_IN_BUFFER_CONTROL &= ~(1u << 13u);
    }

    inline void toggle_EP6_IN_BUFFER_CONTROL_PID_0() volatile
    {
        EP6_IN_BUFFER_CONTROL ^= 1u << 13u;
    }

    inline bool get_EP6_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        return EP6_IN_BUFFER_CONTROL & (1u << 14u);
    }

    inline void set_EP6_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        EP6_IN_BUFFER_CONTROL |= 1u << 14u;
    }

    inline void clear_EP6_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        EP6_IN_BUFFER_CONTROL &= ~(1u << 14u);
    }

    inline void toggle_EP6_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        EP6_IN_BUFFER_CONTROL ^= 1u << 14u;
    }

    inline bool get_EP6_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        return EP6_IN_BUFFER_CONTROL & (1u << 15u);
    }

    inline void set_EP6_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        EP6_IN_BUFFER_CONTROL |= 1u << 15u;
    }

    inline void clear_EP6_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        EP6_IN_BUFFER_CONTROL &= ~(1u << 15u);
    }

    inline void toggle_EP6_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        EP6_IN_BUFFER_CONTROL ^= 1u << 15u;
    }

    inline uint16_t get_EP6_IN_BUFFER_CONTROL_LENGTH_1() volatile
    {
        return (EP6_IN_BUFFER_CONTROL >> 16u) & 0b1111111111u;
    }

    inline void set_EP6_IN_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile
    {
        uint32_t curr = EP6_IN_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 16u);
        curr |= (value & 0b1111111111u) << 16u;

        EP6_IN_BUFFER_CONTROL = curr;
    }

    inline bool get_EP6_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        return EP6_IN_BUFFER_CONTROL & (1u << 26u);
    }

    inline void set_EP6_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP6_IN_BUFFER_CONTROL |= 1u << 26u;
    }

    inline void clear_EP6_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP6_IN_BUFFER_CONTROL &= ~(1u << 26u);
    }

    inline void toggle_EP6_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP6_IN_BUFFER_CONTROL ^= 1u << 26u;
    }

    inline USBCTRL_DPRAM_EP6_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
    get_EP6_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile
    {
        return USBCTRL_DPRAM_EP6_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
            (EP6_IN_BUFFER_CONTROL >> 27u) & 0b11u);
    }

    inline void set_EP6_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
        USBCTRL_DPRAM_EP6_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            value) volatile
    {
        uint32_t curr = EP6_IN_BUFFER_CONTROL;

        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(value) & 0b11u) << 27u;

        EP6_IN_BUFFER_CONTROL = curr;
    }

    inline bool get_EP6_IN_BUFFER_CONTROL_PID_1() volatile
    {
        return EP6_IN_BUFFER_CONTROL & (1u << 29u);
    }

    inline void set_EP6_IN_BUFFER_CONTROL_PID_1() volatile
    {
        EP6_IN_BUFFER_CONTROL |= 1u << 29u;
    }

    inline void clear_EP6_IN_BUFFER_CONTROL_PID_1() volatile
    {
        EP6_IN_BUFFER_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP6_IN_BUFFER_CONTROL_PID_1() volatile
    {
        EP6_IN_BUFFER_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP6_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        return EP6_IN_BUFFER_CONTROL & (1u << 30u);
    }

    inline void set_EP6_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        EP6_IN_BUFFER_CONTROL |= 1u << 30u;
    }

    inline void clear_EP6_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        EP6_IN_BUFFER_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP6_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        EP6_IN_BUFFER_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP6_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        return EP6_IN_BUFFER_CONTROL & (1u << 31u);
    }

    inline void set_EP6_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        EP6_IN_BUFFER_CONTROL |= 1u << 31u;
    }

    inline void clear_EP6_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        EP6_IN_BUFFER_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP6_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        EP6_IN_BUFFER_CONTROL ^= 1u << 31u;
    }

    inline void get_EP6_IN_BUFFER_CONTROL(
        uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET,
        bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1,
        bool &AVAILABLE_1,
        USBCTRL_DPRAM_EP6_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            &DOUBLE_BUFFER_ISO_OFFSET,
        bool &PID_1, bool &LAST_1, bool &FULL_1) volatile
    {
        uint32_t curr = EP6_IN_BUFFER_CONTROL;

        LENGTH_0 = (curr >> 0u) & 0b1111111111u;
        AVAILABLE_0 = curr & (1u << 10u);
        STALL = curr & (1u << 11u);
        RESET = curr & (1u << 12u);
        PID_0 = curr & (1u << 13u);
        LAST_0 = curr & (1u << 14u);
        FULL_0 = curr & (1u << 15u);
        LENGTH_1 = (curr >> 16u) & 0b1111111111u;
        AVAILABLE_1 = curr & (1u << 26u);
        DOUBLE_BUFFER_ISO_OFFSET =
            USBCTRL_DPRAM_EP6_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
                (curr >> 27u) & 0b11u);
        PID_1 = curr & (1u << 29u);
        LAST_1 = curr & (1u << 30u);
        FULL_1 = curr & (1u << 31u);
    }

    inline void set_EP6_IN_BUFFER_CONTROL(
        uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET,
        bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1,
        bool AVAILABLE_1,
        USBCTRL_DPRAM_EP6_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            DOUBLE_BUFFER_ISO_OFFSET,
        bool PID_1, bool LAST_1, bool FULL_1) volatile
    {
        uint32_t curr = EP6_IN_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (LENGTH_0 & 0b1111111111u) << 0u;
        curr &= ~(0b1u << 10u);
        curr |= (AVAILABLE_0 & 0b1u) << 10u;
        curr &= ~(0b1u << 11u);
        curr |= (STALL & 0b1u) << 11u;
        curr &= ~(0b1u << 12u);
        curr |= (RESET & 0b1u) << 12u;
        curr &= ~(0b1u << 13u);
        curr |= (PID_0 & 0b1u) << 13u;
        curr &= ~(0b1u << 14u);
        curr |= (LAST_0 & 0b1u) << 14u;
        curr &= ~(0b1u << 15u);
        curr |= (FULL_0 & 0b1u) << 15u;
        curr &= ~(0b1111111111u << 16u);
        curr |= (LENGTH_1 & 0b1111111111u) << 16u;
        curr &= ~(0b1u << 26u);
        curr |= (AVAILABLE_1 & 0b1u) << 26u;
        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(DOUBLE_BUFFER_ISO_OFFSET) & 0b11u) << 27u;
        curr &= ~(0b1u << 29u);
        curr |= (PID_1 & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (LAST_1 & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (FULL_1 & 0b1u) << 31u;

        EP6_IN_BUFFER_CONTROL = curr;
    }

    inline uint16_t get_EP6_OUT_BUFFER_CONTROL_LENGTH_0() volatile
    {
        return (EP6_OUT_BUFFER_CONTROL >> 0u) & 0b1111111111u;
    }

    inline void set_EP6_OUT_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile
    {
        uint32_t curr = EP6_OUT_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (value & 0b1111111111u) << 0u;

        EP6_OUT_BUFFER_CONTROL = curr;
    }

    inline bool get_EP6_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        return EP6_OUT_BUFFER_CONTROL & (1u << 10u);
    }

    inline void set_EP6_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP6_OUT_BUFFER_CONTROL |= 1u << 10u;
    }

    inline void clear_EP6_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP6_OUT_BUFFER_CONTROL &= ~(1u << 10u);
    }

    inline void toggle_EP6_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP6_OUT_BUFFER_CONTROL ^= 1u << 10u;
    }

    inline bool get_EP6_OUT_BUFFER_CONTROL_STALL() volatile
    {
        return EP6_OUT_BUFFER_CONTROL & (1u << 11u);
    }

    inline void set_EP6_OUT_BUFFER_CONTROL_STALL() volatile
    {
        EP6_OUT_BUFFER_CONTROL |= 1u << 11u;
    }

    inline void clear_EP6_OUT_BUFFER_CONTROL_STALL() volatile
    {
        EP6_OUT_BUFFER_CONTROL &= ~(1u << 11u);
    }

    inline void toggle_EP6_OUT_BUFFER_CONTROL_STALL() volatile
    {
        EP6_OUT_BUFFER_CONTROL ^= 1u << 11u;
    }

    inline bool get_EP6_OUT_BUFFER_CONTROL_RESET() volatile
    {
        return EP6_OUT_BUFFER_CONTROL & (1u << 12u);
    }

    inline void set_EP6_OUT_BUFFER_CONTROL_RESET() volatile
    {
        EP6_OUT_BUFFER_CONTROL |= 1u << 12u;
    }

    inline void clear_EP6_OUT_BUFFER_CONTROL_RESET() volatile
    {
        EP6_OUT_BUFFER_CONTROL &= ~(1u << 12u);
    }

    inline void toggle_EP6_OUT_BUFFER_CONTROL_RESET() volatile
    {
        EP6_OUT_BUFFER_CONTROL ^= 1u << 12u;
    }

    inline bool get_EP6_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        return EP6_OUT_BUFFER_CONTROL & (1u << 13u);
    }

    inline void set_EP6_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        EP6_OUT_BUFFER_CONTROL |= 1u << 13u;
    }

    inline void clear_EP6_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        EP6_OUT_BUFFER_CONTROL &= ~(1u << 13u);
    }

    inline void toggle_EP6_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        EP6_OUT_BUFFER_CONTROL ^= 1u << 13u;
    }

    inline bool get_EP6_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        return EP6_OUT_BUFFER_CONTROL & (1u << 14u);
    }

    inline void set_EP6_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        EP6_OUT_BUFFER_CONTROL |= 1u << 14u;
    }

    inline void clear_EP6_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        EP6_OUT_BUFFER_CONTROL &= ~(1u << 14u);
    }

    inline void toggle_EP6_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        EP6_OUT_BUFFER_CONTROL ^= 1u << 14u;
    }

    inline bool get_EP6_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        return EP6_OUT_BUFFER_CONTROL & (1u << 15u);
    }

    inline void set_EP6_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        EP6_OUT_BUFFER_CONTROL |= 1u << 15u;
    }

    inline void clear_EP6_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        EP6_OUT_BUFFER_CONTROL &= ~(1u << 15u);
    }

    inline void toggle_EP6_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        EP6_OUT_BUFFER_CONTROL ^= 1u << 15u;
    }

    inline uint16_t get_EP6_OUT_BUFFER_CONTROL_LENGTH_1() volatile
    {
        return (EP6_OUT_BUFFER_CONTROL >> 16u) & 0b1111111111u;
    }

    inline void set_EP6_OUT_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile
    {
        uint32_t curr = EP6_OUT_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 16u);
        curr |= (value & 0b1111111111u) << 16u;

        EP6_OUT_BUFFER_CONTROL = curr;
    }

    inline bool get_EP6_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        return EP6_OUT_BUFFER_CONTROL & (1u << 26u);
    }

    inline void set_EP6_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP6_OUT_BUFFER_CONTROL |= 1u << 26u;
    }

    inline void clear_EP6_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP6_OUT_BUFFER_CONTROL &= ~(1u << 26u);
    }

    inline void toggle_EP6_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP6_OUT_BUFFER_CONTROL ^= 1u << 26u;
    }

    inline USBCTRL_DPRAM_EP6_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
    get_EP6_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile
    {
        return USBCTRL_DPRAM_EP6_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
            (EP6_OUT_BUFFER_CONTROL >> 27u) & 0b11u);
    }

    inline void set_EP6_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
        USBCTRL_DPRAM_EP6_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            value) volatile
    {
        uint32_t curr = EP6_OUT_BUFFER_CONTROL;

        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(value) & 0b11u) << 27u;

        EP6_OUT_BUFFER_CONTROL = curr;
    }

    inline bool get_EP6_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        return EP6_OUT_BUFFER_CONTROL & (1u << 29u);
    }

    inline void set_EP6_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        EP6_OUT_BUFFER_CONTROL |= 1u << 29u;
    }

    inline void clear_EP6_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        EP6_OUT_BUFFER_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP6_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        EP6_OUT_BUFFER_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP6_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        return EP6_OUT_BUFFER_CONTROL & (1u << 30u);
    }

    inline void set_EP6_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        EP6_OUT_BUFFER_CONTROL |= 1u << 30u;
    }

    inline void clear_EP6_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        EP6_OUT_BUFFER_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP6_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        EP6_OUT_BUFFER_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP6_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        return EP6_OUT_BUFFER_CONTROL & (1u << 31u);
    }

    inline void set_EP6_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        EP6_OUT_BUFFER_CONTROL |= 1u << 31u;
    }

    inline void clear_EP6_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        EP6_OUT_BUFFER_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP6_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        EP6_OUT_BUFFER_CONTROL ^= 1u << 31u;
    }

    inline void get_EP6_OUT_BUFFER_CONTROL(
        uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET,
        bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1,
        bool &AVAILABLE_1,
        USBCTRL_DPRAM_EP6_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            &DOUBLE_BUFFER_ISO_OFFSET,
        bool &PID_1, bool &LAST_1, bool &FULL_1) volatile
    {
        uint32_t curr = EP6_OUT_BUFFER_CONTROL;

        LENGTH_0 = (curr >> 0u) & 0b1111111111u;
        AVAILABLE_0 = curr & (1u << 10u);
        STALL = curr & (1u << 11u);
        RESET = curr & (1u << 12u);
        PID_0 = curr & (1u << 13u);
        LAST_0 = curr & (1u << 14u);
        FULL_0 = curr & (1u << 15u);
        LENGTH_1 = (curr >> 16u) & 0b1111111111u;
        AVAILABLE_1 = curr & (1u << 26u);
        DOUBLE_BUFFER_ISO_OFFSET =
            USBCTRL_DPRAM_EP6_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
                (curr >> 27u) & 0b11u);
        PID_1 = curr & (1u << 29u);
        LAST_1 = curr & (1u << 30u);
        FULL_1 = curr & (1u << 31u);
    }

    inline void set_EP6_OUT_BUFFER_CONTROL(
        uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET,
        bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1,
        bool AVAILABLE_1,
        USBCTRL_DPRAM_EP6_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            DOUBLE_BUFFER_ISO_OFFSET,
        bool PID_1, bool LAST_1, bool FULL_1) volatile
    {
        uint32_t curr = EP6_OUT_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (LENGTH_0 & 0b1111111111u) << 0u;
        curr &= ~(0b1u << 10u);
        curr |= (AVAILABLE_0 & 0b1u) << 10u;
        curr &= ~(0b1u << 11u);
        curr |= (STALL & 0b1u) << 11u;
        curr &= ~(0b1u << 12u);
        curr |= (RESET & 0b1u) << 12u;
        curr &= ~(0b1u << 13u);
        curr |= (PID_0 & 0b1u) << 13u;
        curr &= ~(0b1u << 14u);
        curr |= (LAST_0 & 0b1u) << 14u;
        curr &= ~(0b1u << 15u);
        curr |= (FULL_0 & 0b1u) << 15u;
        curr &= ~(0b1111111111u << 16u);
        curr |= (LENGTH_1 & 0b1111111111u) << 16u;
        curr &= ~(0b1u << 26u);
        curr |= (AVAILABLE_1 & 0b1u) << 26u;
        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(DOUBLE_BUFFER_ISO_OFFSET) & 0b11u) << 27u;
        curr &= ~(0b1u << 29u);
        curr |= (PID_1 & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (LAST_1 & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (FULL_1 & 0b1u) << 31u;

        EP6_OUT_BUFFER_CONTROL = curr;
    }

    inline uint16_t get_EP7_IN_BUFFER_CONTROL_LENGTH_0() volatile
    {
        return (EP7_IN_BUFFER_CONTROL >> 0u) & 0b1111111111u;
    }

    inline void set_EP7_IN_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile
    {
        uint32_t curr = EP7_IN_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (value & 0b1111111111u) << 0u;

        EP7_IN_BUFFER_CONTROL = curr;
    }

    inline bool get_EP7_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        return EP7_IN_BUFFER_CONTROL & (1u << 10u);
    }

    inline void set_EP7_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP7_IN_BUFFER_CONTROL |= 1u << 10u;
    }

    inline void clear_EP7_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP7_IN_BUFFER_CONTROL &= ~(1u << 10u);
    }

    inline void toggle_EP7_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP7_IN_BUFFER_CONTROL ^= 1u << 10u;
    }

    inline bool get_EP7_IN_BUFFER_CONTROL_STALL() volatile
    {
        return EP7_IN_BUFFER_CONTROL & (1u << 11u);
    }

    inline void set_EP7_IN_BUFFER_CONTROL_STALL() volatile
    {
        EP7_IN_BUFFER_CONTROL |= 1u << 11u;
    }

    inline void clear_EP7_IN_BUFFER_CONTROL_STALL() volatile
    {
        EP7_IN_BUFFER_CONTROL &= ~(1u << 11u);
    }

    inline void toggle_EP7_IN_BUFFER_CONTROL_STALL() volatile
    {
        EP7_IN_BUFFER_CONTROL ^= 1u << 11u;
    }

    inline bool get_EP7_IN_BUFFER_CONTROL_RESET() volatile
    {
        return EP7_IN_BUFFER_CONTROL & (1u << 12u);
    }

    inline void set_EP7_IN_BUFFER_CONTROL_RESET() volatile
    {
        EP7_IN_BUFFER_CONTROL |= 1u << 12u;
    }

    inline void clear_EP7_IN_BUFFER_CONTROL_RESET() volatile
    {
        EP7_IN_BUFFER_CONTROL &= ~(1u << 12u);
    }

    inline void toggle_EP7_IN_BUFFER_CONTROL_RESET() volatile
    {
        EP7_IN_BUFFER_CONTROL ^= 1u << 12u;
    }

    inline bool get_EP7_IN_BUFFER_CONTROL_PID_0() volatile
    {
        return EP7_IN_BUFFER_CONTROL & (1u << 13u);
    }

    inline void set_EP7_IN_BUFFER_CONTROL_PID_0() volatile
    {
        EP7_IN_BUFFER_CONTROL |= 1u << 13u;
    }

    inline void clear_EP7_IN_BUFFER_CONTROL_PID_0() volatile
    {
        EP7_IN_BUFFER_CONTROL &= ~(1u << 13u);
    }

    inline void toggle_EP7_IN_BUFFER_CONTROL_PID_0() volatile
    {
        EP7_IN_BUFFER_CONTROL ^= 1u << 13u;
    }

    inline bool get_EP7_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        return EP7_IN_BUFFER_CONTROL & (1u << 14u);
    }

    inline void set_EP7_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        EP7_IN_BUFFER_CONTROL |= 1u << 14u;
    }

    inline void clear_EP7_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        EP7_IN_BUFFER_CONTROL &= ~(1u << 14u);
    }

    inline void toggle_EP7_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        EP7_IN_BUFFER_CONTROL ^= 1u << 14u;
    }

    inline bool get_EP7_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        return EP7_IN_BUFFER_CONTROL & (1u << 15u);
    }

    inline void set_EP7_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        EP7_IN_BUFFER_CONTROL |= 1u << 15u;
    }

    inline void clear_EP7_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        EP7_IN_BUFFER_CONTROL &= ~(1u << 15u);
    }

    inline void toggle_EP7_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        EP7_IN_BUFFER_CONTROL ^= 1u << 15u;
    }

    inline uint16_t get_EP7_IN_BUFFER_CONTROL_LENGTH_1() volatile
    {
        return (EP7_IN_BUFFER_CONTROL >> 16u) & 0b1111111111u;
    }

    inline void set_EP7_IN_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile
    {
        uint32_t curr = EP7_IN_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 16u);
        curr |= (value & 0b1111111111u) << 16u;

        EP7_IN_BUFFER_CONTROL = curr;
    }

    inline bool get_EP7_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        return EP7_IN_BUFFER_CONTROL & (1u << 26u);
    }

    inline void set_EP7_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP7_IN_BUFFER_CONTROL |= 1u << 26u;
    }

    inline void clear_EP7_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP7_IN_BUFFER_CONTROL &= ~(1u << 26u);
    }

    inline void toggle_EP7_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP7_IN_BUFFER_CONTROL ^= 1u << 26u;
    }

    inline USBCTRL_DPRAM_EP7_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
    get_EP7_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile
    {
        return USBCTRL_DPRAM_EP7_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
            (EP7_IN_BUFFER_CONTROL >> 27u) & 0b11u);
    }

    inline void set_EP7_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
        USBCTRL_DPRAM_EP7_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            value) volatile
    {
        uint32_t curr = EP7_IN_BUFFER_CONTROL;

        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(value) & 0b11u) << 27u;

        EP7_IN_BUFFER_CONTROL = curr;
    }

    inline bool get_EP7_IN_BUFFER_CONTROL_PID_1() volatile
    {
        return EP7_IN_BUFFER_CONTROL & (1u << 29u);
    }

    inline void set_EP7_IN_BUFFER_CONTROL_PID_1() volatile
    {
        EP7_IN_BUFFER_CONTROL |= 1u << 29u;
    }

    inline void clear_EP7_IN_BUFFER_CONTROL_PID_1() volatile
    {
        EP7_IN_BUFFER_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP7_IN_BUFFER_CONTROL_PID_1() volatile
    {
        EP7_IN_BUFFER_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP7_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        return EP7_IN_BUFFER_CONTROL & (1u << 30u);
    }

    inline void set_EP7_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        EP7_IN_BUFFER_CONTROL |= 1u << 30u;
    }

    inline void clear_EP7_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        EP7_IN_BUFFER_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP7_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        EP7_IN_BUFFER_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP7_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        return EP7_IN_BUFFER_CONTROL & (1u << 31u);
    }

    inline void set_EP7_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        EP7_IN_BUFFER_CONTROL |= 1u << 31u;
    }

    inline void clear_EP7_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        EP7_IN_BUFFER_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP7_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        EP7_IN_BUFFER_CONTROL ^= 1u << 31u;
    }

    inline void get_EP7_IN_BUFFER_CONTROL(
        uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET,
        bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1,
        bool &AVAILABLE_1,
        USBCTRL_DPRAM_EP7_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            &DOUBLE_BUFFER_ISO_OFFSET,
        bool &PID_1, bool &LAST_1, bool &FULL_1) volatile
    {
        uint32_t curr = EP7_IN_BUFFER_CONTROL;

        LENGTH_0 = (curr >> 0u) & 0b1111111111u;
        AVAILABLE_0 = curr & (1u << 10u);
        STALL = curr & (1u << 11u);
        RESET = curr & (1u << 12u);
        PID_0 = curr & (1u << 13u);
        LAST_0 = curr & (1u << 14u);
        FULL_0 = curr & (1u << 15u);
        LENGTH_1 = (curr >> 16u) & 0b1111111111u;
        AVAILABLE_1 = curr & (1u << 26u);
        DOUBLE_BUFFER_ISO_OFFSET =
            USBCTRL_DPRAM_EP7_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
                (curr >> 27u) & 0b11u);
        PID_1 = curr & (1u << 29u);
        LAST_1 = curr & (1u << 30u);
        FULL_1 = curr & (1u << 31u);
    }

    inline void set_EP7_IN_BUFFER_CONTROL(
        uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET,
        bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1,
        bool AVAILABLE_1,
        USBCTRL_DPRAM_EP7_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            DOUBLE_BUFFER_ISO_OFFSET,
        bool PID_1, bool LAST_1, bool FULL_1) volatile
    {
        uint32_t curr = EP7_IN_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (LENGTH_0 & 0b1111111111u) << 0u;
        curr &= ~(0b1u << 10u);
        curr |= (AVAILABLE_0 & 0b1u) << 10u;
        curr &= ~(0b1u << 11u);
        curr |= (STALL & 0b1u) << 11u;
        curr &= ~(0b1u << 12u);
        curr |= (RESET & 0b1u) << 12u;
        curr &= ~(0b1u << 13u);
        curr |= (PID_0 & 0b1u) << 13u;
        curr &= ~(0b1u << 14u);
        curr |= (LAST_0 & 0b1u) << 14u;
        curr &= ~(0b1u << 15u);
        curr |= (FULL_0 & 0b1u) << 15u;
        curr &= ~(0b1111111111u << 16u);
        curr |= (LENGTH_1 & 0b1111111111u) << 16u;
        curr &= ~(0b1u << 26u);
        curr |= (AVAILABLE_1 & 0b1u) << 26u;
        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(DOUBLE_BUFFER_ISO_OFFSET) & 0b11u) << 27u;
        curr &= ~(0b1u << 29u);
        curr |= (PID_1 & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (LAST_1 & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (FULL_1 & 0b1u) << 31u;

        EP7_IN_BUFFER_CONTROL = curr;
    }

    inline uint16_t get_EP7_OUT_BUFFER_CONTROL_LENGTH_0() volatile
    {
        return (EP7_OUT_BUFFER_CONTROL >> 0u) & 0b1111111111u;
    }

    inline void set_EP7_OUT_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile
    {
        uint32_t curr = EP7_OUT_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (value & 0b1111111111u) << 0u;

        EP7_OUT_BUFFER_CONTROL = curr;
    }

    inline bool get_EP7_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        return EP7_OUT_BUFFER_CONTROL & (1u << 10u);
    }

    inline void set_EP7_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP7_OUT_BUFFER_CONTROL |= 1u << 10u;
    }

    inline void clear_EP7_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP7_OUT_BUFFER_CONTROL &= ~(1u << 10u);
    }

    inline void toggle_EP7_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP7_OUT_BUFFER_CONTROL ^= 1u << 10u;
    }

    inline bool get_EP7_OUT_BUFFER_CONTROL_STALL() volatile
    {
        return EP7_OUT_BUFFER_CONTROL & (1u << 11u);
    }

    inline void set_EP7_OUT_BUFFER_CONTROL_STALL() volatile
    {
        EP7_OUT_BUFFER_CONTROL |= 1u << 11u;
    }

    inline void clear_EP7_OUT_BUFFER_CONTROL_STALL() volatile
    {
        EP7_OUT_BUFFER_CONTROL &= ~(1u << 11u);
    }

    inline void toggle_EP7_OUT_BUFFER_CONTROL_STALL() volatile
    {
        EP7_OUT_BUFFER_CONTROL ^= 1u << 11u;
    }

    inline bool get_EP7_OUT_BUFFER_CONTROL_RESET() volatile
    {
        return EP7_OUT_BUFFER_CONTROL & (1u << 12u);
    }

    inline void set_EP7_OUT_BUFFER_CONTROL_RESET() volatile
    {
        EP7_OUT_BUFFER_CONTROL |= 1u << 12u;
    }

    inline void clear_EP7_OUT_BUFFER_CONTROL_RESET() volatile
    {
        EP7_OUT_BUFFER_CONTROL &= ~(1u << 12u);
    }

    inline void toggle_EP7_OUT_BUFFER_CONTROL_RESET() volatile
    {
        EP7_OUT_BUFFER_CONTROL ^= 1u << 12u;
    }

    inline bool get_EP7_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        return EP7_OUT_BUFFER_CONTROL & (1u << 13u);
    }

    inline void set_EP7_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        EP7_OUT_BUFFER_CONTROL |= 1u << 13u;
    }

    inline void clear_EP7_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        EP7_OUT_BUFFER_CONTROL &= ~(1u << 13u);
    }

    inline void toggle_EP7_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        EP7_OUT_BUFFER_CONTROL ^= 1u << 13u;
    }

    inline bool get_EP7_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        return EP7_OUT_BUFFER_CONTROL & (1u << 14u);
    }

    inline void set_EP7_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        EP7_OUT_BUFFER_CONTROL |= 1u << 14u;
    }

    inline void clear_EP7_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        EP7_OUT_BUFFER_CONTROL &= ~(1u << 14u);
    }

    inline void toggle_EP7_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        EP7_OUT_BUFFER_CONTROL ^= 1u << 14u;
    }

    inline bool get_EP7_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        return EP7_OUT_BUFFER_CONTROL & (1u << 15u);
    }

    inline void set_EP7_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        EP7_OUT_BUFFER_CONTROL |= 1u << 15u;
    }

    inline void clear_EP7_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        EP7_OUT_BUFFER_CONTROL &= ~(1u << 15u);
    }

    inline void toggle_EP7_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        EP7_OUT_BUFFER_CONTROL ^= 1u << 15u;
    }

    inline uint16_t get_EP7_OUT_BUFFER_CONTROL_LENGTH_1() volatile
    {
        return (EP7_OUT_BUFFER_CONTROL >> 16u) & 0b1111111111u;
    }

    inline void set_EP7_OUT_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile
    {
        uint32_t curr = EP7_OUT_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 16u);
        curr |= (value & 0b1111111111u) << 16u;

        EP7_OUT_BUFFER_CONTROL = curr;
    }

    inline bool get_EP7_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        return EP7_OUT_BUFFER_CONTROL & (1u << 26u);
    }

    inline void set_EP7_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP7_OUT_BUFFER_CONTROL |= 1u << 26u;
    }

    inline void clear_EP7_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP7_OUT_BUFFER_CONTROL &= ~(1u << 26u);
    }

    inline void toggle_EP7_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP7_OUT_BUFFER_CONTROL ^= 1u << 26u;
    }

    inline USBCTRL_DPRAM_EP7_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
    get_EP7_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile
    {
        return USBCTRL_DPRAM_EP7_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
            (EP7_OUT_BUFFER_CONTROL >> 27u) & 0b11u);
    }

    inline void set_EP7_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
        USBCTRL_DPRAM_EP7_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            value) volatile
    {
        uint32_t curr = EP7_OUT_BUFFER_CONTROL;

        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(value) & 0b11u) << 27u;

        EP7_OUT_BUFFER_CONTROL = curr;
    }

    inline bool get_EP7_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        return EP7_OUT_BUFFER_CONTROL & (1u << 29u);
    }

    inline void set_EP7_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        EP7_OUT_BUFFER_CONTROL |= 1u << 29u;
    }

    inline void clear_EP7_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        EP7_OUT_BUFFER_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP7_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        EP7_OUT_BUFFER_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP7_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        return EP7_OUT_BUFFER_CONTROL & (1u << 30u);
    }

    inline void set_EP7_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        EP7_OUT_BUFFER_CONTROL |= 1u << 30u;
    }

    inline void clear_EP7_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        EP7_OUT_BUFFER_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP7_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        EP7_OUT_BUFFER_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP7_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        return EP7_OUT_BUFFER_CONTROL & (1u << 31u);
    }

    inline void set_EP7_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        EP7_OUT_BUFFER_CONTROL |= 1u << 31u;
    }

    inline void clear_EP7_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        EP7_OUT_BUFFER_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP7_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        EP7_OUT_BUFFER_CONTROL ^= 1u << 31u;
    }

    inline void get_EP7_OUT_BUFFER_CONTROL(
        uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET,
        bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1,
        bool &AVAILABLE_1,
        USBCTRL_DPRAM_EP7_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            &DOUBLE_BUFFER_ISO_OFFSET,
        bool &PID_1, bool &LAST_1, bool &FULL_1) volatile
    {
        uint32_t curr = EP7_OUT_BUFFER_CONTROL;

        LENGTH_0 = (curr >> 0u) & 0b1111111111u;
        AVAILABLE_0 = curr & (1u << 10u);
        STALL = curr & (1u << 11u);
        RESET = curr & (1u << 12u);
        PID_0 = curr & (1u << 13u);
        LAST_0 = curr & (1u << 14u);
        FULL_0 = curr & (1u << 15u);
        LENGTH_1 = (curr >> 16u) & 0b1111111111u;
        AVAILABLE_1 = curr & (1u << 26u);
        DOUBLE_BUFFER_ISO_OFFSET =
            USBCTRL_DPRAM_EP7_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
                (curr >> 27u) & 0b11u);
        PID_1 = curr & (1u << 29u);
        LAST_1 = curr & (1u << 30u);
        FULL_1 = curr & (1u << 31u);
    }

    inline void set_EP7_OUT_BUFFER_CONTROL(
        uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET,
        bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1,
        bool AVAILABLE_1,
        USBCTRL_DPRAM_EP7_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            DOUBLE_BUFFER_ISO_OFFSET,
        bool PID_1, bool LAST_1, bool FULL_1) volatile
    {
        uint32_t curr = EP7_OUT_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (LENGTH_0 & 0b1111111111u) << 0u;
        curr &= ~(0b1u << 10u);
        curr |= (AVAILABLE_0 & 0b1u) << 10u;
        curr &= ~(0b1u << 11u);
        curr |= (STALL & 0b1u) << 11u;
        curr &= ~(0b1u << 12u);
        curr |= (RESET & 0b1u) << 12u;
        curr &= ~(0b1u << 13u);
        curr |= (PID_0 & 0b1u) << 13u;
        curr &= ~(0b1u << 14u);
        curr |= (LAST_0 & 0b1u) << 14u;
        curr &= ~(0b1u << 15u);
        curr |= (FULL_0 & 0b1u) << 15u;
        curr &= ~(0b1111111111u << 16u);
        curr |= (LENGTH_1 & 0b1111111111u) << 16u;
        curr &= ~(0b1u << 26u);
        curr |= (AVAILABLE_1 & 0b1u) << 26u;
        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(DOUBLE_BUFFER_ISO_OFFSET) & 0b11u) << 27u;
        curr &= ~(0b1u << 29u);
        curr |= (PID_1 & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (LAST_1 & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (FULL_1 & 0b1u) << 31u;

        EP7_OUT_BUFFER_CONTROL = curr;
    }

    inline uint16_t get_EP8_IN_BUFFER_CONTROL_LENGTH_0() volatile
    {
        return (EP8_IN_BUFFER_CONTROL >> 0u) & 0b1111111111u;
    }

    inline void set_EP8_IN_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile
    {
        uint32_t curr = EP8_IN_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (value & 0b1111111111u) << 0u;

        EP8_IN_BUFFER_CONTROL = curr;
    }

    inline bool get_EP8_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        return EP8_IN_BUFFER_CONTROL & (1u << 10u);
    }

    inline void set_EP8_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP8_IN_BUFFER_CONTROL |= 1u << 10u;
    }

    inline void clear_EP8_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP8_IN_BUFFER_CONTROL &= ~(1u << 10u);
    }

    inline void toggle_EP8_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP8_IN_BUFFER_CONTROL ^= 1u << 10u;
    }

    inline bool get_EP8_IN_BUFFER_CONTROL_STALL() volatile
    {
        return EP8_IN_BUFFER_CONTROL & (1u << 11u);
    }

    inline void set_EP8_IN_BUFFER_CONTROL_STALL() volatile
    {
        EP8_IN_BUFFER_CONTROL |= 1u << 11u;
    }

    inline void clear_EP8_IN_BUFFER_CONTROL_STALL() volatile
    {
        EP8_IN_BUFFER_CONTROL &= ~(1u << 11u);
    }

    inline void toggle_EP8_IN_BUFFER_CONTROL_STALL() volatile
    {
        EP8_IN_BUFFER_CONTROL ^= 1u << 11u;
    }

    inline bool get_EP8_IN_BUFFER_CONTROL_RESET() volatile
    {
        return EP8_IN_BUFFER_CONTROL & (1u << 12u);
    }

    inline void set_EP8_IN_BUFFER_CONTROL_RESET() volatile
    {
        EP8_IN_BUFFER_CONTROL |= 1u << 12u;
    }

    inline void clear_EP8_IN_BUFFER_CONTROL_RESET() volatile
    {
        EP8_IN_BUFFER_CONTROL &= ~(1u << 12u);
    }

    inline void toggle_EP8_IN_BUFFER_CONTROL_RESET() volatile
    {
        EP8_IN_BUFFER_CONTROL ^= 1u << 12u;
    }

    inline bool get_EP8_IN_BUFFER_CONTROL_PID_0() volatile
    {
        return EP8_IN_BUFFER_CONTROL & (1u << 13u);
    }

    inline void set_EP8_IN_BUFFER_CONTROL_PID_0() volatile
    {
        EP8_IN_BUFFER_CONTROL |= 1u << 13u;
    }

    inline void clear_EP8_IN_BUFFER_CONTROL_PID_0() volatile
    {
        EP8_IN_BUFFER_CONTROL &= ~(1u << 13u);
    }

    inline void toggle_EP8_IN_BUFFER_CONTROL_PID_0() volatile
    {
        EP8_IN_BUFFER_CONTROL ^= 1u << 13u;
    }

    inline bool get_EP8_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        return EP8_IN_BUFFER_CONTROL & (1u << 14u);
    }

    inline void set_EP8_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        EP8_IN_BUFFER_CONTROL |= 1u << 14u;
    }

    inline void clear_EP8_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        EP8_IN_BUFFER_CONTROL &= ~(1u << 14u);
    }

    inline void toggle_EP8_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        EP8_IN_BUFFER_CONTROL ^= 1u << 14u;
    }

    inline bool get_EP8_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        return EP8_IN_BUFFER_CONTROL & (1u << 15u);
    }

    inline void set_EP8_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        EP8_IN_BUFFER_CONTROL |= 1u << 15u;
    }

    inline void clear_EP8_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        EP8_IN_BUFFER_CONTROL &= ~(1u << 15u);
    }

    inline void toggle_EP8_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        EP8_IN_BUFFER_CONTROL ^= 1u << 15u;
    }

    inline uint16_t get_EP8_IN_BUFFER_CONTROL_LENGTH_1() volatile
    {
        return (EP8_IN_BUFFER_CONTROL >> 16u) & 0b1111111111u;
    }

    inline void set_EP8_IN_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile
    {
        uint32_t curr = EP8_IN_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 16u);
        curr |= (value & 0b1111111111u) << 16u;

        EP8_IN_BUFFER_CONTROL = curr;
    }

    inline bool get_EP8_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        return EP8_IN_BUFFER_CONTROL & (1u << 26u);
    }

    inline void set_EP8_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP8_IN_BUFFER_CONTROL |= 1u << 26u;
    }

    inline void clear_EP8_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP8_IN_BUFFER_CONTROL &= ~(1u << 26u);
    }

    inline void toggle_EP8_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP8_IN_BUFFER_CONTROL ^= 1u << 26u;
    }

    inline USBCTRL_DPRAM_EP8_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
    get_EP8_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile
    {
        return USBCTRL_DPRAM_EP8_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
            (EP8_IN_BUFFER_CONTROL >> 27u) & 0b11u);
    }

    inline void set_EP8_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
        USBCTRL_DPRAM_EP8_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            value) volatile
    {
        uint32_t curr = EP8_IN_BUFFER_CONTROL;

        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(value) & 0b11u) << 27u;

        EP8_IN_BUFFER_CONTROL = curr;
    }

    inline bool get_EP8_IN_BUFFER_CONTROL_PID_1() volatile
    {
        return EP8_IN_BUFFER_CONTROL & (1u << 29u);
    }

    inline void set_EP8_IN_BUFFER_CONTROL_PID_1() volatile
    {
        EP8_IN_BUFFER_CONTROL |= 1u << 29u;
    }

    inline void clear_EP8_IN_BUFFER_CONTROL_PID_1() volatile
    {
        EP8_IN_BUFFER_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP8_IN_BUFFER_CONTROL_PID_1() volatile
    {
        EP8_IN_BUFFER_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP8_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        return EP8_IN_BUFFER_CONTROL & (1u << 30u);
    }

    inline void set_EP8_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        EP8_IN_BUFFER_CONTROL |= 1u << 30u;
    }

    inline void clear_EP8_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        EP8_IN_BUFFER_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP8_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        EP8_IN_BUFFER_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP8_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        return EP8_IN_BUFFER_CONTROL & (1u << 31u);
    }

    inline void set_EP8_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        EP8_IN_BUFFER_CONTROL |= 1u << 31u;
    }

    inline void clear_EP8_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        EP8_IN_BUFFER_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP8_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        EP8_IN_BUFFER_CONTROL ^= 1u << 31u;
    }

    inline void get_EP8_IN_BUFFER_CONTROL(
        uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET,
        bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1,
        bool &AVAILABLE_1,
        USBCTRL_DPRAM_EP8_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            &DOUBLE_BUFFER_ISO_OFFSET,
        bool &PID_1, bool &LAST_1, bool &FULL_1) volatile
    {
        uint32_t curr = EP8_IN_BUFFER_CONTROL;

        LENGTH_0 = (curr >> 0u) & 0b1111111111u;
        AVAILABLE_0 = curr & (1u << 10u);
        STALL = curr & (1u << 11u);
        RESET = curr & (1u << 12u);
        PID_0 = curr & (1u << 13u);
        LAST_0 = curr & (1u << 14u);
        FULL_0 = curr & (1u << 15u);
        LENGTH_1 = (curr >> 16u) & 0b1111111111u;
        AVAILABLE_1 = curr & (1u << 26u);
        DOUBLE_BUFFER_ISO_OFFSET =
            USBCTRL_DPRAM_EP8_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
                (curr >> 27u) & 0b11u);
        PID_1 = curr & (1u << 29u);
        LAST_1 = curr & (1u << 30u);
        FULL_1 = curr & (1u << 31u);
    }

    inline void set_EP8_IN_BUFFER_CONTROL(
        uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET,
        bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1,
        bool AVAILABLE_1,
        USBCTRL_DPRAM_EP8_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            DOUBLE_BUFFER_ISO_OFFSET,
        bool PID_1, bool LAST_1, bool FULL_1) volatile
    {
        uint32_t curr = EP8_IN_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (LENGTH_0 & 0b1111111111u) << 0u;
        curr &= ~(0b1u << 10u);
        curr |= (AVAILABLE_0 & 0b1u) << 10u;
        curr &= ~(0b1u << 11u);
        curr |= (STALL & 0b1u) << 11u;
        curr &= ~(0b1u << 12u);
        curr |= (RESET & 0b1u) << 12u;
        curr &= ~(0b1u << 13u);
        curr |= (PID_0 & 0b1u) << 13u;
        curr &= ~(0b1u << 14u);
        curr |= (LAST_0 & 0b1u) << 14u;
        curr &= ~(0b1u << 15u);
        curr |= (FULL_0 & 0b1u) << 15u;
        curr &= ~(0b1111111111u << 16u);
        curr |= (LENGTH_1 & 0b1111111111u) << 16u;
        curr &= ~(0b1u << 26u);
        curr |= (AVAILABLE_1 & 0b1u) << 26u;
        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(DOUBLE_BUFFER_ISO_OFFSET) & 0b11u) << 27u;
        curr &= ~(0b1u << 29u);
        curr |= (PID_1 & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (LAST_1 & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (FULL_1 & 0b1u) << 31u;

        EP8_IN_BUFFER_CONTROL = curr;
    }

    inline uint16_t get_EP8_OUT_BUFFER_CONTROL_LENGTH_0() volatile
    {
        return (EP8_OUT_BUFFER_CONTROL >> 0u) & 0b1111111111u;
    }

    inline void set_EP8_OUT_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile
    {
        uint32_t curr = EP8_OUT_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (value & 0b1111111111u) << 0u;

        EP8_OUT_BUFFER_CONTROL = curr;
    }

    inline bool get_EP8_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        return EP8_OUT_BUFFER_CONTROL & (1u << 10u);
    }

    inline void set_EP8_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP8_OUT_BUFFER_CONTROL |= 1u << 10u;
    }

    inline void clear_EP8_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP8_OUT_BUFFER_CONTROL &= ~(1u << 10u);
    }

    inline void toggle_EP8_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP8_OUT_BUFFER_CONTROL ^= 1u << 10u;
    }

    inline bool get_EP8_OUT_BUFFER_CONTROL_STALL() volatile
    {
        return EP8_OUT_BUFFER_CONTROL & (1u << 11u);
    }

    inline void set_EP8_OUT_BUFFER_CONTROL_STALL() volatile
    {
        EP8_OUT_BUFFER_CONTROL |= 1u << 11u;
    }

    inline void clear_EP8_OUT_BUFFER_CONTROL_STALL() volatile
    {
        EP8_OUT_BUFFER_CONTROL &= ~(1u << 11u);
    }

    inline void toggle_EP8_OUT_BUFFER_CONTROL_STALL() volatile
    {
        EP8_OUT_BUFFER_CONTROL ^= 1u << 11u;
    }

    inline bool get_EP8_OUT_BUFFER_CONTROL_RESET() volatile
    {
        return EP8_OUT_BUFFER_CONTROL & (1u << 12u);
    }

    inline void set_EP8_OUT_BUFFER_CONTROL_RESET() volatile
    {
        EP8_OUT_BUFFER_CONTROL |= 1u << 12u;
    }

    inline void clear_EP8_OUT_BUFFER_CONTROL_RESET() volatile
    {
        EP8_OUT_BUFFER_CONTROL &= ~(1u << 12u);
    }

    inline void toggle_EP8_OUT_BUFFER_CONTROL_RESET() volatile
    {
        EP8_OUT_BUFFER_CONTROL ^= 1u << 12u;
    }

    inline bool get_EP8_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        return EP8_OUT_BUFFER_CONTROL & (1u << 13u);
    }

    inline void set_EP8_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        EP8_OUT_BUFFER_CONTROL |= 1u << 13u;
    }

    inline void clear_EP8_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        EP8_OUT_BUFFER_CONTROL &= ~(1u << 13u);
    }

    inline void toggle_EP8_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        EP8_OUT_BUFFER_CONTROL ^= 1u << 13u;
    }

    inline bool get_EP8_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        return EP8_OUT_BUFFER_CONTROL & (1u << 14u);
    }

    inline void set_EP8_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        EP8_OUT_BUFFER_CONTROL |= 1u << 14u;
    }

    inline void clear_EP8_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        EP8_OUT_BUFFER_CONTROL &= ~(1u << 14u);
    }

    inline void toggle_EP8_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        EP8_OUT_BUFFER_CONTROL ^= 1u << 14u;
    }

    inline bool get_EP8_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        return EP8_OUT_BUFFER_CONTROL & (1u << 15u);
    }

    inline void set_EP8_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        EP8_OUT_BUFFER_CONTROL |= 1u << 15u;
    }

    inline void clear_EP8_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        EP8_OUT_BUFFER_CONTROL &= ~(1u << 15u);
    }

    inline void toggle_EP8_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        EP8_OUT_BUFFER_CONTROL ^= 1u << 15u;
    }

    inline uint16_t get_EP8_OUT_BUFFER_CONTROL_LENGTH_1() volatile
    {
        return (EP8_OUT_BUFFER_CONTROL >> 16u) & 0b1111111111u;
    }

    inline void set_EP8_OUT_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile
    {
        uint32_t curr = EP8_OUT_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 16u);
        curr |= (value & 0b1111111111u) << 16u;

        EP8_OUT_BUFFER_CONTROL = curr;
    }

    inline bool get_EP8_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        return EP8_OUT_BUFFER_CONTROL & (1u << 26u);
    }

    inline void set_EP8_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP8_OUT_BUFFER_CONTROL |= 1u << 26u;
    }

    inline void clear_EP8_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP8_OUT_BUFFER_CONTROL &= ~(1u << 26u);
    }

    inline void toggle_EP8_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP8_OUT_BUFFER_CONTROL ^= 1u << 26u;
    }

    inline USBCTRL_DPRAM_EP8_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
    get_EP8_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile
    {
        return USBCTRL_DPRAM_EP8_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
            (EP8_OUT_BUFFER_CONTROL >> 27u) & 0b11u);
    }

    inline void set_EP8_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
        USBCTRL_DPRAM_EP8_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            value) volatile
    {
        uint32_t curr = EP8_OUT_BUFFER_CONTROL;

        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(value) & 0b11u) << 27u;

        EP8_OUT_BUFFER_CONTROL = curr;
    }

    inline bool get_EP8_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        return EP8_OUT_BUFFER_CONTROL & (1u << 29u);
    }

    inline void set_EP8_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        EP8_OUT_BUFFER_CONTROL |= 1u << 29u;
    }

    inline void clear_EP8_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        EP8_OUT_BUFFER_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP8_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        EP8_OUT_BUFFER_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP8_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        return EP8_OUT_BUFFER_CONTROL & (1u << 30u);
    }

    inline void set_EP8_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        EP8_OUT_BUFFER_CONTROL |= 1u << 30u;
    }

    inline void clear_EP8_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        EP8_OUT_BUFFER_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP8_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        EP8_OUT_BUFFER_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP8_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        return EP8_OUT_BUFFER_CONTROL & (1u << 31u);
    }

    inline void set_EP8_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        EP8_OUT_BUFFER_CONTROL |= 1u << 31u;
    }

    inline void clear_EP8_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        EP8_OUT_BUFFER_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP8_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        EP8_OUT_BUFFER_CONTROL ^= 1u << 31u;
    }

    inline void get_EP8_OUT_BUFFER_CONTROL(
        uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET,
        bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1,
        bool &AVAILABLE_1,
        USBCTRL_DPRAM_EP8_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            &DOUBLE_BUFFER_ISO_OFFSET,
        bool &PID_1, bool &LAST_1, bool &FULL_1) volatile
    {
        uint32_t curr = EP8_OUT_BUFFER_CONTROL;

        LENGTH_0 = (curr >> 0u) & 0b1111111111u;
        AVAILABLE_0 = curr & (1u << 10u);
        STALL = curr & (1u << 11u);
        RESET = curr & (1u << 12u);
        PID_0 = curr & (1u << 13u);
        LAST_0 = curr & (1u << 14u);
        FULL_0 = curr & (1u << 15u);
        LENGTH_1 = (curr >> 16u) & 0b1111111111u;
        AVAILABLE_1 = curr & (1u << 26u);
        DOUBLE_BUFFER_ISO_OFFSET =
            USBCTRL_DPRAM_EP8_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
                (curr >> 27u) & 0b11u);
        PID_1 = curr & (1u << 29u);
        LAST_1 = curr & (1u << 30u);
        FULL_1 = curr & (1u << 31u);
    }

    inline void set_EP8_OUT_BUFFER_CONTROL(
        uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET,
        bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1,
        bool AVAILABLE_1,
        USBCTRL_DPRAM_EP8_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            DOUBLE_BUFFER_ISO_OFFSET,
        bool PID_1, bool LAST_1, bool FULL_1) volatile
    {
        uint32_t curr = EP8_OUT_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (LENGTH_0 & 0b1111111111u) << 0u;
        curr &= ~(0b1u << 10u);
        curr |= (AVAILABLE_0 & 0b1u) << 10u;
        curr &= ~(0b1u << 11u);
        curr |= (STALL & 0b1u) << 11u;
        curr &= ~(0b1u << 12u);
        curr |= (RESET & 0b1u) << 12u;
        curr &= ~(0b1u << 13u);
        curr |= (PID_0 & 0b1u) << 13u;
        curr &= ~(0b1u << 14u);
        curr |= (LAST_0 & 0b1u) << 14u;
        curr &= ~(0b1u << 15u);
        curr |= (FULL_0 & 0b1u) << 15u;
        curr &= ~(0b1111111111u << 16u);
        curr |= (LENGTH_1 & 0b1111111111u) << 16u;
        curr &= ~(0b1u << 26u);
        curr |= (AVAILABLE_1 & 0b1u) << 26u;
        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(DOUBLE_BUFFER_ISO_OFFSET) & 0b11u) << 27u;
        curr &= ~(0b1u << 29u);
        curr |= (PID_1 & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (LAST_1 & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (FULL_1 & 0b1u) << 31u;

        EP8_OUT_BUFFER_CONTROL = curr;
    }

    inline uint16_t get_EP9_IN_BUFFER_CONTROL_LENGTH_0() volatile
    {
        return (EP9_IN_BUFFER_CONTROL >> 0u) & 0b1111111111u;
    }

    inline void set_EP9_IN_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile
    {
        uint32_t curr = EP9_IN_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (value & 0b1111111111u) << 0u;

        EP9_IN_BUFFER_CONTROL = curr;
    }

    inline bool get_EP9_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        return EP9_IN_BUFFER_CONTROL & (1u << 10u);
    }

    inline void set_EP9_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP9_IN_BUFFER_CONTROL |= 1u << 10u;
    }

    inline void clear_EP9_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP9_IN_BUFFER_CONTROL &= ~(1u << 10u);
    }

    inline void toggle_EP9_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP9_IN_BUFFER_CONTROL ^= 1u << 10u;
    }

    inline bool get_EP9_IN_BUFFER_CONTROL_STALL() volatile
    {
        return EP9_IN_BUFFER_CONTROL & (1u << 11u);
    }

    inline void set_EP9_IN_BUFFER_CONTROL_STALL() volatile
    {
        EP9_IN_BUFFER_CONTROL |= 1u << 11u;
    }

    inline void clear_EP9_IN_BUFFER_CONTROL_STALL() volatile
    {
        EP9_IN_BUFFER_CONTROL &= ~(1u << 11u);
    }

    inline void toggle_EP9_IN_BUFFER_CONTROL_STALL() volatile
    {
        EP9_IN_BUFFER_CONTROL ^= 1u << 11u;
    }

    inline bool get_EP9_IN_BUFFER_CONTROL_RESET() volatile
    {
        return EP9_IN_BUFFER_CONTROL & (1u << 12u);
    }

    inline void set_EP9_IN_BUFFER_CONTROL_RESET() volatile
    {
        EP9_IN_BUFFER_CONTROL |= 1u << 12u;
    }

    inline void clear_EP9_IN_BUFFER_CONTROL_RESET() volatile
    {
        EP9_IN_BUFFER_CONTROL &= ~(1u << 12u);
    }

    inline void toggle_EP9_IN_BUFFER_CONTROL_RESET() volatile
    {
        EP9_IN_BUFFER_CONTROL ^= 1u << 12u;
    }

    inline bool get_EP9_IN_BUFFER_CONTROL_PID_0() volatile
    {
        return EP9_IN_BUFFER_CONTROL & (1u << 13u);
    }

    inline void set_EP9_IN_BUFFER_CONTROL_PID_0() volatile
    {
        EP9_IN_BUFFER_CONTROL |= 1u << 13u;
    }

    inline void clear_EP9_IN_BUFFER_CONTROL_PID_0() volatile
    {
        EP9_IN_BUFFER_CONTROL &= ~(1u << 13u);
    }

    inline void toggle_EP9_IN_BUFFER_CONTROL_PID_0() volatile
    {
        EP9_IN_BUFFER_CONTROL ^= 1u << 13u;
    }

    inline bool get_EP9_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        return EP9_IN_BUFFER_CONTROL & (1u << 14u);
    }

    inline void set_EP9_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        EP9_IN_BUFFER_CONTROL |= 1u << 14u;
    }

    inline void clear_EP9_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        EP9_IN_BUFFER_CONTROL &= ~(1u << 14u);
    }

    inline void toggle_EP9_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        EP9_IN_BUFFER_CONTROL ^= 1u << 14u;
    }

    inline bool get_EP9_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        return EP9_IN_BUFFER_CONTROL & (1u << 15u);
    }

    inline void set_EP9_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        EP9_IN_BUFFER_CONTROL |= 1u << 15u;
    }

    inline void clear_EP9_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        EP9_IN_BUFFER_CONTROL &= ~(1u << 15u);
    }

    inline void toggle_EP9_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        EP9_IN_BUFFER_CONTROL ^= 1u << 15u;
    }

    inline uint16_t get_EP9_IN_BUFFER_CONTROL_LENGTH_1() volatile
    {
        return (EP9_IN_BUFFER_CONTROL >> 16u) & 0b1111111111u;
    }

    inline void set_EP9_IN_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile
    {
        uint32_t curr = EP9_IN_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 16u);
        curr |= (value & 0b1111111111u) << 16u;

        EP9_IN_BUFFER_CONTROL = curr;
    }

    inline bool get_EP9_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        return EP9_IN_BUFFER_CONTROL & (1u << 26u);
    }

    inline void set_EP9_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP9_IN_BUFFER_CONTROL |= 1u << 26u;
    }

    inline void clear_EP9_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP9_IN_BUFFER_CONTROL &= ~(1u << 26u);
    }

    inline void toggle_EP9_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP9_IN_BUFFER_CONTROL ^= 1u << 26u;
    }

    inline USBCTRL_DPRAM_EP9_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
    get_EP9_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile
    {
        return USBCTRL_DPRAM_EP9_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
            (EP9_IN_BUFFER_CONTROL >> 27u) & 0b11u);
    }

    inline void set_EP9_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
        USBCTRL_DPRAM_EP9_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            value) volatile
    {
        uint32_t curr = EP9_IN_BUFFER_CONTROL;

        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(value) & 0b11u) << 27u;

        EP9_IN_BUFFER_CONTROL = curr;
    }

    inline bool get_EP9_IN_BUFFER_CONTROL_PID_1() volatile
    {
        return EP9_IN_BUFFER_CONTROL & (1u << 29u);
    }

    inline void set_EP9_IN_BUFFER_CONTROL_PID_1() volatile
    {
        EP9_IN_BUFFER_CONTROL |= 1u << 29u;
    }

    inline void clear_EP9_IN_BUFFER_CONTROL_PID_1() volatile
    {
        EP9_IN_BUFFER_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP9_IN_BUFFER_CONTROL_PID_1() volatile
    {
        EP9_IN_BUFFER_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP9_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        return EP9_IN_BUFFER_CONTROL & (1u << 30u);
    }

    inline void set_EP9_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        EP9_IN_BUFFER_CONTROL |= 1u << 30u;
    }

    inline void clear_EP9_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        EP9_IN_BUFFER_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP9_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        EP9_IN_BUFFER_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP9_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        return EP9_IN_BUFFER_CONTROL & (1u << 31u);
    }

    inline void set_EP9_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        EP9_IN_BUFFER_CONTROL |= 1u << 31u;
    }

    inline void clear_EP9_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        EP9_IN_BUFFER_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP9_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        EP9_IN_BUFFER_CONTROL ^= 1u << 31u;
    }

    inline void get_EP9_IN_BUFFER_CONTROL(
        uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET,
        bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1,
        bool &AVAILABLE_1,
        USBCTRL_DPRAM_EP9_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            &DOUBLE_BUFFER_ISO_OFFSET,
        bool &PID_1, bool &LAST_1, bool &FULL_1) volatile
    {
        uint32_t curr = EP9_IN_BUFFER_CONTROL;

        LENGTH_0 = (curr >> 0u) & 0b1111111111u;
        AVAILABLE_0 = curr & (1u << 10u);
        STALL = curr & (1u << 11u);
        RESET = curr & (1u << 12u);
        PID_0 = curr & (1u << 13u);
        LAST_0 = curr & (1u << 14u);
        FULL_0 = curr & (1u << 15u);
        LENGTH_1 = (curr >> 16u) & 0b1111111111u;
        AVAILABLE_1 = curr & (1u << 26u);
        DOUBLE_BUFFER_ISO_OFFSET =
            USBCTRL_DPRAM_EP9_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
                (curr >> 27u) & 0b11u);
        PID_1 = curr & (1u << 29u);
        LAST_1 = curr & (1u << 30u);
        FULL_1 = curr & (1u << 31u);
    }

    inline void set_EP9_IN_BUFFER_CONTROL(
        uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET,
        bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1,
        bool AVAILABLE_1,
        USBCTRL_DPRAM_EP9_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            DOUBLE_BUFFER_ISO_OFFSET,
        bool PID_1, bool LAST_1, bool FULL_1) volatile
    {
        uint32_t curr = EP9_IN_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (LENGTH_0 & 0b1111111111u) << 0u;
        curr &= ~(0b1u << 10u);
        curr |= (AVAILABLE_0 & 0b1u) << 10u;
        curr &= ~(0b1u << 11u);
        curr |= (STALL & 0b1u) << 11u;
        curr &= ~(0b1u << 12u);
        curr |= (RESET & 0b1u) << 12u;
        curr &= ~(0b1u << 13u);
        curr |= (PID_0 & 0b1u) << 13u;
        curr &= ~(0b1u << 14u);
        curr |= (LAST_0 & 0b1u) << 14u;
        curr &= ~(0b1u << 15u);
        curr |= (FULL_0 & 0b1u) << 15u;
        curr &= ~(0b1111111111u << 16u);
        curr |= (LENGTH_1 & 0b1111111111u) << 16u;
        curr &= ~(0b1u << 26u);
        curr |= (AVAILABLE_1 & 0b1u) << 26u;
        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(DOUBLE_BUFFER_ISO_OFFSET) & 0b11u) << 27u;
        curr &= ~(0b1u << 29u);
        curr |= (PID_1 & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (LAST_1 & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (FULL_1 & 0b1u) << 31u;

        EP9_IN_BUFFER_CONTROL = curr;
    }

    inline uint16_t get_EP9_OUT_BUFFER_CONTROL_LENGTH_0() volatile
    {
        return (EP9_OUT_BUFFER_CONTROL >> 0u) & 0b1111111111u;
    }

    inline void set_EP9_OUT_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile
    {
        uint32_t curr = EP9_OUT_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (value & 0b1111111111u) << 0u;

        EP9_OUT_BUFFER_CONTROL = curr;
    }

    inline bool get_EP9_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        return EP9_OUT_BUFFER_CONTROL & (1u << 10u);
    }

    inline void set_EP9_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP9_OUT_BUFFER_CONTROL |= 1u << 10u;
    }

    inline void clear_EP9_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP9_OUT_BUFFER_CONTROL &= ~(1u << 10u);
    }

    inline void toggle_EP9_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP9_OUT_BUFFER_CONTROL ^= 1u << 10u;
    }

    inline bool get_EP9_OUT_BUFFER_CONTROL_STALL() volatile
    {
        return EP9_OUT_BUFFER_CONTROL & (1u << 11u);
    }

    inline void set_EP9_OUT_BUFFER_CONTROL_STALL() volatile
    {
        EP9_OUT_BUFFER_CONTROL |= 1u << 11u;
    }

    inline void clear_EP9_OUT_BUFFER_CONTROL_STALL() volatile
    {
        EP9_OUT_BUFFER_CONTROL &= ~(1u << 11u);
    }

    inline void toggle_EP9_OUT_BUFFER_CONTROL_STALL() volatile
    {
        EP9_OUT_BUFFER_CONTROL ^= 1u << 11u;
    }

    inline bool get_EP9_OUT_BUFFER_CONTROL_RESET() volatile
    {
        return EP9_OUT_BUFFER_CONTROL & (1u << 12u);
    }

    inline void set_EP9_OUT_BUFFER_CONTROL_RESET() volatile
    {
        EP9_OUT_BUFFER_CONTROL |= 1u << 12u;
    }

    inline void clear_EP9_OUT_BUFFER_CONTROL_RESET() volatile
    {
        EP9_OUT_BUFFER_CONTROL &= ~(1u << 12u);
    }

    inline void toggle_EP9_OUT_BUFFER_CONTROL_RESET() volatile
    {
        EP9_OUT_BUFFER_CONTROL ^= 1u << 12u;
    }

    inline bool get_EP9_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        return EP9_OUT_BUFFER_CONTROL & (1u << 13u);
    }

    inline void set_EP9_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        EP9_OUT_BUFFER_CONTROL |= 1u << 13u;
    }

    inline void clear_EP9_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        EP9_OUT_BUFFER_CONTROL &= ~(1u << 13u);
    }

    inline void toggle_EP9_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        EP9_OUT_BUFFER_CONTROL ^= 1u << 13u;
    }

    inline bool get_EP9_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        return EP9_OUT_BUFFER_CONTROL & (1u << 14u);
    }

    inline void set_EP9_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        EP9_OUT_BUFFER_CONTROL |= 1u << 14u;
    }

    inline void clear_EP9_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        EP9_OUT_BUFFER_CONTROL &= ~(1u << 14u);
    }

    inline void toggle_EP9_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        EP9_OUT_BUFFER_CONTROL ^= 1u << 14u;
    }

    inline bool get_EP9_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        return EP9_OUT_BUFFER_CONTROL & (1u << 15u);
    }

    inline void set_EP9_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        EP9_OUT_BUFFER_CONTROL |= 1u << 15u;
    }

    inline void clear_EP9_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        EP9_OUT_BUFFER_CONTROL &= ~(1u << 15u);
    }

    inline void toggle_EP9_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        EP9_OUT_BUFFER_CONTROL ^= 1u << 15u;
    }

    inline uint16_t get_EP9_OUT_BUFFER_CONTROL_LENGTH_1() volatile
    {
        return (EP9_OUT_BUFFER_CONTROL >> 16u) & 0b1111111111u;
    }

    inline void set_EP9_OUT_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile
    {
        uint32_t curr = EP9_OUT_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 16u);
        curr |= (value & 0b1111111111u) << 16u;

        EP9_OUT_BUFFER_CONTROL = curr;
    }

    inline bool get_EP9_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        return EP9_OUT_BUFFER_CONTROL & (1u << 26u);
    }

    inline void set_EP9_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP9_OUT_BUFFER_CONTROL |= 1u << 26u;
    }

    inline void clear_EP9_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP9_OUT_BUFFER_CONTROL &= ~(1u << 26u);
    }

    inline void toggle_EP9_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP9_OUT_BUFFER_CONTROL ^= 1u << 26u;
    }

    inline USBCTRL_DPRAM_EP9_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
    get_EP9_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile
    {
        return USBCTRL_DPRAM_EP9_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
            (EP9_OUT_BUFFER_CONTROL >> 27u) & 0b11u);
    }

    inline void set_EP9_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
        USBCTRL_DPRAM_EP9_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            value) volatile
    {
        uint32_t curr = EP9_OUT_BUFFER_CONTROL;

        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(value) & 0b11u) << 27u;

        EP9_OUT_BUFFER_CONTROL = curr;
    }

    inline bool get_EP9_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        return EP9_OUT_BUFFER_CONTROL & (1u << 29u);
    }

    inline void set_EP9_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        EP9_OUT_BUFFER_CONTROL |= 1u << 29u;
    }

    inline void clear_EP9_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        EP9_OUT_BUFFER_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP9_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        EP9_OUT_BUFFER_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP9_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        return EP9_OUT_BUFFER_CONTROL & (1u << 30u);
    }

    inline void set_EP9_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        EP9_OUT_BUFFER_CONTROL |= 1u << 30u;
    }

    inline void clear_EP9_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        EP9_OUT_BUFFER_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP9_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        EP9_OUT_BUFFER_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP9_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        return EP9_OUT_BUFFER_CONTROL & (1u << 31u);
    }

    inline void set_EP9_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        EP9_OUT_BUFFER_CONTROL |= 1u << 31u;
    }

    inline void clear_EP9_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        EP9_OUT_BUFFER_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP9_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        EP9_OUT_BUFFER_CONTROL ^= 1u << 31u;
    }

    inline void get_EP9_OUT_BUFFER_CONTROL(
        uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET,
        bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1,
        bool &AVAILABLE_1,
        USBCTRL_DPRAM_EP9_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            &DOUBLE_BUFFER_ISO_OFFSET,
        bool &PID_1, bool &LAST_1, bool &FULL_1) volatile
    {
        uint32_t curr = EP9_OUT_BUFFER_CONTROL;

        LENGTH_0 = (curr >> 0u) & 0b1111111111u;
        AVAILABLE_0 = curr & (1u << 10u);
        STALL = curr & (1u << 11u);
        RESET = curr & (1u << 12u);
        PID_0 = curr & (1u << 13u);
        LAST_0 = curr & (1u << 14u);
        FULL_0 = curr & (1u << 15u);
        LENGTH_1 = (curr >> 16u) & 0b1111111111u;
        AVAILABLE_1 = curr & (1u << 26u);
        DOUBLE_BUFFER_ISO_OFFSET =
            USBCTRL_DPRAM_EP9_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
                (curr >> 27u) & 0b11u);
        PID_1 = curr & (1u << 29u);
        LAST_1 = curr & (1u << 30u);
        FULL_1 = curr & (1u << 31u);
    }

    inline void set_EP9_OUT_BUFFER_CONTROL(
        uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET,
        bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1,
        bool AVAILABLE_1,
        USBCTRL_DPRAM_EP9_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            DOUBLE_BUFFER_ISO_OFFSET,
        bool PID_1, bool LAST_1, bool FULL_1) volatile
    {
        uint32_t curr = EP9_OUT_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (LENGTH_0 & 0b1111111111u) << 0u;
        curr &= ~(0b1u << 10u);
        curr |= (AVAILABLE_0 & 0b1u) << 10u;
        curr &= ~(0b1u << 11u);
        curr |= (STALL & 0b1u) << 11u;
        curr &= ~(0b1u << 12u);
        curr |= (RESET & 0b1u) << 12u;
        curr &= ~(0b1u << 13u);
        curr |= (PID_0 & 0b1u) << 13u;
        curr &= ~(0b1u << 14u);
        curr |= (LAST_0 & 0b1u) << 14u;
        curr &= ~(0b1u << 15u);
        curr |= (FULL_0 & 0b1u) << 15u;
        curr &= ~(0b1111111111u << 16u);
        curr |= (LENGTH_1 & 0b1111111111u) << 16u;
        curr &= ~(0b1u << 26u);
        curr |= (AVAILABLE_1 & 0b1u) << 26u;
        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(DOUBLE_BUFFER_ISO_OFFSET) & 0b11u) << 27u;
        curr &= ~(0b1u << 29u);
        curr |= (PID_1 & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (LAST_1 & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (FULL_1 & 0b1u) << 31u;

        EP9_OUT_BUFFER_CONTROL = curr;
    }

    inline uint16_t get_EP10_IN_BUFFER_CONTROL_LENGTH_0() volatile
    {
        return (EP10_IN_BUFFER_CONTROL >> 0u) & 0b1111111111u;
    }

    inline void set_EP10_IN_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile
    {
        uint32_t curr = EP10_IN_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (value & 0b1111111111u) << 0u;

        EP10_IN_BUFFER_CONTROL = curr;
    }

    inline bool get_EP10_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        return EP10_IN_BUFFER_CONTROL & (1u << 10u);
    }

    inline void set_EP10_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP10_IN_BUFFER_CONTROL |= 1u << 10u;
    }

    inline void clear_EP10_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP10_IN_BUFFER_CONTROL &= ~(1u << 10u);
    }

    inline void toggle_EP10_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP10_IN_BUFFER_CONTROL ^= 1u << 10u;
    }

    inline bool get_EP10_IN_BUFFER_CONTROL_STALL() volatile
    {
        return EP10_IN_BUFFER_CONTROL & (1u << 11u);
    }

    inline void set_EP10_IN_BUFFER_CONTROL_STALL() volatile
    {
        EP10_IN_BUFFER_CONTROL |= 1u << 11u;
    }

    inline void clear_EP10_IN_BUFFER_CONTROL_STALL() volatile
    {
        EP10_IN_BUFFER_CONTROL &= ~(1u << 11u);
    }

    inline void toggle_EP10_IN_BUFFER_CONTROL_STALL() volatile
    {
        EP10_IN_BUFFER_CONTROL ^= 1u << 11u;
    }

    inline bool get_EP10_IN_BUFFER_CONTROL_RESET() volatile
    {
        return EP10_IN_BUFFER_CONTROL & (1u << 12u);
    }

    inline void set_EP10_IN_BUFFER_CONTROL_RESET() volatile
    {
        EP10_IN_BUFFER_CONTROL |= 1u << 12u;
    }

    inline void clear_EP10_IN_BUFFER_CONTROL_RESET() volatile
    {
        EP10_IN_BUFFER_CONTROL &= ~(1u << 12u);
    }

    inline void toggle_EP10_IN_BUFFER_CONTROL_RESET() volatile
    {
        EP10_IN_BUFFER_CONTROL ^= 1u << 12u;
    }

    inline bool get_EP10_IN_BUFFER_CONTROL_PID_0() volatile
    {
        return EP10_IN_BUFFER_CONTROL & (1u << 13u);
    }

    inline void set_EP10_IN_BUFFER_CONTROL_PID_0() volatile
    {
        EP10_IN_BUFFER_CONTROL |= 1u << 13u;
    }

    inline void clear_EP10_IN_BUFFER_CONTROL_PID_0() volatile
    {
        EP10_IN_BUFFER_CONTROL &= ~(1u << 13u);
    }

    inline void toggle_EP10_IN_BUFFER_CONTROL_PID_0() volatile
    {
        EP10_IN_BUFFER_CONTROL ^= 1u << 13u;
    }

    inline bool get_EP10_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        return EP10_IN_BUFFER_CONTROL & (1u << 14u);
    }

    inline void set_EP10_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        EP10_IN_BUFFER_CONTROL |= 1u << 14u;
    }

    inline void clear_EP10_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        EP10_IN_BUFFER_CONTROL &= ~(1u << 14u);
    }

    inline void toggle_EP10_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        EP10_IN_BUFFER_CONTROL ^= 1u << 14u;
    }

    inline bool get_EP10_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        return EP10_IN_BUFFER_CONTROL & (1u << 15u);
    }

    inline void set_EP10_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        EP10_IN_BUFFER_CONTROL |= 1u << 15u;
    }

    inline void clear_EP10_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        EP10_IN_BUFFER_CONTROL &= ~(1u << 15u);
    }

    inline void toggle_EP10_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        EP10_IN_BUFFER_CONTROL ^= 1u << 15u;
    }

    inline uint16_t get_EP10_IN_BUFFER_CONTROL_LENGTH_1() volatile
    {
        return (EP10_IN_BUFFER_CONTROL >> 16u) & 0b1111111111u;
    }

    inline void set_EP10_IN_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile
    {
        uint32_t curr = EP10_IN_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 16u);
        curr |= (value & 0b1111111111u) << 16u;

        EP10_IN_BUFFER_CONTROL = curr;
    }

    inline bool get_EP10_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        return EP10_IN_BUFFER_CONTROL & (1u << 26u);
    }

    inline void set_EP10_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP10_IN_BUFFER_CONTROL |= 1u << 26u;
    }

    inline void clear_EP10_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP10_IN_BUFFER_CONTROL &= ~(1u << 26u);
    }

    inline void toggle_EP10_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP10_IN_BUFFER_CONTROL ^= 1u << 26u;
    }

    inline USBCTRL_DPRAM_EP10_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
    get_EP10_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile
    {
        return USBCTRL_DPRAM_EP10_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
            (EP10_IN_BUFFER_CONTROL >> 27u) & 0b11u);
    }

    inline void set_EP10_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
        USBCTRL_DPRAM_EP10_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            value) volatile
    {
        uint32_t curr = EP10_IN_BUFFER_CONTROL;

        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(value) & 0b11u) << 27u;

        EP10_IN_BUFFER_CONTROL = curr;
    }

    inline bool get_EP10_IN_BUFFER_CONTROL_PID_1() volatile
    {
        return EP10_IN_BUFFER_CONTROL & (1u << 29u);
    }

    inline void set_EP10_IN_BUFFER_CONTROL_PID_1() volatile
    {
        EP10_IN_BUFFER_CONTROL |= 1u << 29u;
    }

    inline void clear_EP10_IN_BUFFER_CONTROL_PID_1() volatile
    {
        EP10_IN_BUFFER_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP10_IN_BUFFER_CONTROL_PID_1() volatile
    {
        EP10_IN_BUFFER_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP10_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        return EP10_IN_BUFFER_CONTROL & (1u << 30u);
    }

    inline void set_EP10_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        EP10_IN_BUFFER_CONTROL |= 1u << 30u;
    }

    inline void clear_EP10_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        EP10_IN_BUFFER_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP10_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        EP10_IN_BUFFER_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP10_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        return EP10_IN_BUFFER_CONTROL & (1u << 31u);
    }

    inline void set_EP10_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        EP10_IN_BUFFER_CONTROL |= 1u << 31u;
    }

    inline void clear_EP10_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        EP10_IN_BUFFER_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP10_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        EP10_IN_BUFFER_CONTROL ^= 1u << 31u;
    }

    inline void get_EP10_IN_BUFFER_CONTROL(
        uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET,
        bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1,
        bool &AVAILABLE_1,
        USBCTRL_DPRAM_EP10_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            &DOUBLE_BUFFER_ISO_OFFSET,
        bool &PID_1, bool &LAST_1, bool &FULL_1) volatile
    {
        uint32_t curr = EP10_IN_BUFFER_CONTROL;

        LENGTH_0 = (curr >> 0u) & 0b1111111111u;
        AVAILABLE_0 = curr & (1u << 10u);
        STALL = curr & (1u << 11u);
        RESET = curr & (1u << 12u);
        PID_0 = curr & (1u << 13u);
        LAST_0 = curr & (1u << 14u);
        FULL_0 = curr & (1u << 15u);
        LENGTH_1 = (curr >> 16u) & 0b1111111111u;
        AVAILABLE_1 = curr & (1u << 26u);
        DOUBLE_BUFFER_ISO_OFFSET =
            USBCTRL_DPRAM_EP10_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
                (curr >> 27u) & 0b11u);
        PID_1 = curr & (1u << 29u);
        LAST_1 = curr & (1u << 30u);
        FULL_1 = curr & (1u << 31u);
    }

    inline void set_EP10_IN_BUFFER_CONTROL(
        uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET,
        bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1,
        bool AVAILABLE_1,
        USBCTRL_DPRAM_EP10_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            DOUBLE_BUFFER_ISO_OFFSET,
        bool PID_1, bool LAST_1, bool FULL_1) volatile
    {
        uint32_t curr = EP10_IN_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (LENGTH_0 & 0b1111111111u) << 0u;
        curr &= ~(0b1u << 10u);
        curr |= (AVAILABLE_0 & 0b1u) << 10u;
        curr &= ~(0b1u << 11u);
        curr |= (STALL & 0b1u) << 11u;
        curr &= ~(0b1u << 12u);
        curr |= (RESET & 0b1u) << 12u;
        curr &= ~(0b1u << 13u);
        curr |= (PID_0 & 0b1u) << 13u;
        curr &= ~(0b1u << 14u);
        curr |= (LAST_0 & 0b1u) << 14u;
        curr &= ~(0b1u << 15u);
        curr |= (FULL_0 & 0b1u) << 15u;
        curr &= ~(0b1111111111u << 16u);
        curr |= (LENGTH_1 & 0b1111111111u) << 16u;
        curr &= ~(0b1u << 26u);
        curr |= (AVAILABLE_1 & 0b1u) << 26u;
        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(DOUBLE_BUFFER_ISO_OFFSET) & 0b11u) << 27u;
        curr &= ~(0b1u << 29u);
        curr |= (PID_1 & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (LAST_1 & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (FULL_1 & 0b1u) << 31u;

        EP10_IN_BUFFER_CONTROL = curr;
    }

    inline uint16_t get_EP10_OUT_BUFFER_CONTROL_LENGTH_0() volatile
    {
        return (EP10_OUT_BUFFER_CONTROL >> 0u) & 0b1111111111u;
    }

    inline void set_EP10_OUT_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile
    {
        uint32_t curr = EP10_OUT_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (value & 0b1111111111u) << 0u;

        EP10_OUT_BUFFER_CONTROL = curr;
    }

    inline bool get_EP10_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        return EP10_OUT_BUFFER_CONTROL & (1u << 10u);
    }

    inline void set_EP10_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP10_OUT_BUFFER_CONTROL |= 1u << 10u;
    }

    inline void clear_EP10_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP10_OUT_BUFFER_CONTROL &= ~(1u << 10u);
    }

    inline void toggle_EP10_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP10_OUT_BUFFER_CONTROL ^= 1u << 10u;
    }

    inline bool get_EP10_OUT_BUFFER_CONTROL_STALL() volatile
    {
        return EP10_OUT_BUFFER_CONTROL & (1u << 11u);
    }

    inline void set_EP10_OUT_BUFFER_CONTROL_STALL() volatile
    {
        EP10_OUT_BUFFER_CONTROL |= 1u << 11u;
    }

    inline void clear_EP10_OUT_BUFFER_CONTROL_STALL() volatile
    {
        EP10_OUT_BUFFER_CONTROL &= ~(1u << 11u);
    }

    inline void toggle_EP10_OUT_BUFFER_CONTROL_STALL() volatile
    {
        EP10_OUT_BUFFER_CONTROL ^= 1u << 11u;
    }

    inline bool get_EP10_OUT_BUFFER_CONTROL_RESET() volatile
    {
        return EP10_OUT_BUFFER_CONTROL & (1u << 12u);
    }

    inline void set_EP10_OUT_BUFFER_CONTROL_RESET() volatile
    {
        EP10_OUT_BUFFER_CONTROL |= 1u << 12u;
    }

    inline void clear_EP10_OUT_BUFFER_CONTROL_RESET() volatile
    {
        EP10_OUT_BUFFER_CONTROL &= ~(1u << 12u);
    }

    inline void toggle_EP10_OUT_BUFFER_CONTROL_RESET() volatile
    {
        EP10_OUT_BUFFER_CONTROL ^= 1u << 12u;
    }

    inline bool get_EP10_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        return EP10_OUT_BUFFER_CONTROL & (1u << 13u);
    }

    inline void set_EP10_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        EP10_OUT_BUFFER_CONTROL |= 1u << 13u;
    }

    inline void clear_EP10_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        EP10_OUT_BUFFER_CONTROL &= ~(1u << 13u);
    }

    inline void toggle_EP10_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        EP10_OUT_BUFFER_CONTROL ^= 1u << 13u;
    }

    inline bool get_EP10_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        return EP10_OUT_BUFFER_CONTROL & (1u << 14u);
    }

    inline void set_EP10_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        EP10_OUT_BUFFER_CONTROL |= 1u << 14u;
    }

    inline void clear_EP10_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        EP10_OUT_BUFFER_CONTROL &= ~(1u << 14u);
    }

    inline void toggle_EP10_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        EP10_OUT_BUFFER_CONTROL ^= 1u << 14u;
    }

    inline bool get_EP10_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        return EP10_OUT_BUFFER_CONTROL & (1u << 15u);
    }

    inline void set_EP10_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        EP10_OUT_BUFFER_CONTROL |= 1u << 15u;
    }

    inline void clear_EP10_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        EP10_OUT_BUFFER_CONTROL &= ~(1u << 15u);
    }

    inline void toggle_EP10_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        EP10_OUT_BUFFER_CONTROL ^= 1u << 15u;
    }

    inline uint16_t get_EP10_OUT_BUFFER_CONTROL_LENGTH_1() volatile
    {
        return (EP10_OUT_BUFFER_CONTROL >> 16u) & 0b1111111111u;
    }

    inline void set_EP10_OUT_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile
    {
        uint32_t curr = EP10_OUT_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 16u);
        curr |= (value & 0b1111111111u) << 16u;

        EP10_OUT_BUFFER_CONTROL = curr;
    }

    inline bool get_EP10_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        return EP10_OUT_BUFFER_CONTROL & (1u << 26u);
    }

    inline void set_EP10_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP10_OUT_BUFFER_CONTROL |= 1u << 26u;
    }

    inline void clear_EP10_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP10_OUT_BUFFER_CONTROL &= ~(1u << 26u);
    }

    inline void toggle_EP10_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP10_OUT_BUFFER_CONTROL ^= 1u << 26u;
    }

    inline USBCTRL_DPRAM_EP10_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
    get_EP10_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile
    {
        return USBCTRL_DPRAM_EP10_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
            (EP10_OUT_BUFFER_CONTROL >> 27u) & 0b11u);
    }

    inline void set_EP10_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
        USBCTRL_DPRAM_EP10_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            value) volatile
    {
        uint32_t curr = EP10_OUT_BUFFER_CONTROL;

        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(value) & 0b11u) << 27u;

        EP10_OUT_BUFFER_CONTROL = curr;
    }

    inline bool get_EP10_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        return EP10_OUT_BUFFER_CONTROL & (1u << 29u);
    }

    inline void set_EP10_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        EP10_OUT_BUFFER_CONTROL |= 1u << 29u;
    }

    inline void clear_EP10_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        EP10_OUT_BUFFER_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP10_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        EP10_OUT_BUFFER_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP10_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        return EP10_OUT_BUFFER_CONTROL & (1u << 30u);
    }

    inline void set_EP10_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        EP10_OUT_BUFFER_CONTROL |= 1u << 30u;
    }

    inline void clear_EP10_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        EP10_OUT_BUFFER_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP10_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        EP10_OUT_BUFFER_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP10_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        return EP10_OUT_BUFFER_CONTROL & (1u << 31u);
    }

    inline void set_EP10_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        EP10_OUT_BUFFER_CONTROL |= 1u << 31u;
    }

    inline void clear_EP10_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        EP10_OUT_BUFFER_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP10_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        EP10_OUT_BUFFER_CONTROL ^= 1u << 31u;
    }

    inline void get_EP10_OUT_BUFFER_CONTROL(
        uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET,
        bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1,
        bool &AVAILABLE_1,
        USBCTRL_DPRAM_EP10_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            &DOUBLE_BUFFER_ISO_OFFSET,
        bool &PID_1, bool &LAST_1, bool &FULL_1) volatile
    {
        uint32_t curr = EP10_OUT_BUFFER_CONTROL;

        LENGTH_0 = (curr >> 0u) & 0b1111111111u;
        AVAILABLE_0 = curr & (1u << 10u);
        STALL = curr & (1u << 11u);
        RESET = curr & (1u << 12u);
        PID_0 = curr & (1u << 13u);
        LAST_0 = curr & (1u << 14u);
        FULL_0 = curr & (1u << 15u);
        LENGTH_1 = (curr >> 16u) & 0b1111111111u;
        AVAILABLE_1 = curr & (1u << 26u);
        DOUBLE_BUFFER_ISO_OFFSET =
            USBCTRL_DPRAM_EP10_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
                (curr >> 27u) & 0b11u);
        PID_1 = curr & (1u << 29u);
        LAST_1 = curr & (1u << 30u);
        FULL_1 = curr & (1u << 31u);
    }

    inline void set_EP10_OUT_BUFFER_CONTROL(
        uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET,
        bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1,
        bool AVAILABLE_1,
        USBCTRL_DPRAM_EP10_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            DOUBLE_BUFFER_ISO_OFFSET,
        bool PID_1, bool LAST_1, bool FULL_1) volatile
    {
        uint32_t curr = EP10_OUT_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (LENGTH_0 & 0b1111111111u) << 0u;
        curr &= ~(0b1u << 10u);
        curr |= (AVAILABLE_0 & 0b1u) << 10u;
        curr &= ~(0b1u << 11u);
        curr |= (STALL & 0b1u) << 11u;
        curr &= ~(0b1u << 12u);
        curr |= (RESET & 0b1u) << 12u;
        curr &= ~(0b1u << 13u);
        curr |= (PID_0 & 0b1u) << 13u;
        curr &= ~(0b1u << 14u);
        curr |= (LAST_0 & 0b1u) << 14u;
        curr &= ~(0b1u << 15u);
        curr |= (FULL_0 & 0b1u) << 15u;
        curr &= ~(0b1111111111u << 16u);
        curr |= (LENGTH_1 & 0b1111111111u) << 16u;
        curr &= ~(0b1u << 26u);
        curr |= (AVAILABLE_1 & 0b1u) << 26u;
        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(DOUBLE_BUFFER_ISO_OFFSET) & 0b11u) << 27u;
        curr &= ~(0b1u << 29u);
        curr |= (PID_1 & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (LAST_1 & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (FULL_1 & 0b1u) << 31u;

        EP10_OUT_BUFFER_CONTROL = curr;
    }

    inline uint16_t get_EP11_IN_BUFFER_CONTROL_LENGTH_0() volatile
    {
        return (EP11_IN_BUFFER_CONTROL >> 0u) & 0b1111111111u;
    }

    inline void set_EP11_IN_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile
    {
        uint32_t curr = EP11_IN_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (value & 0b1111111111u) << 0u;

        EP11_IN_BUFFER_CONTROL = curr;
    }

    inline bool get_EP11_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        return EP11_IN_BUFFER_CONTROL & (1u << 10u);
    }

    inline void set_EP11_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP11_IN_BUFFER_CONTROL |= 1u << 10u;
    }

    inline void clear_EP11_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP11_IN_BUFFER_CONTROL &= ~(1u << 10u);
    }

    inline void toggle_EP11_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP11_IN_BUFFER_CONTROL ^= 1u << 10u;
    }

    inline bool get_EP11_IN_BUFFER_CONTROL_STALL() volatile
    {
        return EP11_IN_BUFFER_CONTROL & (1u << 11u);
    }

    inline void set_EP11_IN_BUFFER_CONTROL_STALL() volatile
    {
        EP11_IN_BUFFER_CONTROL |= 1u << 11u;
    }

    inline void clear_EP11_IN_BUFFER_CONTROL_STALL() volatile
    {
        EP11_IN_BUFFER_CONTROL &= ~(1u << 11u);
    }

    inline void toggle_EP11_IN_BUFFER_CONTROL_STALL() volatile
    {
        EP11_IN_BUFFER_CONTROL ^= 1u << 11u;
    }

    inline bool get_EP11_IN_BUFFER_CONTROL_RESET() volatile
    {
        return EP11_IN_BUFFER_CONTROL & (1u << 12u);
    }

    inline void set_EP11_IN_BUFFER_CONTROL_RESET() volatile
    {
        EP11_IN_BUFFER_CONTROL |= 1u << 12u;
    }

    inline void clear_EP11_IN_BUFFER_CONTROL_RESET() volatile
    {
        EP11_IN_BUFFER_CONTROL &= ~(1u << 12u);
    }

    inline void toggle_EP11_IN_BUFFER_CONTROL_RESET() volatile
    {
        EP11_IN_BUFFER_CONTROL ^= 1u << 12u;
    }

    inline bool get_EP11_IN_BUFFER_CONTROL_PID_0() volatile
    {
        return EP11_IN_BUFFER_CONTROL & (1u << 13u);
    }

    inline void set_EP11_IN_BUFFER_CONTROL_PID_0() volatile
    {
        EP11_IN_BUFFER_CONTROL |= 1u << 13u;
    }

    inline void clear_EP11_IN_BUFFER_CONTROL_PID_0() volatile
    {
        EP11_IN_BUFFER_CONTROL &= ~(1u << 13u);
    }

    inline void toggle_EP11_IN_BUFFER_CONTROL_PID_0() volatile
    {
        EP11_IN_BUFFER_CONTROL ^= 1u << 13u;
    }

    inline bool get_EP11_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        return EP11_IN_BUFFER_CONTROL & (1u << 14u);
    }

    inline void set_EP11_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        EP11_IN_BUFFER_CONTROL |= 1u << 14u;
    }

    inline void clear_EP11_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        EP11_IN_BUFFER_CONTROL &= ~(1u << 14u);
    }

    inline void toggle_EP11_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        EP11_IN_BUFFER_CONTROL ^= 1u << 14u;
    }

    inline bool get_EP11_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        return EP11_IN_BUFFER_CONTROL & (1u << 15u);
    }

    inline void set_EP11_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        EP11_IN_BUFFER_CONTROL |= 1u << 15u;
    }

    inline void clear_EP11_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        EP11_IN_BUFFER_CONTROL &= ~(1u << 15u);
    }

    inline void toggle_EP11_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        EP11_IN_BUFFER_CONTROL ^= 1u << 15u;
    }

    inline uint16_t get_EP11_IN_BUFFER_CONTROL_LENGTH_1() volatile
    {
        return (EP11_IN_BUFFER_CONTROL >> 16u) & 0b1111111111u;
    }

    inline void set_EP11_IN_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile
    {
        uint32_t curr = EP11_IN_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 16u);
        curr |= (value & 0b1111111111u) << 16u;

        EP11_IN_BUFFER_CONTROL = curr;
    }

    inline bool get_EP11_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        return EP11_IN_BUFFER_CONTROL & (1u << 26u);
    }

    inline void set_EP11_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP11_IN_BUFFER_CONTROL |= 1u << 26u;
    }

    inline void clear_EP11_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP11_IN_BUFFER_CONTROL &= ~(1u << 26u);
    }

    inline void toggle_EP11_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP11_IN_BUFFER_CONTROL ^= 1u << 26u;
    }

    inline USBCTRL_DPRAM_EP11_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
    get_EP11_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile
    {
        return USBCTRL_DPRAM_EP11_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
            (EP11_IN_BUFFER_CONTROL >> 27u) & 0b11u);
    }

    inline void set_EP11_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
        USBCTRL_DPRAM_EP11_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            value) volatile
    {
        uint32_t curr = EP11_IN_BUFFER_CONTROL;

        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(value) & 0b11u) << 27u;

        EP11_IN_BUFFER_CONTROL = curr;
    }

    inline bool get_EP11_IN_BUFFER_CONTROL_PID_1() volatile
    {
        return EP11_IN_BUFFER_CONTROL & (1u << 29u);
    }

    inline void set_EP11_IN_BUFFER_CONTROL_PID_1() volatile
    {
        EP11_IN_BUFFER_CONTROL |= 1u << 29u;
    }

    inline void clear_EP11_IN_BUFFER_CONTROL_PID_1() volatile
    {
        EP11_IN_BUFFER_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP11_IN_BUFFER_CONTROL_PID_1() volatile
    {
        EP11_IN_BUFFER_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP11_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        return EP11_IN_BUFFER_CONTROL & (1u << 30u);
    }

    inline void set_EP11_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        EP11_IN_BUFFER_CONTROL |= 1u << 30u;
    }

    inline void clear_EP11_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        EP11_IN_BUFFER_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP11_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        EP11_IN_BUFFER_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP11_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        return EP11_IN_BUFFER_CONTROL & (1u << 31u);
    }

    inline void set_EP11_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        EP11_IN_BUFFER_CONTROL |= 1u << 31u;
    }

    inline void clear_EP11_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        EP11_IN_BUFFER_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP11_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        EP11_IN_BUFFER_CONTROL ^= 1u << 31u;
    }

    inline void get_EP11_IN_BUFFER_CONTROL(
        uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET,
        bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1,
        bool &AVAILABLE_1,
        USBCTRL_DPRAM_EP11_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            &DOUBLE_BUFFER_ISO_OFFSET,
        bool &PID_1, bool &LAST_1, bool &FULL_1) volatile
    {
        uint32_t curr = EP11_IN_BUFFER_CONTROL;

        LENGTH_0 = (curr >> 0u) & 0b1111111111u;
        AVAILABLE_0 = curr & (1u << 10u);
        STALL = curr & (1u << 11u);
        RESET = curr & (1u << 12u);
        PID_0 = curr & (1u << 13u);
        LAST_0 = curr & (1u << 14u);
        FULL_0 = curr & (1u << 15u);
        LENGTH_1 = (curr >> 16u) & 0b1111111111u;
        AVAILABLE_1 = curr & (1u << 26u);
        DOUBLE_BUFFER_ISO_OFFSET =
            USBCTRL_DPRAM_EP11_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
                (curr >> 27u) & 0b11u);
        PID_1 = curr & (1u << 29u);
        LAST_1 = curr & (1u << 30u);
        FULL_1 = curr & (1u << 31u);
    }

    inline void set_EP11_IN_BUFFER_CONTROL(
        uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET,
        bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1,
        bool AVAILABLE_1,
        USBCTRL_DPRAM_EP11_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            DOUBLE_BUFFER_ISO_OFFSET,
        bool PID_1, bool LAST_1, bool FULL_1) volatile
    {
        uint32_t curr = EP11_IN_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (LENGTH_0 & 0b1111111111u) << 0u;
        curr &= ~(0b1u << 10u);
        curr |= (AVAILABLE_0 & 0b1u) << 10u;
        curr &= ~(0b1u << 11u);
        curr |= (STALL & 0b1u) << 11u;
        curr &= ~(0b1u << 12u);
        curr |= (RESET & 0b1u) << 12u;
        curr &= ~(0b1u << 13u);
        curr |= (PID_0 & 0b1u) << 13u;
        curr &= ~(0b1u << 14u);
        curr |= (LAST_0 & 0b1u) << 14u;
        curr &= ~(0b1u << 15u);
        curr |= (FULL_0 & 0b1u) << 15u;
        curr &= ~(0b1111111111u << 16u);
        curr |= (LENGTH_1 & 0b1111111111u) << 16u;
        curr &= ~(0b1u << 26u);
        curr |= (AVAILABLE_1 & 0b1u) << 26u;
        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(DOUBLE_BUFFER_ISO_OFFSET) & 0b11u) << 27u;
        curr &= ~(0b1u << 29u);
        curr |= (PID_1 & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (LAST_1 & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (FULL_1 & 0b1u) << 31u;

        EP11_IN_BUFFER_CONTROL = curr;
    }

    inline uint16_t get_EP11_OUT_BUFFER_CONTROL_LENGTH_0() volatile
    {
        return (EP11_OUT_BUFFER_CONTROL >> 0u) & 0b1111111111u;
    }

    inline void set_EP11_OUT_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile
    {
        uint32_t curr = EP11_OUT_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (value & 0b1111111111u) << 0u;

        EP11_OUT_BUFFER_CONTROL = curr;
    }

    inline bool get_EP11_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        return EP11_OUT_BUFFER_CONTROL & (1u << 10u);
    }

    inline void set_EP11_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP11_OUT_BUFFER_CONTROL |= 1u << 10u;
    }

    inline void clear_EP11_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP11_OUT_BUFFER_CONTROL &= ~(1u << 10u);
    }

    inline void toggle_EP11_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP11_OUT_BUFFER_CONTROL ^= 1u << 10u;
    }

    inline bool get_EP11_OUT_BUFFER_CONTROL_STALL() volatile
    {
        return EP11_OUT_BUFFER_CONTROL & (1u << 11u);
    }

    inline void set_EP11_OUT_BUFFER_CONTROL_STALL() volatile
    {
        EP11_OUT_BUFFER_CONTROL |= 1u << 11u;
    }

    inline void clear_EP11_OUT_BUFFER_CONTROL_STALL() volatile
    {
        EP11_OUT_BUFFER_CONTROL &= ~(1u << 11u);
    }

    inline void toggle_EP11_OUT_BUFFER_CONTROL_STALL() volatile
    {
        EP11_OUT_BUFFER_CONTROL ^= 1u << 11u;
    }

    inline bool get_EP11_OUT_BUFFER_CONTROL_RESET() volatile
    {
        return EP11_OUT_BUFFER_CONTROL & (1u << 12u);
    }

    inline void set_EP11_OUT_BUFFER_CONTROL_RESET() volatile
    {
        EP11_OUT_BUFFER_CONTROL |= 1u << 12u;
    }

    inline void clear_EP11_OUT_BUFFER_CONTROL_RESET() volatile
    {
        EP11_OUT_BUFFER_CONTROL &= ~(1u << 12u);
    }

    inline void toggle_EP11_OUT_BUFFER_CONTROL_RESET() volatile
    {
        EP11_OUT_BUFFER_CONTROL ^= 1u << 12u;
    }

    inline bool get_EP11_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        return EP11_OUT_BUFFER_CONTROL & (1u << 13u);
    }

    inline void set_EP11_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        EP11_OUT_BUFFER_CONTROL |= 1u << 13u;
    }

    inline void clear_EP11_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        EP11_OUT_BUFFER_CONTROL &= ~(1u << 13u);
    }

    inline void toggle_EP11_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        EP11_OUT_BUFFER_CONTROL ^= 1u << 13u;
    }

    inline bool get_EP11_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        return EP11_OUT_BUFFER_CONTROL & (1u << 14u);
    }

    inline void set_EP11_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        EP11_OUT_BUFFER_CONTROL |= 1u << 14u;
    }

    inline void clear_EP11_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        EP11_OUT_BUFFER_CONTROL &= ~(1u << 14u);
    }

    inline void toggle_EP11_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        EP11_OUT_BUFFER_CONTROL ^= 1u << 14u;
    }

    inline bool get_EP11_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        return EP11_OUT_BUFFER_CONTROL & (1u << 15u);
    }

    inline void set_EP11_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        EP11_OUT_BUFFER_CONTROL |= 1u << 15u;
    }

    inline void clear_EP11_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        EP11_OUT_BUFFER_CONTROL &= ~(1u << 15u);
    }

    inline void toggle_EP11_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        EP11_OUT_BUFFER_CONTROL ^= 1u << 15u;
    }

    inline uint16_t get_EP11_OUT_BUFFER_CONTROL_LENGTH_1() volatile
    {
        return (EP11_OUT_BUFFER_CONTROL >> 16u) & 0b1111111111u;
    }

    inline void set_EP11_OUT_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile
    {
        uint32_t curr = EP11_OUT_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 16u);
        curr |= (value & 0b1111111111u) << 16u;

        EP11_OUT_BUFFER_CONTROL = curr;
    }

    inline bool get_EP11_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        return EP11_OUT_BUFFER_CONTROL & (1u << 26u);
    }

    inline void set_EP11_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP11_OUT_BUFFER_CONTROL |= 1u << 26u;
    }

    inline void clear_EP11_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP11_OUT_BUFFER_CONTROL &= ~(1u << 26u);
    }

    inline void toggle_EP11_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP11_OUT_BUFFER_CONTROL ^= 1u << 26u;
    }

    inline USBCTRL_DPRAM_EP11_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
    get_EP11_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile
    {
        return USBCTRL_DPRAM_EP11_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
            (EP11_OUT_BUFFER_CONTROL >> 27u) & 0b11u);
    }

    inline void set_EP11_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
        USBCTRL_DPRAM_EP11_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            value) volatile
    {
        uint32_t curr = EP11_OUT_BUFFER_CONTROL;

        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(value) & 0b11u) << 27u;

        EP11_OUT_BUFFER_CONTROL = curr;
    }

    inline bool get_EP11_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        return EP11_OUT_BUFFER_CONTROL & (1u << 29u);
    }

    inline void set_EP11_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        EP11_OUT_BUFFER_CONTROL |= 1u << 29u;
    }

    inline void clear_EP11_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        EP11_OUT_BUFFER_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP11_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        EP11_OUT_BUFFER_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP11_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        return EP11_OUT_BUFFER_CONTROL & (1u << 30u);
    }

    inline void set_EP11_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        EP11_OUT_BUFFER_CONTROL |= 1u << 30u;
    }

    inline void clear_EP11_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        EP11_OUT_BUFFER_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP11_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        EP11_OUT_BUFFER_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP11_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        return EP11_OUT_BUFFER_CONTROL & (1u << 31u);
    }

    inline void set_EP11_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        EP11_OUT_BUFFER_CONTROL |= 1u << 31u;
    }

    inline void clear_EP11_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        EP11_OUT_BUFFER_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP11_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        EP11_OUT_BUFFER_CONTROL ^= 1u << 31u;
    }

    inline void get_EP11_OUT_BUFFER_CONTROL(
        uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET,
        bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1,
        bool &AVAILABLE_1,
        USBCTRL_DPRAM_EP11_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            &DOUBLE_BUFFER_ISO_OFFSET,
        bool &PID_1, bool &LAST_1, bool &FULL_1) volatile
    {
        uint32_t curr = EP11_OUT_BUFFER_CONTROL;

        LENGTH_0 = (curr >> 0u) & 0b1111111111u;
        AVAILABLE_0 = curr & (1u << 10u);
        STALL = curr & (1u << 11u);
        RESET = curr & (1u << 12u);
        PID_0 = curr & (1u << 13u);
        LAST_0 = curr & (1u << 14u);
        FULL_0 = curr & (1u << 15u);
        LENGTH_1 = (curr >> 16u) & 0b1111111111u;
        AVAILABLE_1 = curr & (1u << 26u);
        DOUBLE_BUFFER_ISO_OFFSET =
            USBCTRL_DPRAM_EP11_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
                (curr >> 27u) & 0b11u);
        PID_1 = curr & (1u << 29u);
        LAST_1 = curr & (1u << 30u);
        FULL_1 = curr & (1u << 31u);
    }

    inline void set_EP11_OUT_BUFFER_CONTROL(
        uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET,
        bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1,
        bool AVAILABLE_1,
        USBCTRL_DPRAM_EP11_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            DOUBLE_BUFFER_ISO_OFFSET,
        bool PID_1, bool LAST_1, bool FULL_1) volatile
    {
        uint32_t curr = EP11_OUT_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (LENGTH_0 & 0b1111111111u) << 0u;
        curr &= ~(0b1u << 10u);
        curr |= (AVAILABLE_0 & 0b1u) << 10u;
        curr &= ~(0b1u << 11u);
        curr |= (STALL & 0b1u) << 11u;
        curr &= ~(0b1u << 12u);
        curr |= (RESET & 0b1u) << 12u;
        curr &= ~(0b1u << 13u);
        curr |= (PID_0 & 0b1u) << 13u;
        curr &= ~(0b1u << 14u);
        curr |= (LAST_0 & 0b1u) << 14u;
        curr &= ~(0b1u << 15u);
        curr |= (FULL_0 & 0b1u) << 15u;
        curr &= ~(0b1111111111u << 16u);
        curr |= (LENGTH_1 & 0b1111111111u) << 16u;
        curr &= ~(0b1u << 26u);
        curr |= (AVAILABLE_1 & 0b1u) << 26u;
        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(DOUBLE_BUFFER_ISO_OFFSET) & 0b11u) << 27u;
        curr &= ~(0b1u << 29u);
        curr |= (PID_1 & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (LAST_1 & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (FULL_1 & 0b1u) << 31u;

        EP11_OUT_BUFFER_CONTROL = curr;
    }

    inline uint16_t get_EP12_IN_BUFFER_CONTROL_LENGTH_0() volatile
    {
        return (EP12_IN_BUFFER_CONTROL >> 0u) & 0b1111111111u;
    }

    inline void set_EP12_IN_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile
    {
        uint32_t curr = EP12_IN_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (value & 0b1111111111u) << 0u;

        EP12_IN_BUFFER_CONTROL = curr;
    }

    inline bool get_EP12_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        return EP12_IN_BUFFER_CONTROL & (1u << 10u);
    }

    inline void set_EP12_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP12_IN_BUFFER_CONTROL |= 1u << 10u;
    }

    inline void clear_EP12_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP12_IN_BUFFER_CONTROL &= ~(1u << 10u);
    }

    inline void toggle_EP12_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP12_IN_BUFFER_CONTROL ^= 1u << 10u;
    }

    inline bool get_EP12_IN_BUFFER_CONTROL_STALL() volatile
    {
        return EP12_IN_BUFFER_CONTROL & (1u << 11u);
    }

    inline void set_EP12_IN_BUFFER_CONTROL_STALL() volatile
    {
        EP12_IN_BUFFER_CONTROL |= 1u << 11u;
    }

    inline void clear_EP12_IN_BUFFER_CONTROL_STALL() volatile
    {
        EP12_IN_BUFFER_CONTROL &= ~(1u << 11u);
    }

    inline void toggle_EP12_IN_BUFFER_CONTROL_STALL() volatile
    {
        EP12_IN_BUFFER_CONTROL ^= 1u << 11u;
    }

    inline bool get_EP12_IN_BUFFER_CONTROL_RESET() volatile
    {
        return EP12_IN_BUFFER_CONTROL & (1u << 12u);
    }

    inline void set_EP12_IN_BUFFER_CONTROL_RESET() volatile
    {
        EP12_IN_BUFFER_CONTROL |= 1u << 12u;
    }

    inline void clear_EP12_IN_BUFFER_CONTROL_RESET() volatile
    {
        EP12_IN_BUFFER_CONTROL &= ~(1u << 12u);
    }

    inline void toggle_EP12_IN_BUFFER_CONTROL_RESET() volatile
    {
        EP12_IN_BUFFER_CONTROL ^= 1u << 12u;
    }

    inline bool get_EP12_IN_BUFFER_CONTROL_PID_0() volatile
    {
        return EP12_IN_BUFFER_CONTROL & (1u << 13u);
    }

    inline void set_EP12_IN_BUFFER_CONTROL_PID_0() volatile
    {
        EP12_IN_BUFFER_CONTROL |= 1u << 13u;
    }

    inline void clear_EP12_IN_BUFFER_CONTROL_PID_0() volatile
    {
        EP12_IN_BUFFER_CONTROL &= ~(1u << 13u);
    }

    inline void toggle_EP12_IN_BUFFER_CONTROL_PID_0() volatile
    {
        EP12_IN_BUFFER_CONTROL ^= 1u << 13u;
    }

    inline bool get_EP12_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        return EP12_IN_BUFFER_CONTROL & (1u << 14u);
    }

    inline void set_EP12_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        EP12_IN_BUFFER_CONTROL |= 1u << 14u;
    }

    inline void clear_EP12_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        EP12_IN_BUFFER_CONTROL &= ~(1u << 14u);
    }

    inline void toggle_EP12_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        EP12_IN_BUFFER_CONTROL ^= 1u << 14u;
    }

    inline bool get_EP12_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        return EP12_IN_BUFFER_CONTROL & (1u << 15u);
    }

    inline void set_EP12_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        EP12_IN_BUFFER_CONTROL |= 1u << 15u;
    }

    inline void clear_EP12_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        EP12_IN_BUFFER_CONTROL &= ~(1u << 15u);
    }

    inline void toggle_EP12_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        EP12_IN_BUFFER_CONTROL ^= 1u << 15u;
    }

    inline uint16_t get_EP12_IN_BUFFER_CONTROL_LENGTH_1() volatile
    {
        return (EP12_IN_BUFFER_CONTROL >> 16u) & 0b1111111111u;
    }

    inline void set_EP12_IN_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile
    {
        uint32_t curr = EP12_IN_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 16u);
        curr |= (value & 0b1111111111u) << 16u;

        EP12_IN_BUFFER_CONTROL = curr;
    }

    inline bool get_EP12_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        return EP12_IN_BUFFER_CONTROL & (1u << 26u);
    }

    inline void set_EP12_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP12_IN_BUFFER_CONTROL |= 1u << 26u;
    }

    inline void clear_EP12_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP12_IN_BUFFER_CONTROL &= ~(1u << 26u);
    }

    inline void toggle_EP12_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP12_IN_BUFFER_CONTROL ^= 1u << 26u;
    }

    inline USBCTRL_DPRAM_EP12_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
    get_EP12_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile
    {
        return USBCTRL_DPRAM_EP12_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
            (EP12_IN_BUFFER_CONTROL >> 27u) & 0b11u);
    }

    inline void set_EP12_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
        USBCTRL_DPRAM_EP12_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            value) volatile
    {
        uint32_t curr = EP12_IN_BUFFER_CONTROL;

        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(value) & 0b11u) << 27u;

        EP12_IN_BUFFER_CONTROL = curr;
    }

    inline bool get_EP12_IN_BUFFER_CONTROL_PID_1() volatile
    {
        return EP12_IN_BUFFER_CONTROL & (1u << 29u);
    }

    inline void set_EP12_IN_BUFFER_CONTROL_PID_1() volatile
    {
        EP12_IN_BUFFER_CONTROL |= 1u << 29u;
    }

    inline void clear_EP12_IN_BUFFER_CONTROL_PID_1() volatile
    {
        EP12_IN_BUFFER_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP12_IN_BUFFER_CONTROL_PID_1() volatile
    {
        EP12_IN_BUFFER_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP12_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        return EP12_IN_BUFFER_CONTROL & (1u << 30u);
    }

    inline void set_EP12_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        EP12_IN_BUFFER_CONTROL |= 1u << 30u;
    }

    inline void clear_EP12_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        EP12_IN_BUFFER_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP12_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        EP12_IN_BUFFER_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP12_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        return EP12_IN_BUFFER_CONTROL & (1u << 31u);
    }

    inline void set_EP12_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        EP12_IN_BUFFER_CONTROL |= 1u << 31u;
    }

    inline void clear_EP12_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        EP12_IN_BUFFER_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP12_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        EP12_IN_BUFFER_CONTROL ^= 1u << 31u;
    }

    inline void get_EP12_IN_BUFFER_CONTROL(
        uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET,
        bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1,
        bool &AVAILABLE_1,
        USBCTRL_DPRAM_EP12_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            &DOUBLE_BUFFER_ISO_OFFSET,
        bool &PID_1, bool &LAST_1, bool &FULL_1) volatile
    {
        uint32_t curr = EP12_IN_BUFFER_CONTROL;

        LENGTH_0 = (curr >> 0u) & 0b1111111111u;
        AVAILABLE_0 = curr & (1u << 10u);
        STALL = curr & (1u << 11u);
        RESET = curr & (1u << 12u);
        PID_0 = curr & (1u << 13u);
        LAST_0 = curr & (1u << 14u);
        FULL_0 = curr & (1u << 15u);
        LENGTH_1 = (curr >> 16u) & 0b1111111111u;
        AVAILABLE_1 = curr & (1u << 26u);
        DOUBLE_BUFFER_ISO_OFFSET =
            USBCTRL_DPRAM_EP12_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
                (curr >> 27u) & 0b11u);
        PID_1 = curr & (1u << 29u);
        LAST_1 = curr & (1u << 30u);
        FULL_1 = curr & (1u << 31u);
    }

    inline void set_EP12_IN_BUFFER_CONTROL(
        uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET,
        bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1,
        bool AVAILABLE_1,
        USBCTRL_DPRAM_EP12_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            DOUBLE_BUFFER_ISO_OFFSET,
        bool PID_1, bool LAST_1, bool FULL_1) volatile
    {
        uint32_t curr = EP12_IN_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (LENGTH_0 & 0b1111111111u) << 0u;
        curr &= ~(0b1u << 10u);
        curr |= (AVAILABLE_0 & 0b1u) << 10u;
        curr &= ~(0b1u << 11u);
        curr |= (STALL & 0b1u) << 11u;
        curr &= ~(0b1u << 12u);
        curr |= (RESET & 0b1u) << 12u;
        curr &= ~(0b1u << 13u);
        curr |= (PID_0 & 0b1u) << 13u;
        curr &= ~(0b1u << 14u);
        curr |= (LAST_0 & 0b1u) << 14u;
        curr &= ~(0b1u << 15u);
        curr |= (FULL_0 & 0b1u) << 15u;
        curr &= ~(0b1111111111u << 16u);
        curr |= (LENGTH_1 & 0b1111111111u) << 16u;
        curr &= ~(0b1u << 26u);
        curr |= (AVAILABLE_1 & 0b1u) << 26u;
        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(DOUBLE_BUFFER_ISO_OFFSET) & 0b11u) << 27u;
        curr &= ~(0b1u << 29u);
        curr |= (PID_1 & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (LAST_1 & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (FULL_1 & 0b1u) << 31u;

        EP12_IN_BUFFER_CONTROL = curr;
    }

    inline uint16_t get_EP12_OUT_BUFFER_CONTROL_LENGTH_0() volatile
    {
        return (EP12_OUT_BUFFER_CONTROL >> 0u) & 0b1111111111u;
    }

    inline void set_EP12_OUT_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile
    {
        uint32_t curr = EP12_OUT_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (value & 0b1111111111u) << 0u;

        EP12_OUT_BUFFER_CONTROL = curr;
    }

    inline bool get_EP12_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        return EP12_OUT_BUFFER_CONTROL & (1u << 10u);
    }

    inline void set_EP12_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP12_OUT_BUFFER_CONTROL |= 1u << 10u;
    }

    inline void clear_EP12_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP12_OUT_BUFFER_CONTROL &= ~(1u << 10u);
    }

    inline void toggle_EP12_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP12_OUT_BUFFER_CONTROL ^= 1u << 10u;
    }

    inline bool get_EP12_OUT_BUFFER_CONTROL_STALL() volatile
    {
        return EP12_OUT_BUFFER_CONTROL & (1u << 11u);
    }

    inline void set_EP12_OUT_BUFFER_CONTROL_STALL() volatile
    {
        EP12_OUT_BUFFER_CONTROL |= 1u << 11u;
    }

    inline void clear_EP12_OUT_BUFFER_CONTROL_STALL() volatile
    {
        EP12_OUT_BUFFER_CONTROL &= ~(1u << 11u);
    }

    inline void toggle_EP12_OUT_BUFFER_CONTROL_STALL() volatile
    {
        EP12_OUT_BUFFER_CONTROL ^= 1u << 11u;
    }

    inline bool get_EP12_OUT_BUFFER_CONTROL_RESET() volatile
    {
        return EP12_OUT_BUFFER_CONTROL & (1u << 12u);
    }

    inline void set_EP12_OUT_BUFFER_CONTROL_RESET() volatile
    {
        EP12_OUT_BUFFER_CONTROL |= 1u << 12u;
    }

    inline void clear_EP12_OUT_BUFFER_CONTROL_RESET() volatile
    {
        EP12_OUT_BUFFER_CONTROL &= ~(1u << 12u);
    }

    inline void toggle_EP12_OUT_BUFFER_CONTROL_RESET() volatile
    {
        EP12_OUT_BUFFER_CONTROL ^= 1u << 12u;
    }

    inline bool get_EP12_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        return EP12_OUT_BUFFER_CONTROL & (1u << 13u);
    }

    inline void set_EP12_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        EP12_OUT_BUFFER_CONTROL |= 1u << 13u;
    }

    inline void clear_EP12_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        EP12_OUT_BUFFER_CONTROL &= ~(1u << 13u);
    }

    inline void toggle_EP12_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        EP12_OUT_BUFFER_CONTROL ^= 1u << 13u;
    }

    inline bool get_EP12_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        return EP12_OUT_BUFFER_CONTROL & (1u << 14u);
    }

    inline void set_EP12_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        EP12_OUT_BUFFER_CONTROL |= 1u << 14u;
    }

    inline void clear_EP12_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        EP12_OUT_BUFFER_CONTROL &= ~(1u << 14u);
    }

    inline void toggle_EP12_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        EP12_OUT_BUFFER_CONTROL ^= 1u << 14u;
    }

    inline bool get_EP12_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        return EP12_OUT_BUFFER_CONTROL & (1u << 15u);
    }

    inline void set_EP12_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        EP12_OUT_BUFFER_CONTROL |= 1u << 15u;
    }

    inline void clear_EP12_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        EP12_OUT_BUFFER_CONTROL &= ~(1u << 15u);
    }

    inline void toggle_EP12_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        EP12_OUT_BUFFER_CONTROL ^= 1u << 15u;
    }

    inline uint16_t get_EP12_OUT_BUFFER_CONTROL_LENGTH_1() volatile
    {
        return (EP12_OUT_BUFFER_CONTROL >> 16u) & 0b1111111111u;
    }

    inline void set_EP12_OUT_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile
    {
        uint32_t curr = EP12_OUT_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 16u);
        curr |= (value & 0b1111111111u) << 16u;

        EP12_OUT_BUFFER_CONTROL = curr;
    }

    inline bool get_EP12_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        return EP12_OUT_BUFFER_CONTROL & (1u << 26u);
    }

    inline void set_EP12_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP12_OUT_BUFFER_CONTROL |= 1u << 26u;
    }

    inline void clear_EP12_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP12_OUT_BUFFER_CONTROL &= ~(1u << 26u);
    }

    inline void toggle_EP12_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP12_OUT_BUFFER_CONTROL ^= 1u << 26u;
    }

    inline USBCTRL_DPRAM_EP12_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
    get_EP12_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile
    {
        return USBCTRL_DPRAM_EP12_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
            (EP12_OUT_BUFFER_CONTROL >> 27u) & 0b11u);
    }

    inline void set_EP12_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
        USBCTRL_DPRAM_EP12_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            value) volatile
    {
        uint32_t curr = EP12_OUT_BUFFER_CONTROL;

        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(value) & 0b11u) << 27u;

        EP12_OUT_BUFFER_CONTROL = curr;
    }

    inline bool get_EP12_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        return EP12_OUT_BUFFER_CONTROL & (1u << 29u);
    }

    inline void set_EP12_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        EP12_OUT_BUFFER_CONTROL |= 1u << 29u;
    }

    inline void clear_EP12_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        EP12_OUT_BUFFER_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP12_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        EP12_OUT_BUFFER_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP12_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        return EP12_OUT_BUFFER_CONTROL & (1u << 30u);
    }

    inline void set_EP12_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        EP12_OUT_BUFFER_CONTROL |= 1u << 30u;
    }

    inline void clear_EP12_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        EP12_OUT_BUFFER_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP12_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        EP12_OUT_BUFFER_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP12_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        return EP12_OUT_BUFFER_CONTROL & (1u << 31u);
    }

    inline void set_EP12_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        EP12_OUT_BUFFER_CONTROL |= 1u << 31u;
    }

    inline void clear_EP12_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        EP12_OUT_BUFFER_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP12_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        EP12_OUT_BUFFER_CONTROL ^= 1u << 31u;
    }

    inline void get_EP12_OUT_BUFFER_CONTROL(
        uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET,
        bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1,
        bool &AVAILABLE_1,
        USBCTRL_DPRAM_EP12_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            &DOUBLE_BUFFER_ISO_OFFSET,
        bool &PID_1, bool &LAST_1, bool &FULL_1) volatile
    {
        uint32_t curr = EP12_OUT_BUFFER_CONTROL;

        LENGTH_0 = (curr >> 0u) & 0b1111111111u;
        AVAILABLE_0 = curr & (1u << 10u);
        STALL = curr & (1u << 11u);
        RESET = curr & (1u << 12u);
        PID_0 = curr & (1u << 13u);
        LAST_0 = curr & (1u << 14u);
        FULL_0 = curr & (1u << 15u);
        LENGTH_1 = (curr >> 16u) & 0b1111111111u;
        AVAILABLE_1 = curr & (1u << 26u);
        DOUBLE_BUFFER_ISO_OFFSET =
            USBCTRL_DPRAM_EP12_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
                (curr >> 27u) & 0b11u);
        PID_1 = curr & (1u << 29u);
        LAST_1 = curr & (1u << 30u);
        FULL_1 = curr & (1u << 31u);
    }

    inline void set_EP12_OUT_BUFFER_CONTROL(
        uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET,
        bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1,
        bool AVAILABLE_1,
        USBCTRL_DPRAM_EP12_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            DOUBLE_BUFFER_ISO_OFFSET,
        bool PID_1, bool LAST_1, bool FULL_1) volatile
    {
        uint32_t curr = EP12_OUT_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (LENGTH_0 & 0b1111111111u) << 0u;
        curr &= ~(0b1u << 10u);
        curr |= (AVAILABLE_0 & 0b1u) << 10u;
        curr &= ~(0b1u << 11u);
        curr |= (STALL & 0b1u) << 11u;
        curr &= ~(0b1u << 12u);
        curr |= (RESET & 0b1u) << 12u;
        curr &= ~(0b1u << 13u);
        curr |= (PID_0 & 0b1u) << 13u;
        curr &= ~(0b1u << 14u);
        curr |= (LAST_0 & 0b1u) << 14u;
        curr &= ~(0b1u << 15u);
        curr |= (FULL_0 & 0b1u) << 15u;
        curr &= ~(0b1111111111u << 16u);
        curr |= (LENGTH_1 & 0b1111111111u) << 16u;
        curr &= ~(0b1u << 26u);
        curr |= (AVAILABLE_1 & 0b1u) << 26u;
        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(DOUBLE_BUFFER_ISO_OFFSET) & 0b11u) << 27u;
        curr &= ~(0b1u << 29u);
        curr |= (PID_1 & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (LAST_1 & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (FULL_1 & 0b1u) << 31u;

        EP12_OUT_BUFFER_CONTROL = curr;
    }

    inline uint16_t get_EP13_IN_BUFFER_CONTROL_LENGTH_0() volatile
    {
        return (EP13_IN_BUFFER_CONTROL >> 0u) & 0b1111111111u;
    }

    inline void set_EP13_IN_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile
    {
        uint32_t curr = EP13_IN_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (value & 0b1111111111u) << 0u;

        EP13_IN_BUFFER_CONTROL = curr;
    }

    inline bool get_EP13_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        return EP13_IN_BUFFER_CONTROL & (1u << 10u);
    }

    inline void set_EP13_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP13_IN_BUFFER_CONTROL |= 1u << 10u;
    }

    inline void clear_EP13_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP13_IN_BUFFER_CONTROL &= ~(1u << 10u);
    }

    inline void toggle_EP13_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP13_IN_BUFFER_CONTROL ^= 1u << 10u;
    }

    inline bool get_EP13_IN_BUFFER_CONTROL_STALL() volatile
    {
        return EP13_IN_BUFFER_CONTROL & (1u << 11u);
    }

    inline void set_EP13_IN_BUFFER_CONTROL_STALL() volatile
    {
        EP13_IN_BUFFER_CONTROL |= 1u << 11u;
    }

    inline void clear_EP13_IN_BUFFER_CONTROL_STALL() volatile
    {
        EP13_IN_BUFFER_CONTROL &= ~(1u << 11u);
    }

    inline void toggle_EP13_IN_BUFFER_CONTROL_STALL() volatile
    {
        EP13_IN_BUFFER_CONTROL ^= 1u << 11u;
    }

    inline bool get_EP13_IN_BUFFER_CONTROL_RESET() volatile
    {
        return EP13_IN_BUFFER_CONTROL & (1u << 12u);
    }

    inline void set_EP13_IN_BUFFER_CONTROL_RESET() volatile
    {
        EP13_IN_BUFFER_CONTROL |= 1u << 12u;
    }

    inline void clear_EP13_IN_BUFFER_CONTROL_RESET() volatile
    {
        EP13_IN_BUFFER_CONTROL &= ~(1u << 12u);
    }

    inline void toggle_EP13_IN_BUFFER_CONTROL_RESET() volatile
    {
        EP13_IN_BUFFER_CONTROL ^= 1u << 12u;
    }

    inline bool get_EP13_IN_BUFFER_CONTROL_PID_0() volatile
    {
        return EP13_IN_BUFFER_CONTROL & (1u << 13u);
    }

    inline void set_EP13_IN_BUFFER_CONTROL_PID_0() volatile
    {
        EP13_IN_BUFFER_CONTROL |= 1u << 13u;
    }

    inline void clear_EP13_IN_BUFFER_CONTROL_PID_0() volatile
    {
        EP13_IN_BUFFER_CONTROL &= ~(1u << 13u);
    }

    inline void toggle_EP13_IN_BUFFER_CONTROL_PID_0() volatile
    {
        EP13_IN_BUFFER_CONTROL ^= 1u << 13u;
    }

    inline bool get_EP13_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        return EP13_IN_BUFFER_CONTROL & (1u << 14u);
    }

    inline void set_EP13_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        EP13_IN_BUFFER_CONTROL |= 1u << 14u;
    }

    inline void clear_EP13_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        EP13_IN_BUFFER_CONTROL &= ~(1u << 14u);
    }

    inline void toggle_EP13_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        EP13_IN_BUFFER_CONTROL ^= 1u << 14u;
    }

    inline bool get_EP13_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        return EP13_IN_BUFFER_CONTROL & (1u << 15u);
    }

    inline void set_EP13_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        EP13_IN_BUFFER_CONTROL |= 1u << 15u;
    }

    inline void clear_EP13_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        EP13_IN_BUFFER_CONTROL &= ~(1u << 15u);
    }

    inline void toggle_EP13_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        EP13_IN_BUFFER_CONTROL ^= 1u << 15u;
    }

    inline uint16_t get_EP13_IN_BUFFER_CONTROL_LENGTH_1() volatile
    {
        return (EP13_IN_BUFFER_CONTROL >> 16u) & 0b1111111111u;
    }

    inline void set_EP13_IN_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile
    {
        uint32_t curr = EP13_IN_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 16u);
        curr |= (value & 0b1111111111u) << 16u;

        EP13_IN_BUFFER_CONTROL = curr;
    }

    inline bool get_EP13_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        return EP13_IN_BUFFER_CONTROL & (1u << 26u);
    }

    inline void set_EP13_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP13_IN_BUFFER_CONTROL |= 1u << 26u;
    }

    inline void clear_EP13_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP13_IN_BUFFER_CONTROL &= ~(1u << 26u);
    }

    inline void toggle_EP13_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP13_IN_BUFFER_CONTROL ^= 1u << 26u;
    }

    inline USBCTRL_DPRAM_EP13_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
    get_EP13_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile
    {
        return USBCTRL_DPRAM_EP13_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
            (EP13_IN_BUFFER_CONTROL >> 27u) & 0b11u);
    }

    inline void set_EP13_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
        USBCTRL_DPRAM_EP13_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            value) volatile
    {
        uint32_t curr = EP13_IN_BUFFER_CONTROL;

        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(value) & 0b11u) << 27u;

        EP13_IN_BUFFER_CONTROL = curr;
    }

    inline bool get_EP13_IN_BUFFER_CONTROL_PID_1() volatile
    {
        return EP13_IN_BUFFER_CONTROL & (1u << 29u);
    }

    inline void set_EP13_IN_BUFFER_CONTROL_PID_1() volatile
    {
        EP13_IN_BUFFER_CONTROL |= 1u << 29u;
    }

    inline void clear_EP13_IN_BUFFER_CONTROL_PID_1() volatile
    {
        EP13_IN_BUFFER_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP13_IN_BUFFER_CONTROL_PID_1() volatile
    {
        EP13_IN_BUFFER_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP13_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        return EP13_IN_BUFFER_CONTROL & (1u << 30u);
    }

    inline void set_EP13_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        EP13_IN_BUFFER_CONTROL |= 1u << 30u;
    }

    inline void clear_EP13_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        EP13_IN_BUFFER_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP13_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        EP13_IN_BUFFER_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP13_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        return EP13_IN_BUFFER_CONTROL & (1u << 31u);
    }

    inline void set_EP13_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        EP13_IN_BUFFER_CONTROL |= 1u << 31u;
    }

    inline void clear_EP13_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        EP13_IN_BUFFER_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP13_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        EP13_IN_BUFFER_CONTROL ^= 1u << 31u;
    }

    inline void get_EP13_IN_BUFFER_CONTROL(
        uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET,
        bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1,
        bool &AVAILABLE_1,
        USBCTRL_DPRAM_EP13_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            &DOUBLE_BUFFER_ISO_OFFSET,
        bool &PID_1, bool &LAST_1, bool &FULL_1) volatile
    {
        uint32_t curr = EP13_IN_BUFFER_CONTROL;

        LENGTH_0 = (curr >> 0u) & 0b1111111111u;
        AVAILABLE_0 = curr & (1u << 10u);
        STALL = curr & (1u << 11u);
        RESET = curr & (1u << 12u);
        PID_0 = curr & (1u << 13u);
        LAST_0 = curr & (1u << 14u);
        FULL_0 = curr & (1u << 15u);
        LENGTH_1 = (curr >> 16u) & 0b1111111111u;
        AVAILABLE_1 = curr & (1u << 26u);
        DOUBLE_BUFFER_ISO_OFFSET =
            USBCTRL_DPRAM_EP13_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
                (curr >> 27u) & 0b11u);
        PID_1 = curr & (1u << 29u);
        LAST_1 = curr & (1u << 30u);
        FULL_1 = curr & (1u << 31u);
    }

    inline void set_EP13_IN_BUFFER_CONTROL(
        uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET,
        bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1,
        bool AVAILABLE_1,
        USBCTRL_DPRAM_EP13_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            DOUBLE_BUFFER_ISO_OFFSET,
        bool PID_1, bool LAST_1, bool FULL_1) volatile
    {
        uint32_t curr = EP13_IN_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (LENGTH_0 & 0b1111111111u) << 0u;
        curr &= ~(0b1u << 10u);
        curr |= (AVAILABLE_0 & 0b1u) << 10u;
        curr &= ~(0b1u << 11u);
        curr |= (STALL & 0b1u) << 11u;
        curr &= ~(0b1u << 12u);
        curr |= (RESET & 0b1u) << 12u;
        curr &= ~(0b1u << 13u);
        curr |= (PID_0 & 0b1u) << 13u;
        curr &= ~(0b1u << 14u);
        curr |= (LAST_0 & 0b1u) << 14u;
        curr &= ~(0b1u << 15u);
        curr |= (FULL_0 & 0b1u) << 15u;
        curr &= ~(0b1111111111u << 16u);
        curr |= (LENGTH_1 & 0b1111111111u) << 16u;
        curr &= ~(0b1u << 26u);
        curr |= (AVAILABLE_1 & 0b1u) << 26u;
        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(DOUBLE_BUFFER_ISO_OFFSET) & 0b11u) << 27u;
        curr &= ~(0b1u << 29u);
        curr |= (PID_1 & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (LAST_1 & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (FULL_1 & 0b1u) << 31u;

        EP13_IN_BUFFER_CONTROL = curr;
    }

    inline uint16_t get_EP13_OUT_BUFFER_CONTROL_LENGTH_0() volatile
    {
        return (EP13_OUT_BUFFER_CONTROL >> 0u) & 0b1111111111u;
    }

    inline void set_EP13_OUT_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile
    {
        uint32_t curr = EP13_OUT_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (value & 0b1111111111u) << 0u;

        EP13_OUT_BUFFER_CONTROL = curr;
    }

    inline bool get_EP13_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        return EP13_OUT_BUFFER_CONTROL & (1u << 10u);
    }

    inline void set_EP13_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP13_OUT_BUFFER_CONTROL |= 1u << 10u;
    }

    inline void clear_EP13_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP13_OUT_BUFFER_CONTROL &= ~(1u << 10u);
    }

    inline void toggle_EP13_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP13_OUT_BUFFER_CONTROL ^= 1u << 10u;
    }

    inline bool get_EP13_OUT_BUFFER_CONTROL_STALL() volatile
    {
        return EP13_OUT_BUFFER_CONTROL & (1u << 11u);
    }

    inline void set_EP13_OUT_BUFFER_CONTROL_STALL() volatile
    {
        EP13_OUT_BUFFER_CONTROL |= 1u << 11u;
    }

    inline void clear_EP13_OUT_BUFFER_CONTROL_STALL() volatile
    {
        EP13_OUT_BUFFER_CONTROL &= ~(1u << 11u);
    }

    inline void toggle_EP13_OUT_BUFFER_CONTROL_STALL() volatile
    {
        EP13_OUT_BUFFER_CONTROL ^= 1u << 11u;
    }

    inline bool get_EP13_OUT_BUFFER_CONTROL_RESET() volatile
    {
        return EP13_OUT_BUFFER_CONTROL & (1u << 12u);
    }

    inline void set_EP13_OUT_BUFFER_CONTROL_RESET() volatile
    {
        EP13_OUT_BUFFER_CONTROL |= 1u << 12u;
    }

    inline void clear_EP13_OUT_BUFFER_CONTROL_RESET() volatile
    {
        EP13_OUT_BUFFER_CONTROL &= ~(1u << 12u);
    }

    inline void toggle_EP13_OUT_BUFFER_CONTROL_RESET() volatile
    {
        EP13_OUT_BUFFER_CONTROL ^= 1u << 12u;
    }

    inline bool get_EP13_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        return EP13_OUT_BUFFER_CONTROL & (1u << 13u);
    }

    inline void set_EP13_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        EP13_OUT_BUFFER_CONTROL |= 1u << 13u;
    }

    inline void clear_EP13_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        EP13_OUT_BUFFER_CONTROL &= ~(1u << 13u);
    }

    inline void toggle_EP13_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        EP13_OUT_BUFFER_CONTROL ^= 1u << 13u;
    }

    inline bool get_EP13_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        return EP13_OUT_BUFFER_CONTROL & (1u << 14u);
    }

    inline void set_EP13_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        EP13_OUT_BUFFER_CONTROL |= 1u << 14u;
    }

    inline void clear_EP13_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        EP13_OUT_BUFFER_CONTROL &= ~(1u << 14u);
    }

    inline void toggle_EP13_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        EP13_OUT_BUFFER_CONTROL ^= 1u << 14u;
    }

    inline bool get_EP13_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        return EP13_OUT_BUFFER_CONTROL & (1u << 15u);
    }

    inline void set_EP13_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        EP13_OUT_BUFFER_CONTROL |= 1u << 15u;
    }

    inline void clear_EP13_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        EP13_OUT_BUFFER_CONTROL &= ~(1u << 15u);
    }

    inline void toggle_EP13_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        EP13_OUT_BUFFER_CONTROL ^= 1u << 15u;
    }

    inline uint16_t get_EP13_OUT_BUFFER_CONTROL_LENGTH_1() volatile
    {
        return (EP13_OUT_BUFFER_CONTROL >> 16u) & 0b1111111111u;
    }

    inline void set_EP13_OUT_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile
    {
        uint32_t curr = EP13_OUT_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 16u);
        curr |= (value & 0b1111111111u) << 16u;

        EP13_OUT_BUFFER_CONTROL = curr;
    }

    inline bool get_EP13_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        return EP13_OUT_BUFFER_CONTROL & (1u << 26u);
    }

    inline void set_EP13_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP13_OUT_BUFFER_CONTROL |= 1u << 26u;
    }

    inline void clear_EP13_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP13_OUT_BUFFER_CONTROL &= ~(1u << 26u);
    }

    inline void toggle_EP13_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP13_OUT_BUFFER_CONTROL ^= 1u << 26u;
    }

    inline USBCTRL_DPRAM_EP13_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
    get_EP13_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile
    {
        return USBCTRL_DPRAM_EP13_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
            (EP13_OUT_BUFFER_CONTROL >> 27u) & 0b11u);
    }

    inline void set_EP13_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
        USBCTRL_DPRAM_EP13_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            value) volatile
    {
        uint32_t curr = EP13_OUT_BUFFER_CONTROL;

        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(value) & 0b11u) << 27u;

        EP13_OUT_BUFFER_CONTROL = curr;
    }

    inline bool get_EP13_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        return EP13_OUT_BUFFER_CONTROL & (1u << 29u);
    }

    inline void set_EP13_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        EP13_OUT_BUFFER_CONTROL |= 1u << 29u;
    }

    inline void clear_EP13_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        EP13_OUT_BUFFER_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP13_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        EP13_OUT_BUFFER_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP13_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        return EP13_OUT_BUFFER_CONTROL & (1u << 30u);
    }

    inline void set_EP13_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        EP13_OUT_BUFFER_CONTROL |= 1u << 30u;
    }

    inline void clear_EP13_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        EP13_OUT_BUFFER_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP13_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        EP13_OUT_BUFFER_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP13_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        return EP13_OUT_BUFFER_CONTROL & (1u << 31u);
    }

    inline void set_EP13_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        EP13_OUT_BUFFER_CONTROL |= 1u << 31u;
    }

    inline void clear_EP13_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        EP13_OUT_BUFFER_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP13_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        EP13_OUT_BUFFER_CONTROL ^= 1u << 31u;
    }

    inline void get_EP13_OUT_BUFFER_CONTROL(
        uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET,
        bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1,
        bool &AVAILABLE_1,
        USBCTRL_DPRAM_EP13_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            &DOUBLE_BUFFER_ISO_OFFSET,
        bool &PID_1, bool &LAST_1, bool &FULL_1) volatile
    {
        uint32_t curr = EP13_OUT_BUFFER_CONTROL;

        LENGTH_0 = (curr >> 0u) & 0b1111111111u;
        AVAILABLE_0 = curr & (1u << 10u);
        STALL = curr & (1u << 11u);
        RESET = curr & (1u << 12u);
        PID_0 = curr & (1u << 13u);
        LAST_0 = curr & (1u << 14u);
        FULL_0 = curr & (1u << 15u);
        LENGTH_1 = (curr >> 16u) & 0b1111111111u;
        AVAILABLE_1 = curr & (1u << 26u);
        DOUBLE_BUFFER_ISO_OFFSET =
            USBCTRL_DPRAM_EP13_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
                (curr >> 27u) & 0b11u);
        PID_1 = curr & (1u << 29u);
        LAST_1 = curr & (1u << 30u);
        FULL_1 = curr & (1u << 31u);
    }

    inline void set_EP13_OUT_BUFFER_CONTROL(
        uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET,
        bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1,
        bool AVAILABLE_1,
        USBCTRL_DPRAM_EP13_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            DOUBLE_BUFFER_ISO_OFFSET,
        bool PID_1, bool LAST_1, bool FULL_1) volatile
    {
        uint32_t curr = EP13_OUT_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (LENGTH_0 & 0b1111111111u) << 0u;
        curr &= ~(0b1u << 10u);
        curr |= (AVAILABLE_0 & 0b1u) << 10u;
        curr &= ~(0b1u << 11u);
        curr |= (STALL & 0b1u) << 11u;
        curr &= ~(0b1u << 12u);
        curr |= (RESET & 0b1u) << 12u;
        curr &= ~(0b1u << 13u);
        curr |= (PID_0 & 0b1u) << 13u;
        curr &= ~(0b1u << 14u);
        curr |= (LAST_0 & 0b1u) << 14u;
        curr &= ~(0b1u << 15u);
        curr |= (FULL_0 & 0b1u) << 15u;
        curr &= ~(0b1111111111u << 16u);
        curr |= (LENGTH_1 & 0b1111111111u) << 16u;
        curr &= ~(0b1u << 26u);
        curr |= (AVAILABLE_1 & 0b1u) << 26u;
        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(DOUBLE_BUFFER_ISO_OFFSET) & 0b11u) << 27u;
        curr &= ~(0b1u << 29u);
        curr |= (PID_1 & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (LAST_1 & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (FULL_1 & 0b1u) << 31u;

        EP13_OUT_BUFFER_CONTROL = curr;
    }

    inline uint16_t get_EP14_IN_BUFFER_CONTROL_LENGTH_0() volatile
    {
        return (EP14_IN_BUFFER_CONTROL >> 0u) & 0b1111111111u;
    }

    inline void set_EP14_IN_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile
    {
        uint32_t curr = EP14_IN_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (value & 0b1111111111u) << 0u;

        EP14_IN_BUFFER_CONTROL = curr;
    }

    inline bool get_EP14_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        return EP14_IN_BUFFER_CONTROL & (1u << 10u);
    }

    inline void set_EP14_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP14_IN_BUFFER_CONTROL |= 1u << 10u;
    }

    inline void clear_EP14_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP14_IN_BUFFER_CONTROL &= ~(1u << 10u);
    }

    inline void toggle_EP14_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP14_IN_BUFFER_CONTROL ^= 1u << 10u;
    }

    inline bool get_EP14_IN_BUFFER_CONTROL_STALL() volatile
    {
        return EP14_IN_BUFFER_CONTROL & (1u << 11u);
    }

    inline void set_EP14_IN_BUFFER_CONTROL_STALL() volatile
    {
        EP14_IN_BUFFER_CONTROL |= 1u << 11u;
    }

    inline void clear_EP14_IN_BUFFER_CONTROL_STALL() volatile
    {
        EP14_IN_BUFFER_CONTROL &= ~(1u << 11u);
    }

    inline void toggle_EP14_IN_BUFFER_CONTROL_STALL() volatile
    {
        EP14_IN_BUFFER_CONTROL ^= 1u << 11u;
    }

    inline bool get_EP14_IN_BUFFER_CONTROL_RESET() volatile
    {
        return EP14_IN_BUFFER_CONTROL & (1u << 12u);
    }

    inline void set_EP14_IN_BUFFER_CONTROL_RESET() volatile
    {
        EP14_IN_BUFFER_CONTROL |= 1u << 12u;
    }

    inline void clear_EP14_IN_BUFFER_CONTROL_RESET() volatile
    {
        EP14_IN_BUFFER_CONTROL &= ~(1u << 12u);
    }

    inline void toggle_EP14_IN_BUFFER_CONTROL_RESET() volatile
    {
        EP14_IN_BUFFER_CONTROL ^= 1u << 12u;
    }

    inline bool get_EP14_IN_BUFFER_CONTROL_PID_0() volatile
    {
        return EP14_IN_BUFFER_CONTROL & (1u << 13u);
    }

    inline void set_EP14_IN_BUFFER_CONTROL_PID_0() volatile
    {
        EP14_IN_BUFFER_CONTROL |= 1u << 13u;
    }

    inline void clear_EP14_IN_BUFFER_CONTROL_PID_0() volatile
    {
        EP14_IN_BUFFER_CONTROL &= ~(1u << 13u);
    }

    inline void toggle_EP14_IN_BUFFER_CONTROL_PID_0() volatile
    {
        EP14_IN_BUFFER_CONTROL ^= 1u << 13u;
    }

    inline bool get_EP14_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        return EP14_IN_BUFFER_CONTROL & (1u << 14u);
    }

    inline void set_EP14_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        EP14_IN_BUFFER_CONTROL |= 1u << 14u;
    }

    inline void clear_EP14_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        EP14_IN_BUFFER_CONTROL &= ~(1u << 14u);
    }

    inline void toggle_EP14_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        EP14_IN_BUFFER_CONTROL ^= 1u << 14u;
    }

    inline bool get_EP14_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        return EP14_IN_BUFFER_CONTROL & (1u << 15u);
    }

    inline void set_EP14_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        EP14_IN_BUFFER_CONTROL |= 1u << 15u;
    }

    inline void clear_EP14_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        EP14_IN_BUFFER_CONTROL &= ~(1u << 15u);
    }

    inline void toggle_EP14_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        EP14_IN_BUFFER_CONTROL ^= 1u << 15u;
    }

    inline uint16_t get_EP14_IN_BUFFER_CONTROL_LENGTH_1() volatile
    {
        return (EP14_IN_BUFFER_CONTROL >> 16u) & 0b1111111111u;
    }

    inline void set_EP14_IN_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile
    {
        uint32_t curr = EP14_IN_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 16u);
        curr |= (value & 0b1111111111u) << 16u;

        EP14_IN_BUFFER_CONTROL = curr;
    }

    inline bool get_EP14_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        return EP14_IN_BUFFER_CONTROL & (1u << 26u);
    }

    inline void set_EP14_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP14_IN_BUFFER_CONTROL |= 1u << 26u;
    }

    inline void clear_EP14_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP14_IN_BUFFER_CONTROL &= ~(1u << 26u);
    }

    inline void toggle_EP14_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP14_IN_BUFFER_CONTROL ^= 1u << 26u;
    }

    inline USBCTRL_DPRAM_EP14_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
    get_EP14_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile
    {
        return USBCTRL_DPRAM_EP14_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
            (EP14_IN_BUFFER_CONTROL >> 27u) & 0b11u);
    }

    inline void set_EP14_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
        USBCTRL_DPRAM_EP14_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            value) volatile
    {
        uint32_t curr = EP14_IN_BUFFER_CONTROL;

        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(value) & 0b11u) << 27u;

        EP14_IN_BUFFER_CONTROL = curr;
    }

    inline bool get_EP14_IN_BUFFER_CONTROL_PID_1() volatile
    {
        return EP14_IN_BUFFER_CONTROL & (1u << 29u);
    }

    inline void set_EP14_IN_BUFFER_CONTROL_PID_1() volatile
    {
        EP14_IN_BUFFER_CONTROL |= 1u << 29u;
    }

    inline void clear_EP14_IN_BUFFER_CONTROL_PID_1() volatile
    {
        EP14_IN_BUFFER_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP14_IN_BUFFER_CONTROL_PID_1() volatile
    {
        EP14_IN_BUFFER_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP14_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        return EP14_IN_BUFFER_CONTROL & (1u << 30u);
    }

    inline void set_EP14_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        EP14_IN_BUFFER_CONTROL |= 1u << 30u;
    }

    inline void clear_EP14_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        EP14_IN_BUFFER_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP14_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        EP14_IN_BUFFER_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP14_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        return EP14_IN_BUFFER_CONTROL & (1u << 31u);
    }

    inline void set_EP14_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        EP14_IN_BUFFER_CONTROL |= 1u << 31u;
    }

    inline void clear_EP14_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        EP14_IN_BUFFER_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP14_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        EP14_IN_BUFFER_CONTROL ^= 1u << 31u;
    }

    inline void get_EP14_IN_BUFFER_CONTROL(
        uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET,
        bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1,
        bool &AVAILABLE_1,
        USBCTRL_DPRAM_EP14_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            &DOUBLE_BUFFER_ISO_OFFSET,
        bool &PID_1, bool &LAST_1, bool &FULL_1) volatile
    {
        uint32_t curr = EP14_IN_BUFFER_CONTROL;

        LENGTH_0 = (curr >> 0u) & 0b1111111111u;
        AVAILABLE_0 = curr & (1u << 10u);
        STALL = curr & (1u << 11u);
        RESET = curr & (1u << 12u);
        PID_0 = curr & (1u << 13u);
        LAST_0 = curr & (1u << 14u);
        FULL_0 = curr & (1u << 15u);
        LENGTH_1 = (curr >> 16u) & 0b1111111111u;
        AVAILABLE_1 = curr & (1u << 26u);
        DOUBLE_BUFFER_ISO_OFFSET =
            USBCTRL_DPRAM_EP14_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
                (curr >> 27u) & 0b11u);
        PID_1 = curr & (1u << 29u);
        LAST_1 = curr & (1u << 30u);
        FULL_1 = curr & (1u << 31u);
    }

    inline void set_EP14_IN_BUFFER_CONTROL(
        uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET,
        bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1,
        bool AVAILABLE_1,
        USBCTRL_DPRAM_EP14_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            DOUBLE_BUFFER_ISO_OFFSET,
        bool PID_1, bool LAST_1, bool FULL_1) volatile
    {
        uint32_t curr = EP14_IN_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (LENGTH_0 & 0b1111111111u) << 0u;
        curr &= ~(0b1u << 10u);
        curr |= (AVAILABLE_0 & 0b1u) << 10u;
        curr &= ~(0b1u << 11u);
        curr |= (STALL & 0b1u) << 11u;
        curr &= ~(0b1u << 12u);
        curr |= (RESET & 0b1u) << 12u;
        curr &= ~(0b1u << 13u);
        curr |= (PID_0 & 0b1u) << 13u;
        curr &= ~(0b1u << 14u);
        curr |= (LAST_0 & 0b1u) << 14u;
        curr &= ~(0b1u << 15u);
        curr |= (FULL_0 & 0b1u) << 15u;
        curr &= ~(0b1111111111u << 16u);
        curr |= (LENGTH_1 & 0b1111111111u) << 16u;
        curr &= ~(0b1u << 26u);
        curr |= (AVAILABLE_1 & 0b1u) << 26u;
        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(DOUBLE_BUFFER_ISO_OFFSET) & 0b11u) << 27u;
        curr &= ~(0b1u << 29u);
        curr |= (PID_1 & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (LAST_1 & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (FULL_1 & 0b1u) << 31u;

        EP14_IN_BUFFER_CONTROL = curr;
    }

    inline uint16_t get_EP14_OUT_BUFFER_CONTROL_LENGTH_0() volatile
    {
        return (EP14_OUT_BUFFER_CONTROL >> 0u) & 0b1111111111u;
    }

    inline void set_EP14_OUT_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile
    {
        uint32_t curr = EP14_OUT_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (value & 0b1111111111u) << 0u;

        EP14_OUT_BUFFER_CONTROL = curr;
    }

    inline bool get_EP14_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        return EP14_OUT_BUFFER_CONTROL & (1u << 10u);
    }

    inline void set_EP14_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP14_OUT_BUFFER_CONTROL |= 1u << 10u;
    }

    inline void clear_EP14_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP14_OUT_BUFFER_CONTROL &= ~(1u << 10u);
    }

    inline void toggle_EP14_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP14_OUT_BUFFER_CONTROL ^= 1u << 10u;
    }

    inline bool get_EP14_OUT_BUFFER_CONTROL_STALL() volatile
    {
        return EP14_OUT_BUFFER_CONTROL & (1u << 11u);
    }

    inline void set_EP14_OUT_BUFFER_CONTROL_STALL() volatile
    {
        EP14_OUT_BUFFER_CONTROL |= 1u << 11u;
    }

    inline void clear_EP14_OUT_BUFFER_CONTROL_STALL() volatile
    {
        EP14_OUT_BUFFER_CONTROL &= ~(1u << 11u);
    }

    inline void toggle_EP14_OUT_BUFFER_CONTROL_STALL() volatile
    {
        EP14_OUT_BUFFER_CONTROL ^= 1u << 11u;
    }

    inline bool get_EP14_OUT_BUFFER_CONTROL_RESET() volatile
    {
        return EP14_OUT_BUFFER_CONTROL & (1u << 12u);
    }

    inline void set_EP14_OUT_BUFFER_CONTROL_RESET() volatile
    {
        EP14_OUT_BUFFER_CONTROL |= 1u << 12u;
    }

    inline void clear_EP14_OUT_BUFFER_CONTROL_RESET() volatile
    {
        EP14_OUT_BUFFER_CONTROL &= ~(1u << 12u);
    }

    inline void toggle_EP14_OUT_BUFFER_CONTROL_RESET() volatile
    {
        EP14_OUT_BUFFER_CONTROL ^= 1u << 12u;
    }

    inline bool get_EP14_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        return EP14_OUT_BUFFER_CONTROL & (1u << 13u);
    }

    inline void set_EP14_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        EP14_OUT_BUFFER_CONTROL |= 1u << 13u;
    }

    inline void clear_EP14_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        EP14_OUT_BUFFER_CONTROL &= ~(1u << 13u);
    }

    inline void toggle_EP14_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        EP14_OUT_BUFFER_CONTROL ^= 1u << 13u;
    }

    inline bool get_EP14_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        return EP14_OUT_BUFFER_CONTROL & (1u << 14u);
    }

    inline void set_EP14_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        EP14_OUT_BUFFER_CONTROL |= 1u << 14u;
    }

    inline void clear_EP14_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        EP14_OUT_BUFFER_CONTROL &= ~(1u << 14u);
    }

    inline void toggle_EP14_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        EP14_OUT_BUFFER_CONTROL ^= 1u << 14u;
    }

    inline bool get_EP14_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        return EP14_OUT_BUFFER_CONTROL & (1u << 15u);
    }

    inline void set_EP14_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        EP14_OUT_BUFFER_CONTROL |= 1u << 15u;
    }

    inline void clear_EP14_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        EP14_OUT_BUFFER_CONTROL &= ~(1u << 15u);
    }

    inline void toggle_EP14_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        EP14_OUT_BUFFER_CONTROL ^= 1u << 15u;
    }

    inline uint16_t get_EP14_OUT_BUFFER_CONTROL_LENGTH_1() volatile
    {
        return (EP14_OUT_BUFFER_CONTROL >> 16u) & 0b1111111111u;
    }

    inline void set_EP14_OUT_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile
    {
        uint32_t curr = EP14_OUT_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 16u);
        curr |= (value & 0b1111111111u) << 16u;

        EP14_OUT_BUFFER_CONTROL = curr;
    }

    inline bool get_EP14_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        return EP14_OUT_BUFFER_CONTROL & (1u << 26u);
    }

    inline void set_EP14_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP14_OUT_BUFFER_CONTROL |= 1u << 26u;
    }

    inline void clear_EP14_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP14_OUT_BUFFER_CONTROL &= ~(1u << 26u);
    }

    inline void toggle_EP14_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP14_OUT_BUFFER_CONTROL ^= 1u << 26u;
    }

    inline USBCTRL_DPRAM_EP14_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
    get_EP14_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile
    {
        return USBCTRL_DPRAM_EP14_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
            (EP14_OUT_BUFFER_CONTROL >> 27u) & 0b11u);
    }

    inline void set_EP14_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
        USBCTRL_DPRAM_EP14_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            value) volatile
    {
        uint32_t curr = EP14_OUT_BUFFER_CONTROL;

        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(value) & 0b11u) << 27u;

        EP14_OUT_BUFFER_CONTROL = curr;
    }

    inline bool get_EP14_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        return EP14_OUT_BUFFER_CONTROL & (1u << 29u);
    }

    inline void set_EP14_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        EP14_OUT_BUFFER_CONTROL |= 1u << 29u;
    }

    inline void clear_EP14_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        EP14_OUT_BUFFER_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP14_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        EP14_OUT_BUFFER_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP14_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        return EP14_OUT_BUFFER_CONTROL & (1u << 30u);
    }

    inline void set_EP14_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        EP14_OUT_BUFFER_CONTROL |= 1u << 30u;
    }

    inline void clear_EP14_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        EP14_OUT_BUFFER_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP14_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        EP14_OUT_BUFFER_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP14_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        return EP14_OUT_BUFFER_CONTROL & (1u << 31u);
    }

    inline void set_EP14_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        EP14_OUT_BUFFER_CONTROL |= 1u << 31u;
    }

    inline void clear_EP14_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        EP14_OUT_BUFFER_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP14_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        EP14_OUT_BUFFER_CONTROL ^= 1u << 31u;
    }

    inline void get_EP14_OUT_BUFFER_CONTROL(
        uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET,
        bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1,
        bool &AVAILABLE_1,
        USBCTRL_DPRAM_EP14_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            &DOUBLE_BUFFER_ISO_OFFSET,
        bool &PID_1, bool &LAST_1, bool &FULL_1) volatile
    {
        uint32_t curr = EP14_OUT_BUFFER_CONTROL;

        LENGTH_0 = (curr >> 0u) & 0b1111111111u;
        AVAILABLE_0 = curr & (1u << 10u);
        STALL = curr & (1u << 11u);
        RESET = curr & (1u << 12u);
        PID_0 = curr & (1u << 13u);
        LAST_0 = curr & (1u << 14u);
        FULL_0 = curr & (1u << 15u);
        LENGTH_1 = (curr >> 16u) & 0b1111111111u;
        AVAILABLE_1 = curr & (1u << 26u);
        DOUBLE_BUFFER_ISO_OFFSET =
            USBCTRL_DPRAM_EP14_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
                (curr >> 27u) & 0b11u);
        PID_1 = curr & (1u << 29u);
        LAST_1 = curr & (1u << 30u);
        FULL_1 = curr & (1u << 31u);
    }

    inline void set_EP14_OUT_BUFFER_CONTROL(
        uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET,
        bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1,
        bool AVAILABLE_1,
        USBCTRL_DPRAM_EP14_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            DOUBLE_BUFFER_ISO_OFFSET,
        bool PID_1, bool LAST_1, bool FULL_1) volatile
    {
        uint32_t curr = EP14_OUT_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (LENGTH_0 & 0b1111111111u) << 0u;
        curr &= ~(0b1u << 10u);
        curr |= (AVAILABLE_0 & 0b1u) << 10u;
        curr &= ~(0b1u << 11u);
        curr |= (STALL & 0b1u) << 11u;
        curr &= ~(0b1u << 12u);
        curr |= (RESET & 0b1u) << 12u;
        curr &= ~(0b1u << 13u);
        curr |= (PID_0 & 0b1u) << 13u;
        curr &= ~(0b1u << 14u);
        curr |= (LAST_0 & 0b1u) << 14u;
        curr &= ~(0b1u << 15u);
        curr |= (FULL_0 & 0b1u) << 15u;
        curr &= ~(0b1111111111u << 16u);
        curr |= (LENGTH_1 & 0b1111111111u) << 16u;
        curr &= ~(0b1u << 26u);
        curr |= (AVAILABLE_1 & 0b1u) << 26u;
        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(DOUBLE_BUFFER_ISO_OFFSET) & 0b11u) << 27u;
        curr &= ~(0b1u << 29u);
        curr |= (PID_1 & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (LAST_1 & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (FULL_1 & 0b1u) << 31u;

        EP14_OUT_BUFFER_CONTROL = curr;
    }

    inline uint16_t get_EP15_IN_BUFFER_CONTROL_LENGTH_0() volatile
    {
        return (EP15_IN_BUFFER_CONTROL >> 0u) & 0b1111111111u;
    }

    inline void set_EP15_IN_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile
    {
        uint32_t curr = EP15_IN_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (value & 0b1111111111u) << 0u;

        EP15_IN_BUFFER_CONTROL = curr;
    }

    inline bool get_EP15_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        return EP15_IN_BUFFER_CONTROL & (1u << 10u);
    }

    inline void set_EP15_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP15_IN_BUFFER_CONTROL |= 1u << 10u;
    }

    inline void clear_EP15_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP15_IN_BUFFER_CONTROL &= ~(1u << 10u);
    }

    inline void toggle_EP15_IN_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP15_IN_BUFFER_CONTROL ^= 1u << 10u;
    }

    inline bool get_EP15_IN_BUFFER_CONTROL_STALL() volatile
    {
        return EP15_IN_BUFFER_CONTROL & (1u << 11u);
    }

    inline void set_EP15_IN_BUFFER_CONTROL_STALL() volatile
    {
        EP15_IN_BUFFER_CONTROL |= 1u << 11u;
    }

    inline void clear_EP15_IN_BUFFER_CONTROL_STALL() volatile
    {
        EP15_IN_BUFFER_CONTROL &= ~(1u << 11u);
    }

    inline void toggle_EP15_IN_BUFFER_CONTROL_STALL() volatile
    {
        EP15_IN_BUFFER_CONTROL ^= 1u << 11u;
    }

    inline bool get_EP15_IN_BUFFER_CONTROL_RESET() volatile
    {
        return EP15_IN_BUFFER_CONTROL & (1u << 12u);
    }

    inline void set_EP15_IN_BUFFER_CONTROL_RESET() volatile
    {
        EP15_IN_BUFFER_CONTROL |= 1u << 12u;
    }

    inline void clear_EP15_IN_BUFFER_CONTROL_RESET() volatile
    {
        EP15_IN_BUFFER_CONTROL &= ~(1u << 12u);
    }

    inline void toggle_EP15_IN_BUFFER_CONTROL_RESET() volatile
    {
        EP15_IN_BUFFER_CONTROL ^= 1u << 12u;
    }

    inline bool get_EP15_IN_BUFFER_CONTROL_PID_0() volatile
    {
        return EP15_IN_BUFFER_CONTROL & (1u << 13u);
    }

    inline void set_EP15_IN_BUFFER_CONTROL_PID_0() volatile
    {
        EP15_IN_BUFFER_CONTROL |= 1u << 13u;
    }

    inline void clear_EP15_IN_BUFFER_CONTROL_PID_0() volatile
    {
        EP15_IN_BUFFER_CONTROL &= ~(1u << 13u);
    }

    inline void toggle_EP15_IN_BUFFER_CONTROL_PID_0() volatile
    {
        EP15_IN_BUFFER_CONTROL ^= 1u << 13u;
    }

    inline bool get_EP15_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        return EP15_IN_BUFFER_CONTROL & (1u << 14u);
    }

    inline void set_EP15_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        EP15_IN_BUFFER_CONTROL |= 1u << 14u;
    }

    inline void clear_EP15_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        EP15_IN_BUFFER_CONTROL &= ~(1u << 14u);
    }

    inline void toggle_EP15_IN_BUFFER_CONTROL_LAST_0() volatile
    {
        EP15_IN_BUFFER_CONTROL ^= 1u << 14u;
    }

    inline bool get_EP15_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        return EP15_IN_BUFFER_CONTROL & (1u << 15u);
    }

    inline void set_EP15_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        EP15_IN_BUFFER_CONTROL |= 1u << 15u;
    }

    inline void clear_EP15_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        EP15_IN_BUFFER_CONTROL &= ~(1u << 15u);
    }

    inline void toggle_EP15_IN_BUFFER_CONTROL_FULL_0() volatile
    {
        EP15_IN_BUFFER_CONTROL ^= 1u << 15u;
    }

    inline uint16_t get_EP15_IN_BUFFER_CONTROL_LENGTH_1() volatile
    {
        return (EP15_IN_BUFFER_CONTROL >> 16u) & 0b1111111111u;
    }

    inline void set_EP15_IN_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile
    {
        uint32_t curr = EP15_IN_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 16u);
        curr |= (value & 0b1111111111u) << 16u;

        EP15_IN_BUFFER_CONTROL = curr;
    }

    inline bool get_EP15_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        return EP15_IN_BUFFER_CONTROL & (1u << 26u);
    }

    inline void set_EP15_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP15_IN_BUFFER_CONTROL |= 1u << 26u;
    }

    inline void clear_EP15_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP15_IN_BUFFER_CONTROL &= ~(1u << 26u);
    }

    inline void toggle_EP15_IN_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP15_IN_BUFFER_CONTROL ^= 1u << 26u;
    }

    inline USBCTRL_DPRAM_EP15_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
    get_EP15_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile
    {
        return USBCTRL_DPRAM_EP15_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
            (EP15_IN_BUFFER_CONTROL >> 27u) & 0b11u);
    }

    inline void set_EP15_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
        USBCTRL_DPRAM_EP15_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            value) volatile
    {
        uint32_t curr = EP15_IN_BUFFER_CONTROL;

        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(value) & 0b11u) << 27u;

        EP15_IN_BUFFER_CONTROL = curr;
    }

    inline bool get_EP15_IN_BUFFER_CONTROL_PID_1() volatile
    {
        return EP15_IN_BUFFER_CONTROL & (1u << 29u);
    }

    inline void set_EP15_IN_BUFFER_CONTROL_PID_1() volatile
    {
        EP15_IN_BUFFER_CONTROL |= 1u << 29u;
    }

    inline void clear_EP15_IN_BUFFER_CONTROL_PID_1() volatile
    {
        EP15_IN_BUFFER_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP15_IN_BUFFER_CONTROL_PID_1() volatile
    {
        EP15_IN_BUFFER_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP15_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        return EP15_IN_BUFFER_CONTROL & (1u << 30u);
    }

    inline void set_EP15_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        EP15_IN_BUFFER_CONTROL |= 1u << 30u;
    }

    inline void clear_EP15_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        EP15_IN_BUFFER_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP15_IN_BUFFER_CONTROL_LAST_1() volatile
    {
        EP15_IN_BUFFER_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP15_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        return EP15_IN_BUFFER_CONTROL & (1u << 31u);
    }

    inline void set_EP15_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        EP15_IN_BUFFER_CONTROL |= 1u << 31u;
    }

    inline void clear_EP15_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        EP15_IN_BUFFER_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP15_IN_BUFFER_CONTROL_FULL_1() volatile
    {
        EP15_IN_BUFFER_CONTROL ^= 1u << 31u;
    }

    inline void get_EP15_IN_BUFFER_CONTROL(
        uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET,
        bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1,
        bool &AVAILABLE_1,
        USBCTRL_DPRAM_EP15_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            &DOUBLE_BUFFER_ISO_OFFSET,
        bool &PID_1, bool &LAST_1, bool &FULL_1) volatile
    {
        uint32_t curr = EP15_IN_BUFFER_CONTROL;

        LENGTH_0 = (curr >> 0u) & 0b1111111111u;
        AVAILABLE_0 = curr & (1u << 10u);
        STALL = curr & (1u << 11u);
        RESET = curr & (1u << 12u);
        PID_0 = curr & (1u << 13u);
        LAST_0 = curr & (1u << 14u);
        FULL_0 = curr & (1u << 15u);
        LENGTH_1 = (curr >> 16u) & 0b1111111111u;
        AVAILABLE_1 = curr & (1u << 26u);
        DOUBLE_BUFFER_ISO_OFFSET =
            USBCTRL_DPRAM_EP15_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
                (curr >> 27u) & 0b11u);
        PID_1 = curr & (1u << 29u);
        LAST_1 = curr & (1u << 30u);
        FULL_1 = curr & (1u << 31u);
    }

    inline void set_EP15_IN_BUFFER_CONTROL(
        uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET,
        bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1,
        bool AVAILABLE_1,
        USBCTRL_DPRAM_EP15_IN_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            DOUBLE_BUFFER_ISO_OFFSET,
        bool PID_1, bool LAST_1, bool FULL_1) volatile
    {
        uint32_t curr = EP15_IN_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (LENGTH_0 & 0b1111111111u) << 0u;
        curr &= ~(0b1u << 10u);
        curr |= (AVAILABLE_0 & 0b1u) << 10u;
        curr &= ~(0b1u << 11u);
        curr |= (STALL & 0b1u) << 11u;
        curr &= ~(0b1u << 12u);
        curr |= (RESET & 0b1u) << 12u;
        curr &= ~(0b1u << 13u);
        curr |= (PID_0 & 0b1u) << 13u;
        curr &= ~(0b1u << 14u);
        curr |= (LAST_0 & 0b1u) << 14u;
        curr &= ~(0b1u << 15u);
        curr |= (FULL_0 & 0b1u) << 15u;
        curr &= ~(0b1111111111u << 16u);
        curr |= (LENGTH_1 & 0b1111111111u) << 16u;
        curr &= ~(0b1u << 26u);
        curr |= (AVAILABLE_1 & 0b1u) << 26u;
        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(DOUBLE_BUFFER_ISO_OFFSET) & 0b11u) << 27u;
        curr &= ~(0b1u << 29u);
        curr |= (PID_1 & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (LAST_1 & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (FULL_1 & 0b1u) << 31u;

        EP15_IN_BUFFER_CONTROL = curr;
    }

    inline uint16_t get_EP15_OUT_BUFFER_CONTROL_LENGTH_0() volatile
    {
        return (EP15_OUT_BUFFER_CONTROL >> 0u) & 0b1111111111u;
    }

    inline void set_EP15_OUT_BUFFER_CONTROL_LENGTH_0(uint16_t value) volatile
    {
        uint32_t curr = EP15_OUT_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (value & 0b1111111111u) << 0u;

        EP15_OUT_BUFFER_CONTROL = curr;
    }

    inline bool get_EP15_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        return EP15_OUT_BUFFER_CONTROL & (1u << 10u);
    }

    inline void set_EP15_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP15_OUT_BUFFER_CONTROL |= 1u << 10u;
    }

    inline void clear_EP15_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP15_OUT_BUFFER_CONTROL &= ~(1u << 10u);
    }

    inline void toggle_EP15_OUT_BUFFER_CONTROL_AVAILABLE_0() volatile
    {
        EP15_OUT_BUFFER_CONTROL ^= 1u << 10u;
    }

    inline bool get_EP15_OUT_BUFFER_CONTROL_STALL() volatile
    {
        return EP15_OUT_BUFFER_CONTROL & (1u << 11u);
    }

    inline void set_EP15_OUT_BUFFER_CONTROL_STALL() volatile
    {
        EP15_OUT_BUFFER_CONTROL |= 1u << 11u;
    }

    inline void clear_EP15_OUT_BUFFER_CONTROL_STALL() volatile
    {
        EP15_OUT_BUFFER_CONTROL &= ~(1u << 11u);
    }

    inline void toggle_EP15_OUT_BUFFER_CONTROL_STALL() volatile
    {
        EP15_OUT_BUFFER_CONTROL ^= 1u << 11u;
    }

    inline bool get_EP15_OUT_BUFFER_CONTROL_RESET() volatile
    {
        return EP15_OUT_BUFFER_CONTROL & (1u << 12u);
    }

    inline void set_EP15_OUT_BUFFER_CONTROL_RESET() volatile
    {
        EP15_OUT_BUFFER_CONTROL |= 1u << 12u;
    }

    inline void clear_EP15_OUT_BUFFER_CONTROL_RESET() volatile
    {
        EP15_OUT_BUFFER_CONTROL &= ~(1u << 12u);
    }

    inline void toggle_EP15_OUT_BUFFER_CONTROL_RESET() volatile
    {
        EP15_OUT_BUFFER_CONTROL ^= 1u << 12u;
    }

    inline bool get_EP15_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        return EP15_OUT_BUFFER_CONTROL & (1u << 13u);
    }

    inline void set_EP15_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        EP15_OUT_BUFFER_CONTROL |= 1u << 13u;
    }

    inline void clear_EP15_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        EP15_OUT_BUFFER_CONTROL &= ~(1u << 13u);
    }

    inline void toggle_EP15_OUT_BUFFER_CONTROL_PID_0() volatile
    {
        EP15_OUT_BUFFER_CONTROL ^= 1u << 13u;
    }

    inline bool get_EP15_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        return EP15_OUT_BUFFER_CONTROL & (1u << 14u);
    }

    inline void set_EP15_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        EP15_OUT_BUFFER_CONTROL |= 1u << 14u;
    }

    inline void clear_EP15_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        EP15_OUT_BUFFER_CONTROL &= ~(1u << 14u);
    }

    inline void toggle_EP15_OUT_BUFFER_CONTROL_LAST_0() volatile
    {
        EP15_OUT_BUFFER_CONTROL ^= 1u << 14u;
    }

    inline bool get_EP15_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        return EP15_OUT_BUFFER_CONTROL & (1u << 15u);
    }

    inline void set_EP15_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        EP15_OUT_BUFFER_CONTROL |= 1u << 15u;
    }

    inline void clear_EP15_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        EP15_OUT_BUFFER_CONTROL &= ~(1u << 15u);
    }

    inline void toggle_EP15_OUT_BUFFER_CONTROL_FULL_0() volatile
    {
        EP15_OUT_BUFFER_CONTROL ^= 1u << 15u;
    }

    inline uint16_t get_EP15_OUT_BUFFER_CONTROL_LENGTH_1() volatile
    {
        return (EP15_OUT_BUFFER_CONTROL >> 16u) & 0b1111111111u;
    }

    inline void set_EP15_OUT_BUFFER_CONTROL_LENGTH_1(uint16_t value) volatile
    {
        uint32_t curr = EP15_OUT_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 16u);
        curr |= (value & 0b1111111111u) << 16u;

        EP15_OUT_BUFFER_CONTROL = curr;
    }

    inline bool get_EP15_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        return EP15_OUT_BUFFER_CONTROL & (1u << 26u);
    }

    inline void set_EP15_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP15_OUT_BUFFER_CONTROL |= 1u << 26u;
    }

    inline void clear_EP15_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP15_OUT_BUFFER_CONTROL &= ~(1u << 26u);
    }

    inline void toggle_EP15_OUT_BUFFER_CONTROL_AVAILABLE_1() volatile
    {
        EP15_OUT_BUFFER_CONTROL ^= 1u << 26u;
    }

    inline USBCTRL_DPRAM_EP15_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
    get_EP15_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET() volatile
    {
        return USBCTRL_DPRAM_EP15_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
            (EP15_OUT_BUFFER_CONTROL >> 27u) & 0b11u);
    }

    inline void set_EP15_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
        USBCTRL_DPRAM_EP15_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            value) volatile
    {
        uint32_t curr = EP15_OUT_BUFFER_CONTROL;

        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(value) & 0b11u) << 27u;

        EP15_OUT_BUFFER_CONTROL = curr;
    }

    inline bool get_EP15_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        return EP15_OUT_BUFFER_CONTROL & (1u << 29u);
    }

    inline void set_EP15_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        EP15_OUT_BUFFER_CONTROL |= 1u << 29u;
    }

    inline void clear_EP15_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        EP15_OUT_BUFFER_CONTROL &= ~(1u << 29u);
    }

    inline void toggle_EP15_OUT_BUFFER_CONTROL_PID_1() volatile
    {
        EP15_OUT_BUFFER_CONTROL ^= 1u << 29u;
    }

    inline bool get_EP15_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        return EP15_OUT_BUFFER_CONTROL & (1u << 30u);
    }

    inline void set_EP15_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        EP15_OUT_BUFFER_CONTROL |= 1u << 30u;
    }

    inline void clear_EP15_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        EP15_OUT_BUFFER_CONTROL &= ~(1u << 30u);
    }

    inline void toggle_EP15_OUT_BUFFER_CONTROL_LAST_1() volatile
    {
        EP15_OUT_BUFFER_CONTROL ^= 1u << 30u;
    }

    inline bool get_EP15_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        return EP15_OUT_BUFFER_CONTROL & (1u << 31u);
    }

    inline void set_EP15_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        EP15_OUT_BUFFER_CONTROL |= 1u << 31u;
    }

    inline void clear_EP15_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        EP15_OUT_BUFFER_CONTROL &= ~(1u << 31u);
    }

    inline void toggle_EP15_OUT_BUFFER_CONTROL_FULL_1() volatile
    {
        EP15_OUT_BUFFER_CONTROL ^= 1u << 31u;
    }

    inline void get_EP15_OUT_BUFFER_CONTROL(
        uint16_t &LENGTH_0, bool &AVAILABLE_0, bool &STALL, bool &RESET,
        bool &PID_0, bool &LAST_0, bool &FULL_0, uint16_t &LENGTH_1,
        bool &AVAILABLE_1,
        USBCTRL_DPRAM_EP15_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            &DOUBLE_BUFFER_ISO_OFFSET,
        bool &PID_1, bool &LAST_1, bool &FULL_1) volatile
    {
        uint32_t curr = EP15_OUT_BUFFER_CONTROL;

        LENGTH_0 = (curr >> 0u) & 0b1111111111u;
        AVAILABLE_0 = curr & (1u << 10u);
        STALL = curr & (1u << 11u);
        RESET = curr & (1u << 12u);
        PID_0 = curr & (1u << 13u);
        LAST_0 = curr & (1u << 14u);
        FULL_0 = curr & (1u << 15u);
        LENGTH_1 = (curr >> 16u) & 0b1111111111u;
        AVAILABLE_1 = curr & (1u << 26u);
        DOUBLE_BUFFER_ISO_OFFSET =
            USBCTRL_DPRAM_EP15_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET(
                (curr >> 27u) & 0b11u);
        PID_1 = curr & (1u << 29u);
        LAST_1 = curr & (1u << 30u);
        FULL_1 = curr & (1u << 31u);
    }

    inline void set_EP15_OUT_BUFFER_CONTROL(
        uint16_t LENGTH_0, bool AVAILABLE_0, bool STALL, bool RESET,
        bool PID_0, bool LAST_0, bool FULL_0, uint16_t LENGTH_1,
        bool AVAILABLE_1,
        USBCTRL_DPRAM_EP15_OUT_BUFFER_CONTROL_DOUBLE_BUFFER_ISO_OFFSET
            DOUBLE_BUFFER_ISO_OFFSET,
        bool PID_1, bool LAST_1, bool FULL_1) volatile
    {
        uint32_t curr = EP15_OUT_BUFFER_CONTROL;

        curr &= ~(0b1111111111u << 0u);
        curr |= (LENGTH_0 & 0b1111111111u) << 0u;
        curr &= ~(0b1u << 10u);
        curr |= (AVAILABLE_0 & 0b1u) << 10u;
        curr &= ~(0b1u << 11u);
        curr |= (STALL & 0b1u) << 11u;
        curr &= ~(0b1u << 12u);
        curr |= (RESET & 0b1u) << 12u;
        curr &= ~(0b1u << 13u);
        curr |= (PID_0 & 0b1u) << 13u;
        curr &= ~(0b1u << 14u);
        curr |= (LAST_0 & 0b1u) << 14u;
        curr &= ~(0b1u << 15u);
        curr |= (FULL_0 & 0b1u) << 15u;
        curr &= ~(0b1111111111u << 16u);
        curr |= (LENGTH_1 & 0b1111111111u) << 16u;
        curr &= ~(0b1u << 26u);
        curr |= (AVAILABLE_1 & 0b1u) << 26u;
        curr &= ~(0b11u << 27u);
        curr |= (std::to_underlying(DOUBLE_BUFFER_ISO_OFFSET) & 0b11u) << 27u;
        curr &= ~(0b1u << 29u);
        curr |= (PID_1 & 0b1u) << 29u;
        curr &= ~(0b1u << 30u);
        curr |= (LAST_1 & 0b1u) << 30u;
        curr &= ~(0b1u << 31u);
        curr |= (FULL_1 & 0b1u) << 31u;

        EP15_OUT_BUFFER_CONTROL = curr;
    }
};

static_assert(sizeof(usbctrl_dpram) == usbctrl_dpram::size);

static volatile usbctrl_dpram *const USBCTRL_DPRAM =
    reinterpret_cast<usbctrl_dpram *>(0x50100000);

}; // namespace RP2040