Program Listing for File uart0.h

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#pragma once

#include "../ifgen/common.h"

namespace RP2040
{

struct [[gnu::packed]] uart0
{
    /* Constant attributes. */
    static constexpr std::size_t size = 4096;
    /* Fields. */
    uint32_t UARTDR;
    uint32_t UARTRSR;
    static constexpr std::size_t reserved_padding0_length = 4;
    const uint32_t reserved_padding0[reserved_padding0_length] = {};
    const uint32_t UARTFR = {};
    const uint32_t reserved_padding1 = {};
    uint32_t UARTILPR;
    uint32_t
        UARTIBRD;
    uint32_t
        UARTFBRD;
    uint32_t UARTLCR_H;
    uint32_t UARTCR;
    uint32_t UARTIFLS;
    uint32_t UARTIMSC;
    const uint32_t UARTRIS =
        {};
    const uint32_t UARTMIS =
        {};
    uint32_t UARTICR;
    uint32_t UARTDMACR;
    static constexpr std::size_t reserved_padding2_length = 997;
    const uint32_t reserved_padding2[reserved_padding2_length] = {};
    const uint32_t UARTPERIPHID0 =
        {};
    const uint32_t UARTPERIPHID1 =
        {};
    const uint32_t UARTPERIPHID2 =
        {};
    const uint32_t UARTPERIPHID3 =
        {};
    const uint32_t UARTPCELLID0 = {};
    const uint32_t UARTPCELLID1 = {};
    const uint32_t UARTPCELLID2 = {};
    const uint32_t UARTPCELLID3 = {};
    /* Methods. */

    inline uint8_t get_UARTDR_DATA() volatile
    {
        return (UARTDR >> 0u) & 0b11111111u;
    }

    inline void set_UARTDR_DATA(uint8_t value) volatile
    {
        uint32_t curr = UARTDR;

        curr &= ~(0b11111111u << 0u);
        curr |= (value & 0b11111111u) << 0u;

        UARTDR = curr;
    }

    inline bool get_UARTDR_FE() volatile
    {
        return UARTDR & (1u << 8u);
    }

    inline bool get_UARTDR_PE() volatile
    {
        return UARTDR & (1u << 9u);
    }

    inline bool get_UARTDR_BE() volatile
    {
        return UARTDR & (1u << 10u);
    }

    inline bool get_UARTDR_OE() volatile
    {
        return UARTDR & (1u << 11u);
    }

    inline void get_UARTDR(uint8_t &DATA, bool &FE, bool &PE, bool &BE,
                           bool &OE) volatile
    {
        uint32_t curr = UARTDR;

        DATA = (curr >> 0u) & 0b11111111u;
        FE = curr & (1u << 8u);
        PE = curr & (1u << 9u);
        BE = curr & (1u << 10u);
        OE = curr & (1u << 11u);
    }

    inline bool get_UARTRSR_FE() volatile
    {
        return UARTRSR & (1u << 0u);
    }

    inline void set_UARTRSR_FE() volatile
    {
        UARTRSR |= 1u << 0u;
    }

    inline void clear_UARTRSR_FE() volatile
    {
        UARTRSR &= ~(1u << 0u);
    }

    inline void toggle_UARTRSR_FE() volatile
    {
        UARTRSR ^= 1u << 0u;
    }

    inline bool get_UARTRSR_PE() volatile
    {
        return UARTRSR & (1u << 1u);
    }

    inline void set_UARTRSR_PE() volatile
    {
        UARTRSR |= 1u << 1u;
    }

    inline void clear_UARTRSR_PE() volatile
    {
        UARTRSR &= ~(1u << 1u);
    }

    inline void toggle_UARTRSR_PE() volatile
    {
        UARTRSR ^= 1u << 1u;
    }

    inline bool get_UARTRSR_BE() volatile
    {
        return UARTRSR & (1u << 2u);
    }

    inline void set_UARTRSR_BE() volatile
    {
        UARTRSR |= 1u << 2u;
    }

    inline void clear_UARTRSR_BE() volatile
    {
        UARTRSR &= ~(1u << 2u);
    }

    inline void toggle_UARTRSR_BE() volatile
    {
        UARTRSR ^= 1u << 2u;
    }

    inline bool get_UARTRSR_OE() volatile
    {
        return UARTRSR & (1u << 3u);
    }

    inline void set_UARTRSR_OE() volatile
    {
        UARTRSR |= 1u << 3u;
    }

    inline void clear_UARTRSR_OE() volatile
    {
        UARTRSR &= ~(1u << 3u);
    }

    inline void toggle_UARTRSR_OE() volatile
    {
        UARTRSR ^= 1u << 3u;
    }

    inline void get_UARTRSR(bool &FE, bool &PE, bool &BE, bool &OE) volatile
    {
        uint32_t curr = UARTRSR;

        FE = curr & (1u << 0u);
        PE = curr & (1u << 1u);
        BE = curr & (1u << 2u);
        OE = curr & (1u << 3u);
    }

    inline void set_UARTRSR(bool FE, bool PE, bool BE, bool OE) volatile
    {
        uint32_t curr = UARTRSR;

        curr &= ~(0b1u << 0u);
        curr |= (FE & 0b1u) << 0u;
        curr &= ~(0b1u << 1u);
        curr |= (PE & 0b1u) << 1u;
        curr &= ~(0b1u << 2u);
        curr |= (BE & 0b1u) << 2u;
        curr &= ~(0b1u << 3u);
        curr |= (OE & 0b1u) << 3u;

        UARTRSR = curr;
    }

    inline bool get_UARTFR_CTS() volatile
    {
        return UARTFR & (1u << 0u);
    }

    inline bool get_UARTFR_DSR() volatile
    {
        return UARTFR & (1u << 1u);
    }

    inline bool get_UARTFR_DCD() volatile
    {
        return UARTFR & (1u << 2u);
    }

    inline bool get_UARTFR_BUSY() volatile
    {
        return UARTFR & (1u << 3u);
    }

    inline bool get_UARTFR_RXFE() volatile
    {
        return UARTFR & (1u << 4u);
    }

    inline bool get_UARTFR_TXFF() volatile
    {
        return UARTFR & (1u << 5u);
    }

    inline bool get_UARTFR_RXFF() volatile
    {
        return UARTFR & (1u << 6u);
    }

    inline bool get_UARTFR_TXFE() volatile
    {
        return UARTFR & (1u << 7u);
    }

    inline bool get_UARTFR_RI() volatile
    {
        return UARTFR & (1u << 8u);
    }

    inline void get_UARTFR(bool &CTS, bool &DSR, bool &DCD, bool &BUSY,
                           bool &RXFE, bool &TXFF, bool &RXFF, bool &TXFE,
                           bool &RI) volatile
    {
        uint32_t curr = UARTFR;

        CTS = curr & (1u << 0u);
        DSR = curr & (1u << 1u);
        DCD = curr & (1u << 2u);
        BUSY = curr & (1u << 3u);
        RXFE = curr & (1u << 4u);
        TXFF = curr & (1u << 5u);
        RXFF = curr & (1u << 6u);
        TXFE = curr & (1u << 7u);
        RI = curr & (1u << 8u);
    }

    inline uint8_t get_UARTILPR_ILPDVSR() volatile
    {
        return (UARTILPR >> 0u) & 0b11111111u;
    }

    inline void set_UARTILPR_ILPDVSR(uint8_t value) volatile
    {
        uint32_t curr = UARTILPR;

        curr &= ~(0b11111111u << 0u);
        curr |= (value & 0b11111111u) << 0u;

        UARTILPR = curr;
    }

    inline uint16_t get_UARTIBRD_BAUD_DIVINT() volatile
    {
        return (UARTIBRD >> 0u) & 0b1111111111111111u;
    }

    inline void set_UARTIBRD_BAUD_DIVINT(uint16_t value) volatile
    {
        uint32_t curr = UARTIBRD;

        curr &= ~(0b1111111111111111u << 0u);
        curr |= (value & 0b1111111111111111u) << 0u;

        UARTIBRD = curr;
    }

    inline uint8_t get_UARTFBRD_BAUD_DIVFRAC() volatile
    {
        return (UARTFBRD >> 0u) & 0b111111u;
    }

    inline void set_UARTFBRD_BAUD_DIVFRAC(uint8_t value) volatile
    {
        uint32_t curr = UARTFBRD;

        curr &= ~(0b111111u << 0u);
        curr |= (value & 0b111111u) << 0u;

        UARTFBRD = curr;
    }

    inline bool get_UARTLCR_H_BRK() volatile
    {
        return UARTLCR_H & (1u << 0u);
    }

    inline void set_UARTLCR_H_BRK() volatile
    {
        UARTLCR_H |= 1u << 0u;
    }

    inline void clear_UARTLCR_H_BRK() volatile
    {
        UARTLCR_H &= ~(1u << 0u);
    }

    inline void toggle_UARTLCR_H_BRK() volatile
    {
        UARTLCR_H ^= 1u << 0u;
    }

    inline bool get_UARTLCR_H_PEN() volatile
    {
        return UARTLCR_H & (1u << 1u);
    }

    inline void set_UARTLCR_H_PEN() volatile
    {
        UARTLCR_H |= 1u << 1u;
    }

    inline void clear_UARTLCR_H_PEN() volatile
    {
        UARTLCR_H &= ~(1u << 1u);
    }

    inline void toggle_UARTLCR_H_PEN() volatile
    {
        UARTLCR_H ^= 1u << 1u;
    }

    inline bool get_UARTLCR_H_EPS() volatile
    {
        return UARTLCR_H & (1u << 2u);
    }

    inline void set_UARTLCR_H_EPS() volatile
    {
        UARTLCR_H |= 1u << 2u;
    }

    inline void clear_UARTLCR_H_EPS() volatile
    {
        UARTLCR_H &= ~(1u << 2u);
    }

    inline void toggle_UARTLCR_H_EPS() volatile
    {
        UARTLCR_H ^= 1u << 2u;
    }

    inline bool get_UARTLCR_H_STP2() volatile
    {
        return UARTLCR_H & (1u << 3u);
    }

    inline void set_UARTLCR_H_STP2() volatile
    {
        UARTLCR_H |= 1u << 3u;
    }

    inline void clear_UARTLCR_H_STP2() volatile
    {
        UARTLCR_H &= ~(1u << 3u);
    }

    inline void toggle_UARTLCR_H_STP2() volatile
    {
        UARTLCR_H ^= 1u << 3u;
    }

    inline bool get_UARTLCR_H_FEN() volatile
    {
        return UARTLCR_H & (1u << 4u);
    }

    inline void set_UARTLCR_H_FEN() volatile
    {
        UARTLCR_H |= 1u << 4u;
    }

    inline void clear_UARTLCR_H_FEN() volatile
    {
        UARTLCR_H &= ~(1u << 4u);
    }

    inline void toggle_UARTLCR_H_FEN() volatile
    {
        UARTLCR_H ^= 1u << 4u;
    }

    inline uint8_t get_UARTLCR_H_WLEN() volatile
    {
        return (UARTLCR_H >> 5u) & 0b11u;
    }

    inline void set_UARTLCR_H_WLEN(uint8_t value) volatile
    {
        uint32_t curr = UARTLCR_H;

        curr &= ~(0b11u << 5u);
        curr |= (value & 0b11u) << 5u;

        UARTLCR_H = curr;
    }

    inline bool get_UARTLCR_H_SPS() volatile
    {
        return UARTLCR_H & (1u << 7u);
    }

    inline void set_UARTLCR_H_SPS() volatile
    {
        UARTLCR_H |= 1u << 7u;
    }

    inline void clear_UARTLCR_H_SPS() volatile
    {
        UARTLCR_H &= ~(1u << 7u);
    }

    inline void toggle_UARTLCR_H_SPS() volatile
    {
        UARTLCR_H ^= 1u << 7u;
    }

    inline void get_UARTLCR_H(bool &BRK, bool &PEN, bool &EPS, bool &STP2,
                              bool &FEN, uint8_t &WLEN, bool &SPS) volatile
    {
        uint32_t curr = UARTLCR_H;

        BRK = curr & (1u << 0u);
        PEN = curr & (1u << 1u);
        EPS = curr & (1u << 2u);
        STP2 = curr & (1u << 3u);
        FEN = curr & (1u << 4u);
        WLEN = (curr >> 5u) & 0b11u;
        SPS = curr & (1u << 7u);
    }

    inline void set_UARTLCR_H(bool BRK, bool PEN, bool EPS, bool STP2,
                              bool FEN, uint8_t WLEN, bool SPS) volatile
    {
        uint32_t curr = UARTLCR_H;

        curr &= ~(0b1u << 0u);
        curr |= (BRK & 0b1u) << 0u;
        curr &= ~(0b1u << 1u);
        curr |= (PEN & 0b1u) << 1u;
        curr &= ~(0b1u << 2u);
        curr |= (EPS & 0b1u) << 2u;
        curr &= ~(0b1u << 3u);
        curr |= (STP2 & 0b1u) << 3u;
        curr &= ~(0b1u << 4u);
        curr |= (FEN & 0b1u) << 4u;
        curr &= ~(0b11u << 5u);
        curr |= (WLEN & 0b11u) << 5u;
        curr &= ~(0b1u << 7u);
        curr |= (SPS & 0b1u) << 7u;

        UARTLCR_H = curr;
    }

    inline bool get_UARTCR_UARTEN() volatile
    {
        return UARTCR & (1u << 0u);
    }

    inline void set_UARTCR_UARTEN() volatile
    {
        UARTCR |= 1u << 0u;
    }

    inline void clear_UARTCR_UARTEN() volatile
    {
        UARTCR &= ~(1u << 0u);
    }

    inline void toggle_UARTCR_UARTEN() volatile
    {
        UARTCR ^= 1u << 0u;
    }

    inline bool get_UARTCR_SIREN() volatile
    {
        return UARTCR & (1u << 1u);
    }

    inline void set_UARTCR_SIREN() volatile
    {
        UARTCR |= 1u << 1u;
    }

    inline void clear_UARTCR_SIREN() volatile
    {
        UARTCR &= ~(1u << 1u);
    }

    inline void toggle_UARTCR_SIREN() volatile
    {
        UARTCR ^= 1u << 1u;
    }

    inline bool get_UARTCR_SIRLP() volatile
    {
        return UARTCR & (1u << 2u);
    }

    inline void set_UARTCR_SIRLP() volatile
    {
        UARTCR |= 1u << 2u;
    }

    inline void clear_UARTCR_SIRLP() volatile
    {
        UARTCR &= ~(1u << 2u);
    }

    inline void toggle_UARTCR_SIRLP() volatile
    {
        UARTCR ^= 1u << 2u;
    }

    inline bool get_UARTCR_LBE() volatile
    {
        return UARTCR & (1u << 7u);
    }

    inline void set_UARTCR_LBE() volatile
    {
        UARTCR |= 1u << 7u;
    }

    inline void clear_UARTCR_LBE() volatile
    {
        UARTCR &= ~(1u << 7u);
    }

    inline void toggle_UARTCR_LBE() volatile
    {
        UARTCR ^= 1u << 7u;
    }

    inline bool get_UARTCR_TXE() volatile
    {
        return UARTCR & (1u << 8u);
    }

    inline void set_UARTCR_TXE() volatile
    {
        UARTCR |= 1u << 8u;
    }

    inline void clear_UARTCR_TXE() volatile
    {
        UARTCR &= ~(1u << 8u);
    }

    inline void toggle_UARTCR_TXE() volatile
    {
        UARTCR ^= 1u << 8u;
    }

    inline bool get_UARTCR_RXE() volatile
    {
        return UARTCR & (1u << 9u);
    }

    inline void set_UARTCR_RXE() volatile
    {
        UARTCR |= 1u << 9u;
    }

    inline void clear_UARTCR_RXE() volatile
    {
        UARTCR &= ~(1u << 9u);
    }

    inline void toggle_UARTCR_RXE() volatile
    {
        UARTCR ^= 1u << 9u;
    }

    inline bool get_UARTCR_DTR() volatile
    {
        return UARTCR & (1u << 10u);
    }

    inline void set_UARTCR_DTR() volatile
    {
        UARTCR |= 1u << 10u;
    }

    inline void clear_UARTCR_DTR() volatile
    {
        UARTCR &= ~(1u << 10u);
    }

    inline void toggle_UARTCR_DTR() volatile
    {
        UARTCR ^= 1u << 10u;
    }

    inline bool get_UARTCR_RTS() volatile
    {
        return UARTCR & (1u << 11u);
    }

    inline void set_UARTCR_RTS() volatile
    {
        UARTCR |= 1u << 11u;
    }

    inline void clear_UARTCR_RTS() volatile
    {
        UARTCR &= ~(1u << 11u);
    }

    inline void toggle_UARTCR_RTS() volatile
    {
        UARTCR ^= 1u << 11u;
    }

    inline bool get_UARTCR_OUT1() volatile
    {
        return UARTCR & (1u << 12u);
    }

    inline void set_UARTCR_OUT1() volatile
    {
        UARTCR |= 1u << 12u;
    }

    inline void clear_UARTCR_OUT1() volatile
    {
        UARTCR &= ~(1u << 12u);
    }

    inline void toggle_UARTCR_OUT1() volatile
    {
        UARTCR ^= 1u << 12u;
    }

    inline bool get_UARTCR_OUT2() volatile
    {
        return UARTCR & (1u << 13u);
    }

    inline void set_UARTCR_OUT2() volatile
    {
        UARTCR |= 1u << 13u;
    }

    inline void clear_UARTCR_OUT2() volatile
    {
        UARTCR &= ~(1u << 13u);
    }

    inline void toggle_UARTCR_OUT2() volatile
    {
        UARTCR ^= 1u << 13u;
    }

    inline bool get_UARTCR_RTSEN() volatile
    {
        return UARTCR & (1u << 14u);
    }

    inline void set_UARTCR_RTSEN() volatile
    {
        UARTCR |= 1u << 14u;
    }

    inline void clear_UARTCR_RTSEN() volatile
    {
        UARTCR &= ~(1u << 14u);
    }

    inline void toggle_UARTCR_RTSEN() volatile
    {
        UARTCR ^= 1u << 14u;
    }

    inline bool get_UARTCR_CTSEN() volatile
    {
        return UARTCR & (1u << 15u);
    }

    inline void set_UARTCR_CTSEN() volatile
    {
        UARTCR |= 1u << 15u;
    }

    inline void clear_UARTCR_CTSEN() volatile
    {
        UARTCR &= ~(1u << 15u);
    }

    inline void toggle_UARTCR_CTSEN() volatile
    {
        UARTCR ^= 1u << 15u;
    }

    inline void get_UARTCR(bool &UARTEN, bool &SIREN, bool &SIRLP, bool &LBE,
                           bool &TXE, bool &RXE, bool &DTR, bool &RTS,
                           bool &OUT1, bool &OUT2, bool &RTSEN,
                           bool &CTSEN) volatile
    {
        uint32_t curr = UARTCR;

        UARTEN = curr & (1u << 0u);
        SIREN = curr & (1u << 1u);
        SIRLP = curr & (1u << 2u);
        LBE = curr & (1u << 7u);
        TXE = curr & (1u << 8u);
        RXE = curr & (1u << 9u);
        DTR = curr & (1u << 10u);
        RTS = curr & (1u << 11u);
        OUT1 = curr & (1u << 12u);
        OUT2 = curr & (1u << 13u);
        RTSEN = curr & (1u << 14u);
        CTSEN = curr & (1u << 15u);
    }

    inline void set_UARTCR(bool UARTEN, bool SIREN, bool SIRLP, bool LBE,
                           bool TXE, bool RXE, bool DTR, bool RTS, bool OUT1,
                           bool OUT2, bool RTSEN, bool CTSEN) volatile
    {
        uint32_t curr = UARTCR;

        curr &= ~(0b1u << 0u);
        curr |= (UARTEN & 0b1u) << 0u;
        curr &= ~(0b1u << 1u);
        curr |= (SIREN & 0b1u) << 1u;
        curr &= ~(0b1u << 2u);
        curr |= (SIRLP & 0b1u) << 2u;
        curr &= ~(0b1u << 7u);
        curr |= (LBE & 0b1u) << 7u;
        curr &= ~(0b1u << 8u);
        curr |= (TXE & 0b1u) << 8u;
        curr &= ~(0b1u << 9u);
        curr |= (RXE & 0b1u) << 9u;
        curr &= ~(0b1u << 10u);
        curr |= (DTR & 0b1u) << 10u;
        curr &= ~(0b1u << 11u);
        curr |= (RTS & 0b1u) << 11u;
        curr &= ~(0b1u << 12u);
        curr |= (OUT1 & 0b1u) << 12u;
        curr &= ~(0b1u << 13u);
        curr |= (OUT2 & 0b1u) << 13u;
        curr &= ~(0b1u << 14u);
        curr |= (RTSEN & 0b1u) << 14u;
        curr &= ~(0b1u << 15u);
        curr |= (CTSEN & 0b1u) << 15u;

        UARTCR = curr;
    }

    inline uint8_t get_UARTIFLS_TXIFLSEL() volatile
    {
        return (UARTIFLS >> 0u) & 0b111u;
    }

    inline void set_UARTIFLS_TXIFLSEL(uint8_t value) volatile
    {
        uint32_t curr = UARTIFLS;

        curr &= ~(0b111u << 0u);
        curr |= (value & 0b111u) << 0u;

        UARTIFLS = curr;
    }

    inline uint8_t get_UARTIFLS_RXIFLSEL() volatile
    {
        return (UARTIFLS >> 3u) & 0b111u;
    }

    inline void set_UARTIFLS_RXIFLSEL(uint8_t value) volatile
    {
        uint32_t curr = UARTIFLS;

        curr &= ~(0b111u << 3u);
        curr |= (value & 0b111u) << 3u;

        UARTIFLS = curr;
    }

    inline void get_UARTIFLS(uint8_t &TXIFLSEL, uint8_t &RXIFLSEL) volatile
    {
        uint32_t curr = UARTIFLS;

        TXIFLSEL = (curr >> 0u) & 0b111u;
        RXIFLSEL = (curr >> 3u) & 0b111u;
    }

    inline void set_UARTIFLS(uint8_t TXIFLSEL, uint8_t RXIFLSEL) volatile
    {
        uint32_t curr = UARTIFLS;

        curr &= ~(0b111u << 0u);
        curr |= (TXIFLSEL & 0b111u) << 0u;
        curr &= ~(0b111u << 3u);
        curr |= (RXIFLSEL & 0b111u) << 3u;

        UARTIFLS = curr;
    }

    inline bool get_UARTIMSC_RIMIM() volatile
    {
        return UARTIMSC & (1u << 0u);
    }

    inline void set_UARTIMSC_RIMIM() volatile
    {
        UARTIMSC |= 1u << 0u;
    }

    inline void clear_UARTIMSC_RIMIM() volatile
    {
        UARTIMSC &= ~(1u << 0u);
    }

    inline void toggle_UARTIMSC_RIMIM() volatile
    {
        UARTIMSC ^= 1u << 0u;
    }

    inline bool get_UARTIMSC_CTSMIM() volatile
    {
        return UARTIMSC & (1u << 1u);
    }

    inline void set_UARTIMSC_CTSMIM() volatile
    {
        UARTIMSC |= 1u << 1u;
    }

    inline void clear_UARTIMSC_CTSMIM() volatile
    {
        UARTIMSC &= ~(1u << 1u);
    }

    inline void toggle_UARTIMSC_CTSMIM() volatile
    {
        UARTIMSC ^= 1u << 1u;
    }

    inline bool get_UARTIMSC_DCDMIM() volatile
    {
        return UARTIMSC & (1u << 2u);
    }

    inline void set_UARTIMSC_DCDMIM() volatile
    {
        UARTIMSC |= 1u << 2u;
    }

    inline void clear_UARTIMSC_DCDMIM() volatile
    {
        UARTIMSC &= ~(1u << 2u);
    }

    inline void toggle_UARTIMSC_DCDMIM() volatile
    {
        UARTIMSC ^= 1u << 2u;
    }

    inline bool get_UARTIMSC_DSRMIM() volatile
    {
        return UARTIMSC & (1u << 3u);
    }

    inline void set_UARTIMSC_DSRMIM() volatile
    {
        UARTIMSC |= 1u << 3u;
    }

    inline void clear_UARTIMSC_DSRMIM() volatile
    {
        UARTIMSC &= ~(1u << 3u);
    }

    inline void toggle_UARTIMSC_DSRMIM() volatile
    {
        UARTIMSC ^= 1u << 3u;
    }

    inline bool get_UARTIMSC_RXIM() volatile
    {
        return UARTIMSC & (1u << 4u);
    }

    inline void set_UARTIMSC_RXIM() volatile
    {
        UARTIMSC |= 1u << 4u;
    }

    inline void clear_UARTIMSC_RXIM() volatile
    {
        UARTIMSC &= ~(1u << 4u);
    }

    inline void toggle_UARTIMSC_RXIM() volatile
    {
        UARTIMSC ^= 1u << 4u;
    }

    inline bool get_UARTIMSC_TXIM() volatile
    {
        return UARTIMSC & (1u << 5u);
    }

    inline void set_UARTIMSC_TXIM() volatile
    {
        UARTIMSC |= 1u << 5u;
    }

    inline void clear_UARTIMSC_TXIM() volatile
    {
        UARTIMSC &= ~(1u << 5u);
    }

    inline void toggle_UARTIMSC_TXIM() volatile
    {
        UARTIMSC ^= 1u << 5u;
    }

    inline bool get_UARTIMSC_RTIM() volatile
    {
        return UARTIMSC & (1u << 6u);
    }

    inline void set_UARTIMSC_RTIM() volatile
    {
        UARTIMSC |= 1u << 6u;
    }

    inline void clear_UARTIMSC_RTIM() volatile
    {
        UARTIMSC &= ~(1u << 6u);
    }

    inline void toggle_UARTIMSC_RTIM() volatile
    {
        UARTIMSC ^= 1u << 6u;
    }

    inline bool get_UARTIMSC_FEIM() volatile
    {
        return UARTIMSC & (1u << 7u);
    }

    inline void set_UARTIMSC_FEIM() volatile
    {
        UARTIMSC |= 1u << 7u;
    }

    inline void clear_UARTIMSC_FEIM() volatile
    {
        UARTIMSC &= ~(1u << 7u);
    }

    inline void toggle_UARTIMSC_FEIM() volatile
    {
        UARTIMSC ^= 1u << 7u;
    }

    inline bool get_UARTIMSC_PEIM() volatile
    {
        return UARTIMSC & (1u << 8u);
    }

    inline void set_UARTIMSC_PEIM() volatile
    {
        UARTIMSC |= 1u << 8u;
    }

    inline void clear_UARTIMSC_PEIM() volatile
    {
        UARTIMSC &= ~(1u << 8u);
    }

    inline void toggle_UARTIMSC_PEIM() volatile
    {
        UARTIMSC ^= 1u << 8u;
    }

    inline bool get_UARTIMSC_BEIM() volatile
    {
        return UARTIMSC & (1u << 9u);
    }

    inline void set_UARTIMSC_BEIM() volatile
    {
        UARTIMSC |= 1u << 9u;
    }

    inline void clear_UARTIMSC_BEIM() volatile
    {
        UARTIMSC &= ~(1u << 9u);
    }

    inline void toggle_UARTIMSC_BEIM() volatile
    {
        UARTIMSC ^= 1u << 9u;
    }

    inline bool get_UARTIMSC_OEIM() volatile
    {
        return UARTIMSC & (1u << 10u);
    }

    inline void set_UARTIMSC_OEIM() volatile
    {
        UARTIMSC |= 1u << 10u;
    }

    inline void clear_UARTIMSC_OEIM() volatile
    {
        UARTIMSC &= ~(1u << 10u);
    }

    inline void toggle_UARTIMSC_OEIM() volatile
    {
        UARTIMSC ^= 1u << 10u;
    }

    inline void get_UARTIMSC(bool &RIMIM, bool &CTSMIM, bool &DCDMIM,
                             bool &DSRMIM, bool &RXIM, bool &TXIM, bool &RTIM,
                             bool &FEIM, bool &PEIM, bool &BEIM,
                             bool &OEIM) volatile
    {
        uint32_t curr = UARTIMSC;

        RIMIM = curr & (1u << 0u);
        CTSMIM = curr & (1u << 1u);
        DCDMIM = curr & (1u << 2u);
        DSRMIM = curr & (1u << 3u);
        RXIM = curr & (1u << 4u);
        TXIM = curr & (1u << 5u);
        RTIM = curr & (1u << 6u);
        FEIM = curr & (1u << 7u);
        PEIM = curr & (1u << 8u);
        BEIM = curr & (1u << 9u);
        OEIM = curr & (1u << 10u);
    }

    inline void set_UARTIMSC(bool RIMIM, bool CTSMIM, bool DCDMIM, bool DSRMIM,
                             bool RXIM, bool TXIM, bool RTIM, bool FEIM,
                             bool PEIM, bool BEIM, bool OEIM) volatile
    {
        uint32_t curr = UARTIMSC;

        curr &= ~(0b1u << 0u);
        curr |= (RIMIM & 0b1u) << 0u;
        curr &= ~(0b1u << 1u);
        curr |= (CTSMIM & 0b1u) << 1u;
        curr &= ~(0b1u << 2u);
        curr |= (DCDMIM & 0b1u) << 2u;
        curr &= ~(0b1u << 3u);
        curr |= (DSRMIM & 0b1u) << 3u;
        curr &= ~(0b1u << 4u);
        curr |= (RXIM & 0b1u) << 4u;
        curr &= ~(0b1u << 5u);
        curr |= (TXIM & 0b1u) << 5u;
        curr &= ~(0b1u << 6u);
        curr |= (RTIM & 0b1u) << 6u;
        curr &= ~(0b1u << 7u);
        curr |= (FEIM & 0b1u) << 7u;
        curr &= ~(0b1u << 8u);
        curr |= (PEIM & 0b1u) << 8u;
        curr &= ~(0b1u << 9u);
        curr |= (BEIM & 0b1u) << 9u;
        curr &= ~(0b1u << 10u);
        curr |= (OEIM & 0b1u) << 10u;

        UARTIMSC = curr;
    }

    inline bool get_UARTRIS_RIRMIS() volatile
    {
        return UARTRIS & (1u << 0u);
    }

    inline bool get_UARTRIS_CTSRMIS() volatile
    {
        return UARTRIS & (1u << 1u);
    }

    inline bool get_UARTRIS_DCDRMIS() volatile
    {
        return UARTRIS & (1u << 2u);
    }

    inline bool get_UARTRIS_DSRRMIS() volatile
    {
        return UARTRIS & (1u << 3u);
    }

    inline bool get_UARTRIS_RXRIS() volatile
    {
        return UARTRIS & (1u << 4u);
    }

    inline bool get_UARTRIS_TXRIS() volatile
    {
        return UARTRIS & (1u << 5u);
    }

    inline bool get_UARTRIS_RTRIS() volatile
    {
        return UARTRIS & (1u << 6u);
    }

    inline bool get_UARTRIS_FERIS() volatile
    {
        return UARTRIS & (1u << 7u);
    }

    inline bool get_UARTRIS_PERIS() volatile
    {
        return UARTRIS & (1u << 8u);
    }

    inline bool get_UARTRIS_BERIS() volatile
    {
        return UARTRIS & (1u << 9u);
    }

    inline bool get_UARTRIS_OERIS() volatile
    {
        return UARTRIS & (1u << 10u);
    }

    inline void get_UARTRIS(bool &RIRMIS, bool &CTSRMIS, bool &DCDRMIS,
                            bool &DSRRMIS, bool &RXRIS, bool &TXRIS,
                            bool &RTRIS, bool &FERIS, bool &PERIS, bool &BERIS,
                            bool &OERIS) volatile
    {
        uint32_t curr = UARTRIS;

        RIRMIS = curr & (1u << 0u);
        CTSRMIS = curr & (1u << 1u);
        DCDRMIS = curr & (1u << 2u);
        DSRRMIS = curr & (1u << 3u);
        RXRIS = curr & (1u << 4u);
        TXRIS = curr & (1u << 5u);
        RTRIS = curr & (1u << 6u);
        FERIS = curr & (1u << 7u);
        PERIS = curr & (1u << 8u);
        BERIS = curr & (1u << 9u);
        OERIS = curr & (1u << 10u);
    }

    inline bool get_UARTMIS_RIMMIS() volatile
    {
        return UARTMIS & (1u << 0u);
    }

    inline bool get_UARTMIS_CTSMMIS() volatile
    {
        return UARTMIS & (1u << 1u);
    }

    inline bool get_UARTMIS_DCDMMIS() volatile
    {
        return UARTMIS & (1u << 2u);
    }

    inline bool get_UARTMIS_DSRMMIS() volatile
    {
        return UARTMIS & (1u << 3u);
    }

    inline bool get_UARTMIS_RXMIS() volatile
    {
        return UARTMIS & (1u << 4u);
    }

    inline bool get_UARTMIS_TXMIS() volatile
    {
        return UARTMIS & (1u << 5u);
    }

    inline bool get_UARTMIS_RTMIS() volatile
    {
        return UARTMIS & (1u << 6u);
    }

    inline bool get_UARTMIS_FEMIS() volatile
    {
        return UARTMIS & (1u << 7u);
    }

    inline bool get_UARTMIS_PEMIS() volatile
    {
        return UARTMIS & (1u << 8u);
    }

    inline bool get_UARTMIS_BEMIS() volatile
    {
        return UARTMIS & (1u << 9u);
    }

    inline bool get_UARTMIS_OEMIS() volatile
    {
        return UARTMIS & (1u << 10u);
    }

    inline void get_UARTMIS(bool &RIMMIS, bool &CTSMMIS, bool &DCDMMIS,
                            bool &DSRMMIS, bool &RXMIS, bool &TXMIS,
                            bool &RTMIS, bool &FEMIS, bool &PEMIS, bool &BEMIS,
                            bool &OEMIS) volatile
    {
        uint32_t curr = UARTMIS;

        RIMMIS = curr & (1u << 0u);
        CTSMMIS = curr & (1u << 1u);
        DCDMMIS = curr & (1u << 2u);
        DSRMMIS = curr & (1u << 3u);
        RXMIS = curr & (1u << 4u);
        TXMIS = curr & (1u << 5u);
        RTMIS = curr & (1u << 6u);
        FEMIS = curr & (1u << 7u);
        PEMIS = curr & (1u << 8u);
        BEMIS = curr & (1u << 9u);
        OEMIS = curr & (1u << 10u);
    }

    inline bool get_UARTICR_RIMIC() volatile
    {
        return UARTICR & (1u << 0u);
    }

    inline void set_UARTICR_RIMIC() volatile
    {
        UARTICR |= 1u << 0u;
    }

    inline void clear_UARTICR_RIMIC() volatile
    {
        UARTICR &= ~(1u << 0u);
    }

    inline void toggle_UARTICR_RIMIC() volatile
    {
        UARTICR ^= 1u << 0u;
    }

    inline bool get_UARTICR_CTSMIC() volatile
    {
        return UARTICR & (1u << 1u);
    }

    inline void set_UARTICR_CTSMIC() volatile
    {
        UARTICR |= 1u << 1u;
    }

    inline void clear_UARTICR_CTSMIC() volatile
    {
        UARTICR &= ~(1u << 1u);
    }

    inline void toggle_UARTICR_CTSMIC() volatile
    {
        UARTICR ^= 1u << 1u;
    }

    inline bool get_UARTICR_DCDMIC() volatile
    {
        return UARTICR & (1u << 2u);
    }

    inline void set_UARTICR_DCDMIC() volatile
    {
        UARTICR |= 1u << 2u;
    }

    inline void clear_UARTICR_DCDMIC() volatile
    {
        UARTICR &= ~(1u << 2u);
    }

    inline void toggle_UARTICR_DCDMIC() volatile
    {
        UARTICR ^= 1u << 2u;
    }

    inline bool get_UARTICR_DSRMIC() volatile
    {
        return UARTICR & (1u << 3u);
    }

    inline void set_UARTICR_DSRMIC() volatile
    {
        UARTICR |= 1u << 3u;
    }

    inline void clear_UARTICR_DSRMIC() volatile
    {
        UARTICR &= ~(1u << 3u);
    }

    inline void toggle_UARTICR_DSRMIC() volatile
    {
        UARTICR ^= 1u << 3u;
    }

    inline bool get_UARTICR_RXIC() volatile
    {
        return UARTICR & (1u << 4u);
    }

    inline void set_UARTICR_RXIC() volatile
    {
        UARTICR |= 1u << 4u;
    }

    inline void clear_UARTICR_RXIC() volatile
    {
        UARTICR &= ~(1u << 4u);
    }

    inline void toggle_UARTICR_RXIC() volatile
    {
        UARTICR ^= 1u << 4u;
    }

    inline bool get_UARTICR_TXIC() volatile
    {
        return UARTICR & (1u << 5u);
    }

    inline void set_UARTICR_TXIC() volatile
    {
        UARTICR |= 1u << 5u;
    }

    inline void clear_UARTICR_TXIC() volatile
    {
        UARTICR &= ~(1u << 5u);
    }

    inline void toggle_UARTICR_TXIC() volatile
    {
        UARTICR ^= 1u << 5u;
    }

    inline bool get_UARTICR_RTIC() volatile
    {
        return UARTICR & (1u << 6u);
    }

    inline void set_UARTICR_RTIC() volatile
    {
        UARTICR |= 1u << 6u;
    }

    inline void clear_UARTICR_RTIC() volatile
    {
        UARTICR &= ~(1u << 6u);
    }

    inline void toggle_UARTICR_RTIC() volatile
    {
        UARTICR ^= 1u << 6u;
    }

    inline bool get_UARTICR_FEIC() volatile
    {
        return UARTICR & (1u << 7u);
    }

    inline void set_UARTICR_FEIC() volatile
    {
        UARTICR |= 1u << 7u;
    }

    inline void clear_UARTICR_FEIC() volatile
    {
        UARTICR &= ~(1u << 7u);
    }

    inline void toggle_UARTICR_FEIC() volatile
    {
        UARTICR ^= 1u << 7u;
    }

    inline bool get_UARTICR_PEIC() volatile
    {
        return UARTICR & (1u << 8u);
    }

    inline void set_UARTICR_PEIC() volatile
    {
        UARTICR |= 1u << 8u;
    }

    inline void clear_UARTICR_PEIC() volatile
    {
        UARTICR &= ~(1u << 8u);
    }

    inline void toggle_UARTICR_PEIC() volatile
    {
        UARTICR ^= 1u << 8u;
    }

    inline bool get_UARTICR_BEIC() volatile
    {
        return UARTICR & (1u << 9u);
    }

    inline void set_UARTICR_BEIC() volatile
    {
        UARTICR |= 1u << 9u;
    }

    inline void clear_UARTICR_BEIC() volatile
    {
        UARTICR &= ~(1u << 9u);
    }

    inline void toggle_UARTICR_BEIC() volatile
    {
        UARTICR ^= 1u << 9u;
    }

    inline bool get_UARTICR_OEIC() volatile
    {
        return UARTICR & (1u << 10u);
    }

    inline void set_UARTICR_OEIC() volatile
    {
        UARTICR |= 1u << 10u;
    }

    inline void clear_UARTICR_OEIC() volatile
    {
        UARTICR &= ~(1u << 10u);
    }

    inline void toggle_UARTICR_OEIC() volatile
    {
        UARTICR ^= 1u << 10u;
    }

    inline void get_UARTICR(bool &RIMIC, bool &CTSMIC, bool &DCDMIC,
                            bool &DSRMIC, bool &RXIC, bool &TXIC, bool &RTIC,
                            bool &FEIC, bool &PEIC, bool &BEIC,
                            bool &OEIC) volatile
    {
        uint32_t curr = UARTICR;

        RIMIC = curr & (1u << 0u);
        CTSMIC = curr & (1u << 1u);
        DCDMIC = curr & (1u << 2u);
        DSRMIC = curr & (1u << 3u);
        RXIC = curr & (1u << 4u);
        TXIC = curr & (1u << 5u);
        RTIC = curr & (1u << 6u);
        FEIC = curr & (1u << 7u);
        PEIC = curr & (1u << 8u);
        BEIC = curr & (1u << 9u);
        OEIC = curr & (1u << 10u);
    }

    inline void set_UARTICR(bool RIMIC, bool CTSMIC, bool DCDMIC, bool DSRMIC,
                            bool RXIC, bool TXIC, bool RTIC, bool FEIC,
                            bool PEIC, bool BEIC, bool OEIC) volatile
    {
        uint32_t curr = UARTICR;

        curr &= ~(0b1u << 0u);
        curr |= (RIMIC & 0b1u) << 0u;
        curr &= ~(0b1u << 1u);
        curr |= (CTSMIC & 0b1u) << 1u;
        curr &= ~(0b1u << 2u);
        curr |= (DCDMIC & 0b1u) << 2u;
        curr &= ~(0b1u << 3u);
        curr |= (DSRMIC & 0b1u) << 3u;
        curr &= ~(0b1u << 4u);
        curr |= (RXIC & 0b1u) << 4u;
        curr &= ~(0b1u << 5u);
        curr |= (TXIC & 0b1u) << 5u;
        curr &= ~(0b1u << 6u);
        curr |= (RTIC & 0b1u) << 6u;
        curr &= ~(0b1u << 7u);
        curr |= (FEIC & 0b1u) << 7u;
        curr &= ~(0b1u << 8u);
        curr |= (PEIC & 0b1u) << 8u;
        curr &= ~(0b1u << 9u);
        curr |= (BEIC & 0b1u) << 9u;
        curr &= ~(0b1u << 10u);
        curr |= (OEIC & 0b1u) << 10u;

        UARTICR = curr;
    }

    inline bool get_UARTDMACR_RXDMAE() volatile
    {
        return UARTDMACR & (1u << 0u);
    }

    inline void set_UARTDMACR_RXDMAE() volatile
    {
        UARTDMACR |= 1u << 0u;
    }

    inline void clear_UARTDMACR_RXDMAE() volatile
    {
        UARTDMACR &= ~(1u << 0u);
    }

    inline void toggle_UARTDMACR_RXDMAE() volatile
    {
        UARTDMACR ^= 1u << 0u;
    }

    inline bool get_UARTDMACR_TXDMAE() volatile
    {
        return UARTDMACR & (1u << 1u);
    }

    inline void set_UARTDMACR_TXDMAE() volatile
    {
        UARTDMACR |= 1u << 1u;
    }

    inline void clear_UARTDMACR_TXDMAE() volatile
    {
        UARTDMACR &= ~(1u << 1u);
    }

    inline void toggle_UARTDMACR_TXDMAE() volatile
    {
        UARTDMACR ^= 1u << 1u;
    }

    inline bool get_UARTDMACR_DMAONERR() volatile
    {
        return UARTDMACR & (1u << 2u);
    }

    inline void set_UARTDMACR_DMAONERR() volatile
    {
        UARTDMACR |= 1u << 2u;
    }

    inline void clear_UARTDMACR_DMAONERR() volatile
    {
        UARTDMACR &= ~(1u << 2u);
    }

    inline void toggle_UARTDMACR_DMAONERR() volatile
    {
        UARTDMACR ^= 1u << 2u;
    }

    inline void get_UARTDMACR(bool &RXDMAE, bool &TXDMAE,
                              bool &DMAONERR) volatile
    {
        uint32_t curr = UARTDMACR;

        RXDMAE = curr & (1u << 0u);
        TXDMAE = curr & (1u << 1u);
        DMAONERR = curr & (1u << 2u);
    }

    inline void set_UARTDMACR(bool RXDMAE, bool TXDMAE, bool DMAONERR) volatile
    {
        uint32_t curr = UARTDMACR;

        curr &= ~(0b1u << 0u);
        curr |= (RXDMAE & 0b1u) << 0u;
        curr &= ~(0b1u << 1u);
        curr |= (TXDMAE & 0b1u) << 1u;
        curr &= ~(0b1u << 2u);
        curr |= (DMAONERR & 0b1u) << 2u;

        UARTDMACR = curr;
    }

    inline uint8_t get_UARTPERIPHID0_PARTNUMBER0() volatile
    {
        return (UARTPERIPHID0 >> 0u) & 0b11111111u;
    }

    inline uint8_t get_UARTPERIPHID1_PARTNUMBER1() volatile
    {
        return (UARTPERIPHID1 >> 0u) & 0b1111u;
    }

    inline uint8_t get_UARTPERIPHID1_DESIGNER0() volatile
    {
        return (UARTPERIPHID1 >> 4u) & 0b1111u;
    }

    inline void get_UARTPERIPHID1(uint8_t &PARTNUMBER1,
                                  uint8_t &DESIGNER0) volatile
    {
        uint32_t curr = UARTPERIPHID1;

        PARTNUMBER1 = (curr >> 0u) & 0b1111u;
        DESIGNER0 = (curr >> 4u) & 0b1111u;
    }

    inline uint8_t get_UARTPERIPHID2_DESIGNER1() volatile
    {
        return (UARTPERIPHID2 >> 0u) & 0b1111u;
    }

    inline uint8_t get_UARTPERIPHID2_REVISION() volatile
    {
        return (UARTPERIPHID2 >> 4u) & 0b1111u;
    }

    inline void get_UARTPERIPHID2(uint8_t &DESIGNER1,
                                  uint8_t &REVISION) volatile
    {
        uint32_t curr = UARTPERIPHID2;

        DESIGNER1 = (curr >> 0u) & 0b1111u;
        REVISION = (curr >> 4u) & 0b1111u;
    }

    inline uint8_t get_UARTPERIPHID3_CONFIGURATION() volatile
    {
        return (UARTPERIPHID3 >> 0u) & 0b11111111u;
    }

    inline uint8_t get_UARTPCELLID0_UARTPCELLID0() volatile
    {
        return (UARTPCELLID0 >> 0u) & 0b11111111u;
    }

    inline uint8_t get_UARTPCELLID1_UARTPCELLID1() volatile
    {
        return (UARTPCELLID1 >> 0u) & 0b11111111u;
    }

    inline uint8_t get_UARTPCELLID2_UARTPCELLID2() volatile
    {
        return (UARTPCELLID2 >> 0u) & 0b11111111u;
    }

    inline uint8_t get_UARTPCELLID3_UARTPCELLID3() volatile
    {
        return (UARTPCELLID3 >> 0u) & 0b11111111u;
    }
};

static_assert(sizeof(uart0) == uart0::size);

static volatile uart0 *const UART0 = reinterpret_cast<uart0 *>(0x40034000);

static volatile uart0 *const UART1 = reinterpret_cast<uart0 *>(0x40038000);

}; // namespace RP2040