Program Listing for File syscfg.h#
↰ Return to documentation for file (src/generated/structs/syscfg.h
)
#pragma once
#include "../ifgen/common.h"
namespace RP2040
{
struct [[gnu::packed]] syscfg
{
/* Constant attributes. */
static constexpr std::size_t size = 28;
/* Fields. */
uint32_t PROC0_NMI_MASK;
uint32_t PROC1_NMI_MASK;
uint32_t PROC_CONFIG;
uint32_t PROC_IN_SYNC_BYPASS;
uint32_t
PROC_IN_SYNC_BYPASS_HI;
uint32_t DBGFORCE;
uint32_t MEMPOWERDOWN;
/* Methods. */
inline bool get_PROC_CONFIG_PROC0_HALTED() volatile
{
return PROC_CONFIG & (1u << 0u);
}
inline bool get_PROC_CONFIG_PROC1_HALTED() volatile
{
return PROC_CONFIG & (1u << 1u);
}
inline uint8_t get_PROC_CONFIG_PROC0_DAP_INSTID() volatile
{
return (PROC_CONFIG >> 24u) & 0b1111u;
}
inline void set_PROC_CONFIG_PROC0_DAP_INSTID(uint8_t value) volatile
{
uint32_t curr = PROC_CONFIG;
curr &= ~(0b1111u << 24u);
curr |= (value & 0b1111u) << 24u;
PROC_CONFIG = curr;
}
inline uint8_t get_PROC_CONFIG_PROC1_DAP_INSTID() volatile
{
return (PROC_CONFIG >> 28u) & 0b1111u;
}
inline void set_PROC_CONFIG_PROC1_DAP_INSTID(uint8_t value) volatile
{
uint32_t curr = PROC_CONFIG;
curr &= ~(0b1111u << 28u);
curr |= (value & 0b1111u) << 28u;
PROC_CONFIG = curr;
}
inline void get_PROC_CONFIG(bool &PROC0_HALTED, bool &PROC1_HALTED,
uint8_t &PROC0_DAP_INSTID,
uint8_t &PROC1_DAP_INSTID) volatile
{
uint32_t curr = PROC_CONFIG;
PROC0_HALTED = curr & (1u << 0u);
PROC1_HALTED = curr & (1u << 1u);
PROC0_DAP_INSTID = (curr >> 24u) & 0b1111u;
PROC1_DAP_INSTID = (curr >> 28u) & 0b1111u;
}
inline void set_PROC_CONFIG(uint8_t PROC0_DAP_INSTID,
uint8_t PROC1_DAP_INSTID) volatile
{
uint32_t curr = PROC_CONFIG;
curr &= ~(0b1111u << 24u);
curr |= (PROC0_DAP_INSTID & 0b1111u) << 24u;
curr &= ~(0b1111u << 28u);
curr |= (PROC1_DAP_INSTID & 0b1111u) << 28u;
PROC_CONFIG = curr;
}
inline uint32_t get_PROC_IN_SYNC_BYPASS_PROC_IN_SYNC_BYPASS() volatile
{
return (PROC_IN_SYNC_BYPASS >> 0u) & 0b111111111111111111111111111111u;
}
inline void set_PROC_IN_SYNC_BYPASS_PROC_IN_SYNC_BYPASS(
uint32_t value) volatile
{
uint32_t curr = PROC_IN_SYNC_BYPASS;
curr &= ~(0b111111111111111111111111111111u << 0u);
curr |= (value & 0b111111111111111111111111111111u) << 0u;
PROC_IN_SYNC_BYPASS = curr;
}
inline uint8_t get_PROC_IN_SYNC_BYPASS_HI_PROC_IN_SYNC_BYPASS_HI() volatile
{
return (PROC_IN_SYNC_BYPASS_HI >> 0u) & 0b111111u;
}
inline void set_PROC_IN_SYNC_BYPASS_HI_PROC_IN_SYNC_BYPASS_HI(
uint8_t value) volatile
{
uint32_t curr = PROC_IN_SYNC_BYPASS_HI;
curr &= ~(0b111111u << 0u);
curr |= (value & 0b111111u) << 0u;
PROC_IN_SYNC_BYPASS_HI = curr;
}
inline bool get_DBGFORCE_PROC0_SWDO() volatile
{
return DBGFORCE & (1u << 0u);
}
inline bool get_DBGFORCE_PROC0_SWDI() volatile
{
return DBGFORCE & (1u << 1u);
}
inline void set_DBGFORCE_PROC0_SWDI() volatile
{
DBGFORCE |= 1u << 1u;
}
inline void clear_DBGFORCE_PROC0_SWDI() volatile
{
DBGFORCE &= ~(1u << 1u);
}
inline void toggle_DBGFORCE_PROC0_SWDI() volatile
{
DBGFORCE ^= 1u << 1u;
}
inline bool get_DBGFORCE_PROC0_SWCLK() volatile
{
return DBGFORCE & (1u << 2u);
}
inline void set_DBGFORCE_PROC0_SWCLK() volatile
{
DBGFORCE |= 1u << 2u;
}
inline void clear_DBGFORCE_PROC0_SWCLK() volatile
{
DBGFORCE &= ~(1u << 2u);
}
inline void toggle_DBGFORCE_PROC0_SWCLK() volatile
{
DBGFORCE ^= 1u << 2u;
}
inline bool get_DBGFORCE_PROC0_ATTACH() volatile
{
return DBGFORCE & (1u << 3u);
}
inline void set_DBGFORCE_PROC0_ATTACH() volatile
{
DBGFORCE |= 1u << 3u;
}
inline void clear_DBGFORCE_PROC0_ATTACH() volatile
{
DBGFORCE &= ~(1u << 3u);
}
inline void toggle_DBGFORCE_PROC0_ATTACH() volatile
{
DBGFORCE ^= 1u << 3u;
}
inline bool get_DBGFORCE_PROC1_SWDO() volatile
{
return DBGFORCE & (1u << 4u);
}
inline bool get_DBGFORCE_PROC1_SWDI() volatile
{
return DBGFORCE & (1u << 5u);
}
inline void set_DBGFORCE_PROC1_SWDI() volatile
{
DBGFORCE |= 1u << 5u;
}
inline void clear_DBGFORCE_PROC1_SWDI() volatile
{
DBGFORCE &= ~(1u << 5u);
}
inline void toggle_DBGFORCE_PROC1_SWDI() volatile
{
DBGFORCE ^= 1u << 5u;
}
inline bool get_DBGFORCE_PROC1_SWCLK() volatile
{
return DBGFORCE & (1u << 6u);
}
inline void set_DBGFORCE_PROC1_SWCLK() volatile
{
DBGFORCE |= 1u << 6u;
}
inline void clear_DBGFORCE_PROC1_SWCLK() volatile
{
DBGFORCE &= ~(1u << 6u);
}
inline void toggle_DBGFORCE_PROC1_SWCLK() volatile
{
DBGFORCE ^= 1u << 6u;
}
inline bool get_DBGFORCE_PROC1_ATTACH() volatile
{
return DBGFORCE & (1u << 7u);
}
inline void set_DBGFORCE_PROC1_ATTACH() volatile
{
DBGFORCE |= 1u << 7u;
}
inline void clear_DBGFORCE_PROC1_ATTACH() volatile
{
DBGFORCE &= ~(1u << 7u);
}
inline void toggle_DBGFORCE_PROC1_ATTACH() volatile
{
DBGFORCE ^= 1u << 7u;
}
inline void get_DBGFORCE(bool &PROC0_SWDO, bool &PROC0_SWDI,
bool &PROC0_SWCLK, bool &PROC0_ATTACH,
bool &PROC1_SWDO, bool &PROC1_SWDI,
bool &PROC1_SWCLK, bool &PROC1_ATTACH) volatile
{
uint32_t curr = DBGFORCE;
PROC0_SWDO = curr & (1u << 0u);
PROC0_SWDI = curr & (1u << 1u);
PROC0_SWCLK = curr & (1u << 2u);
PROC0_ATTACH = curr & (1u << 3u);
PROC1_SWDO = curr & (1u << 4u);
PROC1_SWDI = curr & (1u << 5u);
PROC1_SWCLK = curr & (1u << 6u);
PROC1_ATTACH = curr & (1u << 7u);
}
inline void set_DBGFORCE(bool PROC0_SWDI, bool PROC0_SWCLK,
bool PROC0_ATTACH, bool PROC1_SWDI,
bool PROC1_SWCLK, bool PROC1_ATTACH) volatile
{
uint32_t curr = DBGFORCE;
curr &= ~(0b1u << 1u);
curr |= (PROC0_SWDI & 0b1u) << 1u;
curr &= ~(0b1u << 2u);
curr |= (PROC0_SWCLK & 0b1u) << 2u;
curr &= ~(0b1u << 3u);
curr |= (PROC0_ATTACH & 0b1u) << 3u;
curr &= ~(0b1u << 5u);
curr |= (PROC1_SWDI & 0b1u) << 5u;
curr &= ~(0b1u << 6u);
curr |= (PROC1_SWCLK & 0b1u) << 6u;
curr &= ~(0b1u << 7u);
curr |= (PROC1_ATTACH & 0b1u) << 7u;
DBGFORCE = curr;
}
inline bool get_MEMPOWERDOWN_SRAM0() volatile
{
return MEMPOWERDOWN & (1u << 0u);
}
inline void set_MEMPOWERDOWN_SRAM0() volatile
{
MEMPOWERDOWN |= 1u << 0u;
}
inline void clear_MEMPOWERDOWN_SRAM0() volatile
{
MEMPOWERDOWN &= ~(1u << 0u);
}
inline void toggle_MEMPOWERDOWN_SRAM0() volatile
{
MEMPOWERDOWN ^= 1u << 0u;
}
inline bool get_MEMPOWERDOWN_SRAM1() volatile
{
return MEMPOWERDOWN & (1u << 1u);
}
inline void set_MEMPOWERDOWN_SRAM1() volatile
{
MEMPOWERDOWN |= 1u << 1u;
}
inline void clear_MEMPOWERDOWN_SRAM1() volatile
{
MEMPOWERDOWN &= ~(1u << 1u);
}
inline void toggle_MEMPOWERDOWN_SRAM1() volatile
{
MEMPOWERDOWN ^= 1u << 1u;
}
inline bool get_MEMPOWERDOWN_SRAM2() volatile
{
return MEMPOWERDOWN & (1u << 2u);
}
inline void set_MEMPOWERDOWN_SRAM2() volatile
{
MEMPOWERDOWN |= 1u << 2u;
}
inline void clear_MEMPOWERDOWN_SRAM2() volatile
{
MEMPOWERDOWN &= ~(1u << 2u);
}
inline void toggle_MEMPOWERDOWN_SRAM2() volatile
{
MEMPOWERDOWN ^= 1u << 2u;
}
inline bool get_MEMPOWERDOWN_SRAM3() volatile
{
return MEMPOWERDOWN & (1u << 3u);
}
inline void set_MEMPOWERDOWN_SRAM3() volatile
{
MEMPOWERDOWN |= 1u << 3u;
}
inline void clear_MEMPOWERDOWN_SRAM3() volatile
{
MEMPOWERDOWN &= ~(1u << 3u);
}
inline void toggle_MEMPOWERDOWN_SRAM3() volatile
{
MEMPOWERDOWN ^= 1u << 3u;
}
inline bool get_MEMPOWERDOWN_SRAM4() volatile
{
return MEMPOWERDOWN & (1u << 4u);
}
inline void set_MEMPOWERDOWN_SRAM4() volatile
{
MEMPOWERDOWN |= 1u << 4u;
}
inline void clear_MEMPOWERDOWN_SRAM4() volatile
{
MEMPOWERDOWN &= ~(1u << 4u);
}
inline void toggle_MEMPOWERDOWN_SRAM4() volatile
{
MEMPOWERDOWN ^= 1u << 4u;
}
inline bool get_MEMPOWERDOWN_SRAM5() volatile
{
return MEMPOWERDOWN & (1u << 5u);
}
inline void set_MEMPOWERDOWN_SRAM5() volatile
{
MEMPOWERDOWN |= 1u << 5u;
}
inline void clear_MEMPOWERDOWN_SRAM5() volatile
{
MEMPOWERDOWN &= ~(1u << 5u);
}
inline void toggle_MEMPOWERDOWN_SRAM5() volatile
{
MEMPOWERDOWN ^= 1u << 5u;
}
inline bool get_MEMPOWERDOWN_USB() volatile
{
return MEMPOWERDOWN & (1u << 6u);
}
inline void set_MEMPOWERDOWN_USB() volatile
{
MEMPOWERDOWN |= 1u << 6u;
}
inline void clear_MEMPOWERDOWN_USB() volatile
{
MEMPOWERDOWN &= ~(1u << 6u);
}
inline void toggle_MEMPOWERDOWN_USB() volatile
{
MEMPOWERDOWN ^= 1u << 6u;
}
inline bool get_MEMPOWERDOWN_ROM() volatile
{
return MEMPOWERDOWN & (1u << 7u);
}
inline void set_MEMPOWERDOWN_ROM() volatile
{
MEMPOWERDOWN |= 1u << 7u;
}
inline void clear_MEMPOWERDOWN_ROM() volatile
{
MEMPOWERDOWN &= ~(1u << 7u);
}
inline void toggle_MEMPOWERDOWN_ROM() volatile
{
MEMPOWERDOWN ^= 1u << 7u;
}
inline void get_MEMPOWERDOWN(bool &SRAM0, bool &SRAM1, bool &SRAM2,
bool &SRAM3, bool &SRAM4, bool &SRAM5,
bool &USB, bool &ROM) volatile
{
uint32_t curr = MEMPOWERDOWN;
SRAM0 = curr & (1u << 0u);
SRAM1 = curr & (1u << 1u);
SRAM2 = curr & (1u << 2u);
SRAM3 = curr & (1u << 3u);
SRAM4 = curr & (1u << 4u);
SRAM5 = curr & (1u << 5u);
USB = curr & (1u << 6u);
ROM = curr & (1u << 7u);
}
inline void set_MEMPOWERDOWN(bool SRAM0, bool SRAM1, bool SRAM2,
bool SRAM3, bool SRAM4, bool SRAM5, bool USB,
bool ROM) volatile
{
uint32_t curr = MEMPOWERDOWN;
curr &= ~(0b1u << 0u);
curr |= (SRAM0 & 0b1u) << 0u;
curr &= ~(0b1u << 1u);
curr |= (SRAM1 & 0b1u) << 1u;
curr &= ~(0b1u << 2u);
curr |= (SRAM2 & 0b1u) << 2u;
curr &= ~(0b1u << 3u);
curr |= (SRAM3 & 0b1u) << 3u;
curr &= ~(0b1u << 4u);
curr |= (SRAM4 & 0b1u) << 4u;
curr &= ~(0b1u << 5u);
curr |= (SRAM5 & 0b1u) << 5u;
curr &= ~(0b1u << 6u);
curr |= (USB & 0b1u) << 6u;
curr &= ~(0b1u << 7u);
curr |= (ROM & 0b1u) << 7u;
MEMPOWERDOWN = curr;
}
};
static_assert(sizeof(syscfg) == syscfg::size);
static volatile syscfg *const SYSCFG = reinterpret_cast<syscfg *>(0x40004000);
}; // namespace RP2040