Program Listing for File resets.h

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#pragma once

#include "../ifgen/common.h"

namespace RP2040
{

struct [[gnu::packed]] resets
{
    /* Constant attributes. */
    static constexpr std::size_t size = 12;
    /* Fields. */
    uint32_t RESET;
    uint32_t WDSEL;
    const uint32_t RESET_DONE =
        {};
    /* Methods. */

    inline bool get_RESET_adc() volatile
    {
        return RESET & (1u << 0u);
    }

    inline void set_RESET_adc() volatile
    {
        RESET |= 1u << 0u;
    }

    inline void clear_RESET_adc() volatile
    {
        RESET &= ~(1u << 0u);
    }

    inline void toggle_RESET_adc() volatile
    {
        RESET ^= 1u << 0u;
    }

    inline bool get_RESET_busctrl() volatile
    {
        return RESET & (1u << 1u);
    }

    inline void set_RESET_busctrl() volatile
    {
        RESET |= 1u << 1u;
    }

    inline void clear_RESET_busctrl() volatile
    {
        RESET &= ~(1u << 1u);
    }

    inline void toggle_RESET_busctrl() volatile
    {
        RESET ^= 1u << 1u;
    }

    inline bool get_RESET_dma() volatile
    {
        return RESET & (1u << 2u);
    }

    inline void set_RESET_dma() volatile
    {
        RESET |= 1u << 2u;
    }

    inline void clear_RESET_dma() volatile
    {
        RESET &= ~(1u << 2u);
    }

    inline void toggle_RESET_dma() volatile
    {
        RESET ^= 1u << 2u;
    }

    inline bool get_RESET_i2c0() volatile
    {
        return RESET & (1u << 3u);
    }

    inline void set_RESET_i2c0() volatile
    {
        RESET |= 1u << 3u;
    }

    inline void clear_RESET_i2c0() volatile
    {
        RESET &= ~(1u << 3u);
    }

    inline void toggle_RESET_i2c0() volatile
    {
        RESET ^= 1u << 3u;
    }

    inline bool get_RESET_i2c1() volatile
    {
        return RESET & (1u << 4u);
    }

    inline void set_RESET_i2c1() volatile
    {
        RESET |= 1u << 4u;
    }

    inline void clear_RESET_i2c1() volatile
    {
        RESET &= ~(1u << 4u);
    }

    inline void toggle_RESET_i2c1() volatile
    {
        RESET ^= 1u << 4u;
    }

    inline bool get_RESET_io_bank0() volatile
    {
        return RESET & (1u << 5u);
    }

    inline void set_RESET_io_bank0() volatile
    {
        RESET |= 1u << 5u;
    }

    inline void clear_RESET_io_bank0() volatile
    {
        RESET &= ~(1u << 5u);
    }

    inline void toggle_RESET_io_bank0() volatile
    {
        RESET ^= 1u << 5u;
    }

    inline bool get_RESET_io_qspi() volatile
    {
        return RESET & (1u << 6u);
    }

    inline void set_RESET_io_qspi() volatile
    {
        RESET |= 1u << 6u;
    }

    inline void clear_RESET_io_qspi() volatile
    {
        RESET &= ~(1u << 6u);
    }

    inline void toggle_RESET_io_qspi() volatile
    {
        RESET ^= 1u << 6u;
    }

    inline bool get_RESET_jtag() volatile
    {
        return RESET & (1u << 7u);
    }

    inline void set_RESET_jtag() volatile
    {
        RESET |= 1u << 7u;
    }

    inline void clear_RESET_jtag() volatile
    {
        RESET &= ~(1u << 7u);
    }

    inline void toggle_RESET_jtag() volatile
    {
        RESET ^= 1u << 7u;
    }

    inline bool get_RESET_pads_bank0() volatile
    {
        return RESET & (1u << 8u);
    }

    inline void set_RESET_pads_bank0() volatile
    {
        RESET |= 1u << 8u;
    }

    inline void clear_RESET_pads_bank0() volatile
    {
        RESET &= ~(1u << 8u);
    }

    inline void toggle_RESET_pads_bank0() volatile
    {
        RESET ^= 1u << 8u;
    }

    inline bool get_RESET_pads_qspi() volatile
    {
        return RESET & (1u << 9u);
    }

    inline void set_RESET_pads_qspi() volatile
    {
        RESET |= 1u << 9u;
    }

    inline void clear_RESET_pads_qspi() volatile
    {
        RESET &= ~(1u << 9u);
    }

    inline void toggle_RESET_pads_qspi() volatile
    {
        RESET ^= 1u << 9u;
    }

    inline bool get_RESET_pio0() volatile
    {
        return RESET & (1u << 10u);
    }

    inline void set_RESET_pio0() volatile
    {
        RESET |= 1u << 10u;
    }

    inline void clear_RESET_pio0() volatile
    {
        RESET &= ~(1u << 10u);
    }

    inline void toggle_RESET_pio0() volatile
    {
        RESET ^= 1u << 10u;
    }

    inline bool get_RESET_pio1() volatile
    {
        return RESET & (1u << 11u);
    }

    inline void set_RESET_pio1() volatile
    {
        RESET |= 1u << 11u;
    }

    inline void clear_RESET_pio1() volatile
    {
        RESET &= ~(1u << 11u);
    }

    inline void toggle_RESET_pio1() volatile
    {
        RESET ^= 1u << 11u;
    }

    inline bool get_RESET_pll_sys() volatile
    {
        return RESET & (1u << 12u);
    }

    inline void set_RESET_pll_sys() volatile
    {
        RESET |= 1u << 12u;
    }

    inline void clear_RESET_pll_sys() volatile
    {
        RESET &= ~(1u << 12u);
    }

    inline void toggle_RESET_pll_sys() volatile
    {
        RESET ^= 1u << 12u;
    }

    inline bool get_RESET_pll_usb() volatile
    {
        return RESET & (1u << 13u);
    }

    inline void set_RESET_pll_usb() volatile
    {
        RESET |= 1u << 13u;
    }

    inline void clear_RESET_pll_usb() volatile
    {
        RESET &= ~(1u << 13u);
    }

    inline void toggle_RESET_pll_usb() volatile
    {
        RESET ^= 1u << 13u;
    }

    inline bool get_RESET_pwm() volatile
    {
        return RESET & (1u << 14u);
    }

    inline void set_RESET_pwm() volatile
    {
        RESET |= 1u << 14u;
    }

    inline void clear_RESET_pwm() volatile
    {
        RESET &= ~(1u << 14u);
    }

    inline void toggle_RESET_pwm() volatile
    {
        RESET ^= 1u << 14u;
    }

    inline bool get_RESET_rtc() volatile
    {
        return RESET & (1u << 15u);
    }

    inline void set_RESET_rtc() volatile
    {
        RESET |= 1u << 15u;
    }

    inline void clear_RESET_rtc() volatile
    {
        RESET &= ~(1u << 15u);
    }

    inline void toggle_RESET_rtc() volatile
    {
        RESET ^= 1u << 15u;
    }

    inline bool get_RESET_spi0() volatile
    {
        return RESET & (1u << 16u);
    }

    inline void set_RESET_spi0() volatile
    {
        RESET |= 1u << 16u;
    }

    inline void clear_RESET_spi0() volatile
    {
        RESET &= ~(1u << 16u);
    }

    inline void toggle_RESET_spi0() volatile
    {
        RESET ^= 1u << 16u;
    }

    inline bool get_RESET_spi1() volatile
    {
        return RESET & (1u << 17u);
    }

    inline void set_RESET_spi1() volatile
    {
        RESET |= 1u << 17u;
    }

    inline void clear_RESET_spi1() volatile
    {
        RESET &= ~(1u << 17u);
    }

    inline void toggle_RESET_spi1() volatile
    {
        RESET ^= 1u << 17u;
    }

    inline bool get_RESET_syscfg() volatile
    {
        return RESET & (1u << 18u);
    }

    inline void set_RESET_syscfg() volatile
    {
        RESET |= 1u << 18u;
    }

    inline void clear_RESET_syscfg() volatile
    {
        RESET &= ~(1u << 18u);
    }

    inline void toggle_RESET_syscfg() volatile
    {
        RESET ^= 1u << 18u;
    }

    inline bool get_RESET_sysinfo() volatile
    {
        return RESET & (1u << 19u);
    }

    inline void set_RESET_sysinfo() volatile
    {
        RESET |= 1u << 19u;
    }

    inline void clear_RESET_sysinfo() volatile
    {
        RESET &= ~(1u << 19u);
    }

    inline void toggle_RESET_sysinfo() volatile
    {
        RESET ^= 1u << 19u;
    }

    inline bool get_RESET_tbman() volatile
    {
        return RESET & (1u << 20u);
    }

    inline void set_RESET_tbman() volatile
    {
        RESET |= 1u << 20u;
    }

    inline void clear_RESET_tbman() volatile
    {
        RESET &= ~(1u << 20u);
    }

    inline void toggle_RESET_tbman() volatile
    {
        RESET ^= 1u << 20u;
    }

    inline bool get_RESET_timer() volatile
    {
        return RESET & (1u << 21u);
    }

    inline void set_RESET_timer() volatile
    {
        RESET |= 1u << 21u;
    }

    inline void clear_RESET_timer() volatile
    {
        RESET &= ~(1u << 21u);
    }

    inline void toggle_RESET_timer() volatile
    {
        RESET ^= 1u << 21u;
    }

    inline bool get_RESET_uart0() volatile
    {
        return RESET & (1u << 22u);
    }

    inline void set_RESET_uart0() volatile
    {
        RESET |= 1u << 22u;
    }

    inline void clear_RESET_uart0() volatile
    {
        RESET &= ~(1u << 22u);
    }

    inline void toggle_RESET_uart0() volatile
    {
        RESET ^= 1u << 22u;
    }

    inline bool get_RESET_uart1() volatile
    {
        return RESET & (1u << 23u);
    }

    inline void set_RESET_uart1() volatile
    {
        RESET |= 1u << 23u;
    }

    inline void clear_RESET_uart1() volatile
    {
        RESET &= ~(1u << 23u);
    }

    inline void toggle_RESET_uart1() volatile
    {
        RESET ^= 1u << 23u;
    }

    inline bool get_RESET_usbctrl() volatile
    {
        return RESET & (1u << 24u);
    }

    inline void set_RESET_usbctrl() volatile
    {
        RESET |= 1u << 24u;
    }

    inline void clear_RESET_usbctrl() volatile
    {
        RESET &= ~(1u << 24u);
    }

    inline void toggle_RESET_usbctrl() volatile
    {
        RESET ^= 1u << 24u;
    }

    inline void get_RESET(bool &adc, bool &busctrl, bool &dma, bool &i2c0,
                          bool &i2c1, bool &io_bank0, bool &io_qspi,
                          bool &jtag, bool &pads_bank0, bool &pads_qspi,
                          bool &pio0, bool &pio1, bool &pll_sys, bool &pll_usb,
                          bool &pwm, bool &rtc, bool &spi0, bool &spi1,
                          bool &syscfg, bool &sysinfo, bool &tbman,
                          bool &timer, bool &uart0, bool &uart1,
                          bool &usbctrl) volatile
    {
        uint32_t curr = RESET;

        adc = curr & (1u << 0u);
        busctrl = curr & (1u << 1u);
        dma = curr & (1u << 2u);
        i2c0 = curr & (1u << 3u);
        i2c1 = curr & (1u << 4u);
        io_bank0 = curr & (1u << 5u);
        io_qspi = curr & (1u << 6u);
        jtag = curr & (1u << 7u);
        pads_bank0 = curr & (1u << 8u);
        pads_qspi = curr & (1u << 9u);
        pio0 = curr & (1u << 10u);
        pio1 = curr & (1u << 11u);
        pll_sys = curr & (1u << 12u);
        pll_usb = curr & (1u << 13u);
        pwm = curr & (1u << 14u);
        rtc = curr & (1u << 15u);
        spi0 = curr & (1u << 16u);
        spi1 = curr & (1u << 17u);
        syscfg = curr & (1u << 18u);
        sysinfo = curr & (1u << 19u);
        tbman = curr & (1u << 20u);
        timer = curr & (1u << 21u);
        uart0 = curr & (1u << 22u);
        uart1 = curr & (1u << 23u);
        usbctrl = curr & (1u << 24u);
    }

    inline void set_RESET(bool adc, bool busctrl, bool dma, bool i2c0,
                          bool i2c1, bool io_bank0, bool io_qspi, bool jtag,
                          bool pads_bank0, bool pads_qspi, bool pio0,
                          bool pio1, bool pll_sys, bool pll_usb, bool pwm,
                          bool rtc, bool spi0, bool spi1, bool syscfg,
                          bool sysinfo, bool tbman, bool timer, bool uart0,
                          bool uart1, bool usbctrl) volatile
    {
        uint32_t curr = RESET;

        curr &= ~(0b1u << 0u);
        curr |= (adc & 0b1u) << 0u;
        curr &= ~(0b1u << 1u);
        curr |= (busctrl & 0b1u) << 1u;
        curr &= ~(0b1u << 2u);
        curr |= (dma & 0b1u) << 2u;
        curr &= ~(0b1u << 3u);
        curr |= (i2c0 & 0b1u) << 3u;
        curr &= ~(0b1u << 4u);
        curr |= (i2c1 & 0b1u) << 4u;
        curr &= ~(0b1u << 5u);
        curr |= (io_bank0 & 0b1u) << 5u;
        curr &= ~(0b1u << 6u);
        curr |= (io_qspi & 0b1u) << 6u;
        curr &= ~(0b1u << 7u);
        curr |= (jtag & 0b1u) << 7u;
        curr &= ~(0b1u << 8u);
        curr |= (pads_bank0 & 0b1u) << 8u;
        curr &= ~(0b1u << 9u);
        curr |= (pads_qspi & 0b1u) << 9u;
        curr &= ~(0b1u << 10u);
        curr |= (pio0 & 0b1u) << 10u;
        curr &= ~(0b1u << 11u);
        curr |= (pio1 & 0b1u) << 11u;
        curr &= ~(0b1u << 12u);
        curr |= (pll_sys & 0b1u) << 12u;
        curr &= ~(0b1u << 13u);
        curr |= (pll_usb & 0b1u) << 13u;
        curr &= ~(0b1u << 14u);
        curr |= (pwm & 0b1u) << 14u;
        curr &= ~(0b1u << 15u);
        curr |= (rtc & 0b1u) << 15u;
        curr &= ~(0b1u << 16u);
        curr |= (spi0 & 0b1u) << 16u;
        curr &= ~(0b1u << 17u);
        curr |= (spi1 & 0b1u) << 17u;
        curr &= ~(0b1u << 18u);
        curr |= (syscfg & 0b1u) << 18u;
        curr &= ~(0b1u << 19u);
        curr |= (sysinfo & 0b1u) << 19u;
        curr &= ~(0b1u << 20u);
        curr |= (tbman & 0b1u) << 20u;
        curr &= ~(0b1u << 21u);
        curr |= (timer & 0b1u) << 21u;
        curr &= ~(0b1u << 22u);
        curr |= (uart0 & 0b1u) << 22u;
        curr &= ~(0b1u << 23u);
        curr |= (uart1 & 0b1u) << 23u;
        curr &= ~(0b1u << 24u);
        curr |= (usbctrl & 0b1u) << 24u;

        RESET = curr;
    }

    inline bool get_WDSEL_adc() volatile
    {
        return WDSEL & (1u << 0u);
    }

    inline void set_WDSEL_adc() volatile
    {
        WDSEL |= 1u << 0u;
    }

    inline void clear_WDSEL_adc() volatile
    {
        WDSEL &= ~(1u << 0u);
    }

    inline void toggle_WDSEL_adc() volatile
    {
        WDSEL ^= 1u << 0u;
    }

    inline bool get_WDSEL_busctrl() volatile
    {
        return WDSEL & (1u << 1u);
    }

    inline void set_WDSEL_busctrl() volatile
    {
        WDSEL |= 1u << 1u;
    }

    inline void clear_WDSEL_busctrl() volatile
    {
        WDSEL &= ~(1u << 1u);
    }

    inline void toggle_WDSEL_busctrl() volatile
    {
        WDSEL ^= 1u << 1u;
    }

    inline bool get_WDSEL_dma() volatile
    {
        return WDSEL & (1u << 2u);
    }

    inline void set_WDSEL_dma() volatile
    {
        WDSEL |= 1u << 2u;
    }

    inline void clear_WDSEL_dma() volatile
    {
        WDSEL &= ~(1u << 2u);
    }

    inline void toggle_WDSEL_dma() volatile
    {
        WDSEL ^= 1u << 2u;
    }

    inline bool get_WDSEL_i2c0() volatile
    {
        return WDSEL & (1u << 3u);
    }

    inline void set_WDSEL_i2c0() volatile
    {
        WDSEL |= 1u << 3u;
    }

    inline void clear_WDSEL_i2c0() volatile
    {
        WDSEL &= ~(1u << 3u);
    }

    inline void toggle_WDSEL_i2c0() volatile
    {
        WDSEL ^= 1u << 3u;
    }

    inline bool get_WDSEL_i2c1() volatile
    {
        return WDSEL & (1u << 4u);
    }

    inline void set_WDSEL_i2c1() volatile
    {
        WDSEL |= 1u << 4u;
    }

    inline void clear_WDSEL_i2c1() volatile
    {
        WDSEL &= ~(1u << 4u);
    }

    inline void toggle_WDSEL_i2c1() volatile
    {
        WDSEL ^= 1u << 4u;
    }

    inline bool get_WDSEL_io_bank0() volatile
    {
        return WDSEL & (1u << 5u);
    }

    inline void set_WDSEL_io_bank0() volatile
    {
        WDSEL |= 1u << 5u;
    }

    inline void clear_WDSEL_io_bank0() volatile
    {
        WDSEL &= ~(1u << 5u);
    }

    inline void toggle_WDSEL_io_bank0() volatile
    {
        WDSEL ^= 1u << 5u;
    }

    inline bool get_WDSEL_io_qspi() volatile
    {
        return WDSEL & (1u << 6u);
    }

    inline void set_WDSEL_io_qspi() volatile
    {
        WDSEL |= 1u << 6u;
    }

    inline void clear_WDSEL_io_qspi() volatile
    {
        WDSEL &= ~(1u << 6u);
    }

    inline void toggle_WDSEL_io_qspi() volatile
    {
        WDSEL ^= 1u << 6u;
    }

    inline bool get_WDSEL_jtag() volatile
    {
        return WDSEL & (1u << 7u);
    }

    inline void set_WDSEL_jtag() volatile
    {
        WDSEL |= 1u << 7u;
    }

    inline void clear_WDSEL_jtag() volatile
    {
        WDSEL &= ~(1u << 7u);
    }

    inline void toggle_WDSEL_jtag() volatile
    {
        WDSEL ^= 1u << 7u;
    }

    inline bool get_WDSEL_pads_bank0() volatile
    {
        return WDSEL & (1u << 8u);
    }

    inline void set_WDSEL_pads_bank0() volatile
    {
        WDSEL |= 1u << 8u;
    }

    inline void clear_WDSEL_pads_bank0() volatile
    {
        WDSEL &= ~(1u << 8u);
    }

    inline void toggle_WDSEL_pads_bank0() volatile
    {
        WDSEL ^= 1u << 8u;
    }

    inline bool get_WDSEL_pads_qspi() volatile
    {
        return WDSEL & (1u << 9u);
    }

    inline void set_WDSEL_pads_qspi() volatile
    {
        WDSEL |= 1u << 9u;
    }

    inline void clear_WDSEL_pads_qspi() volatile
    {
        WDSEL &= ~(1u << 9u);
    }

    inline void toggle_WDSEL_pads_qspi() volatile
    {
        WDSEL ^= 1u << 9u;
    }

    inline bool get_WDSEL_pio0() volatile
    {
        return WDSEL & (1u << 10u);
    }

    inline void set_WDSEL_pio0() volatile
    {
        WDSEL |= 1u << 10u;
    }

    inline void clear_WDSEL_pio0() volatile
    {
        WDSEL &= ~(1u << 10u);
    }

    inline void toggle_WDSEL_pio0() volatile
    {
        WDSEL ^= 1u << 10u;
    }

    inline bool get_WDSEL_pio1() volatile
    {
        return WDSEL & (1u << 11u);
    }

    inline void set_WDSEL_pio1() volatile
    {
        WDSEL |= 1u << 11u;
    }

    inline void clear_WDSEL_pio1() volatile
    {
        WDSEL &= ~(1u << 11u);
    }

    inline void toggle_WDSEL_pio1() volatile
    {
        WDSEL ^= 1u << 11u;
    }

    inline bool get_WDSEL_pll_sys() volatile
    {
        return WDSEL & (1u << 12u);
    }

    inline void set_WDSEL_pll_sys() volatile
    {
        WDSEL |= 1u << 12u;
    }

    inline void clear_WDSEL_pll_sys() volatile
    {
        WDSEL &= ~(1u << 12u);
    }

    inline void toggle_WDSEL_pll_sys() volatile
    {
        WDSEL ^= 1u << 12u;
    }

    inline bool get_WDSEL_pll_usb() volatile
    {
        return WDSEL & (1u << 13u);
    }

    inline void set_WDSEL_pll_usb() volatile
    {
        WDSEL |= 1u << 13u;
    }

    inline void clear_WDSEL_pll_usb() volatile
    {
        WDSEL &= ~(1u << 13u);
    }

    inline void toggle_WDSEL_pll_usb() volatile
    {
        WDSEL ^= 1u << 13u;
    }

    inline bool get_WDSEL_pwm() volatile
    {
        return WDSEL & (1u << 14u);
    }

    inline void set_WDSEL_pwm() volatile
    {
        WDSEL |= 1u << 14u;
    }

    inline void clear_WDSEL_pwm() volatile
    {
        WDSEL &= ~(1u << 14u);
    }

    inline void toggle_WDSEL_pwm() volatile
    {
        WDSEL ^= 1u << 14u;
    }

    inline bool get_WDSEL_rtc() volatile
    {
        return WDSEL & (1u << 15u);
    }

    inline void set_WDSEL_rtc() volatile
    {
        WDSEL |= 1u << 15u;
    }

    inline void clear_WDSEL_rtc() volatile
    {
        WDSEL &= ~(1u << 15u);
    }

    inline void toggle_WDSEL_rtc() volatile
    {
        WDSEL ^= 1u << 15u;
    }

    inline bool get_WDSEL_spi0() volatile
    {
        return WDSEL & (1u << 16u);
    }

    inline void set_WDSEL_spi0() volatile
    {
        WDSEL |= 1u << 16u;
    }

    inline void clear_WDSEL_spi0() volatile
    {
        WDSEL &= ~(1u << 16u);
    }

    inline void toggle_WDSEL_spi0() volatile
    {
        WDSEL ^= 1u << 16u;
    }

    inline bool get_WDSEL_spi1() volatile
    {
        return WDSEL & (1u << 17u);
    }

    inline void set_WDSEL_spi1() volatile
    {
        WDSEL |= 1u << 17u;
    }

    inline void clear_WDSEL_spi1() volatile
    {
        WDSEL &= ~(1u << 17u);
    }

    inline void toggle_WDSEL_spi1() volatile
    {
        WDSEL ^= 1u << 17u;
    }

    inline bool get_WDSEL_syscfg() volatile
    {
        return WDSEL & (1u << 18u);
    }

    inline void set_WDSEL_syscfg() volatile
    {
        WDSEL |= 1u << 18u;
    }

    inline void clear_WDSEL_syscfg() volatile
    {
        WDSEL &= ~(1u << 18u);
    }

    inline void toggle_WDSEL_syscfg() volatile
    {
        WDSEL ^= 1u << 18u;
    }

    inline bool get_WDSEL_sysinfo() volatile
    {
        return WDSEL & (1u << 19u);
    }

    inline void set_WDSEL_sysinfo() volatile
    {
        WDSEL |= 1u << 19u;
    }

    inline void clear_WDSEL_sysinfo() volatile
    {
        WDSEL &= ~(1u << 19u);
    }

    inline void toggle_WDSEL_sysinfo() volatile
    {
        WDSEL ^= 1u << 19u;
    }

    inline bool get_WDSEL_tbman() volatile
    {
        return WDSEL & (1u << 20u);
    }

    inline void set_WDSEL_tbman() volatile
    {
        WDSEL |= 1u << 20u;
    }

    inline void clear_WDSEL_tbman() volatile
    {
        WDSEL &= ~(1u << 20u);
    }

    inline void toggle_WDSEL_tbman() volatile
    {
        WDSEL ^= 1u << 20u;
    }

    inline bool get_WDSEL_timer() volatile
    {
        return WDSEL & (1u << 21u);
    }

    inline void set_WDSEL_timer() volatile
    {
        WDSEL |= 1u << 21u;
    }

    inline void clear_WDSEL_timer() volatile
    {
        WDSEL &= ~(1u << 21u);
    }

    inline void toggle_WDSEL_timer() volatile
    {
        WDSEL ^= 1u << 21u;
    }

    inline bool get_WDSEL_uart0() volatile
    {
        return WDSEL & (1u << 22u);
    }

    inline void set_WDSEL_uart0() volatile
    {
        WDSEL |= 1u << 22u;
    }

    inline void clear_WDSEL_uart0() volatile
    {
        WDSEL &= ~(1u << 22u);
    }

    inline void toggle_WDSEL_uart0() volatile
    {
        WDSEL ^= 1u << 22u;
    }

    inline bool get_WDSEL_uart1() volatile
    {
        return WDSEL & (1u << 23u);
    }

    inline void set_WDSEL_uart1() volatile
    {
        WDSEL |= 1u << 23u;
    }

    inline void clear_WDSEL_uart1() volatile
    {
        WDSEL &= ~(1u << 23u);
    }

    inline void toggle_WDSEL_uart1() volatile
    {
        WDSEL ^= 1u << 23u;
    }

    inline bool get_WDSEL_usbctrl() volatile
    {
        return WDSEL & (1u << 24u);
    }

    inline void set_WDSEL_usbctrl() volatile
    {
        WDSEL |= 1u << 24u;
    }

    inline void clear_WDSEL_usbctrl() volatile
    {
        WDSEL &= ~(1u << 24u);
    }

    inline void toggle_WDSEL_usbctrl() volatile
    {
        WDSEL ^= 1u << 24u;
    }

    inline void get_WDSEL(bool &adc, bool &busctrl, bool &dma, bool &i2c0,
                          bool &i2c1, bool &io_bank0, bool &io_qspi,
                          bool &jtag, bool &pads_bank0, bool &pads_qspi,
                          bool &pio0, bool &pio1, bool &pll_sys, bool &pll_usb,
                          bool &pwm, bool &rtc, bool &spi0, bool &spi1,
                          bool &syscfg, bool &sysinfo, bool &tbman,
                          bool &timer, bool &uart0, bool &uart1,
                          bool &usbctrl) volatile
    {
        uint32_t curr = WDSEL;

        adc = curr & (1u << 0u);
        busctrl = curr & (1u << 1u);
        dma = curr & (1u << 2u);
        i2c0 = curr & (1u << 3u);
        i2c1 = curr & (1u << 4u);
        io_bank0 = curr & (1u << 5u);
        io_qspi = curr & (1u << 6u);
        jtag = curr & (1u << 7u);
        pads_bank0 = curr & (1u << 8u);
        pads_qspi = curr & (1u << 9u);
        pio0 = curr & (1u << 10u);
        pio1 = curr & (1u << 11u);
        pll_sys = curr & (1u << 12u);
        pll_usb = curr & (1u << 13u);
        pwm = curr & (1u << 14u);
        rtc = curr & (1u << 15u);
        spi0 = curr & (1u << 16u);
        spi1 = curr & (1u << 17u);
        syscfg = curr & (1u << 18u);
        sysinfo = curr & (1u << 19u);
        tbman = curr & (1u << 20u);
        timer = curr & (1u << 21u);
        uart0 = curr & (1u << 22u);
        uart1 = curr & (1u << 23u);
        usbctrl = curr & (1u << 24u);
    }

    inline void set_WDSEL(bool adc, bool busctrl, bool dma, bool i2c0,
                          bool i2c1, bool io_bank0, bool io_qspi, bool jtag,
                          bool pads_bank0, bool pads_qspi, bool pio0,
                          bool pio1, bool pll_sys, bool pll_usb, bool pwm,
                          bool rtc, bool spi0, bool spi1, bool syscfg,
                          bool sysinfo, bool tbman, bool timer, bool uart0,
                          bool uart1, bool usbctrl) volatile
    {
        uint32_t curr = WDSEL;

        curr &= ~(0b1u << 0u);
        curr |= (adc & 0b1u) << 0u;
        curr &= ~(0b1u << 1u);
        curr |= (busctrl & 0b1u) << 1u;
        curr &= ~(0b1u << 2u);
        curr |= (dma & 0b1u) << 2u;
        curr &= ~(0b1u << 3u);
        curr |= (i2c0 & 0b1u) << 3u;
        curr &= ~(0b1u << 4u);
        curr |= (i2c1 & 0b1u) << 4u;
        curr &= ~(0b1u << 5u);
        curr |= (io_bank0 & 0b1u) << 5u;
        curr &= ~(0b1u << 6u);
        curr |= (io_qspi & 0b1u) << 6u;
        curr &= ~(0b1u << 7u);
        curr |= (jtag & 0b1u) << 7u;
        curr &= ~(0b1u << 8u);
        curr |= (pads_bank0 & 0b1u) << 8u;
        curr &= ~(0b1u << 9u);
        curr |= (pads_qspi & 0b1u) << 9u;
        curr &= ~(0b1u << 10u);
        curr |= (pio0 & 0b1u) << 10u;
        curr &= ~(0b1u << 11u);
        curr |= (pio1 & 0b1u) << 11u;
        curr &= ~(0b1u << 12u);
        curr |= (pll_sys & 0b1u) << 12u;
        curr &= ~(0b1u << 13u);
        curr |= (pll_usb & 0b1u) << 13u;
        curr &= ~(0b1u << 14u);
        curr |= (pwm & 0b1u) << 14u;
        curr &= ~(0b1u << 15u);
        curr |= (rtc & 0b1u) << 15u;
        curr &= ~(0b1u << 16u);
        curr |= (spi0 & 0b1u) << 16u;
        curr &= ~(0b1u << 17u);
        curr |= (spi1 & 0b1u) << 17u;
        curr &= ~(0b1u << 18u);
        curr |= (syscfg & 0b1u) << 18u;
        curr &= ~(0b1u << 19u);
        curr |= (sysinfo & 0b1u) << 19u;
        curr &= ~(0b1u << 20u);
        curr |= (tbman & 0b1u) << 20u;
        curr &= ~(0b1u << 21u);
        curr |= (timer & 0b1u) << 21u;
        curr &= ~(0b1u << 22u);
        curr |= (uart0 & 0b1u) << 22u;
        curr &= ~(0b1u << 23u);
        curr |= (uart1 & 0b1u) << 23u;
        curr &= ~(0b1u << 24u);
        curr |= (usbctrl & 0b1u) << 24u;

        WDSEL = curr;
    }

    inline bool get_RESET_DONE_adc() volatile
    {
        return RESET_DONE & (1u << 0u);
    }

    inline bool get_RESET_DONE_busctrl() volatile
    {
        return RESET_DONE & (1u << 1u);
    }

    inline bool get_RESET_DONE_dma() volatile
    {
        return RESET_DONE & (1u << 2u);
    }

    inline bool get_RESET_DONE_i2c0() volatile
    {
        return RESET_DONE & (1u << 3u);
    }

    inline bool get_RESET_DONE_i2c1() volatile
    {
        return RESET_DONE & (1u << 4u);
    }

    inline bool get_RESET_DONE_io_bank0() volatile
    {
        return RESET_DONE & (1u << 5u);
    }

    inline bool get_RESET_DONE_io_qspi() volatile
    {
        return RESET_DONE & (1u << 6u);
    }

    inline bool get_RESET_DONE_jtag() volatile
    {
        return RESET_DONE & (1u << 7u);
    }

    inline bool get_RESET_DONE_pads_bank0() volatile
    {
        return RESET_DONE & (1u << 8u);
    }

    inline bool get_RESET_DONE_pads_qspi() volatile
    {
        return RESET_DONE & (1u << 9u);
    }

    inline bool get_RESET_DONE_pio0() volatile
    {
        return RESET_DONE & (1u << 10u);
    }

    inline bool get_RESET_DONE_pio1() volatile
    {
        return RESET_DONE & (1u << 11u);
    }

    inline bool get_RESET_DONE_pll_sys() volatile
    {
        return RESET_DONE & (1u << 12u);
    }

    inline bool get_RESET_DONE_pll_usb() volatile
    {
        return RESET_DONE & (1u << 13u);
    }

    inline bool get_RESET_DONE_pwm() volatile
    {
        return RESET_DONE & (1u << 14u);
    }

    inline bool get_RESET_DONE_rtc() volatile
    {
        return RESET_DONE & (1u << 15u);
    }

    inline bool get_RESET_DONE_spi0() volatile
    {
        return RESET_DONE & (1u << 16u);
    }

    inline bool get_RESET_DONE_spi1() volatile
    {
        return RESET_DONE & (1u << 17u);
    }

    inline bool get_RESET_DONE_syscfg() volatile
    {
        return RESET_DONE & (1u << 18u);
    }

    inline bool get_RESET_DONE_sysinfo() volatile
    {
        return RESET_DONE & (1u << 19u);
    }

    inline bool get_RESET_DONE_tbman() volatile
    {
        return RESET_DONE & (1u << 20u);
    }

    inline bool get_RESET_DONE_timer() volatile
    {
        return RESET_DONE & (1u << 21u);
    }

    inline bool get_RESET_DONE_uart0() volatile
    {
        return RESET_DONE & (1u << 22u);
    }

    inline bool get_RESET_DONE_uart1() volatile
    {
        return RESET_DONE & (1u << 23u);
    }

    inline bool get_RESET_DONE_usbctrl() volatile
    {
        return RESET_DONE & (1u << 24u);
    }

    inline void get_RESET_DONE(bool &adc, bool &busctrl, bool &dma, bool &i2c0,
                               bool &i2c1, bool &io_bank0, bool &io_qspi,
                               bool &jtag, bool &pads_bank0, bool &pads_qspi,
                               bool &pio0, bool &pio1, bool &pll_sys,
                               bool &pll_usb, bool &pwm, bool &rtc, bool &spi0,
                               bool &spi1, bool &syscfg, bool &sysinfo,
                               bool &tbman, bool &timer, bool &uart0,
                               bool &uart1, bool &usbctrl) volatile
    {
        uint32_t curr = RESET_DONE;

        adc = curr & (1u << 0u);
        busctrl = curr & (1u << 1u);
        dma = curr & (1u << 2u);
        i2c0 = curr & (1u << 3u);
        i2c1 = curr & (1u << 4u);
        io_bank0 = curr & (1u << 5u);
        io_qspi = curr & (1u << 6u);
        jtag = curr & (1u << 7u);
        pads_bank0 = curr & (1u << 8u);
        pads_qspi = curr & (1u << 9u);
        pio0 = curr & (1u << 10u);
        pio1 = curr & (1u << 11u);
        pll_sys = curr & (1u << 12u);
        pll_usb = curr & (1u << 13u);
        pwm = curr & (1u << 14u);
        rtc = curr & (1u << 15u);
        spi0 = curr & (1u << 16u);
        spi1 = curr & (1u << 17u);
        syscfg = curr & (1u << 18u);
        sysinfo = curr & (1u << 19u);
        tbman = curr & (1u << 20u);
        timer = curr & (1u << 21u);
        uart0 = curr & (1u << 22u);
        uart1 = curr & (1u << 23u);
        usbctrl = curr & (1u << 24u);
    }
};

static_assert(sizeof(resets) == resets::size);

static volatile resets *const RESETS = reinterpret_cast<resets *>(0x4000c000);

}; // namespace RP2040