Program Listing for File pll_sys.h

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#pragma once

#include "../ifgen/common.h"

namespace RP2040
{

struct [[gnu::packed]] pll_sys
{
    /* Constant attributes. */
    static constexpr std::size_t size = 16;
    /* Fields. */
    uint32_t CS;
    uint32_t PWR;
    uint32_t FBDIV_INT;
    uint32_t PRIM;
    /* Methods. */

    inline uint8_t get_CS_REFDIV() volatile
    {
        return (CS >> 0u) & 0b111111u;
    }

    inline void set_CS_REFDIV(uint8_t value) volatile
    {
        uint32_t curr = CS;

        curr &= ~(0b111111u << 0u);
        curr |= (value & 0b111111u) << 0u;

        CS = curr;
    }

    inline bool get_CS_BYPASS() volatile
    {
        return CS & (1u << 8u);
    }

    inline void set_CS_BYPASS() volatile
    {
        CS |= 1u << 8u;
    }

    inline void clear_CS_BYPASS() volatile
    {
        CS &= ~(1u << 8u);
    }

    inline void toggle_CS_BYPASS() volatile
    {
        CS ^= 1u << 8u;
    }

    inline bool get_CS_LOCK() volatile
    {
        return CS & (1u << 31u);
    }

    inline void get_CS(uint8_t &REFDIV, bool &BYPASS, bool &LOCK) volatile
    {
        uint32_t curr = CS;

        REFDIV = (curr >> 0u) & 0b111111u;
        BYPASS = curr & (1u << 8u);
        LOCK = curr & (1u << 31u);
    }

    inline void set_CS(uint8_t REFDIV, bool BYPASS) volatile
    {
        uint32_t curr = CS;

        curr &= ~(0b111111u << 0u);
        curr |= (REFDIV & 0b111111u) << 0u;
        curr &= ~(0b1u << 8u);
        curr |= (BYPASS & 0b1u) << 8u;

        CS = curr;
    }

    inline bool get_PWR_PD() volatile
    {
        return PWR & (1u << 0u);
    }

    inline void set_PWR_PD() volatile
    {
        PWR |= 1u << 0u;
    }

    inline void clear_PWR_PD() volatile
    {
        PWR &= ~(1u << 0u);
    }

    inline void toggle_PWR_PD() volatile
    {
        PWR ^= 1u << 0u;
    }

    inline bool get_PWR_DSMPD() volatile
    {
        return PWR & (1u << 2u);
    }

    inline void set_PWR_DSMPD() volatile
    {
        PWR |= 1u << 2u;
    }

    inline void clear_PWR_DSMPD() volatile
    {
        PWR &= ~(1u << 2u);
    }

    inline void toggle_PWR_DSMPD() volatile
    {
        PWR ^= 1u << 2u;
    }

    inline bool get_PWR_POSTDIVPD() volatile
    {
        return PWR & (1u << 3u);
    }

    inline void set_PWR_POSTDIVPD() volatile
    {
        PWR |= 1u << 3u;
    }

    inline void clear_PWR_POSTDIVPD() volatile
    {
        PWR &= ~(1u << 3u);
    }

    inline void toggle_PWR_POSTDIVPD() volatile
    {
        PWR ^= 1u << 3u;
    }

    inline bool get_PWR_VCOPD() volatile
    {
        return PWR & (1u << 5u);
    }

    inline void set_PWR_VCOPD() volatile
    {
        PWR |= 1u << 5u;
    }

    inline void clear_PWR_VCOPD() volatile
    {
        PWR &= ~(1u << 5u);
    }

    inline void toggle_PWR_VCOPD() volatile
    {
        PWR ^= 1u << 5u;
    }

    inline void get_PWR(bool &PD, bool &DSMPD, bool &POSTDIVPD,
                        bool &VCOPD) volatile
    {
        uint32_t curr = PWR;

        PD = curr & (1u << 0u);
        DSMPD = curr & (1u << 2u);
        POSTDIVPD = curr & (1u << 3u);
        VCOPD = curr & (1u << 5u);
    }

    inline void set_PWR(bool PD, bool DSMPD, bool POSTDIVPD,
                        bool VCOPD) volatile
    {
        uint32_t curr = PWR;

        curr &= ~(0b1u << 0u);
        curr |= (PD & 0b1u) << 0u;
        curr &= ~(0b1u << 2u);
        curr |= (DSMPD & 0b1u) << 2u;
        curr &= ~(0b1u << 3u);
        curr |= (POSTDIVPD & 0b1u) << 3u;
        curr &= ~(0b1u << 5u);
        curr |= (VCOPD & 0b1u) << 5u;

        PWR = curr;
    }

    inline uint16_t get_FBDIV_INT_FBDIV_INT() volatile
    {
        return (FBDIV_INT >> 0u) & 0b111111111111u;
    }

    inline void set_FBDIV_INT_FBDIV_INT(uint16_t value) volatile
    {
        uint32_t curr = FBDIV_INT;

        curr &= ~(0b111111111111u << 0u);
        curr |= (value & 0b111111111111u) << 0u;

        FBDIV_INT = curr;
    }

    inline uint8_t get_PRIM_POSTDIV2() volatile
    {
        return (PRIM >> 12u) & 0b111u;
    }

    inline void set_PRIM_POSTDIV2(uint8_t value) volatile
    {
        uint32_t curr = PRIM;

        curr &= ~(0b111u << 12u);
        curr |= (value & 0b111u) << 12u;

        PRIM = curr;
    }

    inline uint8_t get_PRIM_POSTDIV1() volatile
    {
        return (PRIM >> 16u) & 0b111u;
    }

    inline void set_PRIM_POSTDIV1(uint8_t value) volatile
    {
        uint32_t curr = PRIM;

        curr &= ~(0b111u << 16u);
        curr |= (value & 0b111u) << 16u;

        PRIM = curr;
    }

    inline void get_PRIM(uint8_t &POSTDIV2, uint8_t &POSTDIV1) volatile
    {
        uint32_t curr = PRIM;

        POSTDIV2 = (curr >> 12u) & 0b111u;
        POSTDIV1 = (curr >> 16u) & 0b111u;
    }

    inline void set_PRIM(uint8_t POSTDIV2, uint8_t POSTDIV1) volatile
    {
        uint32_t curr = PRIM;

        curr &= ~(0b111u << 12u);
        curr |= (POSTDIV2 & 0b111u) << 12u;
        curr &= ~(0b111u << 16u);
        curr |= (POSTDIV1 & 0b111u) << 16u;

        PRIM = curr;
    }
};

static_assert(sizeof(pll_sys) == pll_sys::size);

static volatile pll_sys *const PLL_SYS =
    reinterpret_cast<pll_sys *>(0x40028000);

static volatile pll_sys *const PLL_USB =
    reinterpret_cast<pll_sys *>(0x4002c000);

}; // namespace RP2040