Program Listing for File io_bank0.h#
↰ Return to documentation for file (src/generated/structs/io_bank0.h)
#pragma once
#include "../enums/IO_BANK0_GPIO0_CTRL_FUNCSEL.h"
#include "../enums/IO_BANK0_GPIO0_CTRL_INOVER.h"
#include "../enums/IO_BANK0_GPIO0_CTRL_IRQOVER.h"
#include "../enums/IO_BANK0_GPIO0_CTRL_OEOVER.h"
#include "../enums/IO_BANK0_GPIO0_CTRL_OUTOVER.h"
#include "../enums/IO_BANK0_GPIO10_CTRL_FUNCSEL.h"
#include "../enums/IO_BANK0_GPIO10_CTRL_INOVER.h"
#include "../enums/IO_BANK0_GPIO10_CTRL_IRQOVER.h"
#include "../enums/IO_BANK0_GPIO10_CTRL_OEOVER.h"
#include "../enums/IO_BANK0_GPIO10_CTRL_OUTOVER.h"
#include "../enums/IO_BANK0_GPIO11_CTRL_FUNCSEL.h"
#include "../enums/IO_BANK0_GPIO11_CTRL_INOVER.h"
#include "../enums/IO_BANK0_GPIO11_CTRL_IRQOVER.h"
#include "../enums/IO_BANK0_GPIO11_CTRL_OEOVER.h"
#include "../enums/IO_BANK0_GPIO11_CTRL_OUTOVER.h"
#include "../enums/IO_BANK0_GPIO12_CTRL_FUNCSEL.h"
#include "../enums/IO_BANK0_GPIO12_CTRL_INOVER.h"
#include "../enums/IO_BANK0_GPIO12_CTRL_IRQOVER.h"
#include "../enums/IO_BANK0_GPIO12_CTRL_OEOVER.h"
#include "../enums/IO_BANK0_GPIO12_CTRL_OUTOVER.h"
#include "../enums/IO_BANK0_GPIO13_CTRL_FUNCSEL.h"
#include "../enums/IO_BANK0_GPIO13_CTRL_INOVER.h"
#include "../enums/IO_BANK0_GPIO13_CTRL_IRQOVER.h"
#include "../enums/IO_BANK0_GPIO13_CTRL_OEOVER.h"
#include "../enums/IO_BANK0_GPIO13_CTRL_OUTOVER.h"
#include "../enums/IO_BANK0_GPIO14_CTRL_FUNCSEL.h"
#include "../enums/IO_BANK0_GPIO14_CTRL_INOVER.h"
#include "../enums/IO_BANK0_GPIO14_CTRL_IRQOVER.h"
#include "../enums/IO_BANK0_GPIO14_CTRL_OEOVER.h"
#include "../enums/IO_BANK0_GPIO14_CTRL_OUTOVER.h"
#include "../enums/IO_BANK0_GPIO15_CTRL_FUNCSEL.h"
#include "../enums/IO_BANK0_GPIO15_CTRL_INOVER.h"
#include "../enums/IO_BANK0_GPIO15_CTRL_IRQOVER.h"
#include "../enums/IO_BANK0_GPIO15_CTRL_OEOVER.h"
#include "../enums/IO_BANK0_GPIO15_CTRL_OUTOVER.h"
#include "../enums/IO_BANK0_GPIO16_CTRL_FUNCSEL.h"
#include "../enums/IO_BANK0_GPIO16_CTRL_INOVER.h"
#include "../enums/IO_BANK0_GPIO16_CTRL_IRQOVER.h"
#include "../enums/IO_BANK0_GPIO16_CTRL_OEOVER.h"
#include "../enums/IO_BANK0_GPIO16_CTRL_OUTOVER.h"
#include "../enums/IO_BANK0_GPIO17_CTRL_FUNCSEL.h"
#include "../enums/IO_BANK0_GPIO17_CTRL_INOVER.h"
#include "../enums/IO_BANK0_GPIO17_CTRL_IRQOVER.h"
#include "../enums/IO_BANK0_GPIO17_CTRL_OEOVER.h"
#include "../enums/IO_BANK0_GPIO17_CTRL_OUTOVER.h"
#include "../enums/IO_BANK0_GPIO18_CTRL_FUNCSEL.h"
#include "../enums/IO_BANK0_GPIO18_CTRL_INOVER.h"
#include "../enums/IO_BANK0_GPIO18_CTRL_IRQOVER.h"
#include "../enums/IO_BANK0_GPIO18_CTRL_OEOVER.h"
#include "../enums/IO_BANK0_GPIO18_CTRL_OUTOVER.h"
#include "../enums/IO_BANK0_GPIO19_CTRL_FUNCSEL.h"
#include "../enums/IO_BANK0_GPIO19_CTRL_INOVER.h"
#include "../enums/IO_BANK0_GPIO19_CTRL_IRQOVER.h"
#include "../enums/IO_BANK0_GPIO19_CTRL_OEOVER.h"
#include "../enums/IO_BANK0_GPIO19_CTRL_OUTOVER.h"
#include "../enums/IO_BANK0_GPIO1_CTRL_FUNCSEL.h"
#include "../enums/IO_BANK0_GPIO1_CTRL_INOVER.h"
#include "../enums/IO_BANK0_GPIO1_CTRL_IRQOVER.h"
#include "../enums/IO_BANK0_GPIO1_CTRL_OEOVER.h"
#include "../enums/IO_BANK0_GPIO1_CTRL_OUTOVER.h"
#include "../enums/IO_BANK0_GPIO20_CTRL_FUNCSEL.h"
#include "../enums/IO_BANK0_GPIO20_CTRL_INOVER.h"
#include "../enums/IO_BANK0_GPIO20_CTRL_IRQOVER.h"
#include "../enums/IO_BANK0_GPIO20_CTRL_OEOVER.h"
#include "../enums/IO_BANK0_GPIO20_CTRL_OUTOVER.h"
#include "../enums/IO_BANK0_GPIO21_CTRL_FUNCSEL.h"
#include "../enums/IO_BANK0_GPIO21_CTRL_INOVER.h"
#include "../enums/IO_BANK0_GPIO21_CTRL_IRQOVER.h"
#include "../enums/IO_BANK0_GPIO21_CTRL_OEOVER.h"
#include "../enums/IO_BANK0_GPIO21_CTRL_OUTOVER.h"
#include "../enums/IO_BANK0_GPIO22_CTRL_FUNCSEL.h"
#include "../enums/IO_BANK0_GPIO22_CTRL_INOVER.h"
#include "../enums/IO_BANK0_GPIO22_CTRL_IRQOVER.h"
#include "../enums/IO_BANK0_GPIO22_CTRL_OEOVER.h"
#include "../enums/IO_BANK0_GPIO22_CTRL_OUTOVER.h"
#include "../enums/IO_BANK0_GPIO23_CTRL_FUNCSEL.h"
#include "../enums/IO_BANK0_GPIO23_CTRL_INOVER.h"
#include "../enums/IO_BANK0_GPIO23_CTRL_IRQOVER.h"
#include "../enums/IO_BANK0_GPIO23_CTRL_OEOVER.h"
#include "../enums/IO_BANK0_GPIO23_CTRL_OUTOVER.h"
#include "../enums/IO_BANK0_GPIO24_CTRL_FUNCSEL.h"
#include "../enums/IO_BANK0_GPIO24_CTRL_INOVER.h"
#include "../enums/IO_BANK0_GPIO24_CTRL_IRQOVER.h"
#include "../enums/IO_BANK0_GPIO24_CTRL_OEOVER.h"
#include "../enums/IO_BANK0_GPIO24_CTRL_OUTOVER.h"
#include "../enums/IO_BANK0_GPIO25_CTRL_FUNCSEL.h"
#include "../enums/IO_BANK0_GPIO25_CTRL_INOVER.h"
#include "../enums/IO_BANK0_GPIO25_CTRL_IRQOVER.h"
#include "../enums/IO_BANK0_GPIO25_CTRL_OEOVER.h"
#include "../enums/IO_BANK0_GPIO25_CTRL_OUTOVER.h"
#include "../enums/IO_BANK0_GPIO26_CTRL_FUNCSEL.h"
#include "../enums/IO_BANK0_GPIO26_CTRL_INOVER.h"
#include "../enums/IO_BANK0_GPIO26_CTRL_IRQOVER.h"
#include "../enums/IO_BANK0_GPIO26_CTRL_OEOVER.h"
#include "../enums/IO_BANK0_GPIO26_CTRL_OUTOVER.h"
#include "../enums/IO_BANK0_GPIO27_CTRL_FUNCSEL.h"
#include "../enums/IO_BANK0_GPIO27_CTRL_INOVER.h"
#include "../enums/IO_BANK0_GPIO27_CTRL_IRQOVER.h"
#include "../enums/IO_BANK0_GPIO27_CTRL_OEOVER.h"
#include "../enums/IO_BANK0_GPIO27_CTRL_OUTOVER.h"
#include "../enums/IO_BANK0_GPIO28_CTRL_FUNCSEL.h"
#include "../enums/IO_BANK0_GPIO28_CTRL_INOVER.h"
#include "../enums/IO_BANK0_GPIO28_CTRL_IRQOVER.h"
#include "../enums/IO_BANK0_GPIO28_CTRL_OEOVER.h"
#include "../enums/IO_BANK0_GPIO28_CTRL_OUTOVER.h"
#include "../enums/IO_BANK0_GPIO29_CTRL_FUNCSEL.h"
#include "../enums/IO_BANK0_GPIO29_CTRL_INOVER.h"
#include "../enums/IO_BANK0_GPIO29_CTRL_IRQOVER.h"
#include "../enums/IO_BANK0_GPIO29_CTRL_OEOVER.h"
#include "../enums/IO_BANK0_GPIO29_CTRL_OUTOVER.h"
#include "../enums/IO_BANK0_GPIO2_CTRL_FUNCSEL.h"
#include "../enums/IO_BANK0_GPIO2_CTRL_INOVER.h"
#include "../enums/IO_BANK0_GPIO2_CTRL_IRQOVER.h"
#include "../enums/IO_BANK0_GPIO2_CTRL_OEOVER.h"
#include "../enums/IO_BANK0_GPIO2_CTRL_OUTOVER.h"
#include "../enums/IO_BANK0_GPIO3_CTRL_FUNCSEL.h"
#include "../enums/IO_BANK0_GPIO3_CTRL_INOVER.h"
#include "../enums/IO_BANK0_GPIO3_CTRL_IRQOVER.h"
#include "../enums/IO_BANK0_GPIO3_CTRL_OEOVER.h"
#include "../enums/IO_BANK0_GPIO3_CTRL_OUTOVER.h"
#include "../enums/IO_BANK0_GPIO4_CTRL_FUNCSEL.h"
#include "../enums/IO_BANK0_GPIO4_CTRL_INOVER.h"
#include "../enums/IO_BANK0_GPIO4_CTRL_IRQOVER.h"
#include "../enums/IO_BANK0_GPIO4_CTRL_OEOVER.h"
#include "../enums/IO_BANK0_GPIO4_CTRL_OUTOVER.h"
#include "../enums/IO_BANK0_GPIO5_CTRL_FUNCSEL.h"
#include "../enums/IO_BANK0_GPIO5_CTRL_INOVER.h"
#include "../enums/IO_BANK0_GPIO5_CTRL_IRQOVER.h"
#include "../enums/IO_BANK0_GPIO5_CTRL_OEOVER.h"
#include "../enums/IO_BANK0_GPIO5_CTRL_OUTOVER.h"
#include "../enums/IO_BANK0_GPIO6_CTRL_FUNCSEL.h"
#include "../enums/IO_BANK0_GPIO6_CTRL_INOVER.h"
#include "../enums/IO_BANK0_GPIO6_CTRL_IRQOVER.h"
#include "../enums/IO_BANK0_GPIO6_CTRL_OEOVER.h"
#include "../enums/IO_BANK0_GPIO6_CTRL_OUTOVER.h"
#include "../enums/IO_BANK0_GPIO7_CTRL_FUNCSEL.h"
#include "../enums/IO_BANK0_GPIO7_CTRL_INOVER.h"
#include "../enums/IO_BANK0_GPIO7_CTRL_IRQOVER.h"
#include "../enums/IO_BANK0_GPIO7_CTRL_OEOVER.h"
#include "../enums/IO_BANK0_GPIO7_CTRL_OUTOVER.h"
#include "../enums/IO_BANK0_GPIO8_CTRL_FUNCSEL.h"
#include "../enums/IO_BANK0_GPIO8_CTRL_INOVER.h"
#include "../enums/IO_BANK0_GPIO8_CTRL_IRQOVER.h"
#include "../enums/IO_BANK0_GPIO8_CTRL_OEOVER.h"
#include "../enums/IO_BANK0_GPIO8_CTRL_OUTOVER.h"
#include "../enums/IO_BANK0_GPIO9_CTRL_FUNCSEL.h"
#include "../enums/IO_BANK0_GPIO9_CTRL_INOVER.h"
#include "../enums/IO_BANK0_GPIO9_CTRL_IRQOVER.h"
#include "../enums/IO_BANK0_GPIO9_CTRL_OEOVER.h"
#include "../enums/IO_BANK0_GPIO9_CTRL_OUTOVER.h"
#include "../ifgen/common.h"
namespace RP2040
{
struct [[gnu::packed]] io_bank0
{
/* Constant attributes. */
static constexpr std::size_t size = 400;
/* Fields. */
const uint32_t GPIO0_STATUS = {};
uint32_t GPIO0_CTRL;
const uint32_t GPIO1_STATUS = {};
uint32_t GPIO1_CTRL;
const uint32_t GPIO2_STATUS = {};
uint32_t GPIO2_CTRL;
const uint32_t GPIO3_STATUS = {};
uint32_t GPIO3_CTRL;
const uint32_t GPIO4_STATUS = {};
uint32_t GPIO4_CTRL;
const uint32_t GPIO5_STATUS = {};
uint32_t GPIO5_CTRL;
const uint32_t GPIO6_STATUS = {};
uint32_t GPIO6_CTRL;
const uint32_t GPIO7_STATUS = {};
uint32_t GPIO7_CTRL;
const uint32_t GPIO8_STATUS = {};
uint32_t GPIO8_CTRL;
const uint32_t GPIO9_STATUS = {};
uint32_t GPIO9_CTRL;
const uint32_t GPIO10_STATUS = {};
uint32_t GPIO10_CTRL;
const uint32_t GPIO11_STATUS = {};
uint32_t GPIO11_CTRL;
const uint32_t GPIO12_STATUS = {};
uint32_t GPIO12_CTRL;
const uint32_t GPIO13_STATUS = {};
uint32_t GPIO13_CTRL;
const uint32_t GPIO14_STATUS = {};
uint32_t GPIO14_CTRL;
const uint32_t GPIO15_STATUS = {};
uint32_t GPIO15_CTRL;
const uint32_t GPIO16_STATUS = {};
uint32_t GPIO16_CTRL;
const uint32_t GPIO17_STATUS = {};
uint32_t GPIO17_CTRL;
const uint32_t GPIO18_STATUS = {};
uint32_t GPIO18_CTRL;
const uint32_t GPIO19_STATUS = {};
uint32_t GPIO19_CTRL;
const uint32_t GPIO20_STATUS = {};
uint32_t GPIO20_CTRL;
const uint32_t GPIO21_STATUS = {};
uint32_t GPIO21_CTRL;
const uint32_t GPIO22_STATUS = {};
uint32_t GPIO22_CTRL;
const uint32_t GPIO23_STATUS = {};
uint32_t GPIO23_CTRL;
const uint32_t GPIO24_STATUS = {};
uint32_t GPIO24_CTRL;
const uint32_t GPIO25_STATUS = {};
uint32_t GPIO25_CTRL;
const uint32_t GPIO26_STATUS = {};
uint32_t GPIO26_CTRL;
const uint32_t GPIO27_STATUS = {};
uint32_t GPIO27_CTRL;
const uint32_t GPIO28_STATUS = {};
uint32_t GPIO28_CTRL;
const uint32_t GPIO29_STATUS = {};
uint32_t GPIO29_CTRL;
uint32_t INTR0;
uint32_t INTR1;
uint32_t INTR2;
uint32_t INTR3;
uint32_t PROC0_INTE0;
uint32_t PROC0_INTE1;
uint32_t PROC0_INTE2;
uint32_t PROC0_INTE3;
uint32_t PROC0_INTF0;
uint32_t PROC0_INTF1;
uint32_t PROC0_INTF2;
uint32_t PROC0_INTF3;
const uint32_t PROC0_INTS0 = {};
const uint32_t PROC0_INTS1 = {};
const uint32_t PROC0_INTS2 = {};
const uint32_t PROC0_INTS3 = {};
uint32_t PROC1_INTE0;
uint32_t PROC1_INTE1;
uint32_t PROC1_INTE2;
uint32_t PROC1_INTE3;
uint32_t PROC1_INTF0;
uint32_t PROC1_INTF1;
uint32_t PROC1_INTF2;
uint32_t PROC1_INTF3;
const uint32_t PROC1_INTS0 = {};
const uint32_t PROC1_INTS1 = {};
const uint32_t PROC1_INTS2 = {};
const uint32_t PROC1_INTS3 = {};
uint32_t DORMANT_WAKE_INTE0;
uint32_t DORMANT_WAKE_INTE1;
uint32_t DORMANT_WAKE_INTE2;
uint32_t DORMANT_WAKE_INTE3;
uint32_t DORMANT_WAKE_INTF0;
uint32_t DORMANT_WAKE_INTF1;
uint32_t DORMANT_WAKE_INTF2;
uint32_t DORMANT_WAKE_INTF3;
const uint32_t DORMANT_WAKE_INTS0 =
{};
const uint32_t DORMANT_WAKE_INTS1 =
{};
const uint32_t DORMANT_WAKE_INTS2 =
{};
const uint32_t DORMANT_WAKE_INTS3 =
{};
/* Methods. */
inline bool get_GPIO0_STATUS_OUTFROMPERI() volatile
{
return GPIO0_STATUS & (1u << 8u);
}
inline bool get_GPIO0_STATUS_OUTTOPAD() volatile
{
return GPIO0_STATUS & (1u << 9u);
}
inline bool get_GPIO0_STATUS_OEFROMPERI() volatile
{
return GPIO0_STATUS & (1u << 12u);
}
inline bool get_GPIO0_STATUS_OETOPAD() volatile
{
return GPIO0_STATUS & (1u << 13u);
}
inline bool get_GPIO0_STATUS_INFROMPAD() volatile
{
return GPIO0_STATUS & (1u << 17u);
}
inline bool get_GPIO0_STATUS_INTOPERI() volatile
{
return GPIO0_STATUS & (1u << 19u);
}
inline bool get_GPIO0_STATUS_IRQFROMPAD() volatile
{
return GPIO0_STATUS & (1u << 24u);
}
inline bool get_GPIO0_STATUS_IRQTOPROC() volatile
{
return GPIO0_STATUS & (1u << 26u);
}
inline void get_GPIO0_STATUS(bool &OUTFROMPERI, bool &OUTTOPAD,
bool &OEFROMPERI, bool &OETOPAD,
bool &INFROMPAD, bool &INTOPERI,
bool &IRQFROMPAD, bool &IRQTOPROC) volatile
{
uint32_t curr = GPIO0_STATUS;
OUTFROMPERI = curr & (1u << 8u);
OUTTOPAD = curr & (1u << 9u);
OEFROMPERI = curr & (1u << 12u);
OETOPAD = curr & (1u << 13u);
INFROMPAD = curr & (1u << 17u);
INTOPERI = curr & (1u << 19u);
IRQFROMPAD = curr & (1u << 24u);
IRQTOPROC = curr & (1u << 26u);
}
inline IO_BANK0_GPIO0_CTRL_FUNCSEL get_GPIO0_CTRL_FUNCSEL() volatile
{
return IO_BANK0_GPIO0_CTRL_FUNCSEL((GPIO0_CTRL >> 0u) & 0b11111u);
}
inline void set_GPIO0_CTRL_FUNCSEL(
IO_BANK0_GPIO0_CTRL_FUNCSEL value) volatile
{
uint32_t curr = GPIO0_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(value) & 0b11111u) << 0u;
GPIO0_CTRL = curr;
}
inline IO_BANK0_GPIO0_CTRL_OUTOVER get_GPIO0_CTRL_OUTOVER() volatile
{
return IO_BANK0_GPIO0_CTRL_OUTOVER((GPIO0_CTRL >> 8u) & 0b11u);
}
inline void set_GPIO0_CTRL_OUTOVER(
IO_BANK0_GPIO0_CTRL_OUTOVER value) volatile
{
uint32_t curr = GPIO0_CTRL;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(value) & 0b11u) << 8u;
GPIO0_CTRL = curr;
}
inline IO_BANK0_GPIO0_CTRL_OEOVER get_GPIO0_CTRL_OEOVER() volatile
{
return IO_BANK0_GPIO0_CTRL_OEOVER((GPIO0_CTRL >> 12u) & 0b11u);
}
inline void set_GPIO0_CTRL_OEOVER(
IO_BANK0_GPIO0_CTRL_OEOVER value) volatile
{
uint32_t curr = GPIO0_CTRL;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(value) & 0b11u) << 12u;
GPIO0_CTRL = curr;
}
inline IO_BANK0_GPIO0_CTRL_INOVER get_GPIO0_CTRL_INOVER() volatile
{
return IO_BANK0_GPIO0_CTRL_INOVER((GPIO0_CTRL >> 16u) & 0b11u);
}
inline void set_GPIO0_CTRL_INOVER(
IO_BANK0_GPIO0_CTRL_INOVER value) volatile
{
uint32_t curr = GPIO0_CTRL;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(value) & 0b11u) << 16u;
GPIO0_CTRL = curr;
}
inline IO_BANK0_GPIO0_CTRL_IRQOVER get_GPIO0_CTRL_IRQOVER() volatile
{
return IO_BANK0_GPIO0_CTRL_IRQOVER((GPIO0_CTRL >> 28u) & 0b11u);
}
inline void set_GPIO0_CTRL_IRQOVER(
IO_BANK0_GPIO0_CTRL_IRQOVER value) volatile
{
uint32_t curr = GPIO0_CTRL;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(value) & 0b11u) << 28u;
GPIO0_CTRL = curr;
}
inline void get_GPIO0_CTRL(IO_BANK0_GPIO0_CTRL_FUNCSEL &FUNCSEL,
IO_BANK0_GPIO0_CTRL_OUTOVER &OUTOVER,
IO_BANK0_GPIO0_CTRL_OEOVER &OEOVER,
IO_BANK0_GPIO0_CTRL_INOVER &INOVER,
IO_BANK0_GPIO0_CTRL_IRQOVER &IRQOVER) volatile
{
uint32_t curr = GPIO0_CTRL;
FUNCSEL = IO_BANK0_GPIO0_CTRL_FUNCSEL((curr >> 0u) & 0b11111u);
OUTOVER = IO_BANK0_GPIO0_CTRL_OUTOVER((curr >> 8u) & 0b11u);
OEOVER = IO_BANK0_GPIO0_CTRL_OEOVER((curr >> 12u) & 0b11u);
INOVER = IO_BANK0_GPIO0_CTRL_INOVER((curr >> 16u) & 0b11u);
IRQOVER = IO_BANK0_GPIO0_CTRL_IRQOVER((curr >> 28u) & 0b11u);
}
inline void set_GPIO0_CTRL(IO_BANK0_GPIO0_CTRL_FUNCSEL FUNCSEL,
IO_BANK0_GPIO0_CTRL_OUTOVER OUTOVER,
IO_BANK0_GPIO0_CTRL_OEOVER OEOVER,
IO_BANK0_GPIO0_CTRL_INOVER INOVER,
IO_BANK0_GPIO0_CTRL_IRQOVER IRQOVER) volatile
{
uint32_t curr = GPIO0_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(FUNCSEL) & 0b11111u) << 0u;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(OUTOVER) & 0b11u) << 8u;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(OEOVER) & 0b11u) << 12u;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(INOVER) & 0b11u) << 16u;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(IRQOVER) & 0b11u) << 28u;
GPIO0_CTRL = curr;
}
inline bool get_GPIO1_STATUS_OUTFROMPERI() volatile
{
return GPIO1_STATUS & (1u << 8u);
}
inline bool get_GPIO1_STATUS_OUTTOPAD() volatile
{
return GPIO1_STATUS & (1u << 9u);
}
inline bool get_GPIO1_STATUS_OEFROMPERI() volatile
{
return GPIO1_STATUS & (1u << 12u);
}
inline bool get_GPIO1_STATUS_OETOPAD() volatile
{
return GPIO1_STATUS & (1u << 13u);
}
inline bool get_GPIO1_STATUS_INFROMPAD() volatile
{
return GPIO1_STATUS & (1u << 17u);
}
inline bool get_GPIO1_STATUS_INTOPERI() volatile
{
return GPIO1_STATUS & (1u << 19u);
}
inline bool get_GPIO1_STATUS_IRQFROMPAD() volatile
{
return GPIO1_STATUS & (1u << 24u);
}
inline bool get_GPIO1_STATUS_IRQTOPROC() volatile
{
return GPIO1_STATUS & (1u << 26u);
}
inline void get_GPIO1_STATUS(bool &OUTFROMPERI, bool &OUTTOPAD,
bool &OEFROMPERI, bool &OETOPAD,
bool &INFROMPAD, bool &INTOPERI,
bool &IRQFROMPAD, bool &IRQTOPROC) volatile
{
uint32_t curr = GPIO1_STATUS;
OUTFROMPERI = curr & (1u << 8u);
OUTTOPAD = curr & (1u << 9u);
OEFROMPERI = curr & (1u << 12u);
OETOPAD = curr & (1u << 13u);
INFROMPAD = curr & (1u << 17u);
INTOPERI = curr & (1u << 19u);
IRQFROMPAD = curr & (1u << 24u);
IRQTOPROC = curr & (1u << 26u);
}
inline IO_BANK0_GPIO1_CTRL_FUNCSEL get_GPIO1_CTRL_FUNCSEL() volatile
{
return IO_BANK0_GPIO1_CTRL_FUNCSEL((GPIO1_CTRL >> 0u) & 0b11111u);
}
inline void set_GPIO1_CTRL_FUNCSEL(
IO_BANK0_GPIO1_CTRL_FUNCSEL value) volatile
{
uint32_t curr = GPIO1_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(value) & 0b11111u) << 0u;
GPIO1_CTRL = curr;
}
inline IO_BANK0_GPIO1_CTRL_OUTOVER get_GPIO1_CTRL_OUTOVER() volatile
{
return IO_BANK0_GPIO1_CTRL_OUTOVER((GPIO1_CTRL >> 8u) & 0b11u);
}
inline void set_GPIO1_CTRL_OUTOVER(
IO_BANK0_GPIO1_CTRL_OUTOVER value) volatile
{
uint32_t curr = GPIO1_CTRL;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(value) & 0b11u) << 8u;
GPIO1_CTRL = curr;
}
inline IO_BANK0_GPIO1_CTRL_OEOVER get_GPIO1_CTRL_OEOVER() volatile
{
return IO_BANK0_GPIO1_CTRL_OEOVER((GPIO1_CTRL >> 12u) & 0b11u);
}
inline void set_GPIO1_CTRL_OEOVER(
IO_BANK0_GPIO1_CTRL_OEOVER value) volatile
{
uint32_t curr = GPIO1_CTRL;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(value) & 0b11u) << 12u;
GPIO1_CTRL = curr;
}
inline IO_BANK0_GPIO1_CTRL_INOVER get_GPIO1_CTRL_INOVER() volatile
{
return IO_BANK0_GPIO1_CTRL_INOVER((GPIO1_CTRL >> 16u) & 0b11u);
}
inline void set_GPIO1_CTRL_INOVER(
IO_BANK0_GPIO1_CTRL_INOVER value) volatile
{
uint32_t curr = GPIO1_CTRL;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(value) & 0b11u) << 16u;
GPIO1_CTRL = curr;
}
inline IO_BANK0_GPIO1_CTRL_IRQOVER get_GPIO1_CTRL_IRQOVER() volatile
{
return IO_BANK0_GPIO1_CTRL_IRQOVER((GPIO1_CTRL >> 28u) & 0b11u);
}
inline void set_GPIO1_CTRL_IRQOVER(
IO_BANK0_GPIO1_CTRL_IRQOVER value) volatile
{
uint32_t curr = GPIO1_CTRL;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(value) & 0b11u) << 28u;
GPIO1_CTRL = curr;
}
inline void get_GPIO1_CTRL(IO_BANK0_GPIO1_CTRL_FUNCSEL &FUNCSEL,
IO_BANK0_GPIO1_CTRL_OUTOVER &OUTOVER,
IO_BANK0_GPIO1_CTRL_OEOVER &OEOVER,
IO_BANK0_GPIO1_CTRL_INOVER &INOVER,
IO_BANK0_GPIO1_CTRL_IRQOVER &IRQOVER) volatile
{
uint32_t curr = GPIO1_CTRL;
FUNCSEL = IO_BANK0_GPIO1_CTRL_FUNCSEL((curr >> 0u) & 0b11111u);
OUTOVER = IO_BANK0_GPIO1_CTRL_OUTOVER((curr >> 8u) & 0b11u);
OEOVER = IO_BANK0_GPIO1_CTRL_OEOVER((curr >> 12u) & 0b11u);
INOVER = IO_BANK0_GPIO1_CTRL_INOVER((curr >> 16u) & 0b11u);
IRQOVER = IO_BANK0_GPIO1_CTRL_IRQOVER((curr >> 28u) & 0b11u);
}
inline void set_GPIO1_CTRL(IO_BANK0_GPIO1_CTRL_FUNCSEL FUNCSEL,
IO_BANK0_GPIO1_CTRL_OUTOVER OUTOVER,
IO_BANK0_GPIO1_CTRL_OEOVER OEOVER,
IO_BANK0_GPIO1_CTRL_INOVER INOVER,
IO_BANK0_GPIO1_CTRL_IRQOVER IRQOVER) volatile
{
uint32_t curr = GPIO1_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(FUNCSEL) & 0b11111u) << 0u;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(OUTOVER) & 0b11u) << 8u;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(OEOVER) & 0b11u) << 12u;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(INOVER) & 0b11u) << 16u;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(IRQOVER) & 0b11u) << 28u;
GPIO1_CTRL = curr;
}
inline bool get_GPIO2_STATUS_OUTFROMPERI() volatile
{
return GPIO2_STATUS & (1u << 8u);
}
inline bool get_GPIO2_STATUS_OUTTOPAD() volatile
{
return GPIO2_STATUS & (1u << 9u);
}
inline bool get_GPIO2_STATUS_OEFROMPERI() volatile
{
return GPIO2_STATUS & (1u << 12u);
}
inline bool get_GPIO2_STATUS_OETOPAD() volatile
{
return GPIO2_STATUS & (1u << 13u);
}
inline bool get_GPIO2_STATUS_INFROMPAD() volatile
{
return GPIO2_STATUS & (1u << 17u);
}
inline bool get_GPIO2_STATUS_INTOPERI() volatile
{
return GPIO2_STATUS & (1u << 19u);
}
inline bool get_GPIO2_STATUS_IRQFROMPAD() volatile
{
return GPIO2_STATUS & (1u << 24u);
}
inline bool get_GPIO2_STATUS_IRQTOPROC() volatile
{
return GPIO2_STATUS & (1u << 26u);
}
inline void get_GPIO2_STATUS(bool &OUTFROMPERI, bool &OUTTOPAD,
bool &OEFROMPERI, bool &OETOPAD,
bool &INFROMPAD, bool &INTOPERI,
bool &IRQFROMPAD, bool &IRQTOPROC) volatile
{
uint32_t curr = GPIO2_STATUS;
OUTFROMPERI = curr & (1u << 8u);
OUTTOPAD = curr & (1u << 9u);
OEFROMPERI = curr & (1u << 12u);
OETOPAD = curr & (1u << 13u);
INFROMPAD = curr & (1u << 17u);
INTOPERI = curr & (1u << 19u);
IRQFROMPAD = curr & (1u << 24u);
IRQTOPROC = curr & (1u << 26u);
}
inline IO_BANK0_GPIO2_CTRL_FUNCSEL get_GPIO2_CTRL_FUNCSEL() volatile
{
return IO_BANK0_GPIO2_CTRL_FUNCSEL((GPIO2_CTRL >> 0u) & 0b11111u);
}
inline void set_GPIO2_CTRL_FUNCSEL(
IO_BANK0_GPIO2_CTRL_FUNCSEL value) volatile
{
uint32_t curr = GPIO2_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(value) & 0b11111u) << 0u;
GPIO2_CTRL = curr;
}
inline IO_BANK0_GPIO2_CTRL_OUTOVER get_GPIO2_CTRL_OUTOVER() volatile
{
return IO_BANK0_GPIO2_CTRL_OUTOVER((GPIO2_CTRL >> 8u) & 0b11u);
}
inline void set_GPIO2_CTRL_OUTOVER(
IO_BANK0_GPIO2_CTRL_OUTOVER value) volatile
{
uint32_t curr = GPIO2_CTRL;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(value) & 0b11u) << 8u;
GPIO2_CTRL = curr;
}
inline IO_BANK0_GPIO2_CTRL_OEOVER get_GPIO2_CTRL_OEOVER() volatile
{
return IO_BANK0_GPIO2_CTRL_OEOVER((GPIO2_CTRL >> 12u) & 0b11u);
}
inline void set_GPIO2_CTRL_OEOVER(
IO_BANK0_GPIO2_CTRL_OEOVER value) volatile
{
uint32_t curr = GPIO2_CTRL;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(value) & 0b11u) << 12u;
GPIO2_CTRL = curr;
}
inline IO_BANK0_GPIO2_CTRL_INOVER get_GPIO2_CTRL_INOVER() volatile
{
return IO_BANK0_GPIO2_CTRL_INOVER((GPIO2_CTRL >> 16u) & 0b11u);
}
inline void set_GPIO2_CTRL_INOVER(
IO_BANK0_GPIO2_CTRL_INOVER value) volatile
{
uint32_t curr = GPIO2_CTRL;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(value) & 0b11u) << 16u;
GPIO2_CTRL = curr;
}
inline IO_BANK0_GPIO2_CTRL_IRQOVER get_GPIO2_CTRL_IRQOVER() volatile
{
return IO_BANK0_GPIO2_CTRL_IRQOVER((GPIO2_CTRL >> 28u) & 0b11u);
}
inline void set_GPIO2_CTRL_IRQOVER(
IO_BANK0_GPIO2_CTRL_IRQOVER value) volatile
{
uint32_t curr = GPIO2_CTRL;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(value) & 0b11u) << 28u;
GPIO2_CTRL = curr;
}
inline void get_GPIO2_CTRL(IO_BANK0_GPIO2_CTRL_FUNCSEL &FUNCSEL,
IO_BANK0_GPIO2_CTRL_OUTOVER &OUTOVER,
IO_BANK0_GPIO2_CTRL_OEOVER &OEOVER,
IO_BANK0_GPIO2_CTRL_INOVER &INOVER,
IO_BANK0_GPIO2_CTRL_IRQOVER &IRQOVER) volatile
{
uint32_t curr = GPIO2_CTRL;
FUNCSEL = IO_BANK0_GPIO2_CTRL_FUNCSEL((curr >> 0u) & 0b11111u);
OUTOVER = IO_BANK0_GPIO2_CTRL_OUTOVER((curr >> 8u) & 0b11u);
OEOVER = IO_BANK0_GPIO2_CTRL_OEOVER((curr >> 12u) & 0b11u);
INOVER = IO_BANK0_GPIO2_CTRL_INOVER((curr >> 16u) & 0b11u);
IRQOVER = IO_BANK0_GPIO2_CTRL_IRQOVER((curr >> 28u) & 0b11u);
}
inline void set_GPIO2_CTRL(IO_BANK0_GPIO2_CTRL_FUNCSEL FUNCSEL,
IO_BANK0_GPIO2_CTRL_OUTOVER OUTOVER,
IO_BANK0_GPIO2_CTRL_OEOVER OEOVER,
IO_BANK0_GPIO2_CTRL_INOVER INOVER,
IO_BANK0_GPIO2_CTRL_IRQOVER IRQOVER) volatile
{
uint32_t curr = GPIO2_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(FUNCSEL) & 0b11111u) << 0u;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(OUTOVER) & 0b11u) << 8u;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(OEOVER) & 0b11u) << 12u;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(INOVER) & 0b11u) << 16u;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(IRQOVER) & 0b11u) << 28u;
GPIO2_CTRL = curr;
}
inline bool get_GPIO3_STATUS_OUTFROMPERI() volatile
{
return GPIO3_STATUS & (1u << 8u);
}
inline bool get_GPIO3_STATUS_OUTTOPAD() volatile
{
return GPIO3_STATUS & (1u << 9u);
}
inline bool get_GPIO3_STATUS_OEFROMPERI() volatile
{
return GPIO3_STATUS & (1u << 12u);
}
inline bool get_GPIO3_STATUS_OETOPAD() volatile
{
return GPIO3_STATUS & (1u << 13u);
}
inline bool get_GPIO3_STATUS_INFROMPAD() volatile
{
return GPIO3_STATUS & (1u << 17u);
}
inline bool get_GPIO3_STATUS_INTOPERI() volatile
{
return GPIO3_STATUS & (1u << 19u);
}
inline bool get_GPIO3_STATUS_IRQFROMPAD() volatile
{
return GPIO3_STATUS & (1u << 24u);
}
inline bool get_GPIO3_STATUS_IRQTOPROC() volatile
{
return GPIO3_STATUS & (1u << 26u);
}
inline void get_GPIO3_STATUS(bool &OUTFROMPERI, bool &OUTTOPAD,
bool &OEFROMPERI, bool &OETOPAD,
bool &INFROMPAD, bool &INTOPERI,
bool &IRQFROMPAD, bool &IRQTOPROC) volatile
{
uint32_t curr = GPIO3_STATUS;
OUTFROMPERI = curr & (1u << 8u);
OUTTOPAD = curr & (1u << 9u);
OEFROMPERI = curr & (1u << 12u);
OETOPAD = curr & (1u << 13u);
INFROMPAD = curr & (1u << 17u);
INTOPERI = curr & (1u << 19u);
IRQFROMPAD = curr & (1u << 24u);
IRQTOPROC = curr & (1u << 26u);
}
inline IO_BANK0_GPIO3_CTRL_FUNCSEL get_GPIO3_CTRL_FUNCSEL() volatile
{
return IO_BANK0_GPIO3_CTRL_FUNCSEL((GPIO3_CTRL >> 0u) & 0b11111u);
}
inline void set_GPIO3_CTRL_FUNCSEL(
IO_BANK0_GPIO3_CTRL_FUNCSEL value) volatile
{
uint32_t curr = GPIO3_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(value) & 0b11111u) << 0u;
GPIO3_CTRL = curr;
}
inline IO_BANK0_GPIO3_CTRL_OUTOVER get_GPIO3_CTRL_OUTOVER() volatile
{
return IO_BANK0_GPIO3_CTRL_OUTOVER((GPIO3_CTRL >> 8u) & 0b11u);
}
inline void set_GPIO3_CTRL_OUTOVER(
IO_BANK0_GPIO3_CTRL_OUTOVER value) volatile
{
uint32_t curr = GPIO3_CTRL;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(value) & 0b11u) << 8u;
GPIO3_CTRL = curr;
}
inline IO_BANK0_GPIO3_CTRL_OEOVER get_GPIO3_CTRL_OEOVER() volatile
{
return IO_BANK0_GPIO3_CTRL_OEOVER((GPIO3_CTRL >> 12u) & 0b11u);
}
inline void set_GPIO3_CTRL_OEOVER(
IO_BANK0_GPIO3_CTRL_OEOVER value) volatile
{
uint32_t curr = GPIO3_CTRL;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(value) & 0b11u) << 12u;
GPIO3_CTRL = curr;
}
inline IO_BANK0_GPIO3_CTRL_INOVER get_GPIO3_CTRL_INOVER() volatile
{
return IO_BANK0_GPIO3_CTRL_INOVER((GPIO3_CTRL >> 16u) & 0b11u);
}
inline void set_GPIO3_CTRL_INOVER(
IO_BANK0_GPIO3_CTRL_INOVER value) volatile
{
uint32_t curr = GPIO3_CTRL;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(value) & 0b11u) << 16u;
GPIO3_CTRL = curr;
}
inline IO_BANK0_GPIO3_CTRL_IRQOVER get_GPIO3_CTRL_IRQOVER() volatile
{
return IO_BANK0_GPIO3_CTRL_IRQOVER((GPIO3_CTRL >> 28u) & 0b11u);
}
inline void set_GPIO3_CTRL_IRQOVER(
IO_BANK0_GPIO3_CTRL_IRQOVER value) volatile
{
uint32_t curr = GPIO3_CTRL;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(value) & 0b11u) << 28u;
GPIO3_CTRL = curr;
}
inline void get_GPIO3_CTRL(IO_BANK0_GPIO3_CTRL_FUNCSEL &FUNCSEL,
IO_BANK0_GPIO3_CTRL_OUTOVER &OUTOVER,
IO_BANK0_GPIO3_CTRL_OEOVER &OEOVER,
IO_BANK0_GPIO3_CTRL_INOVER &INOVER,
IO_BANK0_GPIO3_CTRL_IRQOVER &IRQOVER) volatile
{
uint32_t curr = GPIO3_CTRL;
FUNCSEL = IO_BANK0_GPIO3_CTRL_FUNCSEL((curr >> 0u) & 0b11111u);
OUTOVER = IO_BANK0_GPIO3_CTRL_OUTOVER((curr >> 8u) & 0b11u);
OEOVER = IO_BANK0_GPIO3_CTRL_OEOVER((curr >> 12u) & 0b11u);
INOVER = IO_BANK0_GPIO3_CTRL_INOVER((curr >> 16u) & 0b11u);
IRQOVER = IO_BANK0_GPIO3_CTRL_IRQOVER((curr >> 28u) & 0b11u);
}
inline void set_GPIO3_CTRL(IO_BANK0_GPIO3_CTRL_FUNCSEL FUNCSEL,
IO_BANK0_GPIO3_CTRL_OUTOVER OUTOVER,
IO_BANK0_GPIO3_CTRL_OEOVER OEOVER,
IO_BANK0_GPIO3_CTRL_INOVER INOVER,
IO_BANK0_GPIO3_CTRL_IRQOVER IRQOVER) volatile
{
uint32_t curr = GPIO3_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(FUNCSEL) & 0b11111u) << 0u;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(OUTOVER) & 0b11u) << 8u;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(OEOVER) & 0b11u) << 12u;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(INOVER) & 0b11u) << 16u;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(IRQOVER) & 0b11u) << 28u;
GPIO3_CTRL = curr;
}
inline bool get_GPIO4_STATUS_OUTFROMPERI() volatile
{
return GPIO4_STATUS & (1u << 8u);
}
inline bool get_GPIO4_STATUS_OUTTOPAD() volatile
{
return GPIO4_STATUS & (1u << 9u);
}
inline bool get_GPIO4_STATUS_OEFROMPERI() volatile
{
return GPIO4_STATUS & (1u << 12u);
}
inline bool get_GPIO4_STATUS_OETOPAD() volatile
{
return GPIO4_STATUS & (1u << 13u);
}
inline bool get_GPIO4_STATUS_INFROMPAD() volatile
{
return GPIO4_STATUS & (1u << 17u);
}
inline bool get_GPIO4_STATUS_INTOPERI() volatile
{
return GPIO4_STATUS & (1u << 19u);
}
inline bool get_GPIO4_STATUS_IRQFROMPAD() volatile
{
return GPIO4_STATUS & (1u << 24u);
}
inline bool get_GPIO4_STATUS_IRQTOPROC() volatile
{
return GPIO4_STATUS & (1u << 26u);
}
inline void get_GPIO4_STATUS(bool &OUTFROMPERI, bool &OUTTOPAD,
bool &OEFROMPERI, bool &OETOPAD,
bool &INFROMPAD, bool &INTOPERI,
bool &IRQFROMPAD, bool &IRQTOPROC) volatile
{
uint32_t curr = GPIO4_STATUS;
OUTFROMPERI = curr & (1u << 8u);
OUTTOPAD = curr & (1u << 9u);
OEFROMPERI = curr & (1u << 12u);
OETOPAD = curr & (1u << 13u);
INFROMPAD = curr & (1u << 17u);
INTOPERI = curr & (1u << 19u);
IRQFROMPAD = curr & (1u << 24u);
IRQTOPROC = curr & (1u << 26u);
}
inline IO_BANK0_GPIO4_CTRL_FUNCSEL get_GPIO4_CTRL_FUNCSEL() volatile
{
return IO_BANK0_GPIO4_CTRL_FUNCSEL((GPIO4_CTRL >> 0u) & 0b11111u);
}
inline void set_GPIO4_CTRL_FUNCSEL(
IO_BANK0_GPIO4_CTRL_FUNCSEL value) volatile
{
uint32_t curr = GPIO4_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(value) & 0b11111u) << 0u;
GPIO4_CTRL = curr;
}
inline IO_BANK0_GPIO4_CTRL_OUTOVER get_GPIO4_CTRL_OUTOVER() volatile
{
return IO_BANK0_GPIO4_CTRL_OUTOVER((GPIO4_CTRL >> 8u) & 0b11u);
}
inline void set_GPIO4_CTRL_OUTOVER(
IO_BANK0_GPIO4_CTRL_OUTOVER value) volatile
{
uint32_t curr = GPIO4_CTRL;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(value) & 0b11u) << 8u;
GPIO4_CTRL = curr;
}
inline IO_BANK0_GPIO4_CTRL_OEOVER get_GPIO4_CTRL_OEOVER() volatile
{
return IO_BANK0_GPIO4_CTRL_OEOVER((GPIO4_CTRL >> 12u) & 0b11u);
}
inline void set_GPIO4_CTRL_OEOVER(
IO_BANK0_GPIO4_CTRL_OEOVER value) volatile
{
uint32_t curr = GPIO4_CTRL;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(value) & 0b11u) << 12u;
GPIO4_CTRL = curr;
}
inline IO_BANK0_GPIO4_CTRL_INOVER get_GPIO4_CTRL_INOVER() volatile
{
return IO_BANK0_GPIO4_CTRL_INOVER((GPIO4_CTRL >> 16u) & 0b11u);
}
inline void set_GPIO4_CTRL_INOVER(
IO_BANK0_GPIO4_CTRL_INOVER value) volatile
{
uint32_t curr = GPIO4_CTRL;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(value) & 0b11u) << 16u;
GPIO4_CTRL = curr;
}
inline IO_BANK0_GPIO4_CTRL_IRQOVER get_GPIO4_CTRL_IRQOVER() volatile
{
return IO_BANK0_GPIO4_CTRL_IRQOVER((GPIO4_CTRL >> 28u) & 0b11u);
}
inline void set_GPIO4_CTRL_IRQOVER(
IO_BANK0_GPIO4_CTRL_IRQOVER value) volatile
{
uint32_t curr = GPIO4_CTRL;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(value) & 0b11u) << 28u;
GPIO4_CTRL = curr;
}
inline void get_GPIO4_CTRL(IO_BANK0_GPIO4_CTRL_FUNCSEL &FUNCSEL,
IO_BANK0_GPIO4_CTRL_OUTOVER &OUTOVER,
IO_BANK0_GPIO4_CTRL_OEOVER &OEOVER,
IO_BANK0_GPIO4_CTRL_INOVER &INOVER,
IO_BANK0_GPIO4_CTRL_IRQOVER &IRQOVER) volatile
{
uint32_t curr = GPIO4_CTRL;
FUNCSEL = IO_BANK0_GPIO4_CTRL_FUNCSEL((curr >> 0u) & 0b11111u);
OUTOVER = IO_BANK0_GPIO4_CTRL_OUTOVER((curr >> 8u) & 0b11u);
OEOVER = IO_BANK0_GPIO4_CTRL_OEOVER((curr >> 12u) & 0b11u);
INOVER = IO_BANK0_GPIO4_CTRL_INOVER((curr >> 16u) & 0b11u);
IRQOVER = IO_BANK0_GPIO4_CTRL_IRQOVER((curr >> 28u) & 0b11u);
}
inline void set_GPIO4_CTRL(IO_BANK0_GPIO4_CTRL_FUNCSEL FUNCSEL,
IO_BANK0_GPIO4_CTRL_OUTOVER OUTOVER,
IO_BANK0_GPIO4_CTRL_OEOVER OEOVER,
IO_BANK0_GPIO4_CTRL_INOVER INOVER,
IO_BANK0_GPIO4_CTRL_IRQOVER IRQOVER) volatile
{
uint32_t curr = GPIO4_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(FUNCSEL) & 0b11111u) << 0u;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(OUTOVER) & 0b11u) << 8u;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(OEOVER) & 0b11u) << 12u;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(INOVER) & 0b11u) << 16u;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(IRQOVER) & 0b11u) << 28u;
GPIO4_CTRL = curr;
}
inline bool get_GPIO5_STATUS_OUTFROMPERI() volatile
{
return GPIO5_STATUS & (1u << 8u);
}
inline bool get_GPIO5_STATUS_OUTTOPAD() volatile
{
return GPIO5_STATUS & (1u << 9u);
}
inline bool get_GPIO5_STATUS_OEFROMPERI() volatile
{
return GPIO5_STATUS & (1u << 12u);
}
inline bool get_GPIO5_STATUS_OETOPAD() volatile
{
return GPIO5_STATUS & (1u << 13u);
}
inline bool get_GPIO5_STATUS_INFROMPAD() volatile
{
return GPIO5_STATUS & (1u << 17u);
}
inline bool get_GPIO5_STATUS_INTOPERI() volatile
{
return GPIO5_STATUS & (1u << 19u);
}
inline bool get_GPIO5_STATUS_IRQFROMPAD() volatile
{
return GPIO5_STATUS & (1u << 24u);
}
inline bool get_GPIO5_STATUS_IRQTOPROC() volatile
{
return GPIO5_STATUS & (1u << 26u);
}
inline void get_GPIO5_STATUS(bool &OUTFROMPERI, bool &OUTTOPAD,
bool &OEFROMPERI, bool &OETOPAD,
bool &INFROMPAD, bool &INTOPERI,
bool &IRQFROMPAD, bool &IRQTOPROC) volatile
{
uint32_t curr = GPIO5_STATUS;
OUTFROMPERI = curr & (1u << 8u);
OUTTOPAD = curr & (1u << 9u);
OEFROMPERI = curr & (1u << 12u);
OETOPAD = curr & (1u << 13u);
INFROMPAD = curr & (1u << 17u);
INTOPERI = curr & (1u << 19u);
IRQFROMPAD = curr & (1u << 24u);
IRQTOPROC = curr & (1u << 26u);
}
inline IO_BANK0_GPIO5_CTRL_FUNCSEL get_GPIO5_CTRL_FUNCSEL() volatile
{
return IO_BANK0_GPIO5_CTRL_FUNCSEL((GPIO5_CTRL >> 0u) & 0b11111u);
}
inline void set_GPIO5_CTRL_FUNCSEL(
IO_BANK0_GPIO5_CTRL_FUNCSEL value) volatile
{
uint32_t curr = GPIO5_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(value) & 0b11111u) << 0u;
GPIO5_CTRL = curr;
}
inline IO_BANK0_GPIO5_CTRL_OUTOVER get_GPIO5_CTRL_OUTOVER() volatile
{
return IO_BANK0_GPIO5_CTRL_OUTOVER((GPIO5_CTRL >> 8u) & 0b11u);
}
inline void set_GPIO5_CTRL_OUTOVER(
IO_BANK0_GPIO5_CTRL_OUTOVER value) volatile
{
uint32_t curr = GPIO5_CTRL;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(value) & 0b11u) << 8u;
GPIO5_CTRL = curr;
}
inline IO_BANK0_GPIO5_CTRL_OEOVER get_GPIO5_CTRL_OEOVER() volatile
{
return IO_BANK0_GPIO5_CTRL_OEOVER((GPIO5_CTRL >> 12u) & 0b11u);
}
inline void set_GPIO5_CTRL_OEOVER(
IO_BANK0_GPIO5_CTRL_OEOVER value) volatile
{
uint32_t curr = GPIO5_CTRL;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(value) & 0b11u) << 12u;
GPIO5_CTRL = curr;
}
inline IO_BANK0_GPIO5_CTRL_INOVER get_GPIO5_CTRL_INOVER() volatile
{
return IO_BANK0_GPIO5_CTRL_INOVER((GPIO5_CTRL >> 16u) & 0b11u);
}
inline void set_GPIO5_CTRL_INOVER(
IO_BANK0_GPIO5_CTRL_INOVER value) volatile
{
uint32_t curr = GPIO5_CTRL;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(value) & 0b11u) << 16u;
GPIO5_CTRL = curr;
}
inline IO_BANK0_GPIO5_CTRL_IRQOVER get_GPIO5_CTRL_IRQOVER() volatile
{
return IO_BANK0_GPIO5_CTRL_IRQOVER((GPIO5_CTRL >> 28u) & 0b11u);
}
inline void set_GPIO5_CTRL_IRQOVER(
IO_BANK0_GPIO5_CTRL_IRQOVER value) volatile
{
uint32_t curr = GPIO5_CTRL;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(value) & 0b11u) << 28u;
GPIO5_CTRL = curr;
}
inline void get_GPIO5_CTRL(IO_BANK0_GPIO5_CTRL_FUNCSEL &FUNCSEL,
IO_BANK0_GPIO5_CTRL_OUTOVER &OUTOVER,
IO_BANK0_GPIO5_CTRL_OEOVER &OEOVER,
IO_BANK0_GPIO5_CTRL_INOVER &INOVER,
IO_BANK0_GPIO5_CTRL_IRQOVER &IRQOVER) volatile
{
uint32_t curr = GPIO5_CTRL;
FUNCSEL = IO_BANK0_GPIO5_CTRL_FUNCSEL((curr >> 0u) & 0b11111u);
OUTOVER = IO_BANK0_GPIO5_CTRL_OUTOVER((curr >> 8u) & 0b11u);
OEOVER = IO_BANK0_GPIO5_CTRL_OEOVER((curr >> 12u) & 0b11u);
INOVER = IO_BANK0_GPIO5_CTRL_INOVER((curr >> 16u) & 0b11u);
IRQOVER = IO_BANK0_GPIO5_CTRL_IRQOVER((curr >> 28u) & 0b11u);
}
inline void set_GPIO5_CTRL(IO_BANK0_GPIO5_CTRL_FUNCSEL FUNCSEL,
IO_BANK0_GPIO5_CTRL_OUTOVER OUTOVER,
IO_BANK0_GPIO5_CTRL_OEOVER OEOVER,
IO_BANK0_GPIO5_CTRL_INOVER INOVER,
IO_BANK0_GPIO5_CTRL_IRQOVER IRQOVER) volatile
{
uint32_t curr = GPIO5_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(FUNCSEL) & 0b11111u) << 0u;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(OUTOVER) & 0b11u) << 8u;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(OEOVER) & 0b11u) << 12u;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(INOVER) & 0b11u) << 16u;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(IRQOVER) & 0b11u) << 28u;
GPIO5_CTRL = curr;
}
inline bool get_GPIO6_STATUS_OUTFROMPERI() volatile
{
return GPIO6_STATUS & (1u << 8u);
}
inline bool get_GPIO6_STATUS_OUTTOPAD() volatile
{
return GPIO6_STATUS & (1u << 9u);
}
inline bool get_GPIO6_STATUS_OEFROMPERI() volatile
{
return GPIO6_STATUS & (1u << 12u);
}
inline bool get_GPIO6_STATUS_OETOPAD() volatile
{
return GPIO6_STATUS & (1u << 13u);
}
inline bool get_GPIO6_STATUS_INFROMPAD() volatile
{
return GPIO6_STATUS & (1u << 17u);
}
inline bool get_GPIO6_STATUS_INTOPERI() volatile
{
return GPIO6_STATUS & (1u << 19u);
}
inline bool get_GPIO6_STATUS_IRQFROMPAD() volatile
{
return GPIO6_STATUS & (1u << 24u);
}
inline bool get_GPIO6_STATUS_IRQTOPROC() volatile
{
return GPIO6_STATUS & (1u << 26u);
}
inline void get_GPIO6_STATUS(bool &OUTFROMPERI, bool &OUTTOPAD,
bool &OEFROMPERI, bool &OETOPAD,
bool &INFROMPAD, bool &INTOPERI,
bool &IRQFROMPAD, bool &IRQTOPROC) volatile
{
uint32_t curr = GPIO6_STATUS;
OUTFROMPERI = curr & (1u << 8u);
OUTTOPAD = curr & (1u << 9u);
OEFROMPERI = curr & (1u << 12u);
OETOPAD = curr & (1u << 13u);
INFROMPAD = curr & (1u << 17u);
INTOPERI = curr & (1u << 19u);
IRQFROMPAD = curr & (1u << 24u);
IRQTOPROC = curr & (1u << 26u);
}
inline IO_BANK0_GPIO6_CTRL_FUNCSEL get_GPIO6_CTRL_FUNCSEL() volatile
{
return IO_BANK0_GPIO6_CTRL_FUNCSEL((GPIO6_CTRL >> 0u) & 0b11111u);
}
inline void set_GPIO6_CTRL_FUNCSEL(
IO_BANK0_GPIO6_CTRL_FUNCSEL value) volatile
{
uint32_t curr = GPIO6_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(value) & 0b11111u) << 0u;
GPIO6_CTRL = curr;
}
inline IO_BANK0_GPIO6_CTRL_OUTOVER get_GPIO6_CTRL_OUTOVER() volatile
{
return IO_BANK0_GPIO6_CTRL_OUTOVER((GPIO6_CTRL >> 8u) & 0b11u);
}
inline void set_GPIO6_CTRL_OUTOVER(
IO_BANK0_GPIO6_CTRL_OUTOVER value) volatile
{
uint32_t curr = GPIO6_CTRL;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(value) & 0b11u) << 8u;
GPIO6_CTRL = curr;
}
inline IO_BANK0_GPIO6_CTRL_OEOVER get_GPIO6_CTRL_OEOVER() volatile
{
return IO_BANK0_GPIO6_CTRL_OEOVER((GPIO6_CTRL >> 12u) & 0b11u);
}
inline void set_GPIO6_CTRL_OEOVER(
IO_BANK0_GPIO6_CTRL_OEOVER value) volatile
{
uint32_t curr = GPIO6_CTRL;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(value) & 0b11u) << 12u;
GPIO6_CTRL = curr;
}
inline IO_BANK0_GPIO6_CTRL_INOVER get_GPIO6_CTRL_INOVER() volatile
{
return IO_BANK0_GPIO6_CTRL_INOVER((GPIO6_CTRL >> 16u) & 0b11u);
}
inline void set_GPIO6_CTRL_INOVER(
IO_BANK0_GPIO6_CTRL_INOVER value) volatile
{
uint32_t curr = GPIO6_CTRL;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(value) & 0b11u) << 16u;
GPIO6_CTRL = curr;
}
inline IO_BANK0_GPIO6_CTRL_IRQOVER get_GPIO6_CTRL_IRQOVER() volatile
{
return IO_BANK0_GPIO6_CTRL_IRQOVER((GPIO6_CTRL >> 28u) & 0b11u);
}
inline void set_GPIO6_CTRL_IRQOVER(
IO_BANK0_GPIO6_CTRL_IRQOVER value) volatile
{
uint32_t curr = GPIO6_CTRL;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(value) & 0b11u) << 28u;
GPIO6_CTRL = curr;
}
inline void get_GPIO6_CTRL(IO_BANK0_GPIO6_CTRL_FUNCSEL &FUNCSEL,
IO_BANK0_GPIO6_CTRL_OUTOVER &OUTOVER,
IO_BANK0_GPIO6_CTRL_OEOVER &OEOVER,
IO_BANK0_GPIO6_CTRL_INOVER &INOVER,
IO_BANK0_GPIO6_CTRL_IRQOVER &IRQOVER) volatile
{
uint32_t curr = GPIO6_CTRL;
FUNCSEL = IO_BANK0_GPIO6_CTRL_FUNCSEL((curr >> 0u) & 0b11111u);
OUTOVER = IO_BANK0_GPIO6_CTRL_OUTOVER((curr >> 8u) & 0b11u);
OEOVER = IO_BANK0_GPIO6_CTRL_OEOVER((curr >> 12u) & 0b11u);
INOVER = IO_BANK0_GPIO6_CTRL_INOVER((curr >> 16u) & 0b11u);
IRQOVER = IO_BANK0_GPIO6_CTRL_IRQOVER((curr >> 28u) & 0b11u);
}
inline void set_GPIO6_CTRL(IO_BANK0_GPIO6_CTRL_FUNCSEL FUNCSEL,
IO_BANK0_GPIO6_CTRL_OUTOVER OUTOVER,
IO_BANK0_GPIO6_CTRL_OEOVER OEOVER,
IO_BANK0_GPIO6_CTRL_INOVER INOVER,
IO_BANK0_GPIO6_CTRL_IRQOVER IRQOVER) volatile
{
uint32_t curr = GPIO6_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(FUNCSEL) & 0b11111u) << 0u;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(OUTOVER) & 0b11u) << 8u;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(OEOVER) & 0b11u) << 12u;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(INOVER) & 0b11u) << 16u;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(IRQOVER) & 0b11u) << 28u;
GPIO6_CTRL = curr;
}
inline bool get_GPIO7_STATUS_OUTFROMPERI() volatile
{
return GPIO7_STATUS & (1u << 8u);
}
inline bool get_GPIO7_STATUS_OUTTOPAD() volatile
{
return GPIO7_STATUS & (1u << 9u);
}
inline bool get_GPIO7_STATUS_OEFROMPERI() volatile
{
return GPIO7_STATUS & (1u << 12u);
}
inline bool get_GPIO7_STATUS_OETOPAD() volatile
{
return GPIO7_STATUS & (1u << 13u);
}
inline bool get_GPIO7_STATUS_INFROMPAD() volatile
{
return GPIO7_STATUS & (1u << 17u);
}
inline bool get_GPIO7_STATUS_INTOPERI() volatile
{
return GPIO7_STATUS & (1u << 19u);
}
inline bool get_GPIO7_STATUS_IRQFROMPAD() volatile
{
return GPIO7_STATUS & (1u << 24u);
}
inline bool get_GPIO7_STATUS_IRQTOPROC() volatile
{
return GPIO7_STATUS & (1u << 26u);
}
inline void get_GPIO7_STATUS(bool &OUTFROMPERI, bool &OUTTOPAD,
bool &OEFROMPERI, bool &OETOPAD,
bool &INFROMPAD, bool &INTOPERI,
bool &IRQFROMPAD, bool &IRQTOPROC) volatile
{
uint32_t curr = GPIO7_STATUS;
OUTFROMPERI = curr & (1u << 8u);
OUTTOPAD = curr & (1u << 9u);
OEFROMPERI = curr & (1u << 12u);
OETOPAD = curr & (1u << 13u);
INFROMPAD = curr & (1u << 17u);
INTOPERI = curr & (1u << 19u);
IRQFROMPAD = curr & (1u << 24u);
IRQTOPROC = curr & (1u << 26u);
}
inline IO_BANK0_GPIO7_CTRL_FUNCSEL get_GPIO7_CTRL_FUNCSEL() volatile
{
return IO_BANK0_GPIO7_CTRL_FUNCSEL((GPIO7_CTRL >> 0u) & 0b11111u);
}
inline void set_GPIO7_CTRL_FUNCSEL(
IO_BANK0_GPIO7_CTRL_FUNCSEL value) volatile
{
uint32_t curr = GPIO7_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(value) & 0b11111u) << 0u;
GPIO7_CTRL = curr;
}
inline IO_BANK0_GPIO7_CTRL_OUTOVER get_GPIO7_CTRL_OUTOVER() volatile
{
return IO_BANK0_GPIO7_CTRL_OUTOVER((GPIO7_CTRL >> 8u) & 0b11u);
}
inline void set_GPIO7_CTRL_OUTOVER(
IO_BANK0_GPIO7_CTRL_OUTOVER value) volatile
{
uint32_t curr = GPIO7_CTRL;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(value) & 0b11u) << 8u;
GPIO7_CTRL = curr;
}
inline IO_BANK0_GPIO7_CTRL_OEOVER get_GPIO7_CTRL_OEOVER() volatile
{
return IO_BANK0_GPIO7_CTRL_OEOVER((GPIO7_CTRL >> 12u) & 0b11u);
}
inline void set_GPIO7_CTRL_OEOVER(
IO_BANK0_GPIO7_CTRL_OEOVER value) volatile
{
uint32_t curr = GPIO7_CTRL;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(value) & 0b11u) << 12u;
GPIO7_CTRL = curr;
}
inline IO_BANK0_GPIO7_CTRL_INOVER get_GPIO7_CTRL_INOVER() volatile
{
return IO_BANK0_GPIO7_CTRL_INOVER((GPIO7_CTRL >> 16u) & 0b11u);
}
inline void set_GPIO7_CTRL_INOVER(
IO_BANK0_GPIO7_CTRL_INOVER value) volatile
{
uint32_t curr = GPIO7_CTRL;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(value) & 0b11u) << 16u;
GPIO7_CTRL = curr;
}
inline IO_BANK0_GPIO7_CTRL_IRQOVER get_GPIO7_CTRL_IRQOVER() volatile
{
return IO_BANK0_GPIO7_CTRL_IRQOVER((GPIO7_CTRL >> 28u) & 0b11u);
}
inline void set_GPIO7_CTRL_IRQOVER(
IO_BANK0_GPIO7_CTRL_IRQOVER value) volatile
{
uint32_t curr = GPIO7_CTRL;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(value) & 0b11u) << 28u;
GPIO7_CTRL = curr;
}
inline void get_GPIO7_CTRL(IO_BANK0_GPIO7_CTRL_FUNCSEL &FUNCSEL,
IO_BANK0_GPIO7_CTRL_OUTOVER &OUTOVER,
IO_BANK0_GPIO7_CTRL_OEOVER &OEOVER,
IO_BANK0_GPIO7_CTRL_INOVER &INOVER,
IO_BANK0_GPIO7_CTRL_IRQOVER &IRQOVER) volatile
{
uint32_t curr = GPIO7_CTRL;
FUNCSEL = IO_BANK0_GPIO7_CTRL_FUNCSEL((curr >> 0u) & 0b11111u);
OUTOVER = IO_BANK0_GPIO7_CTRL_OUTOVER((curr >> 8u) & 0b11u);
OEOVER = IO_BANK0_GPIO7_CTRL_OEOVER((curr >> 12u) & 0b11u);
INOVER = IO_BANK0_GPIO7_CTRL_INOVER((curr >> 16u) & 0b11u);
IRQOVER = IO_BANK0_GPIO7_CTRL_IRQOVER((curr >> 28u) & 0b11u);
}
inline void set_GPIO7_CTRL(IO_BANK0_GPIO7_CTRL_FUNCSEL FUNCSEL,
IO_BANK0_GPIO7_CTRL_OUTOVER OUTOVER,
IO_BANK0_GPIO7_CTRL_OEOVER OEOVER,
IO_BANK0_GPIO7_CTRL_INOVER INOVER,
IO_BANK0_GPIO7_CTRL_IRQOVER IRQOVER) volatile
{
uint32_t curr = GPIO7_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(FUNCSEL) & 0b11111u) << 0u;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(OUTOVER) & 0b11u) << 8u;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(OEOVER) & 0b11u) << 12u;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(INOVER) & 0b11u) << 16u;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(IRQOVER) & 0b11u) << 28u;
GPIO7_CTRL = curr;
}
inline bool get_GPIO8_STATUS_OUTFROMPERI() volatile
{
return GPIO8_STATUS & (1u << 8u);
}
inline bool get_GPIO8_STATUS_OUTTOPAD() volatile
{
return GPIO8_STATUS & (1u << 9u);
}
inline bool get_GPIO8_STATUS_OEFROMPERI() volatile
{
return GPIO8_STATUS & (1u << 12u);
}
inline bool get_GPIO8_STATUS_OETOPAD() volatile
{
return GPIO8_STATUS & (1u << 13u);
}
inline bool get_GPIO8_STATUS_INFROMPAD() volatile
{
return GPIO8_STATUS & (1u << 17u);
}
inline bool get_GPIO8_STATUS_INTOPERI() volatile
{
return GPIO8_STATUS & (1u << 19u);
}
inline bool get_GPIO8_STATUS_IRQFROMPAD() volatile
{
return GPIO8_STATUS & (1u << 24u);
}
inline bool get_GPIO8_STATUS_IRQTOPROC() volatile
{
return GPIO8_STATUS & (1u << 26u);
}
inline void get_GPIO8_STATUS(bool &OUTFROMPERI, bool &OUTTOPAD,
bool &OEFROMPERI, bool &OETOPAD,
bool &INFROMPAD, bool &INTOPERI,
bool &IRQFROMPAD, bool &IRQTOPROC) volatile
{
uint32_t curr = GPIO8_STATUS;
OUTFROMPERI = curr & (1u << 8u);
OUTTOPAD = curr & (1u << 9u);
OEFROMPERI = curr & (1u << 12u);
OETOPAD = curr & (1u << 13u);
INFROMPAD = curr & (1u << 17u);
INTOPERI = curr & (1u << 19u);
IRQFROMPAD = curr & (1u << 24u);
IRQTOPROC = curr & (1u << 26u);
}
inline IO_BANK0_GPIO8_CTRL_FUNCSEL get_GPIO8_CTRL_FUNCSEL() volatile
{
return IO_BANK0_GPIO8_CTRL_FUNCSEL((GPIO8_CTRL >> 0u) & 0b11111u);
}
inline void set_GPIO8_CTRL_FUNCSEL(
IO_BANK0_GPIO8_CTRL_FUNCSEL value) volatile
{
uint32_t curr = GPIO8_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(value) & 0b11111u) << 0u;
GPIO8_CTRL = curr;
}
inline IO_BANK0_GPIO8_CTRL_OUTOVER get_GPIO8_CTRL_OUTOVER() volatile
{
return IO_BANK0_GPIO8_CTRL_OUTOVER((GPIO8_CTRL >> 8u) & 0b11u);
}
inline void set_GPIO8_CTRL_OUTOVER(
IO_BANK0_GPIO8_CTRL_OUTOVER value) volatile
{
uint32_t curr = GPIO8_CTRL;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(value) & 0b11u) << 8u;
GPIO8_CTRL = curr;
}
inline IO_BANK0_GPIO8_CTRL_OEOVER get_GPIO8_CTRL_OEOVER() volatile
{
return IO_BANK0_GPIO8_CTRL_OEOVER((GPIO8_CTRL >> 12u) & 0b11u);
}
inline void set_GPIO8_CTRL_OEOVER(
IO_BANK0_GPIO8_CTRL_OEOVER value) volatile
{
uint32_t curr = GPIO8_CTRL;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(value) & 0b11u) << 12u;
GPIO8_CTRL = curr;
}
inline IO_BANK0_GPIO8_CTRL_INOVER get_GPIO8_CTRL_INOVER() volatile
{
return IO_BANK0_GPIO8_CTRL_INOVER((GPIO8_CTRL >> 16u) & 0b11u);
}
inline void set_GPIO8_CTRL_INOVER(
IO_BANK0_GPIO8_CTRL_INOVER value) volatile
{
uint32_t curr = GPIO8_CTRL;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(value) & 0b11u) << 16u;
GPIO8_CTRL = curr;
}
inline IO_BANK0_GPIO8_CTRL_IRQOVER get_GPIO8_CTRL_IRQOVER() volatile
{
return IO_BANK0_GPIO8_CTRL_IRQOVER((GPIO8_CTRL >> 28u) & 0b11u);
}
inline void set_GPIO8_CTRL_IRQOVER(
IO_BANK0_GPIO8_CTRL_IRQOVER value) volatile
{
uint32_t curr = GPIO8_CTRL;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(value) & 0b11u) << 28u;
GPIO8_CTRL = curr;
}
inline void get_GPIO8_CTRL(IO_BANK0_GPIO8_CTRL_FUNCSEL &FUNCSEL,
IO_BANK0_GPIO8_CTRL_OUTOVER &OUTOVER,
IO_BANK0_GPIO8_CTRL_OEOVER &OEOVER,
IO_BANK0_GPIO8_CTRL_INOVER &INOVER,
IO_BANK0_GPIO8_CTRL_IRQOVER &IRQOVER) volatile
{
uint32_t curr = GPIO8_CTRL;
FUNCSEL = IO_BANK0_GPIO8_CTRL_FUNCSEL((curr >> 0u) & 0b11111u);
OUTOVER = IO_BANK0_GPIO8_CTRL_OUTOVER((curr >> 8u) & 0b11u);
OEOVER = IO_BANK0_GPIO8_CTRL_OEOVER((curr >> 12u) & 0b11u);
INOVER = IO_BANK0_GPIO8_CTRL_INOVER((curr >> 16u) & 0b11u);
IRQOVER = IO_BANK0_GPIO8_CTRL_IRQOVER((curr >> 28u) & 0b11u);
}
inline void set_GPIO8_CTRL(IO_BANK0_GPIO8_CTRL_FUNCSEL FUNCSEL,
IO_BANK0_GPIO8_CTRL_OUTOVER OUTOVER,
IO_BANK0_GPIO8_CTRL_OEOVER OEOVER,
IO_BANK0_GPIO8_CTRL_INOVER INOVER,
IO_BANK0_GPIO8_CTRL_IRQOVER IRQOVER) volatile
{
uint32_t curr = GPIO8_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(FUNCSEL) & 0b11111u) << 0u;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(OUTOVER) & 0b11u) << 8u;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(OEOVER) & 0b11u) << 12u;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(INOVER) & 0b11u) << 16u;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(IRQOVER) & 0b11u) << 28u;
GPIO8_CTRL = curr;
}
inline bool get_GPIO9_STATUS_OUTFROMPERI() volatile
{
return GPIO9_STATUS & (1u << 8u);
}
inline bool get_GPIO9_STATUS_OUTTOPAD() volatile
{
return GPIO9_STATUS & (1u << 9u);
}
inline bool get_GPIO9_STATUS_OEFROMPERI() volatile
{
return GPIO9_STATUS & (1u << 12u);
}
inline bool get_GPIO9_STATUS_OETOPAD() volatile
{
return GPIO9_STATUS & (1u << 13u);
}
inline bool get_GPIO9_STATUS_INFROMPAD() volatile
{
return GPIO9_STATUS & (1u << 17u);
}
inline bool get_GPIO9_STATUS_INTOPERI() volatile
{
return GPIO9_STATUS & (1u << 19u);
}
inline bool get_GPIO9_STATUS_IRQFROMPAD() volatile
{
return GPIO9_STATUS & (1u << 24u);
}
inline bool get_GPIO9_STATUS_IRQTOPROC() volatile
{
return GPIO9_STATUS & (1u << 26u);
}
inline void get_GPIO9_STATUS(bool &OUTFROMPERI, bool &OUTTOPAD,
bool &OEFROMPERI, bool &OETOPAD,
bool &INFROMPAD, bool &INTOPERI,
bool &IRQFROMPAD, bool &IRQTOPROC) volatile
{
uint32_t curr = GPIO9_STATUS;
OUTFROMPERI = curr & (1u << 8u);
OUTTOPAD = curr & (1u << 9u);
OEFROMPERI = curr & (1u << 12u);
OETOPAD = curr & (1u << 13u);
INFROMPAD = curr & (1u << 17u);
INTOPERI = curr & (1u << 19u);
IRQFROMPAD = curr & (1u << 24u);
IRQTOPROC = curr & (1u << 26u);
}
inline IO_BANK0_GPIO9_CTRL_FUNCSEL get_GPIO9_CTRL_FUNCSEL() volatile
{
return IO_BANK0_GPIO9_CTRL_FUNCSEL((GPIO9_CTRL >> 0u) & 0b11111u);
}
inline void set_GPIO9_CTRL_FUNCSEL(
IO_BANK0_GPIO9_CTRL_FUNCSEL value) volatile
{
uint32_t curr = GPIO9_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(value) & 0b11111u) << 0u;
GPIO9_CTRL = curr;
}
inline IO_BANK0_GPIO9_CTRL_OUTOVER get_GPIO9_CTRL_OUTOVER() volatile
{
return IO_BANK0_GPIO9_CTRL_OUTOVER((GPIO9_CTRL >> 8u) & 0b11u);
}
inline void set_GPIO9_CTRL_OUTOVER(
IO_BANK0_GPIO9_CTRL_OUTOVER value) volatile
{
uint32_t curr = GPIO9_CTRL;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(value) & 0b11u) << 8u;
GPIO9_CTRL = curr;
}
inline IO_BANK0_GPIO9_CTRL_OEOVER get_GPIO9_CTRL_OEOVER() volatile
{
return IO_BANK0_GPIO9_CTRL_OEOVER((GPIO9_CTRL >> 12u) & 0b11u);
}
inline void set_GPIO9_CTRL_OEOVER(
IO_BANK0_GPIO9_CTRL_OEOVER value) volatile
{
uint32_t curr = GPIO9_CTRL;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(value) & 0b11u) << 12u;
GPIO9_CTRL = curr;
}
inline IO_BANK0_GPIO9_CTRL_INOVER get_GPIO9_CTRL_INOVER() volatile
{
return IO_BANK0_GPIO9_CTRL_INOVER((GPIO9_CTRL >> 16u) & 0b11u);
}
inline void set_GPIO9_CTRL_INOVER(
IO_BANK0_GPIO9_CTRL_INOVER value) volatile
{
uint32_t curr = GPIO9_CTRL;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(value) & 0b11u) << 16u;
GPIO9_CTRL = curr;
}
inline IO_BANK0_GPIO9_CTRL_IRQOVER get_GPIO9_CTRL_IRQOVER() volatile
{
return IO_BANK0_GPIO9_CTRL_IRQOVER((GPIO9_CTRL >> 28u) & 0b11u);
}
inline void set_GPIO9_CTRL_IRQOVER(
IO_BANK0_GPIO9_CTRL_IRQOVER value) volatile
{
uint32_t curr = GPIO9_CTRL;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(value) & 0b11u) << 28u;
GPIO9_CTRL = curr;
}
inline void get_GPIO9_CTRL(IO_BANK0_GPIO9_CTRL_FUNCSEL &FUNCSEL,
IO_BANK0_GPIO9_CTRL_OUTOVER &OUTOVER,
IO_BANK0_GPIO9_CTRL_OEOVER &OEOVER,
IO_BANK0_GPIO9_CTRL_INOVER &INOVER,
IO_BANK0_GPIO9_CTRL_IRQOVER &IRQOVER) volatile
{
uint32_t curr = GPIO9_CTRL;
FUNCSEL = IO_BANK0_GPIO9_CTRL_FUNCSEL((curr >> 0u) & 0b11111u);
OUTOVER = IO_BANK0_GPIO9_CTRL_OUTOVER((curr >> 8u) & 0b11u);
OEOVER = IO_BANK0_GPIO9_CTRL_OEOVER((curr >> 12u) & 0b11u);
INOVER = IO_BANK0_GPIO9_CTRL_INOVER((curr >> 16u) & 0b11u);
IRQOVER = IO_BANK0_GPIO9_CTRL_IRQOVER((curr >> 28u) & 0b11u);
}
inline void set_GPIO9_CTRL(IO_BANK0_GPIO9_CTRL_FUNCSEL FUNCSEL,
IO_BANK0_GPIO9_CTRL_OUTOVER OUTOVER,
IO_BANK0_GPIO9_CTRL_OEOVER OEOVER,
IO_BANK0_GPIO9_CTRL_INOVER INOVER,
IO_BANK0_GPIO9_CTRL_IRQOVER IRQOVER) volatile
{
uint32_t curr = GPIO9_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(FUNCSEL) & 0b11111u) << 0u;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(OUTOVER) & 0b11u) << 8u;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(OEOVER) & 0b11u) << 12u;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(INOVER) & 0b11u) << 16u;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(IRQOVER) & 0b11u) << 28u;
GPIO9_CTRL = curr;
}
inline bool get_GPIO10_STATUS_OUTFROMPERI() volatile
{
return GPIO10_STATUS & (1u << 8u);
}
inline bool get_GPIO10_STATUS_OUTTOPAD() volatile
{
return GPIO10_STATUS & (1u << 9u);
}
inline bool get_GPIO10_STATUS_OEFROMPERI() volatile
{
return GPIO10_STATUS & (1u << 12u);
}
inline bool get_GPIO10_STATUS_OETOPAD() volatile
{
return GPIO10_STATUS & (1u << 13u);
}
inline bool get_GPIO10_STATUS_INFROMPAD() volatile
{
return GPIO10_STATUS & (1u << 17u);
}
inline bool get_GPIO10_STATUS_INTOPERI() volatile
{
return GPIO10_STATUS & (1u << 19u);
}
inline bool get_GPIO10_STATUS_IRQFROMPAD() volatile
{
return GPIO10_STATUS & (1u << 24u);
}
inline bool get_GPIO10_STATUS_IRQTOPROC() volatile
{
return GPIO10_STATUS & (1u << 26u);
}
inline void get_GPIO10_STATUS(bool &OUTFROMPERI, bool &OUTTOPAD,
bool &OEFROMPERI, bool &OETOPAD,
bool &INFROMPAD, bool &INTOPERI,
bool &IRQFROMPAD, bool &IRQTOPROC) volatile
{
uint32_t curr = GPIO10_STATUS;
OUTFROMPERI = curr & (1u << 8u);
OUTTOPAD = curr & (1u << 9u);
OEFROMPERI = curr & (1u << 12u);
OETOPAD = curr & (1u << 13u);
INFROMPAD = curr & (1u << 17u);
INTOPERI = curr & (1u << 19u);
IRQFROMPAD = curr & (1u << 24u);
IRQTOPROC = curr & (1u << 26u);
}
inline IO_BANK0_GPIO10_CTRL_FUNCSEL get_GPIO10_CTRL_FUNCSEL() volatile
{
return IO_BANK0_GPIO10_CTRL_FUNCSEL((GPIO10_CTRL >> 0u) & 0b11111u);
}
inline void set_GPIO10_CTRL_FUNCSEL(
IO_BANK0_GPIO10_CTRL_FUNCSEL value) volatile
{
uint32_t curr = GPIO10_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(value) & 0b11111u) << 0u;
GPIO10_CTRL = curr;
}
inline IO_BANK0_GPIO10_CTRL_OUTOVER get_GPIO10_CTRL_OUTOVER() volatile
{
return IO_BANK0_GPIO10_CTRL_OUTOVER((GPIO10_CTRL >> 8u) & 0b11u);
}
inline void set_GPIO10_CTRL_OUTOVER(
IO_BANK0_GPIO10_CTRL_OUTOVER value) volatile
{
uint32_t curr = GPIO10_CTRL;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(value) & 0b11u) << 8u;
GPIO10_CTRL = curr;
}
inline IO_BANK0_GPIO10_CTRL_OEOVER get_GPIO10_CTRL_OEOVER() volatile
{
return IO_BANK0_GPIO10_CTRL_OEOVER((GPIO10_CTRL >> 12u) & 0b11u);
}
inline void set_GPIO10_CTRL_OEOVER(
IO_BANK0_GPIO10_CTRL_OEOVER value) volatile
{
uint32_t curr = GPIO10_CTRL;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(value) & 0b11u) << 12u;
GPIO10_CTRL = curr;
}
inline IO_BANK0_GPIO10_CTRL_INOVER get_GPIO10_CTRL_INOVER() volatile
{
return IO_BANK0_GPIO10_CTRL_INOVER((GPIO10_CTRL >> 16u) & 0b11u);
}
inline void set_GPIO10_CTRL_INOVER(
IO_BANK0_GPIO10_CTRL_INOVER value) volatile
{
uint32_t curr = GPIO10_CTRL;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(value) & 0b11u) << 16u;
GPIO10_CTRL = curr;
}
inline IO_BANK0_GPIO10_CTRL_IRQOVER get_GPIO10_CTRL_IRQOVER() volatile
{
return IO_BANK0_GPIO10_CTRL_IRQOVER((GPIO10_CTRL >> 28u) & 0b11u);
}
inline void set_GPIO10_CTRL_IRQOVER(
IO_BANK0_GPIO10_CTRL_IRQOVER value) volatile
{
uint32_t curr = GPIO10_CTRL;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(value) & 0b11u) << 28u;
GPIO10_CTRL = curr;
}
inline void get_GPIO10_CTRL(IO_BANK0_GPIO10_CTRL_FUNCSEL &FUNCSEL,
IO_BANK0_GPIO10_CTRL_OUTOVER &OUTOVER,
IO_BANK0_GPIO10_CTRL_OEOVER &OEOVER,
IO_BANK0_GPIO10_CTRL_INOVER &INOVER,
IO_BANK0_GPIO10_CTRL_IRQOVER &IRQOVER) volatile
{
uint32_t curr = GPIO10_CTRL;
FUNCSEL = IO_BANK0_GPIO10_CTRL_FUNCSEL((curr >> 0u) & 0b11111u);
OUTOVER = IO_BANK0_GPIO10_CTRL_OUTOVER((curr >> 8u) & 0b11u);
OEOVER = IO_BANK0_GPIO10_CTRL_OEOVER((curr >> 12u) & 0b11u);
INOVER = IO_BANK0_GPIO10_CTRL_INOVER((curr >> 16u) & 0b11u);
IRQOVER = IO_BANK0_GPIO10_CTRL_IRQOVER((curr >> 28u) & 0b11u);
}
inline void set_GPIO10_CTRL(IO_BANK0_GPIO10_CTRL_FUNCSEL FUNCSEL,
IO_BANK0_GPIO10_CTRL_OUTOVER OUTOVER,
IO_BANK0_GPIO10_CTRL_OEOVER OEOVER,
IO_BANK0_GPIO10_CTRL_INOVER INOVER,
IO_BANK0_GPIO10_CTRL_IRQOVER IRQOVER) volatile
{
uint32_t curr = GPIO10_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(FUNCSEL) & 0b11111u) << 0u;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(OUTOVER) & 0b11u) << 8u;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(OEOVER) & 0b11u) << 12u;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(INOVER) & 0b11u) << 16u;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(IRQOVER) & 0b11u) << 28u;
GPIO10_CTRL = curr;
}
inline bool get_GPIO11_STATUS_OUTFROMPERI() volatile
{
return GPIO11_STATUS & (1u << 8u);
}
inline bool get_GPIO11_STATUS_OUTTOPAD() volatile
{
return GPIO11_STATUS & (1u << 9u);
}
inline bool get_GPIO11_STATUS_OEFROMPERI() volatile
{
return GPIO11_STATUS & (1u << 12u);
}
inline bool get_GPIO11_STATUS_OETOPAD() volatile
{
return GPIO11_STATUS & (1u << 13u);
}
inline bool get_GPIO11_STATUS_INFROMPAD() volatile
{
return GPIO11_STATUS & (1u << 17u);
}
inline bool get_GPIO11_STATUS_INTOPERI() volatile
{
return GPIO11_STATUS & (1u << 19u);
}
inline bool get_GPIO11_STATUS_IRQFROMPAD() volatile
{
return GPIO11_STATUS & (1u << 24u);
}
inline bool get_GPIO11_STATUS_IRQTOPROC() volatile
{
return GPIO11_STATUS & (1u << 26u);
}
inline void get_GPIO11_STATUS(bool &OUTFROMPERI, bool &OUTTOPAD,
bool &OEFROMPERI, bool &OETOPAD,
bool &INFROMPAD, bool &INTOPERI,
bool &IRQFROMPAD, bool &IRQTOPROC) volatile
{
uint32_t curr = GPIO11_STATUS;
OUTFROMPERI = curr & (1u << 8u);
OUTTOPAD = curr & (1u << 9u);
OEFROMPERI = curr & (1u << 12u);
OETOPAD = curr & (1u << 13u);
INFROMPAD = curr & (1u << 17u);
INTOPERI = curr & (1u << 19u);
IRQFROMPAD = curr & (1u << 24u);
IRQTOPROC = curr & (1u << 26u);
}
inline IO_BANK0_GPIO11_CTRL_FUNCSEL get_GPIO11_CTRL_FUNCSEL() volatile
{
return IO_BANK0_GPIO11_CTRL_FUNCSEL((GPIO11_CTRL >> 0u) & 0b11111u);
}
inline void set_GPIO11_CTRL_FUNCSEL(
IO_BANK0_GPIO11_CTRL_FUNCSEL value) volatile
{
uint32_t curr = GPIO11_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(value) & 0b11111u) << 0u;
GPIO11_CTRL = curr;
}
inline IO_BANK0_GPIO11_CTRL_OUTOVER get_GPIO11_CTRL_OUTOVER() volatile
{
return IO_BANK0_GPIO11_CTRL_OUTOVER((GPIO11_CTRL >> 8u) & 0b11u);
}
inline void set_GPIO11_CTRL_OUTOVER(
IO_BANK0_GPIO11_CTRL_OUTOVER value) volatile
{
uint32_t curr = GPIO11_CTRL;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(value) & 0b11u) << 8u;
GPIO11_CTRL = curr;
}
inline IO_BANK0_GPIO11_CTRL_OEOVER get_GPIO11_CTRL_OEOVER() volatile
{
return IO_BANK0_GPIO11_CTRL_OEOVER((GPIO11_CTRL >> 12u) & 0b11u);
}
inline void set_GPIO11_CTRL_OEOVER(
IO_BANK0_GPIO11_CTRL_OEOVER value) volatile
{
uint32_t curr = GPIO11_CTRL;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(value) & 0b11u) << 12u;
GPIO11_CTRL = curr;
}
inline IO_BANK0_GPIO11_CTRL_INOVER get_GPIO11_CTRL_INOVER() volatile
{
return IO_BANK0_GPIO11_CTRL_INOVER((GPIO11_CTRL >> 16u) & 0b11u);
}
inline void set_GPIO11_CTRL_INOVER(
IO_BANK0_GPIO11_CTRL_INOVER value) volatile
{
uint32_t curr = GPIO11_CTRL;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(value) & 0b11u) << 16u;
GPIO11_CTRL = curr;
}
inline IO_BANK0_GPIO11_CTRL_IRQOVER get_GPIO11_CTRL_IRQOVER() volatile
{
return IO_BANK0_GPIO11_CTRL_IRQOVER((GPIO11_CTRL >> 28u) & 0b11u);
}
inline void set_GPIO11_CTRL_IRQOVER(
IO_BANK0_GPIO11_CTRL_IRQOVER value) volatile
{
uint32_t curr = GPIO11_CTRL;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(value) & 0b11u) << 28u;
GPIO11_CTRL = curr;
}
inline void get_GPIO11_CTRL(IO_BANK0_GPIO11_CTRL_FUNCSEL &FUNCSEL,
IO_BANK0_GPIO11_CTRL_OUTOVER &OUTOVER,
IO_BANK0_GPIO11_CTRL_OEOVER &OEOVER,
IO_BANK0_GPIO11_CTRL_INOVER &INOVER,
IO_BANK0_GPIO11_CTRL_IRQOVER &IRQOVER) volatile
{
uint32_t curr = GPIO11_CTRL;
FUNCSEL = IO_BANK0_GPIO11_CTRL_FUNCSEL((curr >> 0u) & 0b11111u);
OUTOVER = IO_BANK0_GPIO11_CTRL_OUTOVER((curr >> 8u) & 0b11u);
OEOVER = IO_BANK0_GPIO11_CTRL_OEOVER((curr >> 12u) & 0b11u);
INOVER = IO_BANK0_GPIO11_CTRL_INOVER((curr >> 16u) & 0b11u);
IRQOVER = IO_BANK0_GPIO11_CTRL_IRQOVER((curr >> 28u) & 0b11u);
}
inline void set_GPIO11_CTRL(IO_BANK0_GPIO11_CTRL_FUNCSEL FUNCSEL,
IO_BANK0_GPIO11_CTRL_OUTOVER OUTOVER,
IO_BANK0_GPIO11_CTRL_OEOVER OEOVER,
IO_BANK0_GPIO11_CTRL_INOVER INOVER,
IO_BANK0_GPIO11_CTRL_IRQOVER IRQOVER) volatile
{
uint32_t curr = GPIO11_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(FUNCSEL) & 0b11111u) << 0u;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(OUTOVER) & 0b11u) << 8u;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(OEOVER) & 0b11u) << 12u;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(INOVER) & 0b11u) << 16u;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(IRQOVER) & 0b11u) << 28u;
GPIO11_CTRL = curr;
}
inline bool get_GPIO12_STATUS_OUTFROMPERI() volatile
{
return GPIO12_STATUS & (1u << 8u);
}
inline bool get_GPIO12_STATUS_OUTTOPAD() volatile
{
return GPIO12_STATUS & (1u << 9u);
}
inline bool get_GPIO12_STATUS_OEFROMPERI() volatile
{
return GPIO12_STATUS & (1u << 12u);
}
inline bool get_GPIO12_STATUS_OETOPAD() volatile
{
return GPIO12_STATUS & (1u << 13u);
}
inline bool get_GPIO12_STATUS_INFROMPAD() volatile
{
return GPIO12_STATUS & (1u << 17u);
}
inline bool get_GPIO12_STATUS_INTOPERI() volatile
{
return GPIO12_STATUS & (1u << 19u);
}
inline bool get_GPIO12_STATUS_IRQFROMPAD() volatile
{
return GPIO12_STATUS & (1u << 24u);
}
inline bool get_GPIO12_STATUS_IRQTOPROC() volatile
{
return GPIO12_STATUS & (1u << 26u);
}
inline void get_GPIO12_STATUS(bool &OUTFROMPERI, bool &OUTTOPAD,
bool &OEFROMPERI, bool &OETOPAD,
bool &INFROMPAD, bool &INTOPERI,
bool &IRQFROMPAD, bool &IRQTOPROC) volatile
{
uint32_t curr = GPIO12_STATUS;
OUTFROMPERI = curr & (1u << 8u);
OUTTOPAD = curr & (1u << 9u);
OEFROMPERI = curr & (1u << 12u);
OETOPAD = curr & (1u << 13u);
INFROMPAD = curr & (1u << 17u);
INTOPERI = curr & (1u << 19u);
IRQFROMPAD = curr & (1u << 24u);
IRQTOPROC = curr & (1u << 26u);
}
inline IO_BANK0_GPIO12_CTRL_FUNCSEL get_GPIO12_CTRL_FUNCSEL() volatile
{
return IO_BANK0_GPIO12_CTRL_FUNCSEL((GPIO12_CTRL >> 0u) & 0b11111u);
}
inline void set_GPIO12_CTRL_FUNCSEL(
IO_BANK0_GPIO12_CTRL_FUNCSEL value) volatile
{
uint32_t curr = GPIO12_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(value) & 0b11111u) << 0u;
GPIO12_CTRL = curr;
}
inline IO_BANK0_GPIO12_CTRL_OUTOVER get_GPIO12_CTRL_OUTOVER() volatile
{
return IO_BANK0_GPIO12_CTRL_OUTOVER((GPIO12_CTRL >> 8u) & 0b11u);
}
inline void set_GPIO12_CTRL_OUTOVER(
IO_BANK0_GPIO12_CTRL_OUTOVER value) volatile
{
uint32_t curr = GPIO12_CTRL;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(value) & 0b11u) << 8u;
GPIO12_CTRL = curr;
}
inline IO_BANK0_GPIO12_CTRL_OEOVER get_GPIO12_CTRL_OEOVER() volatile
{
return IO_BANK0_GPIO12_CTRL_OEOVER((GPIO12_CTRL >> 12u) & 0b11u);
}
inline void set_GPIO12_CTRL_OEOVER(
IO_BANK0_GPIO12_CTRL_OEOVER value) volatile
{
uint32_t curr = GPIO12_CTRL;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(value) & 0b11u) << 12u;
GPIO12_CTRL = curr;
}
inline IO_BANK0_GPIO12_CTRL_INOVER get_GPIO12_CTRL_INOVER() volatile
{
return IO_BANK0_GPIO12_CTRL_INOVER((GPIO12_CTRL >> 16u) & 0b11u);
}
inline void set_GPIO12_CTRL_INOVER(
IO_BANK0_GPIO12_CTRL_INOVER value) volatile
{
uint32_t curr = GPIO12_CTRL;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(value) & 0b11u) << 16u;
GPIO12_CTRL = curr;
}
inline IO_BANK0_GPIO12_CTRL_IRQOVER get_GPIO12_CTRL_IRQOVER() volatile
{
return IO_BANK0_GPIO12_CTRL_IRQOVER((GPIO12_CTRL >> 28u) & 0b11u);
}
inline void set_GPIO12_CTRL_IRQOVER(
IO_BANK0_GPIO12_CTRL_IRQOVER value) volatile
{
uint32_t curr = GPIO12_CTRL;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(value) & 0b11u) << 28u;
GPIO12_CTRL = curr;
}
inline void get_GPIO12_CTRL(IO_BANK0_GPIO12_CTRL_FUNCSEL &FUNCSEL,
IO_BANK0_GPIO12_CTRL_OUTOVER &OUTOVER,
IO_BANK0_GPIO12_CTRL_OEOVER &OEOVER,
IO_BANK0_GPIO12_CTRL_INOVER &INOVER,
IO_BANK0_GPIO12_CTRL_IRQOVER &IRQOVER) volatile
{
uint32_t curr = GPIO12_CTRL;
FUNCSEL = IO_BANK0_GPIO12_CTRL_FUNCSEL((curr >> 0u) & 0b11111u);
OUTOVER = IO_BANK0_GPIO12_CTRL_OUTOVER((curr >> 8u) & 0b11u);
OEOVER = IO_BANK0_GPIO12_CTRL_OEOVER((curr >> 12u) & 0b11u);
INOVER = IO_BANK0_GPIO12_CTRL_INOVER((curr >> 16u) & 0b11u);
IRQOVER = IO_BANK0_GPIO12_CTRL_IRQOVER((curr >> 28u) & 0b11u);
}
inline void set_GPIO12_CTRL(IO_BANK0_GPIO12_CTRL_FUNCSEL FUNCSEL,
IO_BANK0_GPIO12_CTRL_OUTOVER OUTOVER,
IO_BANK0_GPIO12_CTRL_OEOVER OEOVER,
IO_BANK0_GPIO12_CTRL_INOVER INOVER,
IO_BANK0_GPIO12_CTRL_IRQOVER IRQOVER) volatile
{
uint32_t curr = GPIO12_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(FUNCSEL) & 0b11111u) << 0u;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(OUTOVER) & 0b11u) << 8u;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(OEOVER) & 0b11u) << 12u;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(INOVER) & 0b11u) << 16u;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(IRQOVER) & 0b11u) << 28u;
GPIO12_CTRL = curr;
}
inline bool get_GPIO13_STATUS_OUTFROMPERI() volatile
{
return GPIO13_STATUS & (1u << 8u);
}
inline bool get_GPIO13_STATUS_OUTTOPAD() volatile
{
return GPIO13_STATUS & (1u << 9u);
}
inline bool get_GPIO13_STATUS_OEFROMPERI() volatile
{
return GPIO13_STATUS & (1u << 12u);
}
inline bool get_GPIO13_STATUS_OETOPAD() volatile
{
return GPIO13_STATUS & (1u << 13u);
}
inline bool get_GPIO13_STATUS_INFROMPAD() volatile
{
return GPIO13_STATUS & (1u << 17u);
}
inline bool get_GPIO13_STATUS_INTOPERI() volatile
{
return GPIO13_STATUS & (1u << 19u);
}
inline bool get_GPIO13_STATUS_IRQFROMPAD() volatile
{
return GPIO13_STATUS & (1u << 24u);
}
inline bool get_GPIO13_STATUS_IRQTOPROC() volatile
{
return GPIO13_STATUS & (1u << 26u);
}
inline void get_GPIO13_STATUS(bool &OUTFROMPERI, bool &OUTTOPAD,
bool &OEFROMPERI, bool &OETOPAD,
bool &INFROMPAD, bool &INTOPERI,
bool &IRQFROMPAD, bool &IRQTOPROC) volatile
{
uint32_t curr = GPIO13_STATUS;
OUTFROMPERI = curr & (1u << 8u);
OUTTOPAD = curr & (1u << 9u);
OEFROMPERI = curr & (1u << 12u);
OETOPAD = curr & (1u << 13u);
INFROMPAD = curr & (1u << 17u);
INTOPERI = curr & (1u << 19u);
IRQFROMPAD = curr & (1u << 24u);
IRQTOPROC = curr & (1u << 26u);
}
inline IO_BANK0_GPIO13_CTRL_FUNCSEL get_GPIO13_CTRL_FUNCSEL() volatile
{
return IO_BANK0_GPIO13_CTRL_FUNCSEL((GPIO13_CTRL >> 0u) & 0b11111u);
}
inline void set_GPIO13_CTRL_FUNCSEL(
IO_BANK0_GPIO13_CTRL_FUNCSEL value) volatile
{
uint32_t curr = GPIO13_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(value) & 0b11111u) << 0u;
GPIO13_CTRL = curr;
}
inline IO_BANK0_GPIO13_CTRL_OUTOVER get_GPIO13_CTRL_OUTOVER() volatile
{
return IO_BANK0_GPIO13_CTRL_OUTOVER((GPIO13_CTRL >> 8u) & 0b11u);
}
inline void set_GPIO13_CTRL_OUTOVER(
IO_BANK0_GPIO13_CTRL_OUTOVER value) volatile
{
uint32_t curr = GPIO13_CTRL;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(value) & 0b11u) << 8u;
GPIO13_CTRL = curr;
}
inline IO_BANK0_GPIO13_CTRL_OEOVER get_GPIO13_CTRL_OEOVER() volatile
{
return IO_BANK0_GPIO13_CTRL_OEOVER((GPIO13_CTRL >> 12u) & 0b11u);
}
inline void set_GPIO13_CTRL_OEOVER(
IO_BANK0_GPIO13_CTRL_OEOVER value) volatile
{
uint32_t curr = GPIO13_CTRL;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(value) & 0b11u) << 12u;
GPIO13_CTRL = curr;
}
inline IO_BANK0_GPIO13_CTRL_INOVER get_GPIO13_CTRL_INOVER() volatile
{
return IO_BANK0_GPIO13_CTRL_INOVER((GPIO13_CTRL >> 16u) & 0b11u);
}
inline void set_GPIO13_CTRL_INOVER(
IO_BANK0_GPIO13_CTRL_INOVER value) volatile
{
uint32_t curr = GPIO13_CTRL;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(value) & 0b11u) << 16u;
GPIO13_CTRL = curr;
}
inline IO_BANK0_GPIO13_CTRL_IRQOVER get_GPIO13_CTRL_IRQOVER() volatile
{
return IO_BANK0_GPIO13_CTRL_IRQOVER((GPIO13_CTRL >> 28u) & 0b11u);
}
inline void set_GPIO13_CTRL_IRQOVER(
IO_BANK0_GPIO13_CTRL_IRQOVER value) volatile
{
uint32_t curr = GPIO13_CTRL;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(value) & 0b11u) << 28u;
GPIO13_CTRL = curr;
}
inline void get_GPIO13_CTRL(IO_BANK0_GPIO13_CTRL_FUNCSEL &FUNCSEL,
IO_BANK0_GPIO13_CTRL_OUTOVER &OUTOVER,
IO_BANK0_GPIO13_CTRL_OEOVER &OEOVER,
IO_BANK0_GPIO13_CTRL_INOVER &INOVER,
IO_BANK0_GPIO13_CTRL_IRQOVER &IRQOVER) volatile
{
uint32_t curr = GPIO13_CTRL;
FUNCSEL = IO_BANK0_GPIO13_CTRL_FUNCSEL((curr >> 0u) & 0b11111u);
OUTOVER = IO_BANK0_GPIO13_CTRL_OUTOVER((curr >> 8u) & 0b11u);
OEOVER = IO_BANK0_GPIO13_CTRL_OEOVER((curr >> 12u) & 0b11u);
INOVER = IO_BANK0_GPIO13_CTRL_INOVER((curr >> 16u) & 0b11u);
IRQOVER = IO_BANK0_GPIO13_CTRL_IRQOVER((curr >> 28u) & 0b11u);
}
inline void set_GPIO13_CTRL(IO_BANK0_GPIO13_CTRL_FUNCSEL FUNCSEL,
IO_BANK0_GPIO13_CTRL_OUTOVER OUTOVER,
IO_BANK0_GPIO13_CTRL_OEOVER OEOVER,
IO_BANK0_GPIO13_CTRL_INOVER INOVER,
IO_BANK0_GPIO13_CTRL_IRQOVER IRQOVER) volatile
{
uint32_t curr = GPIO13_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(FUNCSEL) & 0b11111u) << 0u;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(OUTOVER) & 0b11u) << 8u;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(OEOVER) & 0b11u) << 12u;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(INOVER) & 0b11u) << 16u;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(IRQOVER) & 0b11u) << 28u;
GPIO13_CTRL = curr;
}
inline bool get_GPIO14_STATUS_OUTFROMPERI() volatile
{
return GPIO14_STATUS & (1u << 8u);
}
inline bool get_GPIO14_STATUS_OUTTOPAD() volatile
{
return GPIO14_STATUS & (1u << 9u);
}
inline bool get_GPIO14_STATUS_OEFROMPERI() volatile
{
return GPIO14_STATUS & (1u << 12u);
}
inline bool get_GPIO14_STATUS_OETOPAD() volatile
{
return GPIO14_STATUS & (1u << 13u);
}
inline bool get_GPIO14_STATUS_INFROMPAD() volatile
{
return GPIO14_STATUS & (1u << 17u);
}
inline bool get_GPIO14_STATUS_INTOPERI() volatile
{
return GPIO14_STATUS & (1u << 19u);
}
inline bool get_GPIO14_STATUS_IRQFROMPAD() volatile
{
return GPIO14_STATUS & (1u << 24u);
}
inline bool get_GPIO14_STATUS_IRQTOPROC() volatile
{
return GPIO14_STATUS & (1u << 26u);
}
inline void get_GPIO14_STATUS(bool &OUTFROMPERI, bool &OUTTOPAD,
bool &OEFROMPERI, bool &OETOPAD,
bool &INFROMPAD, bool &INTOPERI,
bool &IRQFROMPAD, bool &IRQTOPROC) volatile
{
uint32_t curr = GPIO14_STATUS;
OUTFROMPERI = curr & (1u << 8u);
OUTTOPAD = curr & (1u << 9u);
OEFROMPERI = curr & (1u << 12u);
OETOPAD = curr & (1u << 13u);
INFROMPAD = curr & (1u << 17u);
INTOPERI = curr & (1u << 19u);
IRQFROMPAD = curr & (1u << 24u);
IRQTOPROC = curr & (1u << 26u);
}
inline IO_BANK0_GPIO14_CTRL_FUNCSEL get_GPIO14_CTRL_FUNCSEL() volatile
{
return IO_BANK0_GPIO14_CTRL_FUNCSEL((GPIO14_CTRL >> 0u) & 0b11111u);
}
inline void set_GPIO14_CTRL_FUNCSEL(
IO_BANK0_GPIO14_CTRL_FUNCSEL value) volatile
{
uint32_t curr = GPIO14_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(value) & 0b11111u) << 0u;
GPIO14_CTRL = curr;
}
inline IO_BANK0_GPIO14_CTRL_OUTOVER get_GPIO14_CTRL_OUTOVER() volatile
{
return IO_BANK0_GPIO14_CTRL_OUTOVER((GPIO14_CTRL >> 8u) & 0b11u);
}
inline void set_GPIO14_CTRL_OUTOVER(
IO_BANK0_GPIO14_CTRL_OUTOVER value) volatile
{
uint32_t curr = GPIO14_CTRL;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(value) & 0b11u) << 8u;
GPIO14_CTRL = curr;
}
inline IO_BANK0_GPIO14_CTRL_OEOVER get_GPIO14_CTRL_OEOVER() volatile
{
return IO_BANK0_GPIO14_CTRL_OEOVER((GPIO14_CTRL >> 12u) & 0b11u);
}
inline void set_GPIO14_CTRL_OEOVER(
IO_BANK0_GPIO14_CTRL_OEOVER value) volatile
{
uint32_t curr = GPIO14_CTRL;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(value) & 0b11u) << 12u;
GPIO14_CTRL = curr;
}
inline IO_BANK0_GPIO14_CTRL_INOVER get_GPIO14_CTRL_INOVER() volatile
{
return IO_BANK0_GPIO14_CTRL_INOVER((GPIO14_CTRL >> 16u) & 0b11u);
}
inline void set_GPIO14_CTRL_INOVER(
IO_BANK0_GPIO14_CTRL_INOVER value) volatile
{
uint32_t curr = GPIO14_CTRL;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(value) & 0b11u) << 16u;
GPIO14_CTRL = curr;
}
inline IO_BANK0_GPIO14_CTRL_IRQOVER get_GPIO14_CTRL_IRQOVER() volatile
{
return IO_BANK0_GPIO14_CTRL_IRQOVER((GPIO14_CTRL >> 28u) & 0b11u);
}
inline void set_GPIO14_CTRL_IRQOVER(
IO_BANK0_GPIO14_CTRL_IRQOVER value) volatile
{
uint32_t curr = GPIO14_CTRL;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(value) & 0b11u) << 28u;
GPIO14_CTRL = curr;
}
inline void get_GPIO14_CTRL(IO_BANK0_GPIO14_CTRL_FUNCSEL &FUNCSEL,
IO_BANK0_GPIO14_CTRL_OUTOVER &OUTOVER,
IO_BANK0_GPIO14_CTRL_OEOVER &OEOVER,
IO_BANK0_GPIO14_CTRL_INOVER &INOVER,
IO_BANK0_GPIO14_CTRL_IRQOVER &IRQOVER) volatile
{
uint32_t curr = GPIO14_CTRL;
FUNCSEL = IO_BANK0_GPIO14_CTRL_FUNCSEL((curr >> 0u) & 0b11111u);
OUTOVER = IO_BANK0_GPIO14_CTRL_OUTOVER((curr >> 8u) & 0b11u);
OEOVER = IO_BANK0_GPIO14_CTRL_OEOVER((curr >> 12u) & 0b11u);
INOVER = IO_BANK0_GPIO14_CTRL_INOVER((curr >> 16u) & 0b11u);
IRQOVER = IO_BANK0_GPIO14_CTRL_IRQOVER((curr >> 28u) & 0b11u);
}
inline void set_GPIO14_CTRL(IO_BANK0_GPIO14_CTRL_FUNCSEL FUNCSEL,
IO_BANK0_GPIO14_CTRL_OUTOVER OUTOVER,
IO_BANK0_GPIO14_CTRL_OEOVER OEOVER,
IO_BANK0_GPIO14_CTRL_INOVER INOVER,
IO_BANK0_GPIO14_CTRL_IRQOVER IRQOVER) volatile
{
uint32_t curr = GPIO14_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(FUNCSEL) & 0b11111u) << 0u;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(OUTOVER) & 0b11u) << 8u;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(OEOVER) & 0b11u) << 12u;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(INOVER) & 0b11u) << 16u;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(IRQOVER) & 0b11u) << 28u;
GPIO14_CTRL = curr;
}
inline bool get_GPIO15_STATUS_OUTFROMPERI() volatile
{
return GPIO15_STATUS & (1u << 8u);
}
inline bool get_GPIO15_STATUS_OUTTOPAD() volatile
{
return GPIO15_STATUS & (1u << 9u);
}
inline bool get_GPIO15_STATUS_OEFROMPERI() volatile
{
return GPIO15_STATUS & (1u << 12u);
}
inline bool get_GPIO15_STATUS_OETOPAD() volatile
{
return GPIO15_STATUS & (1u << 13u);
}
inline bool get_GPIO15_STATUS_INFROMPAD() volatile
{
return GPIO15_STATUS & (1u << 17u);
}
inline bool get_GPIO15_STATUS_INTOPERI() volatile
{
return GPIO15_STATUS & (1u << 19u);
}
inline bool get_GPIO15_STATUS_IRQFROMPAD() volatile
{
return GPIO15_STATUS & (1u << 24u);
}
inline bool get_GPIO15_STATUS_IRQTOPROC() volatile
{
return GPIO15_STATUS & (1u << 26u);
}
inline void get_GPIO15_STATUS(bool &OUTFROMPERI, bool &OUTTOPAD,
bool &OEFROMPERI, bool &OETOPAD,
bool &INFROMPAD, bool &INTOPERI,
bool &IRQFROMPAD, bool &IRQTOPROC) volatile
{
uint32_t curr = GPIO15_STATUS;
OUTFROMPERI = curr & (1u << 8u);
OUTTOPAD = curr & (1u << 9u);
OEFROMPERI = curr & (1u << 12u);
OETOPAD = curr & (1u << 13u);
INFROMPAD = curr & (1u << 17u);
INTOPERI = curr & (1u << 19u);
IRQFROMPAD = curr & (1u << 24u);
IRQTOPROC = curr & (1u << 26u);
}
inline IO_BANK0_GPIO15_CTRL_FUNCSEL get_GPIO15_CTRL_FUNCSEL() volatile
{
return IO_BANK0_GPIO15_CTRL_FUNCSEL((GPIO15_CTRL >> 0u) & 0b11111u);
}
inline void set_GPIO15_CTRL_FUNCSEL(
IO_BANK0_GPIO15_CTRL_FUNCSEL value) volatile
{
uint32_t curr = GPIO15_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(value) & 0b11111u) << 0u;
GPIO15_CTRL = curr;
}
inline IO_BANK0_GPIO15_CTRL_OUTOVER get_GPIO15_CTRL_OUTOVER() volatile
{
return IO_BANK0_GPIO15_CTRL_OUTOVER((GPIO15_CTRL >> 8u) & 0b11u);
}
inline void set_GPIO15_CTRL_OUTOVER(
IO_BANK0_GPIO15_CTRL_OUTOVER value) volatile
{
uint32_t curr = GPIO15_CTRL;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(value) & 0b11u) << 8u;
GPIO15_CTRL = curr;
}
inline IO_BANK0_GPIO15_CTRL_OEOVER get_GPIO15_CTRL_OEOVER() volatile
{
return IO_BANK0_GPIO15_CTRL_OEOVER((GPIO15_CTRL >> 12u) & 0b11u);
}
inline void set_GPIO15_CTRL_OEOVER(
IO_BANK0_GPIO15_CTRL_OEOVER value) volatile
{
uint32_t curr = GPIO15_CTRL;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(value) & 0b11u) << 12u;
GPIO15_CTRL = curr;
}
inline IO_BANK0_GPIO15_CTRL_INOVER get_GPIO15_CTRL_INOVER() volatile
{
return IO_BANK0_GPIO15_CTRL_INOVER((GPIO15_CTRL >> 16u) & 0b11u);
}
inline void set_GPIO15_CTRL_INOVER(
IO_BANK0_GPIO15_CTRL_INOVER value) volatile
{
uint32_t curr = GPIO15_CTRL;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(value) & 0b11u) << 16u;
GPIO15_CTRL = curr;
}
inline IO_BANK0_GPIO15_CTRL_IRQOVER get_GPIO15_CTRL_IRQOVER() volatile
{
return IO_BANK0_GPIO15_CTRL_IRQOVER((GPIO15_CTRL >> 28u) & 0b11u);
}
inline void set_GPIO15_CTRL_IRQOVER(
IO_BANK0_GPIO15_CTRL_IRQOVER value) volatile
{
uint32_t curr = GPIO15_CTRL;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(value) & 0b11u) << 28u;
GPIO15_CTRL = curr;
}
inline void get_GPIO15_CTRL(IO_BANK0_GPIO15_CTRL_FUNCSEL &FUNCSEL,
IO_BANK0_GPIO15_CTRL_OUTOVER &OUTOVER,
IO_BANK0_GPIO15_CTRL_OEOVER &OEOVER,
IO_BANK0_GPIO15_CTRL_INOVER &INOVER,
IO_BANK0_GPIO15_CTRL_IRQOVER &IRQOVER) volatile
{
uint32_t curr = GPIO15_CTRL;
FUNCSEL = IO_BANK0_GPIO15_CTRL_FUNCSEL((curr >> 0u) & 0b11111u);
OUTOVER = IO_BANK0_GPIO15_CTRL_OUTOVER((curr >> 8u) & 0b11u);
OEOVER = IO_BANK0_GPIO15_CTRL_OEOVER((curr >> 12u) & 0b11u);
INOVER = IO_BANK0_GPIO15_CTRL_INOVER((curr >> 16u) & 0b11u);
IRQOVER = IO_BANK0_GPIO15_CTRL_IRQOVER((curr >> 28u) & 0b11u);
}
inline void set_GPIO15_CTRL(IO_BANK0_GPIO15_CTRL_FUNCSEL FUNCSEL,
IO_BANK0_GPIO15_CTRL_OUTOVER OUTOVER,
IO_BANK0_GPIO15_CTRL_OEOVER OEOVER,
IO_BANK0_GPIO15_CTRL_INOVER INOVER,
IO_BANK0_GPIO15_CTRL_IRQOVER IRQOVER) volatile
{
uint32_t curr = GPIO15_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(FUNCSEL) & 0b11111u) << 0u;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(OUTOVER) & 0b11u) << 8u;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(OEOVER) & 0b11u) << 12u;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(INOVER) & 0b11u) << 16u;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(IRQOVER) & 0b11u) << 28u;
GPIO15_CTRL = curr;
}
inline bool get_GPIO16_STATUS_OUTFROMPERI() volatile
{
return GPIO16_STATUS & (1u << 8u);
}
inline bool get_GPIO16_STATUS_OUTTOPAD() volatile
{
return GPIO16_STATUS & (1u << 9u);
}
inline bool get_GPIO16_STATUS_OEFROMPERI() volatile
{
return GPIO16_STATUS & (1u << 12u);
}
inline bool get_GPIO16_STATUS_OETOPAD() volatile
{
return GPIO16_STATUS & (1u << 13u);
}
inline bool get_GPIO16_STATUS_INFROMPAD() volatile
{
return GPIO16_STATUS & (1u << 17u);
}
inline bool get_GPIO16_STATUS_INTOPERI() volatile
{
return GPIO16_STATUS & (1u << 19u);
}
inline bool get_GPIO16_STATUS_IRQFROMPAD() volatile
{
return GPIO16_STATUS & (1u << 24u);
}
inline bool get_GPIO16_STATUS_IRQTOPROC() volatile
{
return GPIO16_STATUS & (1u << 26u);
}
inline void get_GPIO16_STATUS(bool &OUTFROMPERI, bool &OUTTOPAD,
bool &OEFROMPERI, bool &OETOPAD,
bool &INFROMPAD, bool &INTOPERI,
bool &IRQFROMPAD, bool &IRQTOPROC) volatile
{
uint32_t curr = GPIO16_STATUS;
OUTFROMPERI = curr & (1u << 8u);
OUTTOPAD = curr & (1u << 9u);
OEFROMPERI = curr & (1u << 12u);
OETOPAD = curr & (1u << 13u);
INFROMPAD = curr & (1u << 17u);
INTOPERI = curr & (1u << 19u);
IRQFROMPAD = curr & (1u << 24u);
IRQTOPROC = curr & (1u << 26u);
}
inline IO_BANK0_GPIO16_CTRL_FUNCSEL get_GPIO16_CTRL_FUNCSEL() volatile
{
return IO_BANK0_GPIO16_CTRL_FUNCSEL((GPIO16_CTRL >> 0u) & 0b11111u);
}
inline void set_GPIO16_CTRL_FUNCSEL(
IO_BANK0_GPIO16_CTRL_FUNCSEL value) volatile
{
uint32_t curr = GPIO16_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(value) & 0b11111u) << 0u;
GPIO16_CTRL = curr;
}
inline IO_BANK0_GPIO16_CTRL_OUTOVER get_GPIO16_CTRL_OUTOVER() volatile
{
return IO_BANK0_GPIO16_CTRL_OUTOVER((GPIO16_CTRL >> 8u) & 0b11u);
}
inline void set_GPIO16_CTRL_OUTOVER(
IO_BANK0_GPIO16_CTRL_OUTOVER value) volatile
{
uint32_t curr = GPIO16_CTRL;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(value) & 0b11u) << 8u;
GPIO16_CTRL = curr;
}
inline IO_BANK0_GPIO16_CTRL_OEOVER get_GPIO16_CTRL_OEOVER() volatile
{
return IO_BANK0_GPIO16_CTRL_OEOVER((GPIO16_CTRL >> 12u) & 0b11u);
}
inline void set_GPIO16_CTRL_OEOVER(
IO_BANK0_GPIO16_CTRL_OEOVER value) volatile
{
uint32_t curr = GPIO16_CTRL;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(value) & 0b11u) << 12u;
GPIO16_CTRL = curr;
}
inline IO_BANK0_GPIO16_CTRL_INOVER get_GPIO16_CTRL_INOVER() volatile
{
return IO_BANK0_GPIO16_CTRL_INOVER((GPIO16_CTRL >> 16u) & 0b11u);
}
inline void set_GPIO16_CTRL_INOVER(
IO_BANK0_GPIO16_CTRL_INOVER value) volatile
{
uint32_t curr = GPIO16_CTRL;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(value) & 0b11u) << 16u;
GPIO16_CTRL = curr;
}
inline IO_BANK0_GPIO16_CTRL_IRQOVER get_GPIO16_CTRL_IRQOVER() volatile
{
return IO_BANK0_GPIO16_CTRL_IRQOVER((GPIO16_CTRL >> 28u) & 0b11u);
}
inline void set_GPIO16_CTRL_IRQOVER(
IO_BANK0_GPIO16_CTRL_IRQOVER value) volatile
{
uint32_t curr = GPIO16_CTRL;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(value) & 0b11u) << 28u;
GPIO16_CTRL = curr;
}
inline void get_GPIO16_CTRL(IO_BANK0_GPIO16_CTRL_FUNCSEL &FUNCSEL,
IO_BANK0_GPIO16_CTRL_OUTOVER &OUTOVER,
IO_BANK0_GPIO16_CTRL_OEOVER &OEOVER,
IO_BANK0_GPIO16_CTRL_INOVER &INOVER,
IO_BANK0_GPIO16_CTRL_IRQOVER &IRQOVER) volatile
{
uint32_t curr = GPIO16_CTRL;
FUNCSEL = IO_BANK0_GPIO16_CTRL_FUNCSEL((curr >> 0u) & 0b11111u);
OUTOVER = IO_BANK0_GPIO16_CTRL_OUTOVER((curr >> 8u) & 0b11u);
OEOVER = IO_BANK0_GPIO16_CTRL_OEOVER((curr >> 12u) & 0b11u);
INOVER = IO_BANK0_GPIO16_CTRL_INOVER((curr >> 16u) & 0b11u);
IRQOVER = IO_BANK0_GPIO16_CTRL_IRQOVER((curr >> 28u) & 0b11u);
}
inline void set_GPIO16_CTRL(IO_BANK0_GPIO16_CTRL_FUNCSEL FUNCSEL,
IO_BANK0_GPIO16_CTRL_OUTOVER OUTOVER,
IO_BANK0_GPIO16_CTRL_OEOVER OEOVER,
IO_BANK0_GPIO16_CTRL_INOVER INOVER,
IO_BANK0_GPIO16_CTRL_IRQOVER IRQOVER) volatile
{
uint32_t curr = GPIO16_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(FUNCSEL) & 0b11111u) << 0u;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(OUTOVER) & 0b11u) << 8u;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(OEOVER) & 0b11u) << 12u;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(INOVER) & 0b11u) << 16u;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(IRQOVER) & 0b11u) << 28u;
GPIO16_CTRL = curr;
}
inline bool get_GPIO17_STATUS_OUTFROMPERI() volatile
{
return GPIO17_STATUS & (1u << 8u);
}
inline bool get_GPIO17_STATUS_OUTTOPAD() volatile
{
return GPIO17_STATUS & (1u << 9u);
}
inline bool get_GPIO17_STATUS_OEFROMPERI() volatile
{
return GPIO17_STATUS & (1u << 12u);
}
inline bool get_GPIO17_STATUS_OETOPAD() volatile
{
return GPIO17_STATUS & (1u << 13u);
}
inline bool get_GPIO17_STATUS_INFROMPAD() volatile
{
return GPIO17_STATUS & (1u << 17u);
}
inline bool get_GPIO17_STATUS_INTOPERI() volatile
{
return GPIO17_STATUS & (1u << 19u);
}
inline bool get_GPIO17_STATUS_IRQFROMPAD() volatile
{
return GPIO17_STATUS & (1u << 24u);
}
inline bool get_GPIO17_STATUS_IRQTOPROC() volatile
{
return GPIO17_STATUS & (1u << 26u);
}
inline void get_GPIO17_STATUS(bool &OUTFROMPERI, bool &OUTTOPAD,
bool &OEFROMPERI, bool &OETOPAD,
bool &INFROMPAD, bool &INTOPERI,
bool &IRQFROMPAD, bool &IRQTOPROC) volatile
{
uint32_t curr = GPIO17_STATUS;
OUTFROMPERI = curr & (1u << 8u);
OUTTOPAD = curr & (1u << 9u);
OEFROMPERI = curr & (1u << 12u);
OETOPAD = curr & (1u << 13u);
INFROMPAD = curr & (1u << 17u);
INTOPERI = curr & (1u << 19u);
IRQFROMPAD = curr & (1u << 24u);
IRQTOPROC = curr & (1u << 26u);
}
inline IO_BANK0_GPIO17_CTRL_FUNCSEL get_GPIO17_CTRL_FUNCSEL() volatile
{
return IO_BANK0_GPIO17_CTRL_FUNCSEL((GPIO17_CTRL >> 0u) & 0b11111u);
}
inline void set_GPIO17_CTRL_FUNCSEL(
IO_BANK0_GPIO17_CTRL_FUNCSEL value) volatile
{
uint32_t curr = GPIO17_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(value) & 0b11111u) << 0u;
GPIO17_CTRL = curr;
}
inline IO_BANK0_GPIO17_CTRL_OUTOVER get_GPIO17_CTRL_OUTOVER() volatile
{
return IO_BANK0_GPIO17_CTRL_OUTOVER((GPIO17_CTRL >> 8u) & 0b11u);
}
inline void set_GPIO17_CTRL_OUTOVER(
IO_BANK0_GPIO17_CTRL_OUTOVER value) volatile
{
uint32_t curr = GPIO17_CTRL;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(value) & 0b11u) << 8u;
GPIO17_CTRL = curr;
}
inline IO_BANK0_GPIO17_CTRL_OEOVER get_GPIO17_CTRL_OEOVER() volatile
{
return IO_BANK0_GPIO17_CTRL_OEOVER((GPIO17_CTRL >> 12u) & 0b11u);
}
inline void set_GPIO17_CTRL_OEOVER(
IO_BANK0_GPIO17_CTRL_OEOVER value) volatile
{
uint32_t curr = GPIO17_CTRL;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(value) & 0b11u) << 12u;
GPIO17_CTRL = curr;
}
inline IO_BANK0_GPIO17_CTRL_INOVER get_GPIO17_CTRL_INOVER() volatile
{
return IO_BANK0_GPIO17_CTRL_INOVER((GPIO17_CTRL >> 16u) & 0b11u);
}
inline void set_GPIO17_CTRL_INOVER(
IO_BANK0_GPIO17_CTRL_INOVER value) volatile
{
uint32_t curr = GPIO17_CTRL;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(value) & 0b11u) << 16u;
GPIO17_CTRL = curr;
}
inline IO_BANK0_GPIO17_CTRL_IRQOVER get_GPIO17_CTRL_IRQOVER() volatile
{
return IO_BANK0_GPIO17_CTRL_IRQOVER((GPIO17_CTRL >> 28u) & 0b11u);
}
inline void set_GPIO17_CTRL_IRQOVER(
IO_BANK0_GPIO17_CTRL_IRQOVER value) volatile
{
uint32_t curr = GPIO17_CTRL;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(value) & 0b11u) << 28u;
GPIO17_CTRL = curr;
}
inline void get_GPIO17_CTRL(IO_BANK0_GPIO17_CTRL_FUNCSEL &FUNCSEL,
IO_BANK0_GPIO17_CTRL_OUTOVER &OUTOVER,
IO_BANK0_GPIO17_CTRL_OEOVER &OEOVER,
IO_BANK0_GPIO17_CTRL_INOVER &INOVER,
IO_BANK0_GPIO17_CTRL_IRQOVER &IRQOVER) volatile
{
uint32_t curr = GPIO17_CTRL;
FUNCSEL = IO_BANK0_GPIO17_CTRL_FUNCSEL((curr >> 0u) & 0b11111u);
OUTOVER = IO_BANK0_GPIO17_CTRL_OUTOVER((curr >> 8u) & 0b11u);
OEOVER = IO_BANK0_GPIO17_CTRL_OEOVER((curr >> 12u) & 0b11u);
INOVER = IO_BANK0_GPIO17_CTRL_INOVER((curr >> 16u) & 0b11u);
IRQOVER = IO_BANK0_GPIO17_CTRL_IRQOVER((curr >> 28u) & 0b11u);
}
inline void set_GPIO17_CTRL(IO_BANK0_GPIO17_CTRL_FUNCSEL FUNCSEL,
IO_BANK0_GPIO17_CTRL_OUTOVER OUTOVER,
IO_BANK0_GPIO17_CTRL_OEOVER OEOVER,
IO_BANK0_GPIO17_CTRL_INOVER INOVER,
IO_BANK0_GPIO17_CTRL_IRQOVER IRQOVER) volatile
{
uint32_t curr = GPIO17_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(FUNCSEL) & 0b11111u) << 0u;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(OUTOVER) & 0b11u) << 8u;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(OEOVER) & 0b11u) << 12u;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(INOVER) & 0b11u) << 16u;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(IRQOVER) & 0b11u) << 28u;
GPIO17_CTRL = curr;
}
inline bool get_GPIO18_STATUS_OUTFROMPERI() volatile
{
return GPIO18_STATUS & (1u << 8u);
}
inline bool get_GPIO18_STATUS_OUTTOPAD() volatile
{
return GPIO18_STATUS & (1u << 9u);
}
inline bool get_GPIO18_STATUS_OEFROMPERI() volatile
{
return GPIO18_STATUS & (1u << 12u);
}
inline bool get_GPIO18_STATUS_OETOPAD() volatile
{
return GPIO18_STATUS & (1u << 13u);
}
inline bool get_GPIO18_STATUS_INFROMPAD() volatile
{
return GPIO18_STATUS & (1u << 17u);
}
inline bool get_GPIO18_STATUS_INTOPERI() volatile
{
return GPIO18_STATUS & (1u << 19u);
}
inline bool get_GPIO18_STATUS_IRQFROMPAD() volatile
{
return GPIO18_STATUS & (1u << 24u);
}
inline bool get_GPIO18_STATUS_IRQTOPROC() volatile
{
return GPIO18_STATUS & (1u << 26u);
}
inline void get_GPIO18_STATUS(bool &OUTFROMPERI, bool &OUTTOPAD,
bool &OEFROMPERI, bool &OETOPAD,
bool &INFROMPAD, bool &INTOPERI,
bool &IRQFROMPAD, bool &IRQTOPROC) volatile
{
uint32_t curr = GPIO18_STATUS;
OUTFROMPERI = curr & (1u << 8u);
OUTTOPAD = curr & (1u << 9u);
OEFROMPERI = curr & (1u << 12u);
OETOPAD = curr & (1u << 13u);
INFROMPAD = curr & (1u << 17u);
INTOPERI = curr & (1u << 19u);
IRQFROMPAD = curr & (1u << 24u);
IRQTOPROC = curr & (1u << 26u);
}
inline IO_BANK0_GPIO18_CTRL_FUNCSEL get_GPIO18_CTRL_FUNCSEL() volatile
{
return IO_BANK0_GPIO18_CTRL_FUNCSEL((GPIO18_CTRL >> 0u) & 0b11111u);
}
inline void set_GPIO18_CTRL_FUNCSEL(
IO_BANK0_GPIO18_CTRL_FUNCSEL value) volatile
{
uint32_t curr = GPIO18_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(value) & 0b11111u) << 0u;
GPIO18_CTRL = curr;
}
inline IO_BANK0_GPIO18_CTRL_OUTOVER get_GPIO18_CTRL_OUTOVER() volatile
{
return IO_BANK0_GPIO18_CTRL_OUTOVER((GPIO18_CTRL >> 8u) & 0b11u);
}
inline void set_GPIO18_CTRL_OUTOVER(
IO_BANK0_GPIO18_CTRL_OUTOVER value) volatile
{
uint32_t curr = GPIO18_CTRL;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(value) & 0b11u) << 8u;
GPIO18_CTRL = curr;
}
inline IO_BANK0_GPIO18_CTRL_OEOVER get_GPIO18_CTRL_OEOVER() volatile
{
return IO_BANK0_GPIO18_CTRL_OEOVER((GPIO18_CTRL >> 12u) & 0b11u);
}
inline void set_GPIO18_CTRL_OEOVER(
IO_BANK0_GPIO18_CTRL_OEOVER value) volatile
{
uint32_t curr = GPIO18_CTRL;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(value) & 0b11u) << 12u;
GPIO18_CTRL = curr;
}
inline IO_BANK0_GPIO18_CTRL_INOVER get_GPIO18_CTRL_INOVER() volatile
{
return IO_BANK0_GPIO18_CTRL_INOVER((GPIO18_CTRL >> 16u) & 0b11u);
}
inline void set_GPIO18_CTRL_INOVER(
IO_BANK0_GPIO18_CTRL_INOVER value) volatile
{
uint32_t curr = GPIO18_CTRL;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(value) & 0b11u) << 16u;
GPIO18_CTRL = curr;
}
inline IO_BANK0_GPIO18_CTRL_IRQOVER get_GPIO18_CTRL_IRQOVER() volatile
{
return IO_BANK0_GPIO18_CTRL_IRQOVER((GPIO18_CTRL >> 28u) & 0b11u);
}
inline void set_GPIO18_CTRL_IRQOVER(
IO_BANK0_GPIO18_CTRL_IRQOVER value) volatile
{
uint32_t curr = GPIO18_CTRL;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(value) & 0b11u) << 28u;
GPIO18_CTRL = curr;
}
inline void get_GPIO18_CTRL(IO_BANK0_GPIO18_CTRL_FUNCSEL &FUNCSEL,
IO_BANK0_GPIO18_CTRL_OUTOVER &OUTOVER,
IO_BANK0_GPIO18_CTRL_OEOVER &OEOVER,
IO_BANK0_GPIO18_CTRL_INOVER &INOVER,
IO_BANK0_GPIO18_CTRL_IRQOVER &IRQOVER) volatile
{
uint32_t curr = GPIO18_CTRL;
FUNCSEL = IO_BANK0_GPIO18_CTRL_FUNCSEL((curr >> 0u) & 0b11111u);
OUTOVER = IO_BANK0_GPIO18_CTRL_OUTOVER((curr >> 8u) & 0b11u);
OEOVER = IO_BANK0_GPIO18_CTRL_OEOVER((curr >> 12u) & 0b11u);
INOVER = IO_BANK0_GPIO18_CTRL_INOVER((curr >> 16u) & 0b11u);
IRQOVER = IO_BANK0_GPIO18_CTRL_IRQOVER((curr >> 28u) & 0b11u);
}
inline void set_GPIO18_CTRL(IO_BANK0_GPIO18_CTRL_FUNCSEL FUNCSEL,
IO_BANK0_GPIO18_CTRL_OUTOVER OUTOVER,
IO_BANK0_GPIO18_CTRL_OEOVER OEOVER,
IO_BANK0_GPIO18_CTRL_INOVER INOVER,
IO_BANK0_GPIO18_CTRL_IRQOVER IRQOVER) volatile
{
uint32_t curr = GPIO18_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(FUNCSEL) & 0b11111u) << 0u;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(OUTOVER) & 0b11u) << 8u;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(OEOVER) & 0b11u) << 12u;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(INOVER) & 0b11u) << 16u;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(IRQOVER) & 0b11u) << 28u;
GPIO18_CTRL = curr;
}
inline bool get_GPIO19_STATUS_OUTFROMPERI() volatile
{
return GPIO19_STATUS & (1u << 8u);
}
inline bool get_GPIO19_STATUS_OUTTOPAD() volatile
{
return GPIO19_STATUS & (1u << 9u);
}
inline bool get_GPIO19_STATUS_OEFROMPERI() volatile
{
return GPIO19_STATUS & (1u << 12u);
}
inline bool get_GPIO19_STATUS_OETOPAD() volatile
{
return GPIO19_STATUS & (1u << 13u);
}
inline bool get_GPIO19_STATUS_INFROMPAD() volatile
{
return GPIO19_STATUS & (1u << 17u);
}
inline bool get_GPIO19_STATUS_INTOPERI() volatile
{
return GPIO19_STATUS & (1u << 19u);
}
inline bool get_GPIO19_STATUS_IRQFROMPAD() volatile
{
return GPIO19_STATUS & (1u << 24u);
}
inline bool get_GPIO19_STATUS_IRQTOPROC() volatile
{
return GPIO19_STATUS & (1u << 26u);
}
inline void get_GPIO19_STATUS(bool &OUTFROMPERI, bool &OUTTOPAD,
bool &OEFROMPERI, bool &OETOPAD,
bool &INFROMPAD, bool &INTOPERI,
bool &IRQFROMPAD, bool &IRQTOPROC) volatile
{
uint32_t curr = GPIO19_STATUS;
OUTFROMPERI = curr & (1u << 8u);
OUTTOPAD = curr & (1u << 9u);
OEFROMPERI = curr & (1u << 12u);
OETOPAD = curr & (1u << 13u);
INFROMPAD = curr & (1u << 17u);
INTOPERI = curr & (1u << 19u);
IRQFROMPAD = curr & (1u << 24u);
IRQTOPROC = curr & (1u << 26u);
}
inline IO_BANK0_GPIO19_CTRL_FUNCSEL get_GPIO19_CTRL_FUNCSEL() volatile
{
return IO_BANK0_GPIO19_CTRL_FUNCSEL((GPIO19_CTRL >> 0u) & 0b11111u);
}
inline void set_GPIO19_CTRL_FUNCSEL(
IO_BANK0_GPIO19_CTRL_FUNCSEL value) volatile
{
uint32_t curr = GPIO19_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(value) & 0b11111u) << 0u;
GPIO19_CTRL = curr;
}
inline IO_BANK0_GPIO19_CTRL_OUTOVER get_GPIO19_CTRL_OUTOVER() volatile
{
return IO_BANK0_GPIO19_CTRL_OUTOVER((GPIO19_CTRL >> 8u) & 0b11u);
}
inline void set_GPIO19_CTRL_OUTOVER(
IO_BANK0_GPIO19_CTRL_OUTOVER value) volatile
{
uint32_t curr = GPIO19_CTRL;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(value) & 0b11u) << 8u;
GPIO19_CTRL = curr;
}
inline IO_BANK0_GPIO19_CTRL_OEOVER get_GPIO19_CTRL_OEOVER() volatile
{
return IO_BANK0_GPIO19_CTRL_OEOVER((GPIO19_CTRL >> 12u) & 0b11u);
}
inline void set_GPIO19_CTRL_OEOVER(
IO_BANK0_GPIO19_CTRL_OEOVER value) volatile
{
uint32_t curr = GPIO19_CTRL;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(value) & 0b11u) << 12u;
GPIO19_CTRL = curr;
}
inline IO_BANK0_GPIO19_CTRL_INOVER get_GPIO19_CTRL_INOVER() volatile
{
return IO_BANK0_GPIO19_CTRL_INOVER((GPIO19_CTRL >> 16u) & 0b11u);
}
inline void set_GPIO19_CTRL_INOVER(
IO_BANK0_GPIO19_CTRL_INOVER value) volatile
{
uint32_t curr = GPIO19_CTRL;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(value) & 0b11u) << 16u;
GPIO19_CTRL = curr;
}
inline IO_BANK0_GPIO19_CTRL_IRQOVER get_GPIO19_CTRL_IRQOVER() volatile
{
return IO_BANK0_GPIO19_CTRL_IRQOVER((GPIO19_CTRL >> 28u) & 0b11u);
}
inline void set_GPIO19_CTRL_IRQOVER(
IO_BANK0_GPIO19_CTRL_IRQOVER value) volatile
{
uint32_t curr = GPIO19_CTRL;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(value) & 0b11u) << 28u;
GPIO19_CTRL = curr;
}
inline void get_GPIO19_CTRL(IO_BANK0_GPIO19_CTRL_FUNCSEL &FUNCSEL,
IO_BANK0_GPIO19_CTRL_OUTOVER &OUTOVER,
IO_BANK0_GPIO19_CTRL_OEOVER &OEOVER,
IO_BANK0_GPIO19_CTRL_INOVER &INOVER,
IO_BANK0_GPIO19_CTRL_IRQOVER &IRQOVER) volatile
{
uint32_t curr = GPIO19_CTRL;
FUNCSEL = IO_BANK0_GPIO19_CTRL_FUNCSEL((curr >> 0u) & 0b11111u);
OUTOVER = IO_BANK0_GPIO19_CTRL_OUTOVER((curr >> 8u) & 0b11u);
OEOVER = IO_BANK0_GPIO19_CTRL_OEOVER((curr >> 12u) & 0b11u);
INOVER = IO_BANK0_GPIO19_CTRL_INOVER((curr >> 16u) & 0b11u);
IRQOVER = IO_BANK0_GPIO19_CTRL_IRQOVER((curr >> 28u) & 0b11u);
}
inline void set_GPIO19_CTRL(IO_BANK0_GPIO19_CTRL_FUNCSEL FUNCSEL,
IO_BANK0_GPIO19_CTRL_OUTOVER OUTOVER,
IO_BANK0_GPIO19_CTRL_OEOVER OEOVER,
IO_BANK0_GPIO19_CTRL_INOVER INOVER,
IO_BANK0_GPIO19_CTRL_IRQOVER IRQOVER) volatile
{
uint32_t curr = GPIO19_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(FUNCSEL) & 0b11111u) << 0u;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(OUTOVER) & 0b11u) << 8u;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(OEOVER) & 0b11u) << 12u;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(INOVER) & 0b11u) << 16u;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(IRQOVER) & 0b11u) << 28u;
GPIO19_CTRL = curr;
}
inline bool get_GPIO20_STATUS_OUTFROMPERI() volatile
{
return GPIO20_STATUS & (1u << 8u);
}
inline bool get_GPIO20_STATUS_OUTTOPAD() volatile
{
return GPIO20_STATUS & (1u << 9u);
}
inline bool get_GPIO20_STATUS_OEFROMPERI() volatile
{
return GPIO20_STATUS & (1u << 12u);
}
inline bool get_GPIO20_STATUS_OETOPAD() volatile
{
return GPIO20_STATUS & (1u << 13u);
}
inline bool get_GPIO20_STATUS_INFROMPAD() volatile
{
return GPIO20_STATUS & (1u << 17u);
}
inline bool get_GPIO20_STATUS_INTOPERI() volatile
{
return GPIO20_STATUS & (1u << 19u);
}
inline bool get_GPIO20_STATUS_IRQFROMPAD() volatile
{
return GPIO20_STATUS & (1u << 24u);
}
inline bool get_GPIO20_STATUS_IRQTOPROC() volatile
{
return GPIO20_STATUS & (1u << 26u);
}
inline void get_GPIO20_STATUS(bool &OUTFROMPERI, bool &OUTTOPAD,
bool &OEFROMPERI, bool &OETOPAD,
bool &INFROMPAD, bool &INTOPERI,
bool &IRQFROMPAD, bool &IRQTOPROC) volatile
{
uint32_t curr = GPIO20_STATUS;
OUTFROMPERI = curr & (1u << 8u);
OUTTOPAD = curr & (1u << 9u);
OEFROMPERI = curr & (1u << 12u);
OETOPAD = curr & (1u << 13u);
INFROMPAD = curr & (1u << 17u);
INTOPERI = curr & (1u << 19u);
IRQFROMPAD = curr & (1u << 24u);
IRQTOPROC = curr & (1u << 26u);
}
inline IO_BANK0_GPIO20_CTRL_FUNCSEL get_GPIO20_CTRL_FUNCSEL() volatile
{
return IO_BANK0_GPIO20_CTRL_FUNCSEL((GPIO20_CTRL >> 0u) & 0b11111u);
}
inline void set_GPIO20_CTRL_FUNCSEL(
IO_BANK0_GPIO20_CTRL_FUNCSEL value) volatile
{
uint32_t curr = GPIO20_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(value) & 0b11111u) << 0u;
GPIO20_CTRL = curr;
}
inline IO_BANK0_GPIO20_CTRL_OUTOVER get_GPIO20_CTRL_OUTOVER() volatile
{
return IO_BANK0_GPIO20_CTRL_OUTOVER((GPIO20_CTRL >> 8u) & 0b11u);
}
inline void set_GPIO20_CTRL_OUTOVER(
IO_BANK0_GPIO20_CTRL_OUTOVER value) volatile
{
uint32_t curr = GPIO20_CTRL;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(value) & 0b11u) << 8u;
GPIO20_CTRL = curr;
}
inline IO_BANK0_GPIO20_CTRL_OEOVER get_GPIO20_CTRL_OEOVER() volatile
{
return IO_BANK0_GPIO20_CTRL_OEOVER((GPIO20_CTRL >> 12u) & 0b11u);
}
inline void set_GPIO20_CTRL_OEOVER(
IO_BANK0_GPIO20_CTRL_OEOVER value) volatile
{
uint32_t curr = GPIO20_CTRL;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(value) & 0b11u) << 12u;
GPIO20_CTRL = curr;
}
inline IO_BANK0_GPIO20_CTRL_INOVER get_GPIO20_CTRL_INOVER() volatile
{
return IO_BANK0_GPIO20_CTRL_INOVER((GPIO20_CTRL >> 16u) & 0b11u);
}
inline void set_GPIO20_CTRL_INOVER(
IO_BANK0_GPIO20_CTRL_INOVER value) volatile
{
uint32_t curr = GPIO20_CTRL;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(value) & 0b11u) << 16u;
GPIO20_CTRL = curr;
}
inline IO_BANK0_GPIO20_CTRL_IRQOVER get_GPIO20_CTRL_IRQOVER() volatile
{
return IO_BANK0_GPIO20_CTRL_IRQOVER((GPIO20_CTRL >> 28u) & 0b11u);
}
inline void set_GPIO20_CTRL_IRQOVER(
IO_BANK0_GPIO20_CTRL_IRQOVER value) volatile
{
uint32_t curr = GPIO20_CTRL;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(value) & 0b11u) << 28u;
GPIO20_CTRL = curr;
}
inline void get_GPIO20_CTRL(IO_BANK0_GPIO20_CTRL_FUNCSEL &FUNCSEL,
IO_BANK0_GPIO20_CTRL_OUTOVER &OUTOVER,
IO_BANK0_GPIO20_CTRL_OEOVER &OEOVER,
IO_BANK0_GPIO20_CTRL_INOVER &INOVER,
IO_BANK0_GPIO20_CTRL_IRQOVER &IRQOVER) volatile
{
uint32_t curr = GPIO20_CTRL;
FUNCSEL = IO_BANK0_GPIO20_CTRL_FUNCSEL((curr >> 0u) & 0b11111u);
OUTOVER = IO_BANK0_GPIO20_CTRL_OUTOVER((curr >> 8u) & 0b11u);
OEOVER = IO_BANK0_GPIO20_CTRL_OEOVER((curr >> 12u) & 0b11u);
INOVER = IO_BANK0_GPIO20_CTRL_INOVER((curr >> 16u) & 0b11u);
IRQOVER = IO_BANK0_GPIO20_CTRL_IRQOVER((curr >> 28u) & 0b11u);
}
inline void set_GPIO20_CTRL(IO_BANK0_GPIO20_CTRL_FUNCSEL FUNCSEL,
IO_BANK0_GPIO20_CTRL_OUTOVER OUTOVER,
IO_BANK0_GPIO20_CTRL_OEOVER OEOVER,
IO_BANK0_GPIO20_CTRL_INOVER INOVER,
IO_BANK0_GPIO20_CTRL_IRQOVER IRQOVER) volatile
{
uint32_t curr = GPIO20_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(FUNCSEL) & 0b11111u) << 0u;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(OUTOVER) & 0b11u) << 8u;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(OEOVER) & 0b11u) << 12u;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(INOVER) & 0b11u) << 16u;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(IRQOVER) & 0b11u) << 28u;
GPIO20_CTRL = curr;
}
inline bool get_GPIO21_STATUS_OUTFROMPERI() volatile
{
return GPIO21_STATUS & (1u << 8u);
}
inline bool get_GPIO21_STATUS_OUTTOPAD() volatile
{
return GPIO21_STATUS & (1u << 9u);
}
inline bool get_GPIO21_STATUS_OEFROMPERI() volatile
{
return GPIO21_STATUS & (1u << 12u);
}
inline bool get_GPIO21_STATUS_OETOPAD() volatile
{
return GPIO21_STATUS & (1u << 13u);
}
inline bool get_GPIO21_STATUS_INFROMPAD() volatile
{
return GPIO21_STATUS & (1u << 17u);
}
inline bool get_GPIO21_STATUS_INTOPERI() volatile
{
return GPIO21_STATUS & (1u << 19u);
}
inline bool get_GPIO21_STATUS_IRQFROMPAD() volatile
{
return GPIO21_STATUS & (1u << 24u);
}
inline bool get_GPIO21_STATUS_IRQTOPROC() volatile
{
return GPIO21_STATUS & (1u << 26u);
}
inline void get_GPIO21_STATUS(bool &OUTFROMPERI, bool &OUTTOPAD,
bool &OEFROMPERI, bool &OETOPAD,
bool &INFROMPAD, bool &INTOPERI,
bool &IRQFROMPAD, bool &IRQTOPROC) volatile
{
uint32_t curr = GPIO21_STATUS;
OUTFROMPERI = curr & (1u << 8u);
OUTTOPAD = curr & (1u << 9u);
OEFROMPERI = curr & (1u << 12u);
OETOPAD = curr & (1u << 13u);
INFROMPAD = curr & (1u << 17u);
INTOPERI = curr & (1u << 19u);
IRQFROMPAD = curr & (1u << 24u);
IRQTOPROC = curr & (1u << 26u);
}
inline IO_BANK0_GPIO21_CTRL_FUNCSEL get_GPIO21_CTRL_FUNCSEL() volatile
{
return IO_BANK0_GPIO21_CTRL_FUNCSEL((GPIO21_CTRL >> 0u) & 0b11111u);
}
inline void set_GPIO21_CTRL_FUNCSEL(
IO_BANK0_GPIO21_CTRL_FUNCSEL value) volatile
{
uint32_t curr = GPIO21_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(value) & 0b11111u) << 0u;
GPIO21_CTRL = curr;
}
inline IO_BANK0_GPIO21_CTRL_OUTOVER get_GPIO21_CTRL_OUTOVER() volatile
{
return IO_BANK0_GPIO21_CTRL_OUTOVER((GPIO21_CTRL >> 8u) & 0b11u);
}
inline void set_GPIO21_CTRL_OUTOVER(
IO_BANK0_GPIO21_CTRL_OUTOVER value) volatile
{
uint32_t curr = GPIO21_CTRL;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(value) & 0b11u) << 8u;
GPIO21_CTRL = curr;
}
inline IO_BANK0_GPIO21_CTRL_OEOVER get_GPIO21_CTRL_OEOVER() volatile
{
return IO_BANK0_GPIO21_CTRL_OEOVER((GPIO21_CTRL >> 12u) & 0b11u);
}
inline void set_GPIO21_CTRL_OEOVER(
IO_BANK0_GPIO21_CTRL_OEOVER value) volatile
{
uint32_t curr = GPIO21_CTRL;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(value) & 0b11u) << 12u;
GPIO21_CTRL = curr;
}
inline IO_BANK0_GPIO21_CTRL_INOVER get_GPIO21_CTRL_INOVER() volatile
{
return IO_BANK0_GPIO21_CTRL_INOVER((GPIO21_CTRL >> 16u) & 0b11u);
}
inline void set_GPIO21_CTRL_INOVER(
IO_BANK0_GPIO21_CTRL_INOVER value) volatile
{
uint32_t curr = GPIO21_CTRL;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(value) & 0b11u) << 16u;
GPIO21_CTRL = curr;
}
inline IO_BANK0_GPIO21_CTRL_IRQOVER get_GPIO21_CTRL_IRQOVER() volatile
{
return IO_BANK0_GPIO21_CTRL_IRQOVER((GPIO21_CTRL >> 28u) & 0b11u);
}
inline void set_GPIO21_CTRL_IRQOVER(
IO_BANK0_GPIO21_CTRL_IRQOVER value) volatile
{
uint32_t curr = GPIO21_CTRL;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(value) & 0b11u) << 28u;
GPIO21_CTRL = curr;
}
inline void get_GPIO21_CTRL(IO_BANK0_GPIO21_CTRL_FUNCSEL &FUNCSEL,
IO_BANK0_GPIO21_CTRL_OUTOVER &OUTOVER,
IO_BANK0_GPIO21_CTRL_OEOVER &OEOVER,
IO_BANK0_GPIO21_CTRL_INOVER &INOVER,
IO_BANK0_GPIO21_CTRL_IRQOVER &IRQOVER) volatile
{
uint32_t curr = GPIO21_CTRL;
FUNCSEL = IO_BANK0_GPIO21_CTRL_FUNCSEL((curr >> 0u) & 0b11111u);
OUTOVER = IO_BANK0_GPIO21_CTRL_OUTOVER((curr >> 8u) & 0b11u);
OEOVER = IO_BANK0_GPIO21_CTRL_OEOVER((curr >> 12u) & 0b11u);
INOVER = IO_BANK0_GPIO21_CTRL_INOVER((curr >> 16u) & 0b11u);
IRQOVER = IO_BANK0_GPIO21_CTRL_IRQOVER((curr >> 28u) & 0b11u);
}
inline void set_GPIO21_CTRL(IO_BANK0_GPIO21_CTRL_FUNCSEL FUNCSEL,
IO_BANK0_GPIO21_CTRL_OUTOVER OUTOVER,
IO_BANK0_GPIO21_CTRL_OEOVER OEOVER,
IO_BANK0_GPIO21_CTRL_INOVER INOVER,
IO_BANK0_GPIO21_CTRL_IRQOVER IRQOVER) volatile
{
uint32_t curr = GPIO21_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(FUNCSEL) & 0b11111u) << 0u;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(OUTOVER) & 0b11u) << 8u;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(OEOVER) & 0b11u) << 12u;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(INOVER) & 0b11u) << 16u;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(IRQOVER) & 0b11u) << 28u;
GPIO21_CTRL = curr;
}
inline bool get_GPIO22_STATUS_OUTFROMPERI() volatile
{
return GPIO22_STATUS & (1u << 8u);
}
inline bool get_GPIO22_STATUS_OUTTOPAD() volatile
{
return GPIO22_STATUS & (1u << 9u);
}
inline bool get_GPIO22_STATUS_OEFROMPERI() volatile
{
return GPIO22_STATUS & (1u << 12u);
}
inline bool get_GPIO22_STATUS_OETOPAD() volatile
{
return GPIO22_STATUS & (1u << 13u);
}
inline bool get_GPIO22_STATUS_INFROMPAD() volatile
{
return GPIO22_STATUS & (1u << 17u);
}
inline bool get_GPIO22_STATUS_INTOPERI() volatile
{
return GPIO22_STATUS & (1u << 19u);
}
inline bool get_GPIO22_STATUS_IRQFROMPAD() volatile
{
return GPIO22_STATUS & (1u << 24u);
}
inline bool get_GPIO22_STATUS_IRQTOPROC() volatile
{
return GPIO22_STATUS & (1u << 26u);
}
inline void get_GPIO22_STATUS(bool &OUTFROMPERI, bool &OUTTOPAD,
bool &OEFROMPERI, bool &OETOPAD,
bool &INFROMPAD, bool &INTOPERI,
bool &IRQFROMPAD, bool &IRQTOPROC) volatile
{
uint32_t curr = GPIO22_STATUS;
OUTFROMPERI = curr & (1u << 8u);
OUTTOPAD = curr & (1u << 9u);
OEFROMPERI = curr & (1u << 12u);
OETOPAD = curr & (1u << 13u);
INFROMPAD = curr & (1u << 17u);
INTOPERI = curr & (1u << 19u);
IRQFROMPAD = curr & (1u << 24u);
IRQTOPROC = curr & (1u << 26u);
}
inline IO_BANK0_GPIO22_CTRL_FUNCSEL get_GPIO22_CTRL_FUNCSEL() volatile
{
return IO_BANK0_GPIO22_CTRL_FUNCSEL((GPIO22_CTRL >> 0u) & 0b11111u);
}
inline void set_GPIO22_CTRL_FUNCSEL(
IO_BANK0_GPIO22_CTRL_FUNCSEL value) volatile
{
uint32_t curr = GPIO22_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(value) & 0b11111u) << 0u;
GPIO22_CTRL = curr;
}
inline IO_BANK0_GPIO22_CTRL_OUTOVER get_GPIO22_CTRL_OUTOVER() volatile
{
return IO_BANK0_GPIO22_CTRL_OUTOVER((GPIO22_CTRL >> 8u) & 0b11u);
}
inline void set_GPIO22_CTRL_OUTOVER(
IO_BANK0_GPIO22_CTRL_OUTOVER value) volatile
{
uint32_t curr = GPIO22_CTRL;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(value) & 0b11u) << 8u;
GPIO22_CTRL = curr;
}
inline IO_BANK0_GPIO22_CTRL_OEOVER get_GPIO22_CTRL_OEOVER() volatile
{
return IO_BANK0_GPIO22_CTRL_OEOVER((GPIO22_CTRL >> 12u) & 0b11u);
}
inline void set_GPIO22_CTRL_OEOVER(
IO_BANK0_GPIO22_CTRL_OEOVER value) volatile
{
uint32_t curr = GPIO22_CTRL;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(value) & 0b11u) << 12u;
GPIO22_CTRL = curr;
}
inline IO_BANK0_GPIO22_CTRL_INOVER get_GPIO22_CTRL_INOVER() volatile
{
return IO_BANK0_GPIO22_CTRL_INOVER((GPIO22_CTRL >> 16u) & 0b11u);
}
inline void set_GPIO22_CTRL_INOVER(
IO_BANK0_GPIO22_CTRL_INOVER value) volatile
{
uint32_t curr = GPIO22_CTRL;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(value) & 0b11u) << 16u;
GPIO22_CTRL = curr;
}
inline IO_BANK0_GPIO22_CTRL_IRQOVER get_GPIO22_CTRL_IRQOVER() volatile
{
return IO_BANK0_GPIO22_CTRL_IRQOVER((GPIO22_CTRL >> 28u) & 0b11u);
}
inline void set_GPIO22_CTRL_IRQOVER(
IO_BANK0_GPIO22_CTRL_IRQOVER value) volatile
{
uint32_t curr = GPIO22_CTRL;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(value) & 0b11u) << 28u;
GPIO22_CTRL = curr;
}
inline void get_GPIO22_CTRL(IO_BANK0_GPIO22_CTRL_FUNCSEL &FUNCSEL,
IO_BANK0_GPIO22_CTRL_OUTOVER &OUTOVER,
IO_BANK0_GPIO22_CTRL_OEOVER &OEOVER,
IO_BANK0_GPIO22_CTRL_INOVER &INOVER,
IO_BANK0_GPIO22_CTRL_IRQOVER &IRQOVER) volatile
{
uint32_t curr = GPIO22_CTRL;
FUNCSEL = IO_BANK0_GPIO22_CTRL_FUNCSEL((curr >> 0u) & 0b11111u);
OUTOVER = IO_BANK0_GPIO22_CTRL_OUTOVER((curr >> 8u) & 0b11u);
OEOVER = IO_BANK0_GPIO22_CTRL_OEOVER((curr >> 12u) & 0b11u);
INOVER = IO_BANK0_GPIO22_CTRL_INOVER((curr >> 16u) & 0b11u);
IRQOVER = IO_BANK0_GPIO22_CTRL_IRQOVER((curr >> 28u) & 0b11u);
}
inline void set_GPIO22_CTRL(IO_BANK0_GPIO22_CTRL_FUNCSEL FUNCSEL,
IO_BANK0_GPIO22_CTRL_OUTOVER OUTOVER,
IO_BANK0_GPIO22_CTRL_OEOVER OEOVER,
IO_BANK0_GPIO22_CTRL_INOVER INOVER,
IO_BANK0_GPIO22_CTRL_IRQOVER IRQOVER) volatile
{
uint32_t curr = GPIO22_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(FUNCSEL) & 0b11111u) << 0u;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(OUTOVER) & 0b11u) << 8u;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(OEOVER) & 0b11u) << 12u;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(INOVER) & 0b11u) << 16u;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(IRQOVER) & 0b11u) << 28u;
GPIO22_CTRL = curr;
}
inline bool get_GPIO23_STATUS_OUTFROMPERI() volatile
{
return GPIO23_STATUS & (1u << 8u);
}
inline bool get_GPIO23_STATUS_OUTTOPAD() volatile
{
return GPIO23_STATUS & (1u << 9u);
}
inline bool get_GPIO23_STATUS_OEFROMPERI() volatile
{
return GPIO23_STATUS & (1u << 12u);
}
inline bool get_GPIO23_STATUS_OETOPAD() volatile
{
return GPIO23_STATUS & (1u << 13u);
}
inline bool get_GPIO23_STATUS_INFROMPAD() volatile
{
return GPIO23_STATUS & (1u << 17u);
}
inline bool get_GPIO23_STATUS_INTOPERI() volatile
{
return GPIO23_STATUS & (1u << 19u);
}
inline bool get_GPIO23_STATUS_IRQFROMPAD() volatile
{
return GPIO23_STATUS & (1u << 24u);
}
inline bool get_GPIO23_STATUS_IRQTOPROC() volatile
{
return GPIO23_STATUS & (1u << 26u);
}
inline void get_GPIO23_STATUS(bool &OUTFROMPERI, bool &OUTTOPAD,
bool &OEFROMPERI, bool &OETOPAD,
bool &INFROMPAD, bool &INTOPERI,
bool &IRQFROMPAD, bool &IRQTOPROC) volatile
{
uint32_t curr = GPIO23_STATUS;
OUTFROMPERI = curr & (1u << 8u);
OUTTOPAD = curr & (1u << 9u);
OEFROMPERI = curr & (1u << 12u);
OETOPAD = curr & (1u << 13u);
INFROMPAD = curr & (1u << 17u);
INTOPERI = curr & (1u << 19u);
IRQFROMPAD = curr & (1u << 24u);
IRQTOPROC = curr & (1u << 26u);
}
inline IO_BANK0_GPIO23_CTRL_FUNCSEL get_GPIO23_CTRL_FUNCSEL() volatile
{
return IO_BANK0_GPIO23_CTRL_FUNCSEL((GPIO23_CTRL >> 0u) & 0b11111u);
}
inline void set_GPIO23_CTRL_FUNCSEL(
IO_BANK0_GPIO23_CTRL_FUNCSEL value) volatile
{
uint32_t curr = GPIO23_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(value) & 0b11111u) << 0u;
GPIO23_CTRL = curr;
}
inline IO_BANK0_GPIO23_CTRL_OUTOVER get_GPIO23_CTRL_OUTOVER() volatile
{
return IO_BANK0_GPIO23_CTRL_OUTOVER((GPIO23_CTRL >> 8u) & 0b11u);
}
inline void set_GPIO23_CTRL_OUTOVER(
IO_BANK0_GPIO23_CTRL_OUTOVER value) volatile
{
uint32_t curr = GPIO23_CTRL;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(value) & 0b11u) << 8u;
GPIO23_CTRL = curr;
}
inline IO_BANK0_GPIO23_CTRL_OEOVER get_GPIO23_CTRL_OEOVER() volatile
{
return IO_BANK0_GPIO23_CTRL_OEOVER((GPIO23_CTRL >> 12u) & 0b11u);
}
inline void set_GPIO23_CTRL_OEOVER(
IO_BANK0_GPIO23_CTRL_OEOVER value) volatile
{
uint32_t curr = GPIO23_CTRL;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(value) & 0b11u) << 12u;
GPIO23_CTRL = curr;
}
inline IO_BANK0_GPIO23_CTRL_INOVER get_GPIO23_CTRL_INOVER() volatile
{
return IO_BANK0_GPIO23_CTRL_INOVER((GPIO23_CTRL >> 16u) & 0b11u);
}
inline void set_GPIO23_CTRL_INOVER(
IO_BANK0_GPIO23_CTRL_INOVER value) volatile
{
uint32_t curr = GPIO23_CTRL;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(value) & 0b11u) << 16u;
GPIO23_CTRL = curr;
}
inline IO_BANK0_GPIO23_CTRL_IRQOVER get_GPIO23_CTRL_IRQOVER() volatile
{
return IO_BANK0_GPIO23_CTRL_IRQOVER((GPIO23_CTRL >> 28u) & 0b11u);
}
inline void set_GPIO23_CTRL_IRQOVER(
IO_BANK0_GPIO23_CTRL_IRQOVER value) volatile
{
uint32_t curr = GPIO23_CTRL;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(value) & 0b11u) << 28u;
GPIO23_CTRL = curr;
}
inline void get_GPIO23_CTRL(IO_BANK0_GPIO23_CTRL_FUNCSEL &FUNCSEL,
IO_BANK0_GPIO23_CTRL_OUTOVER &OUTOVER,
IO_BANK0_GPIO23_CTRL_OEOVER &OEOVER,
IO_BANK0_GPIO23_CTRL_INOVER &INOVER,
IO_BANK0_GPIO23_CTRL_IRQOVER &IRQOVER) volatile
{
uint32_t curr = GPIO23_CTRL;
FUNCSEL = IO_BANK0_GPIO23_CTRL_FUNCSEL((curr >> 0u) & 0b11111u);
OUTOVER = IO_BANK0_GPIO23_CTRL_OUTOVER((curr >> 8u) & 0b11u);
OEOVER = IO_BANK0_GPIO23_CTRL_OEOVER((curr >> 12u) & 0b11u);
INOVER = IO_BANK0_GPIO23_CTRL_INOVER((curr >> 16u) & 0b11u);
IRQOVER = IO_BANK0_GPIO23_CTRL_IRQOVER((curr >> 28u) & 0b11u);
}
inline void set_GPIO23_CTRL(IO_BANK0_GPIO23_CTRL_FUNCSEL FUNCSEL,
IO_BANK0_GPIO23_CTRL_OUTOVER OUTOVER,
IO_BANK0_GPIO23_CTRL_OEOVER OEOVER,
IO_BANK0_GPIO23_CTRL_INOVER INOVER,
IO_BANK0_GPIO23_CTRL_IRQOVER IRQOVER) volatile
{
uint32_t curr = GPIO23_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(FUNCSEL) & 0b11111u) << 0u;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(OUTOVER) & 0b11u) << 8u;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(OEOVER) & 0b11u) << 12u;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(INOVER) & 0b11u) << 16u;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(IRQOVER) & 0b11u) << 28u;
GPIO23_CTRL = curr;
}
inline bool get_GPIO24_STATUS_OUTFROMPERI() volatile
{
return GPIO24_STATUS & (1u << 8u);
}
inline bool get_GPIO24_STATUS_OUTTOPAD() volatile
{
return GPIO24_STATUS & (1u << 9u);
}
inline bool get_GPIO24_STATUS_OEFROMPERI() volatile
{
return GPIO24_STATUS & (1u << 12u);
}
inline bool get_GPIO24_STATUS_OETOPAD() volatile
{
return GPIO24_STATUS & (1u << 13u);
}
inline bool get_GPIO24_STATUS_INFROMPAD() volatile
{
return GPIO24_STATUS & (1u << 17u);
}
inline bool get_GPIO24_STATUS_INTOPERI() volatile
{
return GPIO24_STATUS & (1u << 19u);
}
inline bool get_GPIO24_STATUS_IRQFROMPAD() volatile
{
return GPIO24_STATUS & (1u << 24u);
}
inline bool get_GPIO24_STATUS_IRQTOPROC() volatile
{
return GPIO24_STATUS & (1u << 26u);
}
inline void get_GPIO24_STATUS(bool &OUTFROMPERI, bool &OUTTOPAD,
bool &OEFROMPERI, bool &OETOPAD,
bool &INFROMPAD, bool &INTOPERI,
bool &IRQFROMPAD, bool &IRQTOPROC) volatile
{
uint32_t curr = GPIO24_STATUS;
OUTFROMPERI = curr & (1u << 8u);
OUTTOPAD = curr & (1u << 9u);
OEFROMPERI = curr & (1u << 12u);
OETOPAD = curr & (1u << 13u);
INFROMPAD = curr & (1u << 17u);
INTOPERI = curr & (1u << 19u);
IRQFROMPAD = curr & (1u << 24u);
IRQTOPROC = curr & (1u << 26u);
}
inline IO_BANK0_GPIO24_CTRL_FUNCSEL get_GPIO24_CTRL_FUNCSEL() volatile
{
return IO_BANK0_GPIO24_CTRL_FUNCSEL((GPIO24_CTRL >> 0u) & 0b11111u);
}
inline void set_GPIO24_CTRL_FUNCSEL(
IO_BANK0_GPIO24_CTRL_FUNCSEL value) volatile
{
uint32_t curr = GPIO24_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(value) & 0b11111u) << 0u;
GPIO24_CTRL = curr;
}
inline IO_BANK0_GPIO24_CTRL_OUTOVER get_GPIO24_CTRL_OUTOVER() volatile
{
return IO_BANK0_GPIO24_CTRL_OUTOVER((GPIO24_CTRL >> 8u) & 0b11u);
}
inline void set_GPIO24_CTRL_OUTOVER(
IO_BANK0_GPIO24_CTRL_OUTOVER value) volatile
{
uint32_t curr = GPIO24_CTRL;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(value) & 0b11u) << 8u;
GPIO24_CTRL = curr;
}
inline IO_BANK0_GPIO24_CTRL_OEOVER get_GPIO24_CTRL_OEOVER() volatile
{
return IO_BANK0_GPIO24_CTRL_OEOVER((GPIO24_CTRL >> 12u) & 0b11u);
}
inline void set_GPIO24_CTRL_OEOVER(
IO_BANK0_GPIO24_CTRL_OEOVER value) volatile
{
uint32_t curr = GPIO24_CTRL;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(value) & 0b11u) << 12u;
GPIO24_CTRL = curr;
}
inline IO_BANK0_GPIO24_CTRL_INOVER get_GPIO24_CTRL_INOVER() volatile
{
return IO_BANK0_GPIO24_CTRL_INOVER((GPIO24_CTRL >> 16u) & 0b11u);
}
inline void set_GPIO24_CTRL_INOVER(
IO_BANK0_GPIO24_CTRL_INOVER value) volatile
{
uint32_t curr = GPIO24_CTRL;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(value) & 0b11u) << 16u;
GPIO24_CTRL = curr;
}
inline IO_BANK0_GPIO24_CTRL_IRQOVER get_GPIO24_CTRL_IRQOVER() volatile
{
return IO_BANK0_GPIO24_CTRL_IRQOVER((GPIO24_CTRL >> 28u) & 0b11u);
}
inline void set_GPIO24_CTRL_IRQOVER(
IO_BANK0_GPIO24_CTRL_IRQOVER value) volatile
{
uint32_t curr = GPIO24_CTRL;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(value) & 0b11u) << 28u;
GPIO24_CTRL = curr;
}
inline void get_GPIO24_CTRL(IO_BANK0_GPIO24_CTRL_FUNCSEL &FUNCSEL,
IO_BANK0_GPIO24_CTRL_OUTOVER &OUTOVER,
IO_BANK0_GPIO24_CTRL_OEOVER &OEOVER,
IO_BANK0_GPIO24_CTRL_INOVER &INOVER,
IO_BANK0_GPIO24_CTRL_IRQOVER &IRQOVER) volatile
{
uint32_t curr = GPIO24_CTRL;
FUNCSEL = IO_BANK0_GPIO24_CTRL_FUNCSEL((curr >> 0u) & 0b11111u);
OUTOVER = IO_BANK0_GPIO24_CTRL_OUTOVER((curr >> 8u) & 0b11u);
OEOVER = IO_BANK0_GPIO24_CTRL_OEOVER((curr >> 12u) & 0b11u);
INOVER = IO_BANK0_GPIO24_CTRL_INOVER((curr >> 16u) & 0b11u);
IRQOVER = IO_BANK0_GPIO24_CTRL_IRQOVER((curr >> 28u) & 0b11u);
}
inline void set_GPIO24_CTRL(IO_BANK0_GPIO24_CTRL_FUNCSEL FUNCSEL,
IO_BANK0_GPIO24_CTRL_OUTOVER OUTOVER,
IO_BANK0_GPIO24_CTRL_OEOVER OEOVER,
IO_BANK0_GPIO24_CTRL_INOVER INOVER,
IO_BANK0_GPIO24_CTRL_IRQOVER IRQOVER) volatile
{
uint32_t curr = GPIO24_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(FUNCSEL) & 0b11111u) << 0u;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(OUTOVER) & 0b11u) << 8u;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(OEOVER) & 0b11u) << 12u;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(INOVER) & 0b11u) << 16u;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(IRQOVER) & 0b11u) << 28u;
GPIO24_CTRL = curr;
}
inline bool get_GPIO25_STATUS_OUTFROMPERI() volatile
{
return GPIO25_STATUS & (1u << 8u);
}
inline bool get_GPIO25_STATUS_OUTTOPAD() volatile
{
return GPIO25_STATUS & (1u << 9u);
}
inline bool get_GPIO25_STATUS_OEFROMPERI() volatile
{
return GPIO25_STATUS & (1u << 12u);
}
inline bool get_GPIO25_STATUS_OETOPAD() volatile
{
return GPIO25_STATUS & (1u << 13u);
}
inline bool get_GPIO25_STATUS_INFROMPAD() volatile
{
return GPIO25_STATUS & (1u << 17u);
}
inline bool get_GPIO25_STATUS_INTOPERI() volatile
{
return GPIO25_STATUS & (1u << 19u);
}
inline bool get_GPIO25_STATUS_IRQFROMPAD() volatile
{
return GPIO25_STATUS & (1u << 24u);
}
inline bool get_GPIO25_STATUS_IRQTOPROC() volatile
{
return GPIO25_STATUS & (1u << 26u);
}
inline void get_GPIO25_STATUS(bool &OUTFROMPERI, bool &OUTTOPAD,
bool &OEFROMPERI, bool &OETOPAD,
bool &INFROMPAD, bool &INTOPERI,
bool &IRQFROMPAD, bool &IRQTOPROC) volatile
{
uint32_t curr = GPIO25_STATUS;
OUTFROMPERI = curr & (1u << 8u);
OUTTOPAD = curr & (1u << 9u);
OEFROMPERI = curr & (1u << 12u);
OETOPAD = curr & (1u << 13u);
INFROMPAD = curr & (1u << 17u);
INTOPERI = curr & (1u << 19u);
IRQFROMPAD = curr & (1u << 24u);
IRQTOPROC = curr & (1u << 26u);
}
inline IO_BANK0_GPIO25_CTRL_FUNCSEL get_GPIO25_CTRL_FUNCSEL() volatile
{
return IO_BANK0_GPIO25_CTRL_FUNCSEL((GPIO25_CTRL >> 0u) & 0b11111u);
}
inline void set_GPIO25_CTRL_FUNCSEL(
IO_BANK0_GPIO25_CTRL_FUNCSEL value) volatile
{
uint32_t curr = GPIO25_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(value) & 0b11111u) << 0u;
GPIO25_CTRL = curr;
}
inline IO_BANK0_GPIO25_CTRL_OUTOVER get_GPIO25_CTRL_OUTOVER() volatile
{
return IO_BANK0_GPIO25_CTRL_OUTOVER((GPIO25_CTRL >> 8u) & 0b11u);
}
inline void set_GPIO25_CTRL_OUTOVER(
IO_BANK0_GPIO25_CTRL_OUTOVER value) volatile
{
uint32_t curr = GPIO25_CTRL;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(value) & 0b11u) << 8u;
GPIO25_CTRL = curr;
}
inline IO_BANK0_GPIO25_CTRL_OEOVER get_GPIO25_CTRL_OEOVER() volatile
{
return IO_BANK0_GPIO25_CTRL_OEOVER((GPIO25_CTRL >> 12u) & 0b11u);
}
inline void set_GPIO25_CTRL_OEOVER(
IO_BANK0_GPIO25_CTRL_OEOVER value) volatile
{
uint32_t curr = GPIO25_CTRL;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(value) & 0b11u) << 12u;
GPIO25_CTRL = curr;
}
inline IO_BANK0_GPIO25_CTRL_INOVER get_GPIO25_CTRL_INOVER() volatile
{
return IO_BANK0_GPIO25_CTRL_INOVER((GPIO25_CTRL >> 16u) & 0b11u);
}
inline void set_GPIO25_CTRL_INOVER(
IO_BANK0_GPIO25_CTRL_INOVER value) volatile
{
uint32_t curr = GPIO25_CTRL;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(value) & 0b11u) << 16u;
GPIO25_CTRL = curr;
}
inline IO_BANK0_GPIO25_CTRL_IRQOVER get_GPIO25_CTRL_IRQOVER() volatile
{
return IO_BANK0_GPIO25_CTRL_IRQOVER((GPIO25_CTRL >> 28u) & 0b11u);
}
inline void set_GPIO25_CTRL_IRQOVER(
IO_BANK0_GPIO25_CTRL_IRQOVER value) volatile
{
uint32_t curr = GPIO25_CTRL;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(value) & 0b11u) << 28u;
GPIO25_CTRL = curr;
}
inline void get_GPIO25_CTRL(IO_BANK0_GPIO25_CTRL_FUNCSEL &FUNCSEL,
IO_BANK0_GPIO25_CTRL_OUTOVER &OUTOVER,
IO_BANK0_GPIO25_CTRL_OEOVER &OEOVER,
IO_BANK0_GPIO25_CTRL_INOVER &INOVER,
IO_BANK0_GPIO25_CTRL_IRQOVER &IRQOVER) volatile
{
uint32_t curr = GPIO25_CTRL;
FUNCSEL = IO_BANK0_GPIO25_CTRL_FUNCSEL((curr >> 0u) & 0b11111u);
OUTOVER = IO_BANK0_GPIO25_CTRL_OUTOVER((curr >> 8u) & 0b11u);
OEOVER = IO_BANK0_GPIO25_CTRL_OEOVER((curr >> 12u) & 0b11u);
INOVER = IO_BANK0_GPIO25_CTRL_INOVER((curr >> 16u) & 0b11u);
IRQOVER = IO_BANK0_GPIO25_CTRL_IRQOVER((curr >> 28u) & 0b11u);
}
inline void set_GPIO25_CTRL(IO_BANK0_GPIO25_CTRL_FUNCSEL FUNCSEL,
IO_BANK0_GPIO25_CTRL_OUTOVER OUTOVER,
IO_BANK0_GPIO25_CTRL_OEOVER OEOVER,
IO_BANK0_GPIO25_CTRL_INOVER INOVER,
IO_BANK0_GPIO25_CTRL_IRQOVER IRQOVER) volatile
{
uint32_t curr = GPIO25_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(FUNCSEL) & 0b11111u) << 0u;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(OUTOVER) & 0b11u) << 8u;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(OEOVER) & 0b11u) << 12u;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(INOVER) & 0b11u) << 16u;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(IRQOVER) & 0b11u) << 28u;
GPIO25_CTRL = curr;
}
inline bool get_GPIO26_STATUS_OUTFROMPERI() volatile
{
return GPIO26_STATUS & (1u << 8u);
}
inline bool get_GPIO26_STATUS_OUTTOPAD() volatile
{
return GPIO26_STATUS & (1u << 9u);
}
inline bool get_GPIO26_STATUS_OEFROMPERI() volatile
{
return GPIO26_STATUS & (1u << 12u);
}
inline bool get_GPIO26_STATUS_OETOPAD() volatile
{
return GPIO26_STATUS & (1u << 13u);
}
inline bool get_GPIO26_STATUS_INFROMPAD() volatile
{
return GPIO26_STATUS & (1u << 17u);
}
inline bool get_GPIO26_STATUS_INTOPERI() volatile
{
return GPIO26_STATUS & (1u << 19u);
}
inline bool get_GPIO26_STATUS_IRQFROMPAD() volatile
{
return GPIO26_STATUS & (1u << 24u);
}
inline bool get_GPIO26_STATUS_IRQTOPROC() volatile
{
return GPIO26_STATUS & (1u << 26u);
}
inline void get_GPIO26_STATUS(bool &OUTFROMPERI, bool &OUTTOPAD,
bool &OEFROMPERI, bool &OETOPAD,
bool &INFROMPAD, bool &INTOPERI,
bool &IRQFROMPAD, bool &IRQTOPROC) volatile
{
uint32_t curr = GPIO26_STATUS;
OUTFROMPERI = curr & (1u << 8u);
OUTTOPAD = curr & (1u << 9u);
OEFROMPERI = curr & (1u << 12u);
OETOPAD = curr & (1u << 13u);
INFROMPAD = curr & (1u << 17u);
INTOPERI = curr & (1u << 19u);
IRQFROMPAD = curr & (1u << 24u);
IRQTOPROC = curr & (1u << 26u);
}
inline IO_BANK0_GPIO26_CTRL_FUNCSEL get_GPIO26_CTRL_FUNCSEL() volatile
{
return IO_BANK0_GPIO26_CTRL_FUNCSEL((GPIO26_CTRL >> 0u) & 0b11111u);
}
inline void set_GPIO26_CTRL_FUNCSEL(
IO_BANK0_GPIO26_CTRL_FUNCSEL value) volatile
{
uint32_t curr = GPIO26_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(value) & 0b11111u) << 0u;
GPIO26_CTRL = curr;
}
inline IO_BANK0_GPIO26_CTRL_OUTOVER get_GPIO26_CTRL_OUTOVER() volatile
{
return IO_BANK0_GPIO26_CTRL_OUTOVER((GPIO26_CTRL >> 8u) & 0b11u);
}
inline void set_GPIO26_CTRL_OUTOVER(
IO_BANK0_GPIO26_CTRL_OUTOVER value) volatile
{
uint32_t curr = GPIO26_CTRL;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(value) & 0b11u) << 8u;
GPIO26_CTRL = curr;
}
inline IO_BANK0_GPIO26_CTRL_OEOVER get_GPIO26_CTRL_OEOVER() volatile
{
return IO_BANK0_GPIO26_CTRL_OEOVER((GPIO26_CTRL >> 12u) & 0b11u);
}
inline void set_GPIO26_CTRL_OEOVER(
IO_BANK0_GPIO26_CTRL_OEOVER value) volatile
{
uint32_t curr = GPIO26_CTRL;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(value) & 0b11u) << 12u;
GPIO26_CTRL = curr;
}
inline IO_BANK0_GPIO26_CTRL_INOVER get_GPIO26_CTRL_INOVER() volatile
{
return IO_BANK0_GPIO26_CTRL_INOVER((GPIO26_CTRL >> 16u) & 0b11u);
}
inline void set_GPIO26_CTRL_INOVER(
IO_BANK0_GPIO26_CTRL_INOVER value) volatile
{
uint32_t curr = GPIO26_CTRL;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(value) & 0b11u) << 16u;
GPIO26_CTRL = curr;
}
inline IO_BANK0_GPIO26_CTRL_IRQOVER get_GPIO26_CTRL_IRQOVER() volatile
{
return IO_BANK0_GPIO26_CTRL_IRQOVER((GPIO26_CTRL >> 28u) & 0b11u);
}
inline void set_GPIO26_CTRL_IRQOVER(
IO_BANK0_GPIO26_CTRL_IRQOVER value) volatile
{
uint32_t curr = GPIO26_CTRL;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(value) & 0b11u) << 28u;
GPIO26_CTRL = curr;
}
inline void get_GPIO26_CTRL(IO_BANK0_GPIO26_CTRL_FUNCSEL &FUNCSEL,
IO_BANK0_GPIO26_CTRL_OUTOVER &OUTOVER,
IO_BANK0_GPIO26_CTRL_OEOVER &OEOVER,
IO_BANK0_GPIO26_CTRL_INOVER &INOVER,
IO_BANK0_GPIO26_CTRL_IRQOVER &IRQOVER) volatile
{
uint32_t curr = GPIO26_CTRL;
FUNCSEL = IO_BANK0_GPIO26_CTRL_FUNCSEL((curr >> 0u) & 0b11111u);
OUTOVER = IO_BANK0_GPIO26_CTRL_OUTOVER((curr >> 8u) & 0b11u);
OEOVER = IO_BANK0_GPIO26_CTRL_OEOVER((curr >> 12u) & 0b11u);
INOVER = IO_BANK0_GPIO26_CTRL_INOVER((curr >> 16u) & 0b11u);
IRQOVER = IO_BANK0_GPIO26_CTRL_IRQOVER((curr >> 28u) & 0b11u);
}
inline void set_GPIO26_CTRL(IO_BANK0_GPIO26_CTRL_FUNCSEL FUNCSEL,
IO_BANK0_GPIO26_CTRL_OUTOVER OUTOVER,
IO_BANK0_GPIO26_CTRL_OEOVER OEOVER,
IO_BANK0_GPIO26_CTRL_INOVER INOVER,
IO_BANK0_GPIO26_CTRL_IRQOVER IRQOVER) volatile
{
uint32_t curr = GPIO26_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(FUNCSEL) & 0b11111u) << 0u;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(OUTOVER) & 0b11u) << 8u;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(OEOVER) & 0b11u) << 12u;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(INOVER) & 0b11u) << 16u;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(IRQOVER) & 0b11u) << 28u;
GPIO26_CTRL = curr;
}
inline bool get_GPIO27_STATUS_OUTFROMPERI() volatile
{
return GPIO27_STATUS & (1u << 8u);
}
inline bool get_GPIO27_STATUS_OUTTOPAD() volatile
{
return GPIO27_STATUS & (1u << 9u);
}
inline bool get_GPIO27_STATUS_OEFROMPERI() volatile
{
return GPIO27_STATUS & (1u << 12u);
}
inline bool get_GPIO27_STATUS_OETOPAD() volatile
{
return GPIO27_STATUS & (1u << 13u);
}
inline bool get_GPIO27_STATUS_INFROMPAD() volatile
{
return GPIO27_STATUS & (1u << 17u);
}
inline bool get_GPIO27_STATUS_INTOPERI() volatile
{
return GPIO27_STATUS & (1u << 19u);
}
inline bool get_GPIO27_STATUS_IRQFROMPAD() volatile
{
return GPIO27_STATUS & (1u << 24u);
}
inline bool get_GPIO27_STATUS_IRQTOPROC() volatile
{
return GPIO27_STATUS & (1u << 26u);
}
inline void get_GPIO27_STATUS(bool &OUTFROMPERI, bool &OUTTOPAD,
bool &OEFROMPERI, bool &OETOPAD,
bool &INFROMPAD, bool &INTOPERI,
bool &IRQFROMPAD, bool &IRQTOPROC) volatile
{
uint32_t curr = GPIO27_STATUS;
OUTFROMPERI = curr & (1u << 8u);
OUTTOPAD = curr & (1u << 9u);
OEFROMPERI = curr & (1u << 12u);
OETOPAD = curr & (1u << 13u);
INFROMPAD = curr & (1u << 17u);
INTOPERI = curr & (1u << 19u);
IRQFROMPAD = curr & (1u << 24u);
IRQTOPROC = curr & (1u << 26u);
}
inline IO_BANK0_GPIO27_CTRL_FUNCSEL get_GPIO27_CTRL_FUNCSEL() volatile
{
return IO_BANK0_GPIO27_CTRL_FUNCSEL((GPIO27_CTRL >> 0u) & 0b11111u);
}
inline void set_GPIO27_CTRL_FUNCSEL(
IO_BANK0_GPIO27_CTRL_FUNCSEL value) volatile
{
uint32_t curr = GPIO27_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(value) & 0b11111u) << 0u;
GPIO27_CTRL = curr;
}
inline IO_BANK0_GPIO27_CTRL_OUTOVER get_GPIO27_CTRL_OUTOVER() volatile
{
return IO_BANK0_GPIO27_CTRL_OUTOVER((GPIO27_CTRL >> 8u) & 0b11u);
}
inline void set_GPIO27_CTRL_OUTOVER(
IO_BANK0_GPIO27_CTRL_OUTOVER value) volatile
{
uint32_t curr = GPIO27_CTRL;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(value) & 0b11u) << 8u;
GPIO27_CTRL = curr;
}
inline IO_BANK0_GPIO27_CTRL_OEOVER get_GPIO27_CTRL_OEOVER() volatile
{
return IO_BANK0_GPIO27_CTRL_OEOVER((GPIO27_CTRL >> 12u) & 0b11u);
}
inline void set_GPIO27_CTRL_OEOVER(
IO_BANK0_GPIO27_CTRL_OEOVER value) volatile
{
uint32_t curr = GPIO27_CTRL;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(value) & 0b11u) << 12u;
GPIO27_CTRL = curr;
}
inline IO_BANK0_GPIO27_CTRL_INOVER get_GPIO27_CTRL_INOVER() volatile
{
return IO_BANK0_GPIO27_CTRL_INOVER((GPIO27_CTRL >> 16u) & 0b11u);
}
inline void set_GPIO27_CTRL_INOVER(
IO_BANK0_GPIO27_CTRL_INOVER value) volatile
{
uint32_t curr = GPIO27_CTRL;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(value) & 0b11u) << 16u;
GPIO27_CTRL = curr;
}
inline IO_BANK0_GPIO27_CTRL_IRQOVER get_GPIO27_CTRL_IRQOVER() volatile
{
return IO_BANK0_GPIO27_CTRL_IRQOVER((GPIO27_CTRL >> 28u) & 0b11u);
}
inline void set_GPIO27_CTRL_IRQOVER(
IO_BANK0_GPIO27_CTRL_IRQOVER value) volatile
{
uint32_t curr = GPIO27_CTRL;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(value) & 0b11u) << 28u;
GPIO27_CTRL = curr;
}
inline void get_GPIO27_CTRL(IO_BANK0_GPIO27_CTRL_FUNCSEL &FUNCSEL,
IO_BANK0_GPIO27_CTRL_OUTOVER &OUTOVER,
IO_BANK0_GPIO27_CTRL_OEOVER &OEOVER,
IO_BANK0_GPIO27_CTRL_INOVER &INOVER,
IO_BANK0_GPIO27_CTRL_IRQOVER &IRQOVER) volatile
{
uint32_t curr = GPIO27_CTRL;
FUNCSEL = IO_BANK0_GPIO27_CTRL_FUNCSEL((curr >> 0u) & 0b11111u);
OUTOVER = IO_BANK0_GPIO27_CTRL_OUTOVER((curr >> 8u) & 0b11u);
OEOVER = IO_BANK0_GPIO27_CTRL_OEOVER((curr >> 12u) & 0b11u);
INOVER = IO_BANK0_GPIO27_CTRL_INOVER((curr >> 16u) & 0b11u);
IRQOVER = IO_BANK0_GPIO27_CTRL_IRQOVER((curr >> 28u) & 0b11u);
}
inline void set_GPIO27_CTRL(IO_BANK0_GPIO27_CTRL_FUNCSEL FUNCSEL,
IO_BANK0_GPIO27_CTRL_OUTOVER OUTOVER,
IO_BANK0_GPIO27_CTRL_OEOVER OEOVER,
IO_BANK0_GPIO27_CTRL_INOVER INOVER,
IO_BANK0_GPIO27_CTRL_IRQOVER IRQOVER) volatile
{
uint32_t curr = GPIO27_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(FUNCSEL) & 0b11111u) << 0u;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(OUTOVER) & 0b11u) << 8u;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(OEOVER) & 0b11u) << 12u;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(INOVER) & 0b11u) << 16u;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(IRQOVER) & 0b11u) << 28u;
GPIO27_CTRL = curr;
}
inline bool get_GPIO28_STATUS_OUTFROMPERI() volatile
{
return GPIO28_STATUS & (1u << 8u);
}
inline bool get_GPIO28_STATUS_OUTTOPAD() volatile
{
return GPIO28_STATUS & (1u << 9u);
}
inline bool get_GPIO28_STATUS_OEFROMPERI() volatile
{
return GPIO28_STATUS & (1u << 12u);
}
inline bool get_GPIO28_STATUS_OETOPAD() volatile
{
return GPIO28_STATUS & (1u << 13u);
}
inline bool get_GPIO28_STATUS_INFROMPAD() volatile
{
return GPIO28_STATUS & (1u << 17u);
}
inline bool get_GPIO28_STATUS_INTOPERI() volatile
{
return GPIO28_STATUS & (1u << 19u);
}
inline bool get_GPIO28_STATUS_IRQFROMPAD() volatile
{
return GPIO28_STATUS & (1u << 24u);
}
inline bool get_GPIO28_STATUS_IRQTOPROC() volatile
{
return GPIO28_STATUS & (1u << 26u);
}
inline void get_GPIO28_STATUS(bool &OUTFROMPERI, bool &OUTTOPAD,
bool &OEFROMPERI, bool &OETOPAD,
bool &INFROMPAD, bool &INTOPERI,
bool &IRQFROMPAD, bool &IRQTOPROC) volatile
{
uint32_t curr = GPIO28_STATUS;
OUTFROMPERI = curr & (1u << 8u);
OUTTOPAD = curr & (1u << 9u);
OEFROMPERI = curr & (1u << 12u);
OETOPAD = curr & (1u << 13u);
INFROMPAD = curr & (1u << 17u);
INTOPERI = curr & (1u << 19u);
IRQFROMPAD = curr & (1u << 24u);
IRQTOPROC = curr & (1u << 26u);
}
inline IO_BANK0_GPIO28_CTRL_FUNCSEL get_GPIO28_CTRL_FUNCSEL() volatile
{
return IO_BANK0_GPIO28_CTRL_FUNCSEL((GPIO28_CTRL >> 0u) & 0b11111u);
}
inline void set_GPIO28_CTRL_FUNCSEL(
IO_BANK0_GPIO28_CTRL_FUNCSEL value) volatile
{
uint32_t curr = GPIO28_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(value) & 0b11111u) << 0u;
GPIO28_CTRL = curr;
}
inline IO_BANK0_GPIO28_CTRL_OUTOVER get_GPIO28_CTRL_OUTOVER() volatile
{
return IO_BANK0_GPIO28_CTRL_OUTOVER((GPIO28_CTRL >> 8u) & 0b11u);
}
inline void set_GPIO28_CTRL_OUTOVER(
IO_BANK0_GPIO28_CTRL_OUTOVER value) volatile
{
uint32_t curr = GPIO28_CTRL;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(value) & 0b11u) << 8u;
GPIO28_CTRL = curr;
}
inline IO_BANK0_GPIO28_CTRL_OEOVER get_GPIO28_CTRL_OEOVER() volatile
{
return IO_BANK0_GPIO28_CTRL_OEOVER((GPIO28_CTRL >> 12u) & 0b11u);
}
inline void set_GPIO28_CTRL_OEOVER(
IO_BANK0_GPIO28_CTRL_OEOVER value) volatile
{
uint32_t curr = GPIO28_CTRL;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(value) & 0b11u) << 12u;
GPIO28_CTRL = curr;
}
inline IO_BANK0_GPIO28_CTRL_INOVER get_GPIO28_CTRL_INOVER() volatile
{
return IO_BANK0_GPIO28_CTRL_INOVER((GPIO28_CTRL >> 16u) & 0b11u);
}
inline void set_GPIO28_CTRL_INOVER(
IO_BANK0_GPIO28_CTRL_INOVER value) volatile
{
uint32_t curr = GPIO28_CTRL;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(value) & 0b11u) << 16u;
GPIO28_CTRL = curr;
}
inline IO_BANK0_GPIO28_CTRL_IRQOVER get_GPIO28_CTRL_IRQOVER() volatile
{
return IO_BANK0_GPIO28_CTRL_IRQOVER((GPIO28_CTRL >> 28u) & 0b11u);
}
inline void set_GPIO28_CTRL_IRQOVER(
IO_BANK0_GPIO28_CTRL_IRQOVER value) volatile
{
uint32_t curr = GPIO28_CTRL;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(value) & 0b11u) << 28u;
GPIO28_CTRL = curr;
}
inline void get_GPIO28_CTRL(IO_BANK0_GPIO28_CTRL_FUNCSEL &FUNCSEL,
IO_BANK0_GPIO28_CTRL_OUTOVER &OUTOVER,
IO_BANK0_GPIO28_CTRL_OEOVER &OEOVER,
IO_BANK0_GPIO28_CTRL_INOVER &INOVER,
IO_BANK0_GPIO28_CTRL_IRQOVER &IRQOVER) volatile
{
uint32_t curr = GPIO28_CTRL;
FUNCSEL = IO_BANK0_GPIO28_CTRL_FUNCSEL((curr >> 0u) & 0b11111u);
OUTOVER = IO_BANK0_GPIO28_CTRL_OUTOVER((curr >> 8u) & 0b11u);
OEOVER = IO_BANK0_GPIO28_CTRL_OEOVER((curr >> 12u) & 0b11u);
INOVER = IO_BANK0_GPIO28_CTRL_INOVER((curr >> 16u) & 0b11u);
IRQOVER = IO_BANK0_GPIO28_CTRL_IRQOVER((curr >> 28u) & 0b11u);
}
inline void set_GPIO28_CTRL(IO_BANK0_GPIO28_CTRL_FUNCSEL FUNCSEL,
IO_BANK0_GPIO28_CTRL_OUTOVER OUTOVER,
IO_BANK0_GPIO28_CTRL_OEOVER OEOVER,
IO_BANK0_GPIO28_CTRL_INOVER INOVER,
IO_BANK0_GPIO28_CTRL_IRQOVER IRQOVER) volatile
{
uint32_t curr = GPIO28_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(FUNCSEL) & 0b11111u) << 0u;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(OUTOVER) & 0b11u) << 8u;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(OEOVER) & 0b11u) << 12u;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(INOVER) & 0b11u) << 16u;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(IRQOVER) & 0b11u) << 28u;
GPIO28_CTRL = curr;
}
inline bool get_GPIO29_STATUS_OUTFROMPERI() volatile
{
return GPIO29_STATUS & (1u << 8u);
}
inline bool get_GPIO29_STATUS_OUTTOPAD() volatile
{
return GPIO29_STATUS & (1u << 9u);
}
inline bool get_GPIO29_STATUS_OEFROMPERI() volatile
{
return GPIO29_STATUS & (1u << 12u);
}
inline bool get_GPIO29_STATUS_OETOPAD() volatile
{
return GPIO29_STATUS & (1u << 13u);
}
inline bool get_GPIO29_STATUS_INFROMPAD() volatile
{
return GPIO29_STATUS & (1u << 17u);
}
inline bool get_GPIO29_STATUS_INTOPERI() volatile
{
return GPIO29_STATUS & (1u << 19u);
}
inline bool get_GPIO29_STATUS_IRQFROMPAD() volatile
{
return GPIO29_STATUS & (1u << 24u);
}
inline bool get_GPIO29_STATUS_IRQTOPROC() volatile
{
return GPIO29_STATUS & (1u << 26u);
}
inline void get_GPIO29_STATUS(bool &OUTFROMPERI, bool &OUTTOPAD,
bool &OEFROMPERI, bool &OETOPAD,
bool &INFROMPAD, bool &INTOPERI,
bool &IRQFROMPAD, bool &IRQTOPROC) volatile
{
uint32_t curr = GPIO29_STATUS;
OUTFROMPERI = curr & (1u << 8u);
OUTTOPAD = curr & (1u << 9u);
OEFROMPERI = curr & (1u << 12u);
OETOPAD = curr & (1u << 13u);
INFROMPAD = curr & (1u << 17u);
INTOPERI = curr & (1u << 19u);
IRQFROMPAD = curr & (1u << 24u);
IRQTOPROC = curr & (1u << 26u);
}
inline IO_BANK0_GPIO29_CTRL_FUNCSEL get_GPIO29_CTRL_FUNCSEL() volatile
{
return IO_BANK0_GPIO29_CTRL_FUNCSEL((GPIO29_CTRL >> 0u) & 0b11111u);
}
inline void set_GPIO29_CTRL_FUNCSEL(
IO_BANK0_GPIO29_CTRL_FUNCSEL value) volatile
{
uint32_t curr = GPIO29_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(value) & 0b11111u) << 0u;
GPIO29_CTRL = curr;
}
inline IO_BANK0_GPIO29_CTRL_OUTOVER get_GPIO29_CTRL_OUTOVER() volatile
{
return IO_BANK0_GPIO29_CTRL_OUTOVER((GPIO29_CTRL >> 8u) & 0b11u);
}
inline void set_GPIO29_CTRL_OUTOVER(
IO_BANK0_GPIO29_CTRL_OUTOVER value) volatile
{
uint32_t curr = GPIO29_CTRL;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(value) & 0b11u) << 8u;
GPIO29_CTRL = curr;
}
inline IO_BANK0_GPIO29_CTRL_OEOVER get_GPIO29_CTRL_OEOVER() volatile
{
return IO_BANK0_GPIO29_CTRL_OEOVER((GPIO29_CTRL >> 12u) & 0b11u);
}
inline void set_GPIO29_CTRL_OEOVER(
IO_BANK0_GPIO29_CTRL_OEOVER value) volatile
{
uint32_t curr = GPIO29_CTRL;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(value) & 0b11u) << 12u;
GPIO29_CTRL = curr;
}
inline IO_BANK0_GPIO29_CTRL_INOVER get_GPIO29_CTRL_INOVER() volatile
{
return IO_BANK0_GPIO29_CTRL_INOVER((GPIO29_CTRL >> 16u) & 0b11u);
}
inline void set_GPIO29_CTRL_INOVER(
IO_BANK0_GPIO29_CTRL_INOVER value) volatile
{
uint32_t curr = GPIO29_CTRL;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(value) & 0b11u) << 16u;
GPIO29_CTRL = curr;
}
inline IO_BANK0_GPIO29_CTRL_IRQOVER get_GPIO29_CTRL_IRQOVER() volatile
{
return IO_BANK0_GPIO29_CTRL_IRQOVER((GPIO29_CTRL >> 28u) & 0b11u);
}
inline void set_GPIO29_CTRL_IRQOVER(
IO_BANK0_GPIO29_CTRL_IRQOVER value) volatile
{
uint32_t curr = GPIO29_CTRL;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(value) & 0b11u) << 28u;
GPIO29_CTRL = curr;
}
inline void get_GPIO29_CTRL(IO_BANK0_GPIO29_CTRL_FUNCSEL &FUNCSEL,
IO_BANK0_GPIO29_CTRL_OUTOVER &OUTOVER,
IO_BANK0_GPIO29_CTRL_OEOVER &OEOVER,
IO_BANK0_GPIO29_CTRL_INOVER &INOVER,
IO_BANK0_GPIO29_CTRL_IRQOVER &IRQOVER) volatile
{
uint32_t curr = GPIO29_CTRL;
FUNCSEL = IO_BANK0_GPIO29_CTRL_FUNCSEL((curr >> 0u) & 0b11111u);
OUTOVER = IO_BANK0_GPIO29_CTRL_OUTOVER((curr >> 8u) & 0b11u);
OEOVER = IO_BANK0_GPIO29_CTRL_OEOVER((curr >> 12u) & 0b11u);
INOVER = IO_BANK0_GPIO29_CTRL_INOVER((curr >> 16u) & 0b11u);
IRQOVER = IO_BANK0_GPIO29_CTRL_IRQOVER((curr >> 28u) & 0b11u);
}
inline void set_GPIO29_CTRL(IO_BANK0_GPIO29_CTRL_FUNCSEL FUNCSEL,
IO_BANK0_GPIO29_CTRL_OUTOVER OUTOVER,
IO_BANK0_GPIO29_CTRL_OEOVER OEOVER,
IO_BANK0_GPIO29_CTRL_INOVER INOVER,
IO_BANK0_GPIO29_CTRL_IRQOVER IRQOVER) volatile
{
uint32_t curr = GPIO29_CTRL;
curr &= ~(0b11111u << 0u);
curr |= (std::to_underlying(FUNCSEL) & 0b11111u) << 0u;
curr &= ~(0b11u << 8u);
curr |= (std::to_underlying(OUTOVER) & 0b11u) << 8u;
curr &= ~(0b11u << 12u);
curr |= (std::to_underlying(OEOVER) & 0b11u) << 12u;
curr &= ~(0b11u << 16u);
curr |= (std::to_underlying(INOVER) & 0b11u) << 16u;
curr &= ~(0b11u << 28u);
curr |= (std::to_underlying(IRQOVER) & 0b11u) << 28u;
GPIO29_CTRL = curr;
}
inline bool get_INTR0_GPIO0_LEVEL_LOW() volatile
{
return INTR0 & (1u << 0u);
}
inline bool get_INTR0_GPIO0_LEVEL_HIGH() volatile
{
return INTR0 & (1u << 1u);
}
inline bool get_INTR0_GPIO0_EDGE_LOW() volatile
{
return INTR0 & (1u << 2u);
}
inline void set_INTR0_GPIO0_EDGE_LOW() volatile
{
INTR0 |= 1u << 2u;
}
inline void clear_INTR0_GPIO0_EDGE_LOW() volatile
{
INTR0 &= ~(1u << 2u);
}
inline void toggle_INTR0_GPIO0_EDGE_LOW() volatile
{
INTR0 ^= 1u << 2u;
}
inline bool get_INTR0_GPIO0_EDGE_HIGH() volatile
{
return INTR0 & (1u << 3u);
}
inline void set_INTR0_GPIO0_EDGE_HIGH() volatile
{
INTR0 |= 1u << 3u;
}
inline void clear_INTR0_GPIO0_EDGE_HIGH() volatile
{
INTR0 &= ~(1u << 3u);
}
inline void toggle_INTR0_GPIO0_EDGE_HIGH() volatile
{
INTR0 ^= 1u << 3u;
}
inline bool get_INTR0_GPIO1_LEVEL_LOW() volatile
{
return INTR0 & (1u << 4u);
}
inline bool get_INTR0_GPIO1_LEVEL_HIGH() volatile
{
return INTR0 & (1u << 5u);
}
inline bool get_INTR0_GPIO1_EDGE_LOW() volatile
{
return INTR0 & (1u << 6u);
}
inline void set_INTR0_GPIO1_EDGE_LOW() volatile
{
INTR0 |= 1u << 6u;
}
inline void clear_INTR0_GPIO1_EDGE_LOW() volatile
{
INTR0 &= ~(1u << 6u);
}
inline void toggle_INTR0_GPIO1_EDGE_LOW() volatile
{
INTR0 ^= 1u << 6u;
}
inline bool get_INTR0_GPIO1_EDGE_HIGH() volatile
{
return INTR0 & (1u << 7u);
}
inline void set_INTR0_GPIO1_EDGE_HIGH() volatile
{
INTR0 |= 1u << 7u;
}
inline void clear_INTR0_GPIO1_EDGE_HIGH() volatile
{
INTR0 &= ~(1u << 7u);
}
inline void toggle_INTR0_GPIO1_EDGE_HIGH() volatile
{
INTR0 ^= 1u << 7u;
}
inline bool get_INTR0_GPIO2_LEVEL_LOW() volatile
{
return INTR0 & (1u << 8u);
}
inline bool get_INTR0_GPIO2_LEVEL_HIGH() volatile
{
return INTR0 & (1u << 9u);
}
inline bool get_INTR0_GPIO2_EDGE_LOW() volatile
{
return INTR0 & (1u << 10u);
}
inline void set_INTR0_GPIO2_EDGE_LOW() volatile
{
INTR0 |= 1u << 10u;
}
inline void clear_INTR0_GPIO2_EDGE_LOW() volatile
{
INTR0 &= ~(1u << 10u);
}
inline void toggle_INTR0_GPIO2_EDGE_LOW() volatile
{
INTR0 ^= 1u << 10u;
}
inline bool get_INTR0_GPIO2_EDGE_HIGH() volatile
{
return INTR0 & (1u << 11u);
}
inline void set_INTR0_GPIO2_EDGE_HIGH() volatile
{
INTR0 |= 1u << 11u;
}
inline void clear_INTR0_GPIO2_EDGE_HIGH() volatile
{
INTR0 &= ~(1u << 11u);
}
inline void toggle_INTR0_GPIO2_EDGE_HIGH() volatile
{
INTR0 ^= 1u << 11u;
}
inline bool get_INTR0_GPIO3_LEVEL_LOW() volatile
{
return INTR0 & (1u << 12u);
}
inline bool get_INTR0_GPIO3_LEVEL_HIGH() volatile
{
return INTR0 & (1u << 13u);
}
inline bool get_INTR0_GPIO3_EDGE_LOW() volatile
{
return INTR0 & (1u << 14u);
}
inline void set_INTR0_GPIO3_EDGE_LOW() volatile
{
INTR0 |= 1u << 14u;
}
inline void clear_INTR0_GPIO3_EDGE_LOW() volatile
{
INTR0 &= ~(1u << 14u);
}
inline void toggle_INTR0_GPIO3_EDGE_LOW() volatile
{
INTR0 ^= 1u << 14u;
}
inline bool get_INTR0_GPIO3_EDGE_HIGH() volatile
{
return INTR0 & (1u << 15u);
}
inline void set_INTR0_GPIO3_EDGE_HIGH() volatile
{
INTR0 |= 1u << 15u;
}
inline void clear_INTR0_GPIO3_EDGE_HIGH() volatile
{
INTR0 &= ~(1u << 15u);
}
inline void toggle_INTR0_GPIO3_EDGE_HIGH() volatile
{
INTR0 ^= 1u << 15u;
}
inline bool get_INTR0_GPIO4_LEVEL_LOW() volatile
{
return INTR0 & (1u << 16u);
}
inline bool get_INTR0_GPIO4_LEVEL_HIGH() volatile
{
return INTR0 & (1u << 17u);
}
inline bool get_INTR0_GPIO4_EDGE_LOW() volatile
{
return INTR0 & (1u << 18u);
}
inline void set_INTR0_GPIO4_EDGE_LOW() volatile
{
INTR0 |= 1u << 18u;
}
inline void clear_INTR0_GPIO4_EDGE_LOW() volatile
{
INTR0 &= ~(1u << 18u);
}
inline void toggle_INTR0_GPIO4_EDGE_LOW() volatile
{
INTR0 ^= 1u << 18u;
}
inline bool get_INTR0_GPIO4_EDGE_HIGH() volatile
{
return INTR0 & (1u << 19u);
}
inline void set_INTR0_GPIO4_EDGE_HIGH() volatile
{
INTR0 |= 1u << 19u;
}
inline void clear_INTR0_GPIO4_EDGE_HIGH() volatile
{
INTR0 &= ~(1u << 19u);
}
inline void toggle_INTR0_GPIO4_EDGE_HIGH() volatile
{
INTR0 ^= 1u << 19u;
}
inline bool get_INTR0_GPIO5_LEVEL_LOW() volatile
{
return INTR0 & (1u << 20u);
}
inline bool get_INTR0_GPIO5_LEVEL_HIGH() volatile
{
return INTR0 & (1u << 21u);
}
inline bool get_INTR0_GPIO5_EDGE_LOW() volatile
{
return INTR0 & (1u << 22u);
}
inline void set_INTR0_GPIO5_EDGE_LOW() volatile
{
INTR0 |= 1u << 22u;
}
inline void clear_INTR0_GPIO5_EDGE_LOW() volatile
{
INTR0 &= ~(1u << 22u);
}
inline void toggle_INTR0_GPIO5_EDGE_LOW() volatile
{
INTR0 ^= 1u << 22u;
}
inline bool get_INTR0_GPIO5_EDGE_HIGH() volatile
{
return INTR0 & (1u << 23u);
}
inline void set_INTR0_GPIO5_EDGE_HIGH() volatile
{
INTR0 |= 1u << 23u;
}
inline void clear_INTR0_GPIO5_EDGE_HIGH() volatile
{
INTR0 &= ~(1u << 23u);
}
inline void toggle_INTR0_GPIO5_EDGE_HIGH() volatile
{
INTR0 ^= 1u << 23u;
}
inline bool get_INTR0_GPIO6_LEVEL_LOW() volatile
{
return INTR0 & (1u << 24u);
}
inline bool get_INTR0_GPIO6_LEVEL_HIGH() volatile
{
return INTR0 & (1u << 25u);
}
inline bool get_INTR0_GPIO6_EDGE_LOW() volatile
{
return INTR0 & (1u << 26u);
}
inline void set_INTR0_GPIO6_EDGE_LOW() volatile
{
INTR0 |= 1u << 26u;
}
inline void clear_INTR0_GPIO6_EDGE_LOW() volatile
{
INTR0 &= ~(1u << 26u);
}
inline void toggle_INTR0_GPIO6_EDGE_LOW() volatile
{
INTR0 ^= 1u << 26u;
}
inline bool get_INTR0_GPIO6_EDGE_HIGH() volatile
{
return INTR0 & (1u << 27u);
}
inline void set_INTR0_GPIO6_EDGE_HIGH() volatile
{
INTR0 |= 1u << 27u;
}
inline void clear_INTR0_GPIO6_EDGE_HIGH() volatile
{
INTR0 &= ~(1u << 27u);
}
inline void toggle_INTR0_GPIO6_EDGE_HIGH() volatile
{
INTR0 ^= 1u << 27u;
}
inline bool get_INTR0_GPIO7_LEVEL_LOW() volatile
{
return INTR0 & (1u << 28u);
}
inline bool get_INTR0_GPIO7_LEVEL_HIGH() volatile
{
return INTR0 & (1u << 29u);
}
inline bool get_INTR0_GPIO7_EDGE_LOW() volatile
{
return INTR0 & (1u << 30u);
}
inline void set_INTR0_GPIO7_EDGE_LOW() volatile
{
INTR0 |= 1u << 30u;
}
inline void clear_INTR0_GPIO7_EDGE_LOW() volatile
{
INTR0 &= ~(1u << 30u);
}
inline void toggle_INTR0_GPIO7_EDGE_LOW() volatile
{
INTR0 ^= 1u << 30u;
}
inline bool get_INTR0_GPIO7_EDGE_HIGH() volatile
{
return INTR0 & (1u << 31u);
}
inline void set_INTR0_GPIO7_EDGE_HIGH() volatile
{
INTR0 |= 1u << 31u;
}
inline void clear_INTR0_GPIO7_EDGE_HIGH() volatile
{
INTR0 &= ~(1u << 31u);
}
inline void toggle_INTR0_GPIO7_EDGE_HIGH() volatile
{
INTR0 ^= 1u << 31u;
}
inline void get_INTR0(
bool &GPIO0_LEVEL_LOW, bool &GPIO0_LEVEL_HIGH, bool &GPIO0_EDGE_LOW,
bool &GPIO0_EDGE_HIGH, bool &GPIO1_LEVEL_LOW, bool &GPIO1_LEVEL_HIGH,
bool &GPIO1_EDGE_LOW, bool &GPIO1_EDGE_HIGH, bool &GPIO2_LEVEL_LOW,
bool &GPIO2_LEVEL_HIGH, bool &GPIO2_EDGE_LOW, bool &GPIO2_EDGE_HIGH,
bool &GPIO3_LEVEL_LOW, bool &GPIO3_LEVEL_HIGH, bool &GPIO3_EDGE_LOW,
bool &GPIO3_EDGE_HIGH, bool &GPIO4_LEVEL_LOW, bool &GPIO4_LEVEL_HIGH,
bool &GPIO4_EDGE_LOW, bool &GPIO4_EDGE_HIGH, bool &GPIO5_LEVEL_LOW,
bool &GPIO5_LEVEL_HIGH, bool &GPIO5_EDGE_LOW, bool &GPIO5_EDGE_HIGH,
bool &GPIO6_LEVEL_LOW, bool &GPIO6_LEVEL_HIGH, bool &GPIO6_EDGE_LOW,
bool &GPIO6_EDGE_HIGH, bool &GPIO7_LEVEL_LOW, bool &GPIO7_LEVEL_HIGH,
bool &GPIO7_EDGE_LOW, bool &GPIO7_EDGE_HIGH) volatile
{
uint32_t curr = INTR0;
GPIO0_LEVEL_LOW = curr & (1u << 0u);
GPIO0_LEVEL_HIGH = curr & (1u << 1u);
GPIO0_EDGE_LOW = curr & (1u << 2u);
GPIO0_EDGE_HIGH = curr & (1u << 3u);
GPIO1_LEVEL_LOW = curr & (1u << 4u);
GPIO1_LEVEL_HIGH = curr & (1u << 5u);
GPIO1_EDGE_LOW = curr & (1u << 6u);
GPIO1_EDGE_HIGH = curr & (1u << 7u);
GPIO2_LEVEL_LOW = curr & (1u << 8u);
GPIO2_LEVEL_HIGH = curr & (1u << 9u);
GPIO2_EDGE_LOW = curr & (1u << 10u);
GPIO2_EDGE_HIGH = curr & (1u << 11u);
GPIO3_LEVEL_LOW = curr & (1u << 12u);
GPIO3_LEVEL_HIGH = curr & (1u << 13u);
GPIO3_EDGE_LOW = curr & (1u << 14u);
GPIO3_EDGE_HIGH = curr & (1u << 15u);
GPIO4_LEVEL_LOW = curr & (1u << 16u);
GPIO4_LEVEL_HIGH = curr & (1u << 17u);
GPIO4_EDGE_LOW = curr & (1u << 18u);
GPIO4_EDGE_HIGH = curr & (1u << 19u);
GPIO5_LEVEL_LOW = curr & (1u << 20u);
GPIO5_LEVEL_HIGH = curr & (1u << 21u);
GPIO5_EDGE_LOW = curr & (1u << 22u);
GPIO5_EDGE_HIGH = curr & (1u << 23u);
GPIO6_LEVEL_LOW = curr & (1u << 24u);
GPIO6_LEVEL_HIGH = curr & (1u << 25u);
GPIO6_EDGE_LOW = curr & (1u << 26u);
GPIO6_EDGE_HIGH = curr & (1u << 27u);
GPIO7_LEVEL_LOW = curr & (1u << 28u);
GPIO7_LEVEL_HIGH = curr & (1u << 29u);
GPIO7_EDGE_LOW = curr & (1u << 30u);
GPIO7_EDGE_HIGH = curr & (1u << 31u);
}
inline void set_INTR0(bool GPIO0_EDGE_LOW, bool GPIO0_EDGE_HIGH,
bool GPIO1_EDGE_LOW, bool GPIO1_EDGE_HIGH,
bool GPIO2_EDGE_LOW, bool GPIO2_EDGE_HIGH,
bool GPIO3_EDGE_LOW, bool GPIO3_EDGE_HIGH,
bool GPIO4_EDGE_LOW, bool GPIO4_EDGE_HIGH,
bool GPIO5_EDGE_LOW, bool GPIO5_EDGE_HIGH,
bool GPIO6_EDGE_LOW, bool GPIO6_EDGE_HIGH,
bool GPIO7_EDGE_LOW, bool GPIO7_EDGE_HIGH) volatile
{
uint32_t curr = INTR0;
curr &= ~(0b1u << 2u);
curr |= (GPIO0_EDGE_LOW & 0b1u) << 2u;
curr &= ~(0b1u << 3u);
curr |= (GPIO0_EDGE_HIGH & 0b1u) << 3u;
curr &= ~(0b1u << 6u);
curr |= (GPIO1_EDGE_LOW & 0b1u) << 6u;
curr &= ~(0b1u << 7u);
curr |= (GPIO1_EDGE_HIGH & 0b1u) << 7u;
curr &= ~(0b1u << 10u);
curr |= (GPIO2_EDGE_LOW & 0b1u) << 10u;
curr &= ~(0b1u << 11u);
curr |= (GPIO2_EDGE_HIGH & 0b1u) << 11u;
curr &= ~(0b1u << 14u);
curr |= (GPIO3_EDGE_LOW & 0b1u) << 14u;
curr &= ~(0b1u << 15u);
curr |= (GPIO3_EDGE_HIGH & 0b1u) << 15u;
curr &= ~(0b1u << 18u);
curr |= (GPIO4_EDGE_LOW & 0b1u) << 18u;
curr &= ~(0b1u << 19u);
curr |= (GPIO4_EDGE_HIGH & 0b1u) << 19u;
curr &= ~(0b1u << 22u);
curr |= (GPIO5_EDGE_LOW & 0b1u) << 22u;
curr &= ~(0b1u << 23u);
curr |= (GPIO5_EDGE_HIGH & 0b1u) << 23u;
curr &= ~(0b1u << 26u);
curr |= (GPIO6_EDGE_LOW & 0b1u) << 26u;
curr &= ~(0b1u << 27u);
curr |= (GPIO6_EDGE_HIGH & 0b1u) << 27u;
curr &= ~(0b1u << 30u);
curr |= (GPIO7_EDGE_LOW & 0b1u) << 30u;
curr &= ~(0b1u << 31u);
curr |= (GPIO7_EDGE_HIGH & 0b1u) << 31u;
INTR0 = curr;
}
inline bool get_INTR1_GPIO8_LEVEL_LOW() volatile
{
return INTR1 & (1u << 0u);
}
inline bool get_INTR1_GPIO8_LEVEL_HIGH() volatile
{
return INTR1 & (1u << 1u);
}
inline bool get_INTR1_GPIO8_EDGE_LOW() volatile
{
return INTR1 & (1u << 2u);
}
inline void set_INTR1_GPIO8_EDGE_LOW() volatile
{
INTR1 |= 1u << 2u;
}
inline void clear_INTR1_GPIO8_EDGE_LOW() volatile
{
INTR1 &= ~(1u << 2u);
}
inline void toggle_INTR1_GPIO8_EDGE_LOW() volatile
{
INTR1 ^= 1u << 2u;
}
inline bool get_INTR1_GPIO8_EDGE_HIGH() volatile
{
return INTR1 & (1u << 3u);
}
inline void set_INTR1_GPIO8_EDGE_HIGH() volatile
{
INTR1 |= 1u << 3u;
}
inline void clear_INTR1_GPIO8_EDGE_HIGH() volatile
{
INTR1 &= ~(1u << 3u);
}
inline void toggle_INTR1_GPIO8_EDGE_HIGH() volatile
{
INTR1 ^= 1u << 3u;
}
inline bool get_INTR1_GPIO9_LEVEL_LOW() volatile
{
return INTR1 & (1u << 4u);
}
inline bool get_INTR1_GPIO9_LEVEL_HIGH() volatile
{
return INTR1 & (1u << 5u);
}
inline bool get_INTR1_GPIO9_EDGE_LOW() volatile
{
return INTR1 & (1u << 6u);
}
inline void set_INTR1_GPIO9_EDGE_LOW() volatile
{
INTR1 |= 1u << 6u;
}
inline void clear_INTR1_GPIO9_EDGE_LOW() volatile
{
INTR1 &= ~(1u << 6u);
}
inline void toggle_INTR1_GPIO9_EDGE_LOW() volatile
{
INTR1 ^= 1u << 6u;
}
inline bool get_INTR1_GPIO9_EDGE_HIGH() volatile
{
return INTR1 & (1u << 7u);
}
inline void set_INTR1_GPIO9_EDGE_HIGH() volatile
{
INTR1 |= 1u << 7u;
}
inline void clear_INTR1_GPIO9_EDGE_HIGH() volatile
{
INTR1 &= ~(1u << 7u);
}
inline void toggle_INTR1_GPIO9_EDGE_HIGH() volatile
{
INTR1 ^= 1u << 7u;
}
inline bool get_INTR1_GPIO10_LEVEL_LOW() volatile
{
return INTR1 & (1u << 8u);
}
inline bool get_INTR1_GPIO10_LEVEL_HIGH() volatile
{
return INTR1 & (1u << 9u);
}
inline bool get_INTR1_GPIO10_EDGE_LOW() volatile
{
return INTR1 & (1u << 10u);
}
inline void set_INTR1_GPIO10_EDGE_LOW() volatile
{
INTR1 |= 1u << 10u;
}
inline void clear_INTR1_GPIO10_EDGE_LOW() volatile
{
INTR1 &= ~(1u << 10u);
}
inline void toggle_INTR1_GPIO10_EDGE_LOW() volatile
{
INTR1 ^= 1u << 10u;
}
inline bool get_INTR1_GPIO10_EDGE_HIGH() volatile
{
return INTR1 & (1u << 11u);
}
inline void set_INTR1_GPIO10_EDGE_HIGH() volatile
{
INTR1 |= 1u << 11u;
}
inline void clear_INTR1_GPIO10_EDGE_HIGH() volatile
{
INTR1 &= ~(1u << 11u);
}
inline void toggle_INTR1_GPIO10_EDGE_HIGH() volatile
{
INTR1 ^= 1u << 11u;
}
inline bool get_INTR1_GPIO11_LEVEL_LOW() volatile
{
return INTR1 & (1u << 12u);
}
inline bool get_INTR1_GPIO11_LEVEL_HIGH() volatile
{
return INTR1 & (1u << 13u);
}
inline bool get_INTR1_GPIO11_EDGE_LOW() volatile
{
return INTR1 & (1u << 14u);
}
inline void set_INTR1_GPIO11_EDGE_LOW() volatile
{
INTR1 |= 1u << 14u;
}
inline void clear_INTR1_GPIO11_EDGE_LOW() volatile
{
INTR1 &= ~(1u << 14u);
}
inline void toggle_INTR1_GPIO11_EDGE_LOW() volatile
{
INTR1 ^= 1u << 14u;
}
inline bool get_INTR1_GPIO11_EDGE_HIGH() volatile
{
return INTR1 & (1u << 15u);
}
inline void set_INTR1_GPIO11_EDGE_HIGH() volatile
{
INTR1 |= 1u << 15u;
}
inline void clear_INTR1_GPIO11_EDGE_HIGH() volatile
{
INTR1 &= ~(1u << 15u);
}
inline void toggle_INTR1_GPIO11_EDGE_HIGH() volatile
{
INTR1 ^= 1u << 15u;
}
inline bool get_INTR1_GPIO12_LEVEL_LOW() volatile
{
return INTR1 & (1u << 16u);
}
inline bool get_INTR1_GPIO12_LEVEL_HIGH() volatile
{
return INTR1 & (1u << 17u);
}
inline bool get_INTR1_GPIO12_EDGE_LOW() volatile
{
return INTR1 & (1u << 18u);
}
inline void set_INTR1_GPIO12_EDGE_LOW() volatile
{
INTR1 |= 1u << 18u;
}
inline void clear_INTR1_GPIO12_EDGE_LOW() volatile
{
INTR1 &= ~(1u << 18u);
}
inline void toggle_INTR1_GPIO12_EDGE_LOW() volatile
{
INTR1 ^= 1u << 18u;
}
inline bool get_INTR1_GPIO12_EDGE_HIGH() volatile
{
return INTR1 & (1u << 19u);
}
inline void set_INTR1_GPIO12_EDGE_HIGH() volatile
{
INTR1 |= 1u << 19u;
}
inline void clear_INTR1_GPIO12_EDGE_HIGH() volatile
{
INTR1 &= ~(1u << 19u);
}
inline void toggle_INTR1_GPIO12_EDGE_HIGH() volatile
{
INTR1 ^= 1u << 19u;
}
inline bool get_INTR1_GPIO13_LEVEL_LOW() volatile
{
return INTR1 & (1u << 20u);
}
inline bool get_INTR1_GPIO13_LEVEL_HIGH() volatile
{
return INTR1 & (1u << 21u);
}
inline bool get_INTR1_GPIO13_EDGE_LOW() volatile
{
return INTR1 & (1u << 22u);
}
inline void set_INTR1_GPIO13_EDGE_LOW() volatile
{
INTR1 |= 1u << 22u;
}
inline void clear_INTR1_GPIO13_EDGE_LOW() volatile
{
INTR1 &= ~(1u << 22u);
}
inline void toggle_INTR1_GPIO13_EDGE_LOW() volatile
{
INTR1 ^= 1u << 22u;
}
inline bool get_INTR1_GPIO13_EDGE_HIGH() volatile
{
return INTR1 & (1u << 23u);
}
inline void set_INTR1_GPIO13_EDGE_HIGH() volatile
{
INTR1 |= 1u << 23u;
}
inline void clear_INTR1_GPIO13_EDGE_HIGH() volatile
{
INTR1 &= ~(1u << 23u);
}
inline void toggle_INTR1_GPIO13_EDGE_HIGH() volatile
{
INTR1 ^= 1u << 23u;
}
inline bool get_INTR1_GPIO14_LEVEL_LOW() volatile
{
return INTR1 & (1u << 24u);
}
inline bool get_INTR1_GPIO14_LEVEL_HIGH() volatile
{
return INTR1 & (1u << 25u);
}
inline bool get_INTR1_GPIO14_EDGE_LOW() volatile
{
return INTR1 & (1u << 26u);
}
inline void set_INTR1_GPIO14_EDGE_LOW() volatile
{
INTR1 |= 1u << 26u;
}
inline void clear_INTR1_GPIO14_EDGE_LOW() volatile
{
INTR1 &= ~(1u << 26u);
}
inline void toggle_INTR1_GPIO14_EDGE_LOW() volatile
{
INTR1 ^= 1u << 26u;
}
inline bool get_INTR1_GPIO14_EDGE_HIGH() volatile
{
return INTR1 & (1u << 27u);
}
inline void set_INTR1_GPIO14_EDGE_HIGH() volatile
{
INTR1 |= 1u << 27u;
}
inline void clear_INTR1_GPIO14_EDGE_HIGH() volatile
{
INTR1 &= ~(1u << 27u);
}
inline void toggle_INTR1_GPIO14_EDGE_HIGH() volatile
{
INTR1 ^= 1u << 27u;
}
inline bool get_INTR1_GPIO15_LEVEL_LOW() volatile
{
return INTR1 & (1u << 28u);
}
inline bool get_INTR1_GPIO15_LEVEL_HIGH() volatile
{
return INTR1 & (1u << 29u);
}
inline bool get_INTR1_GPIO15_EDGE_LOW() volatile
{
return INTR1 & (1u << 30u);
}
inline void set_INTR1_GPIO15_EDGE_LOW() volatile
{
INTR1 |= 1u << 30u;
}
inline void clear_INTR1_GPIO15_EDGE_LOW() volatile
{
INTR1 &= ~(1u << 30u);
}
inline void toggle_INTR1_GPIO15_EDGE_LOW() volatile
{
INTR1 ^= 1u << 30u;
}
inline bool get_INTR1_GPIO15_EDGE_HIGH() volatile
{
return INTR1 & (1u << 31u);
}
inline void set_INTR1_GPIO15_EDGE_HIGH() volatile
{
INTR1 |= 1u << 31u;
}
inline void clear_INTR1_GPIO15_EDGE_HIGH() volatile
{
INTR1 &= ~(1u << 31u);
}
inline void toggle_INTR1_GPIO15_EDGE_HIGH() volatile
{
INTR1 ^= 1u << 31u;
}
inline void get_INTR1(
bool &GPIO8_LEVEL_LOW, bool &GPIO8_LEVEL_HIGH, bool &GPIO8_EDGE_LOW,
bool &GPIO8_EDGE_HIGH, bool &GPIO9_LEVEL_LOW, bool &GPIO9_LEVEL_HIGH,
bool &GPIO9_EDGE_LOW, bool &GPIO9_EDGE_HIGH, bool &GPIO10_LEVEL_LOW,
bool &GPIO10_LEVEL_HIGH, bool &GPIO10_EDGE_LOW, bool &GPIO10_EDGE_HIGH,
bool &GPIO11_LEVEL_LOW, bool &GPIO11_LEVEL_HIGH, bool &GPIO11_EDGE_LOW,
bool &GPIO11_EDGE_HIGH, bool &GPIO12_LEVEL_LOW,
bool &GPIO12_LEVEL_HIGH, bool &GPIO12_EDGE_LOW, bool &GPIO12_EDGE_HIGH,
bool &GPIO13_LEVEL_LOW, bool &GPIO13_LEVEL_HIGH, bool &GPIO13_EDGE_LOW,
bool &GPIO13_EDGE_HIGH, bool &GPIO14_LEVEL_LOW,
bool &GPIO14_LEVEL_HIGH, bool &GPIO14_EDGE_LOW, bool &GPIO14_EDGE_HIGH,
bool &GPIO15_LEVEL_LOW, bool &GPIO15_LEVEL_HIGH, bool &GPIO15_EDGE_LOW,
bool &GPIO15_EDGE_HIGH) volatile
{
uint32_t curr = INTR1;
GPIO8_LEVEL_LOW = curr & (1u << 0u);
GPIO8_LEVEL_HIGH = curr & (1u << 1u);
GPIO8_EDGE_LOW = curr & (1u << 2u);
GPIO8_EDGE_HIGH = curr & (1u << 3u);
GPIO9_LEVEL_LOW = curr & (1u << 4u);
GPIO9_LEVEL_HIGH = curr & (1u << 5u);
GPIO9_EDGE_LOW = curr & (1u << 6u);
GPIO9_EDGE_HIGH = curr & (1u << 7u);
GPIO10_LEVEL_LOW = curr & (1u << 8u);
GPIO10_LEVEL_HIGH = curr & (1u << 9u);
GPIO10_EDGE_LOW = curr & (1u << 10u);
GPIO10_EDGE_HIGH = curr & (1u << 11u);
GPIO11_LEVEL_LOW = curr & (1u << 12u);
GPIO11_LEVEL_HIGH = curr & (1u << 13u);
GPIO11_EDGE_LOW = curr & (1u << 14u);
GPIO11_EDGE_HIGH = curr & (1u << 15u);
GPIO12_LEVEL_LOW = curr & (1u << 16u);
GPIO12_LEVEL_HIGH = curr & (1u << 17u);
GPIO12_EDGE_LOW = curr & (1u << 18u);
GPIO12_EDGE_HIGH = curr & (1u << 19u);
GPIO13_LEVEL_LOW = curr & (1u << 20u);
GPIO13_LEVEL_HIGH = curr & (1u << 21u);
GPIO13_EDGE_LOW = curr & (1u << 22u);
GPIO13_EDGE_HIGH = curr & (1u << 23u);
GPIO14_LEVEL_LOW = curr & (1u << 24u);
GPIO14_LEVEL_HIGH = curr & (1u << 25u);
GPIO14_EDGE_LOW = curr & (1u << 26u);
GPIO14_EDGE_HIGH = curr & (1u << 27u);
GPIO15_LEVEL_LOW = curr & (1u << 28u);
GPIO15_LEVEL_HIGH = curr & (1u << 29u);
GPIO15_EDGE_LOW = curr & (1u << 30u);
GPIO15_EDGE_HIGH = curr & (1u << 31u);
}
inline void set_INTR1(bool GPIO8_EDGE_LOW, bool GPIO8_EDGE_HIGH,
bool GPIO9_EDGE_LOW, bool GPIO9_EDGE_HIGH,
bool GPIO10_EDGE_LOW, bool GPIO10_EDGE_HIGH,
bool GPIO11_EDGE_LOW, bool GPIO11_EDGE_HIGH,
bool GPIO12_EDGE_LOW, bool GPIO12_EDGE_HIGH,
bool GPIO13_EDGE_LOW, bool GPIO13_EDGE_HIGH,
bool GPIO14_EDGE_LOW, bool GPIO14_EDGE_HIGH,
bool GPIO15_EDGE_LOW, bool GPIO15_EDGE_HIGH) volatile
{
uint32_t curr = INTR1;
curr &= ~(0b1u << 2u);
curr |= (GPIO8_EDGE_LOW & 0b1u) << 2u;
curr &= ~(0b1u << 3u);
curr |= (GPIO8_EDGE_HIGH & 0b1u) << 3u;
curr &= ~(0b1u << 6u);
curr |= (GPIO9_EDGE_LOW & 0b1u) << 6u;
curr &= ~(0b1u << 7u);
curr |= (GPIO9_EDGE_HIGH & 0b1u) << 7u;
curr &= ~(0b1u << 10u);
curr |= (GPIO10_EDGE_LOW & 0b1u) << 10u;
curr &= ~(0b1u << 11u);
curr |= (GPIO10_EDGE_HIGH & 0b1u) << 11u;
curr &= ~(0b1u << 14u);
curr |= (GPIO11_EDGE_LOW & 0b1u) << 14u;
curr &= ~(0b1u << 15u);
curr |= (GPIO11_EDGE_HIGH & 0b1u) << 15u;
curr &= ~(0b1u << 18u);
curr |= (GPIO12_EDGE_LOW & 0b1u) << 18u;
curr &= ~(0b1u << 19u);
curr |= (GPIO12_EDGE_HIGH & 0b1u) << 19u;
curr &= ~(0b1u << 22u);
curr |= (GPIO13_EDGE_LOW & 0b1u) << 22u;
curr &= ~(0b1u << 23u);
curr |= (GPIO13_EDGE_HIGH & 0b1u) << 23u;
curr &= ~(0b1u << 26u);
curr |= (GPIO14_EDGE_LOW & 0b1u) << 26u;
curr &= ~(0b1u << 27u);
curr |= (GPIO14_EDGE_HIGH & 0b1u) << 27u;
curr &= ~(0b1u << 30u);
curr |= (GPIO15_EDGE_LOW & 0b1u) << 30u;
curr &= ~(0b1u << 31u);
curr |= (GPIO15_EDGE_HIGH & 0b1u) << 31u;
INTR1 = curr;
}
inline bool get_INTR2_GPIO16_LEVEL_LOW() volatile
{
return INTR2 & (1u << 0u);
}
inline bool get_INTR2_GPIO16_LEVEL_HIGH() volatile
{
return INTR2 & (1u << 1u);
}
inline bool get_INTR2_GPIO16_EDGE_LOW() volatile
{
return INTR2 & (1u << 2u);
}
inline void set_INTR2_GPIO16_EDGE_LOW() volatile
{
INTR2 |= 1u << 2u;
}
inline void clear_INTR2_GPIO16_EDGE_LOW() volatile
{
INTR2 &= ~(1u << 2u);
}
inline void toggle_INTR2_GPIO16_EDGE_LOW() volatile
{
INTR2 ^= 1u << 2u;
}
inline bool get_INTR2_GPIO16_EDGE_HIGH() volatile
{
return INTR2 & (1u << 3u);
}
inline void set_INTR2_GPIO16_EDGE_HIGH() volatile
{
INTR2 |= 1u << 3u;
}
inline void clear_INTR2_GPIO16_EDGE_HIGH() volatile
{
INTR2 &= ~(1u << 3u);
}
inline void toggle_INTR2_GPIO16_EDGE_HIGH() volatile
{
INTR2 ^= 1u << 3u;
}
inline bool get_INTR2_GPIO17_LEVEL_LOW() volatile
{
return INTR2 & (1u << 4u);
}
inline bool get_INTR2_GPIO17_LEVEL_HIGH() volatile
{
return INTR2 & (1u << 5u);
}
inline bool get_INTR2_GPIO17_EDGE_LOW() volatile
{
return INTR2 & (1u << 6u);
}
inline void set_INTR2_GPIO17_EDGE_LOW() volatile
{
INTR2 |= 1u << 6u;
}
inline void clear_INTR2_GPIO17_EDGE_LOW() volatile
{
INTR2 &= ~(1u << 6u);
}
inline void toggle_INTR2_GPIO17_EDGE_LOW() volatile
{
INTR2 ^= 1u << 6u;
}
inline bool get_INTR2_GPIO17_EDGE_HIGH() volatile
{
return INTR2 & (1u << 7u);
}
inline void set_INTR2_GPIO17_EDGE_HIGH() volatile
{
INTR2 |= 1u << 7u;
}
inline void clear_INTR2_GPIO17_EDGE_HIGH() volatile
{
INTR2 &= ~(1u << 7u);
}
inline void toggle_INTR2_GPIO17_EDGE_HIGH() volatile
{
INTR2 ^= 1u << 7u;
}
inline bool get_INTR2_GPIO18_LEVEL_LOW() volatile
{
return INTR2 & (1u << 8u);
}
inline bool get_INTR2_GPIO18_LEVEL_HIGH() volatile
{
return INTR2 & (1u << 9u);
}
inline bool get_INTR2_GPIO18_EDGE_LOW() volatile
{
return INTR2 & (1u << 10u);
}
inline void set_INTR2_GPIO18_EDGE_LOW() volatile
{
INTR2 |= 1u << 10u;
}
inline void clear_INTR2_GPIO18_EDGE_LOW() volatile
{
INTR2 &= ~(1u << 10u);
}
inline void toggle_INTR2_GPIO18_EDGE_LOW() volatile
{
INTR2 ^= 1u << 10u;
}
inline bool get_INTR2_GPIO18_EDGE_HIGH() volatile
{
return INTR2 & (1u << 11u);
}
inline void set_INTR2_GPIO18_EDGE_HIGH() volatile
{
INTR2 |= 1u << 11u;
}
inline void clear_INTR2_GPIO18_EDGE_HIGH() volatile
{
INTR2 &= ~(1u << 11u);
}
inline void toggle_INTR2_GPIO18_EDGE_HIGH() volatile
{
INTR2 ^= 1u << 11u;
}
inline bool get_INTR2_GPIO19_LEVEL_LOW() volatile
{
return INTR2 & (1u << 12u);
}
inline bool get_INTR2_GPIO19_LEVEL_HIGH() volatile
{
return INTR2 & (1u << 13u);
}
inline bool get_INTR2_GPIO19_EDGE_LOW() volatile
{
return INTR2 & (1u << 14u);
}
inline void set_INTR2_GPIO19_EDGE_LOW() volatile
{
INTR2 |= 1u << 14u;
}
inline void clear_INTR2_GPIO19_EDGE_LOW() volatile
{
INTR2 &= ~(1u << 14u);
}
inline void toggle_INTR2_GPIO19_EDGE_LOW() volatile
{
INTR2 ^= 1u << 14u;
}
inline bool get_INTR2_GPIO19_EDGE_HIGH() volatile
{
return INTR2 & (1u << 15u);
}
inline void set_INTR2_GPIO19_EDGE_HIGH() volatile
{
INTR2 |= 1u << 15u;
}
inline void clear_INTR2_GPIO19_EDGE_HIGH() volatile
{
INTR2 &= ~(1u << 15u);
}
inline void toggle_INTR2_GPIO19_EDGE_HIGH() volatile
{
INTR2 ^= 1u << 15u;
}
inline bool get_INTR2_GPIO20_LEVEL_LOW() volatile
{
return INTR2 & (1u << 16u);
}
inline bool get_INTR2_GPIO20_LEVEL_HIGH() volatile
{
return INTR2 & (1u << 17u);
}
inline bool get_INTR2_GPIO20_EDGE_LOW() volatile
{
return INTR2 & (1u << 18u);
}
inline void set_INTR2_GPIO20_EDGE_LOW() volatile
{
INTR2 |= 1u << 18u;
}
inline void clear_INTR2_GPIO20_EDGE_LOW() volatile
{
INTR2 &= ~(1u << 18u);
}
inline void toggle_INTR2_GPIO20_EDGE_LOW() volatile
{
INTR2 ^= 1u << 18u;
}
inline bool get_INTR2_GPIO20_EDGE_HIGH() volatile
{
return INTR2 & (1u << 19u);
}
inline void set_INTR2_GPIO20_EDGE_HIGH() volatile
{
INTR2 |= 1u << 19u;
}
inline void clear_INTR2_GPIO20_EDGE_HIGH() volatile
{
INTR2 &= ~(1u << 19u);
}
inline void toggle_INTR2_GPIO20_EDGE_HIGH() volatile
{
INTR2 ^= 1u << 19u;
}
inline bool get_INTR2_GPIO21_LEVEL_LOW() volatile
{
return INTR2 & (1u << 20u);
}
inline bool get_INTR2_GPIO21_LEVEL_HIGH() volatile
{
return INTR2 & (1u << 21u);
}
inline bool get_INTR2_GPIO21_EDGE_LOW() volatile
{
return INTR2 & (1u << 22u);
}
inline void set_INTR2_GPIO21_EDGE_LOW() volatile
{
INTR2 |= 1u << 22u;
}
inline void clear_INTR2_GPIO21_EDGE_LOW() volatile
{
INTR2 &= ~(1u << 22u);
}
inline void toggle_INTR2_GPIO21_EDGE_LOW() volatile
{
INTR2 ^= 1u << 22u;
}
inline bool get_INTR2_GPIO21_EDGE_HIGH() volatile
{
return INTR2 & (1u << 23u);
}
inline void set_INTR2_GPIO21_EDGE_HIGH() volatile
{
INTR2 |= 1u << 23u;
}
inline void clear_INTR2_GPIO21_EDGE_HIGH() volatile
{
INTR2 &= ~(1u << 23u);
}
inline void toggle_INTR2_GPIO21_EDGE_HIGH() volatile
{
INTR2 ^= 1u << 23u;
}
inline bool get_INTR2_GPIO22_LEVEL_LOW() volatile
{
return INTR2 & (1u << 24u);
}
inline bool get_INTR2_GPIO22_LEVEL_HIGH() volatile
{
return INTR2 & (1u << 25u);
}
inline bool get_INTR2_GPIO22_EDGE_LOW() volatile
{
return INTR2 & (1u << 26u);
}
inline void set_INTR2_GPIO22_EDGE_LOW() volatile
{
INTR2 |= 1u << 26u;
}
inline void clear_INTR2_GPIO22_EDGE_LOW() volatile
{
INTR2 &= ~(1u << 26u);
}
inline void toggle_INTR2_GPIO22_EDGE_LOW() volatile
{
INTR2 ^= 1u << 26u;
}
inline bool get_INTR2_GPIO22_EDGE_HIGH() volatile
{
return INTR2 & (1u << 27u);
}
inline void set_INTR2_GPIO22_EDGE_HIGH() volatile
{
INTR2 |= 1u << 27u;
}
inline void clear_INTR2_GPIO22_EDGE_HIGH() volatile
{
INTR2 &= ~(1u << 27u);
}
inline void toggle_INTR2_GPIO22_EDGE_HIGH() volatile
{
INTR2 ^= 1u << 27u;
}
inline bool get_INTR2_GPIO23_LEVEL_LOW() volatile
{
return INTR2 & (1u << 28u);
}
inline bool get_INTR2_GPIO23_LEVEL_HIGH() volatile
{
return INTR2 & (1u << 29u);
}
inline bool get_INTR2_GPIO23_EDGE_LOW() volatile
{
return INTR2 & (1u << 30u);
}
inline void set_INTR2_GPIO23_EDGE_LOW() volatile
{
INTR2 |= 1u << 30u;
}
inline void clear_INTR2_GPIO23_EDGE_LOW() volatile
{
INTR2 &= ~(1u << 30u);
}
inline void toggle_INTR2_GPIO23_EDGE_LOW() volatile
{
INTR2 ^= 1u << 30u;
}
inline bool get_INTR2_GPIO23_EDGE_HIGH() volatile
{
return INTR2 & (1u << 31u);
}
inline void set_INTR2_GPIO23_EDGE_HIGH() volatile
{
INTR2 |= 1u << 31u;
}
inline void clear_INTR2_GPIO23_EDGE_HIGH() volatile
{
INTR2 &= ~(1u << 31u);
}
inline void toggle_INTR2_GPIO23_EDGE_HIGH() volatile
{
INTR2 ^= 1u << 31u;
}
inline void get_INTR2(
bool &GPIO16_LEVEL_LOW, bool &GPIO16_LEVEL_HIGH, bool &GPIO16_EDGE_LOW,
bool &GPIO16_EDGE_HIGH, bool &GPIO17_LEVEL_LOW,
bool &GPIO17_LEVEL_HIGH, bool &GPIO17_EDGE_LOW, bool &GPIO17_EDGE_HIGH,
bool &GPIO18_LEVEL_LOW, bool &GPIO18_LEVEL_HIGH, bool &GPIO18_EDGE_LOW,
bool &GPIO18_EDGE_HIGH, bool &GPIO19_LEVEL_LOW,
bool &GPIO19_LEVEL_HIGH, bool &GPIO19_EDGE_LOW, bool &GPIO19_EDGE_HIGH,
bool &GPIO20_LEVEL_LOW, bool &GPIO20_LEVEL_HIGH, bool &GPIO20_EDGE_LOW,
bool &GPIO20_EDGE_HIGH, bool &GPIO21_LEVEL_LOW,
bool &GPIO21_LEVEL_HIGH, bool &GPIO21_EDGE_LOW, bool &GPIO21_EDGE_HIGH,
bool &GPIO22_LEVEL_LOW, bool &GPIO22_LEVEL_HIGH, bool &GPIO22_EDGE_LOW,
bool &GPIO22_EDGE_HIGH, bool &GPIO23_LEVEL_LOW,
bool &GPIO23_LEVEL_HIGH, bool &GPIO23_EDGE_LOW,
bool &GPIO23_EDGE_HIGH) volatile
{
uint32_t curr = INTR2;
GPIO16_LEVEL_LOW = curr & (1u << 0u);
GPIO16_LEVEL_HIGH = curr & (1u << 1u);
GPIO16_EDGE_LOW = curr & (1u << 2u);
GPIO16_EDGE_HIGH = curr & (1u << 3u);
GPIO17_LEVEL_LOW = curr & (1u << 4u);
GPIO17_LEVEL_HIGH = curr & (1u << 5u);
GPIO17_EDGE_LOW = curr & (1u << 6u);
GPIO17_EDGE_HIGH = curr & (1u << 7u);
GPIO18_LEVEL_LOW = curr & (1u << 8u);
GPIO18_LEVEL_HIGH = curr & (1u << 9u);
GPIO18_EDGE_LOW = curr & (1u << 10u);
GPIO18_EDGE_HIGH = curr & (1u << 11u);
GPIO19_LEVEL_LOW = curr & (1u << 12u);
GPIO19_LEVEL_HIGH = curr & (1u << 13u);
GPIO19_EDGE_LOW = curr & (1u << 14u);
GPIO19_EDGE_HIGH = curr & (1u << 15u);
GPIO20_LEVEL_LOW = curr & (1u << 16u);
GPIO20_LEVEL_HIGH = curr & (1u << 17u);
GPIO20_EDGE_LOW = curr & (1u << 18u);
GPIO20_EDGE_HIGH = curr & (1u << 19u);
GPIO21_LEVEL_LOW = curr & (1u << 20u);
GPIO21_LEVEL_HIGH = curr & (1u << 21u);
GPIO21_EDGE_LOW = curr & (1u << 22u);
GPIO21_EDGE_HIGH = curr & (1u << 23u);
GPIO22_LEVEL_LOW = curr & (1u << 24u);
GPIO22_LEVEL_HIGH = curr & (1u << 25u);
GPIO22_EDGE_LOW = curr & (1u << 26u);
GPIO22_EDGE_HIGH = curr & (1u << 27u);
GPIO23_LEVEL_LOW = curr & (1u << 28u);
GPIO23_LEVEL_HIGH = curr & (1u << 29u);
GPIO23_EDGE_LOW = curr & (1u << 30u);
GPIO23_EDGE_HIGH = curr & (1u << 31u);
}
inline void set_INTR2(bool GPIO16_EDGE_LOW, bool GPIO16_EDGE_HIGH,
bool GPIO17_EDGE_LOW, bool GPIO17_EDGE_HIGH,
bool GPIO18_EDGE_LOW, bool GPIO18_EDGE_HIGH,
bool GPIO19_EDGE_LOW, bool GPIO19_EDGE_HIGH,
bool GPIO20_EDGE_LOW, bool GPIO20_EDGE_HIGH,
bool GPIO21_EDGE_LOW, bool GPIO21_EDGE_HIGH,
bool GPIO22_EDGE_LOW, bool GPIO22_EDGE_HIGH,
bool GPIO23_EDGE_LOW, bool GPIO23_EDGE_HIGH) volatile
{
uint32_t curr = INTR2;
curr &= ~(0b1u << 2u);
curr |= (GPIO16_EDGE_LOW & 0b1u) << 2u;
curr &= ~(0b1u << 3u);
curr |= (GPIO16_EDGE_HIGH & 0b1u) << 3u;
curr &= ~(0b1u << 6u);
curr |= (GPIO17_EDGE_LOW & 0b1u) << 6u;
curr &= ~(0b1u << 7u);
curr |= (GPIO17_EDGE_HIGH & 0b1u) << 7u;
curr &= ~(0b1u << 10u);
curr |= (GPIO18_EDGE_LOW & 0b1u) << 10u;
curr &= ~(0b1u << 11u);
curr |= (GPIO18_EDGE_HIGH & 0b1u) << 11u;
curr &= ~(0b1u << 14u);
curr |= (GPIO19_EDGE_LOW & 0b1u) << 14u;
curr &= ~(0b1u << 15u);
curr |= (GPIO19_EDGE_HIGH & 0b1u) << 15u;
curr &= ~(0b1u << 18u);
curr |= (GPIO20_EDGE_LOW & 0b1u) << 18u;
curr &= ~(0b1u << 19u);
curr |= (GPIO20_EDGE_HIGH & 0b1u) << 19u;
curr &= ~(0b1u << 22u);
curr |= (GPIO21_EDGE_LOW & 0b1u) << 22u;
curr &= ~(0b1u << 23u);
curr |= (GPIO21_EDGE_HIGH & 0b1u) << 23u;
curr &= ~(0b1u << 26u);
curr |= (GPIO22_EDGE_LOW & 0b1u) << 26u;
curr &= ~(0b1u << 27u);
curr |= (GPIO22_EDGE_HIGH & 0b1u) << 27u;
curr &= ~(0b1u << 30u);
curr |= (GPIO23_EDGE_LOW & 0b1u) << 30u;
curr &= ~(0b1u << 31u);
curr |= (GPIO23_EDGE_HIGH & 0b1u) << 31u;
INTR2 = curr;
}
inline bool get_INTR3_GPIO24_LEVEL_LOW() volatile
{
return INTR3 & (1u << 0u);
}
inline bool get_INTR3_GPIO24_LEVEL_HIGH() volatile
{
return INTR3 & (1u << 1u);
}
inline bool get_INTR3_GPIO24_EDGE_LOW() volatile
{
return INTR3 & (1u << 2u);
}
inline void set_INTR3_GPIO24_EDGE_LOW() volatile
{
INTR3 |= 1u << 2u;
}
inline void clear_INTR3_GPIO24_EDGE_LOW() volatile
{
INTR3 &= ~(1u << 2u);
}
inline void toggle_INTR3_GPIO24_EDGE_LOW() volatile
{
INTR3 ^= 1u << 2u;
}
inline bool get_INTR3_GPIO24_EDGE_HIGH() volatile
{
return INTR3 & (1u << 3u);
}
inline void set_INTR3_GPIO24_EDGE_HIGH() volatile
{
INTR3 |= 1u << 3u;
}
inline void clear_INTR3_GPIO24_EDGE_HIGH() volatile
{
INTR3 &= ~(1u << 3u);
}
inline void toggle_INTR3_GPIO24_EDGE_HIGH() volatile
{
INTR3 ^= 1u << 3u;
}
inline bool get_INTR3_GPIO25_LEVEL_LOW() volatile
{
return INTR3 & (1u << 4u);
}
inline bool get_INTR3_GPIO25_LEVEL_HIGH() volatile
{
return INTR3 & (1u << 5u);
}
inline bool get_INTR3_GPIO25_EDGE_LOW() volatile
{
return INTR3 & (1u << 6u);
}
inline void set_INTR3_GPIO25_EDGE_LOW() volatile
{
INTR3 |= 1u << 6u;
}
inline void clear_INTR3_GPIO25_EDGE_LOW() volatile
{
INTR3 &= ~(1u << 6u);
}
inline void toggle_INTR3_GPIO25_EDGE_LOW() volatile
{
INTR3 ^= 1u << 6u;
}
inline bool get_INTR3_GPIO25_EDGE_HIGH() volatile
{
return INTR3 & (1u << 7u);
}
inline void set_INTR3_GPIO25_EDGE_HIGH() volatile
{
INTR3 |= 1u << 7u;
}
inline void clear_INTR3_GPIO25_EDGE_HIGH() volatile
{
INTR3 &= ~(1u << 7u);
}
inline void toggle_INTR3_GPIO25_EDGE_HIGH() volatile
{
INTR3 ^= 1u << 7u;
}
inline bool get_INTR3_GPIO26_LEVEL_LOW() volatile
{
return INTR3 & (1u << 8u);
}
inline bool get_INTR3_GPIO26_LEVEL_HIGH() volatile
{
return INTR3 & (1u << 9u);
}
inline bool get_INTR3_GPIO26_EDGE_LOW() volatile
{
return INTR3 & (1u << 10u);
}
inline void set_INTR3_GPIO26_EDGE_LOW() volatile
{
INTR3 |= 1u << 10u;
}
inline void clear_INTR3_GPIO26_EDGE_LOW() volatile
{
INTR3 &= ~(1u << 10u);
}
inline void toggle_INTR3_GPIO26_EDGE_LOW() volatile
{
INTR3 ^= 1u << 10u;
}
inline bool get_INTR3_GPIO26_EDGE_HIGH() volatile
{
return INTR3 & (1u << 11u);
}
inline void set_INTR3_GPIO26_EDGE_HIGH() volatile
{
INTR3 |= 1u << 11u;
}
inline void clear_INTR3_GPIO26_EDGE_HIGH() volatile
{
INTR3 &= ~(1u << 11u);
}
inline void toggle_INTR3_GPIO26_EDGE_HIGH() volatile
{
INTR3 ^= 1u << 11u;
}
inline bool get_INTR3_GPIO27_LEVEL_LOW() volatile
{
return INTR3 & (1u << 12u);
}
inline bool get_INTR3_GPIO27_LEVEL_HIGH() volatile
{
return INTR3 & (1u << 13u);
}
inline bool get_INTR3_GPIO27_EDGE_LOW() volatile
{
return INTR3 & (1u << 14u);
}
inline void set_INTR3_GPIO27_EDGE_LOW() volatile
{
INTR3 |= 1u << 14u;
}
inline void clear_INTR3_GPIO27_EDGE_LOW() volatile
{
INTR3 &= ~(1u << 14u);
}
inline void toggle_INTR3_GPIO27_EDGE_LOW() volatile
{
INTR3 ^= 1u << 14u;
}
inline bool get_INTR3_GPIO27_EDGE_HIGH() volatile
{
return INTR3 & (1u << 15u);
}
inline void set_INTR3_GPIO27_EDGE_HIGH() volatile
{
INTR3 |= 1u << 15u;
}
inline void clear_INTR3_GPIO27_EDGE_HIGH() volatile
{
INTR3 &= ~(1u << 15u);
}
inline void toggle_INTR3_GPIO27_EDGE_HIGH() volatile
{
INTR3 ^= 1u << 15u;
}
inline bool get_INTR3_GPIO28_LEVEL_LOW() volatile
{
return INTR3 & (1u << 16u);
}
inline bool get_INTR3_GPIO28_LEVEL_HIGH() volatile
{
return INTR3 & (1u << 17u);
}
inline bool get_INTR3_GPIO28_EDGE_LOW() volatile
{
return INTR3 & (1u << 18u);
}
inline void set_INTR3_GPIO28_EDGE_LOW() volatile
{
INTR3 |= 1u << 18u;
}
inline void clear_INTR3_GPIO28_EDGE_LOW() volatile
{
INTR3 &= ~(1u << 18u);
}
inline void toggle_INTR3_GPIO28_EDGE_LOW() volatile
{
INTR3 ^= 1u << 18u;
}
inline bool get_INTR3_GPIO28_EDGE_HIGH() volatile
{
return INTR3 & (1u << 19u);
}
inline void set_INTR3_GPIO28_EDGE_HIGH() volatile
{
INTR3 |= 1u << 19u;
}
inline void clear_INTR3_GPIO28_EDGE_HIGH() volatile
{
INTR3 &= ~(1u << 19u);
}
inline void toggle_INTR3_GPIO28_EDGE_HIGH() volatile
{
INTR3 ^= 1u << 19u;
}
inline bool get_INTR3_GPIO29_LEVEL_LOW() volatile
{
return INTR3 & (1u << 20u);
}
inline bool get_INTR3_GPIO29_LEVEL_HIGH() volatile
{
return INTR3 & (1u << 21u);
}
inline bool get_INTR3_GPIO29_EDGE_LOW() volatile
{
return INTR3 & (1u << 22u);
}
inline void set_INTR3_GPIO29_EDGE_LOW() volatile
{
INTR3 |= 1u << 22u;
}
inline void clear_INTR3_GPIO29_EDGE_LOW() volatile
{
INTR3 &= ~(1u << 22u);
}
inline void toggle_INTR3_GPIO29_EDGE_LOW() volatile
{
INTR3 ^= 1u << 22u;
}
inline bool get_INTR3_GPIO29_EDGE_HIGH() volatile
{
return INTR3 & (1u << 23u);
}
inline void set_INTR3_GPIO29_EDGE_HIGH() volatile
{
INTR3 |= 1u << 23u;
}
inline void clear_INTR3_GPIO29_EDGE_HIGH() volatile
{
INTR3 &= ~(1u << 23u);
}
inline void toggle_INTR3_GPIO29_EDGE_HIGH() volatile
{
INTR3 ^= 1u << 23u;
}
inline void get_INTR3(bool &GPIO24_LEVEL_LOW, bool &GPIO24_LEVEL_HIGH,
bool &GPIO24_EDGE_LOW, bool &GPIO24_EDGE_HIGH,
bool &GPIO25_LEVEL_LOW, bool &GPIO25_LEVEL_HIGH,
bool &GPIO25_EDGE_LOW, bool &GPIO25_EDGE_HIGH,
bool &GPIO26_LEVEL_LOW, bool &GPIO26_LEVEL_HIGH,
bool &GPIO26_EDGE_LOW, bool &GPIO26_EDGE_HIGH,
bool &GPIO27_LEVEL_LOW, bool &GPIO27_LEVEL_HIGH,
bool &GPIO27_EDGE_LOW, bool &GPIO27_EDGE_HIGH,
bool &GPIO28_LEVEL_LOW, bool &GPIO28_LEVEL_HIGH,
bool &GPIO28_EDGE_LOW, bool &GPIO28_EDGE_HIGH,
bool &GPIO29_LEVEL_LOW, bool &GPIO29_LEVEL_HIGH,
bool &GPIO29_EDGE_LOW,
bool &GPIO29_EDGE_HIGH) volatile
{
uint32_t curr = INTR3;
GPIO24_LEVEL_LOW = curr & (1u << 0u);
GPIO24_LEVEL_HIGH = curr & (1u << 1u);
GPIO24_EDGE_LOW = curr & (1u << 2u);
GPIO24_EDGE_HIGH = curr & (1u << 3u);
GPIO25_LEVEL_LOW = curr & (1u << 4u);
GPIO25_LEVEL_HIGH = curr & (1u << 5u);
GPIO25_EDGE_LOW = curr & (1u << 6u);
GPIO25_EDGE_HIGH = curr & (1u << 7u);
GPIO26_LEVEL_LOW = curr & (1u << 8u);
GPIO26_LEVEL_HIGH = curr & (1u << 9u);
GPIO26_EDGE_LOW = curr & (1u << 10u);
GPIO26_EDGE_HIGH = curr & (1u << 11u);
GPIO27_LEVEL_LOW = curr & (1u << 12u);
GPIO27_LEVEL_HIGH = curr & (1u << 13u);
GPIO27_EDGE_LOW = curr & (1u << 14u);
GPIO27_EDGE_HIGH = curr & (1u << 15u);
GPIO28_LEVEL_LOW = curr & (1u << 16u);
GPIO28_LEVEL_HIGH = curr & (1u << 17u);
GPIO28_EDGE_LOW = curr & (1u << 18u);
GPIO28_EDGE_HIGH = curr & (1u << 19u);
GPIO29_LEVEL_LOW = curr & (1u << 20u);
GPIO29_LEVEL_HIGH = curr & (1u << 21u);
GPIO29_EDGE_LOW = curr & (1u << 22u);
GPIO29_EDGE_HIGH = curr & (1u << 23u);
}
inline void set_INTR3(bool GPIO24_EDGE_LOW, bool GPIO24_EDGE_HIGH,
bool GPIO25_EDGE_LOW, bool GPIO25_EDGE_HIGH,
bool GPIO26_EDGE_LOW, bool GPIO26_EDGE_HIGH,
bool GPIO27_EDGE_LOW, bool GPIO27_EDGE_HIGH,
bool GPIO28_EDGE_LOW, bool GPIO28_EDGE_HIGH,
bool GPIO29_EDGE_LOW, bool GPIO29_EDGE_HIGH) volatile
{
uint32_t curr = INTR3;
curr &= ~(0b1u << 2u);
curr |= (GPIO24_EDGE_LOW & 0b1u) << 2u;
curr &= ~(0b1u << 3u);
curr |= (GPIO24_EDGE_HIGH & 0b1u) << 3u;
curr &= ~(0b1u << 6u);
curr |= (GPIO25_EDGE_LOW & 0b1u) << 6u;
curr &= ~(0b1u << 7u);
curr |= (GPIO25_EDGE_HIGH & 0b1u) << 7u;
curr &= ~(0b1u << 10u);
curr |= (GPIO26_EDGE_LOW & 0b1u) << 10u;
curr &= ~(0b1u << 11u);
curr |= (GPIO26_EDGE_HIGH & 0b1u) << 11u;
curr &= ~(0b1u << 14u);
curr |= (GPIO27_EDGE_LOW & 0b1u) << 14u;
curr &= ~(0b1u << 15u);
curr |= (GPIO27_EDGE_HIGH & 0b1u) << 15u;
curr &= ~(0b1u << 18u);
curr |= (GPIO28_EDGE_LOW & 0b1u) << 18u;
curr &= ~(0b1u << 19u);
curr |= (GPIO28_EDGE_HIGH & 0b1u) << 19u;
curr &= ~(0b1u << 22u);
curr |= (GPIO29_EDGE_LOW & 0b1u) << 22u;
curr &= ~(0b1u << 23u);
curr |= (GPIO29_EDGE_HIGH & 0b1u) << 23u;
INTR3 = curr;
}
inline bool get_PROC0_INTE0_GPIO0_LEVEL_LOW() volatile
{
return PROC0_INTE0 & (1u << 0u);
}
inline void set_PROC0_INTE0_GPIO0_LEVEL_LOW() volatile
{
PROC0_INTE0 |= 1u << 0u;
}
inline void clear_PROC0_INTE0_GPIO0_LEVEL_LOW() volatile
{
PROC0_INTE0 &= ~(1u << 0u);
}
inline void toggle_PROC0_INTE0_GPIO0_LEVEL_LOW() volatile
{
PROC0_INTE0 ^= 1u << 0u;
}
inline bool get_PROC0_INTE0_GPIO0_LEVEL_HIGH() volatile
{
return PROC0_INTE0 & (1u << 1u);
}
inline void set_PROC0_INTE0_GPIO0_LEVEL_HIGH() volatile
{
PROC0_INTE0 |= 1u << 1u;
}
inline void clear_PROC0_INTE0_GPIO0_LEVEL_HIGH() volatile
{
PROC0_INTE0 &= ~(1u << 1u);
}
inline void toggle_PROC0_INTE0_GPIO0_LEVEL_HIGH() volatile
{
PROC0_INTE0 ^= 1u << 1u;
}
inline bool get_PROC0_INTE0_GPIO0_EDGE_LOW() volatile
{
return PROC0_INTE0 & (1u << 2u);
}
inline void set_PROC0_INTE0_GPIO0_EDGE_LOW() volatile
{
PROC0_INTE0 |= 1u << 2u;
}
inline void clear_PROC0_INTE0_GPIO0_EDGE_LOW() volatile
{
PROC0_INTE0 &= ~(1u << 2u);
}
inline void toggle_PROC0_INTE0_GPIO0_EDGE_LOW() volatile
{
PROC0_INTE0 ^= 1u << 2u;
}
inline bool get_PROC0_INTE0_GPIO0_EDGE_HIGH() volatile
{
return PROC0_INTE0 & (1u << 3u);
}
inline void set_PROC0_INTE0_GPIO0_EDGE_HIGH() volatile
{
PROC0_INTE0 |= 1u << 3u;
}
inline void clear_PROC0_INTE0_GPIO0_EDGE_HIGH() volatile
{
PROC0_INTE0 &= ~(1u << 3u);
}
inline void toggle_PROC0_INTE0_GPIO0_EDGE_HIGH() volatile
{
PROC0_INTE0 ^= 1u << 3u;
}
inline bool get_PROC0_INTE0_GPIO1_LEVEL_LOW() volatile
{
return PROC0_INTE0 & (1u << 4u);
}
inline void set_PROC0_INTE0_GPIO1_LEVEL_LOW() volatile
{
PROC0_INTE0 |= 1u << 4u;
}
inline void clear_PROC0_INTE0_GPIO1_LEVEL_LOW() volatile
{
PROC0_INTE0 &= ~(1u << 4u);
}
inline void toggle_PROC0_INTE0_GPIO1_LEVEL_LOW() volatile
{
PROC0_INTE0 ^= 1u << 4u;
}
inline bool get_PROC0_INTE0_GPIO1_LEVEL_HIGH() volatile
{
return PROC0_INTE0 & (1u << 5u);
}
inline void set_PROC0_INTE0_GPIO1_LEVEL_HIGH() volatile
{
PROC0_INTE0 |= 1u << 5u;
}
inline void clear_PROC0_INTE0_GPIO1_LEVEL_HIGH() volatile
{
PROC0_INTE0 &= ~(1u << 5u);
}
inline void toggle_PROC0_INTE0_GPIO1_LEVEL_HIGH() volatile
{
PROC0_INTE0 ^= 1u << 5u;
}
inline bool get_PROC0_INTE0_GPIO1_EDGE_LOW() volatile
{
return PROC0_INTE0 & (1u << 6u);
}
inline void set_PROC0_INTE0_GPIO1_EDGE_LOW() volatile
{
PROC0_INTE0 |= 1u << 6u;
}
inline void clear_PROC0_INTE0_GPIO1_EDGE_LOW() volatile
{
PROC0_INTE0 &= ~(1u << 6u);
}
inline void toggle_PROC0_INTE0_GPIO1_EDGE_LOW() volatile
{
PROC0_INTE0 ^= 1u << 6u;
}
inline bool get_PROC0_INTE0_GPIO1_EDGE_HIGH() volatile
{
return PROC0_INTE0 & (1u << 7u);
}
inline void set_PROC0_INTE0_GPIO1_EDGE_HIGH() volatile
{
PROC0_INTE0 |= 1u << 7u;
}
inline void clear_PROC0_INTE0_GPIO1_EDGE_HIGH() volatile
{
PROC0_INTE0 &= ~(1u << 7u);
}
inline void toggle_PROC0_INTE0_GPIO1_EDGE_HIGH() volatile
{
PROC0_INTE0 ^= 1u << 7u;
}
inline bool get_PROC0_INTE0_GPIO2_LEVEL_LOW() volatile
{
return PROC0_INTE0 & (1u << 8u);
}
inline void set_PROC0_INTE0_GPIO2_LEVEL_LOW() volatile
{
PROC0_INTE0 |= 1u << 8u;
}
inline void clear_PROC0_INTE0_GPIO2_LEVEL_LOW() volatile
{
PROC0_INTE0 &= ~(1u << 8u);
}
inline void toggle_PROC0_INTE0_GPIO2_LEVEL_LOW() volatile
{
PROC0_INTE0 ^= 1u << 8u;
}
inline bool get_PROC0_INTE0_GPIO2_LEVEL_HIGH() volatile
{
return PROC0_INTE0 & (1u << 9u);
}
inline void set_PROC0_INTE0_GPIO2_LEVEL_HIGH() volatile
{
PROC0_INTE0 |= 1u << 9u;
}
inline void clear_PROC0_INTE0_GPIO2_LEVEL_HIGH() volatile
{
PROC0_INTE0 &= ~(1u << 9u);
}
inline void toggle_PROC0_INTE0_GPIO2_LEVEL_HIGH() volatile
{
PROC0_INTE0 ^= 1u << 9u;
}
inline bool get_PROC0_INTE0_GPIO2_EDGE_LOW() volatile
{
return PROC0_INTE0 & (1u << 10u);
}
inline void set_PROC0_INTE0_GPIO2_EDGE_LOW() volatile
{
PROC0_INTE0 |= 1u << 10u;
}
inline void clear_PROC0_INTE0_GPIO2_EDGE_LOW() volatile
{
PROC0_INTE0 &= ~(1u << 10u);
}
inline void toggle_PROC0_INTE0_GPIO2_EDGE_LOW() volatile
{
PROC0_INTE0 ^= 1u << 10u;
}
inline bool get_PROC0_INTE0_GPIO2_EDGE_HIGH() volatile
{
return PROC0_INTE0 & (1u << 11u);
}
inline void set_PROC0_INTE0_GPIO2_EDGE_HIGH() volatile
{
PROC0_INTE0 |= 1u << 11u;
}
inline void clear_PROC0_INTE0_GPIO2_EDGE_HIGH() volatile
{
PROC0_INTE0 &= ~(1u << 11u);
}
inline void toggle_PROC0_INTE0_GPIO2_EDGE_HIGH() volatile
{
PROC0_INTE0 ^= 1u << 11u;
}
inline bool get_PROC0_INTE0_GPIO3_LEVEL_LOW() volatile
{
return PROC0_INTE0 & (1u << 12u);
}
inline void set_PROC0_INTE0_GPIO3_LEVEL_LOW() volatile
{
PROC0_INTE0 |= 1u << 12u;
}
inline void clear_PROC0_INTE0_GPIO3_LEVEL_LOW() volatile
{
PROC0_INTE0 &= ~(1u << 12u);
}
inline void toggle_PROC0_INTE0_GPIO3_LEVEL_LOW() volatile
{
PROC0_INTE0 ^= 1u << 12u;
}
inline bool get_PROC0_INTE0_GPIO3_LEVEL_HIGH() volatile
{
return PROC0_INTE0 & (1u << 13u);
}
inline void set_PROC0_INTE0_GPIO3_LEVEL_HIGH() volatile
{
PROC0_INTE0 |= 1u << 13u;
}
inline void clear_PROC0_INTE0_GPIO3_LEVEL_HIGH() volatile
{
PROC0_INTE0 &= ~(1u << 13u);
}
inline void toggle_PROC0_INTE0_GPIO3_LEVEL_HIGH() volatile
{
PROC0_INTE0 ^= 1u << 13u;
}
inline bool get_PROC0_INTE0_GPIO3_EDGE_LOW() volatile
{
return PROC0_INTE0 & (1u << 14u);
}
inline void set_PROC0_INTE0_GPIO3_EDGE_LOW() volatile
{
PROC0_INTE0 |= 1u << 14u;
}
inline void clear_PROC0_INTE0_GPIO3_EDGE_LOW() volatile
{
PROC0_INTE0 &= ~(1u << 14u);
}
inline void toggle_PROC0_INTE0_GPIO3_EDGE_LOW() volatile
{
PROC0_INTE0 ^= 1u << 14u;
}
inline bool get_PROC0_INTE0_GPIO3_EDGE_HIGH() volatile
{
return PROC0_INTE0 & (1u << 15u);
}
inline void set_PROC0_INTE0_GPIO3_EDGE_HIGH() volatile
{
PROC0_INTE0 |= 1u << 15u;
}
inline void clear_PROC0_INTE0_GPIO3_EDGE_HIGH() volatile
{
PROC0_INTE0 &= ~(1u << 15u);
}
inline void toggle_PROC0_INTE0_GPIO3_EDGE_HIGH() volatile
{
PROC0_INTE0 ^= 1u << 15u;
}
inline bool get_PROC0_INTE0_GPIO4_LEVEL_LOW() volatile
{
return PROC0_INTE0 & (1u << 16u);
}
inline void set_PROC0_INTE0_GPIO4_LEVEL_LOW() volatile
{
PROC0_INTE0 |= 1u << 16u;
}
inline void clear_PROC0_INTE0_GPIO4_LEVEL_LOW() volatile
{
PROC0_INTE0 &= ~(1u << 16u);
}
inline void toggle_PROC0_INTE0_GPIO4_LEVEL_LOW() volatile
{
PROC0_INTE0 ^= 1u << 16u;
}
inline bool get_PROC0_INTE0_GPIO4_LEVEL_HIGH() volatile
{
return PROC0_INTE0 & (1u << 17u);
}
inline void set_PROC0_INTE0_GPIO4_LEVEL_HIGH() volatile
{
PROC0_INTE0 |= 1u << 17u;
}
inline void clear_PROC0_INTE0_GPIO4_LEVEL_HIGH() volatile
{
PROC0_INTE0 &= ~(1u << 17u);
}
inline void toggle_PROC0_INTE0_GPIO4_LEVEL_HIGH() volatile
{
PROC0_INTE0 ^= 1u << 17u;
}
inline bool get_PROC0_INTE0_GPIO4_EDGE_LOW() volatile
{
return PROC0_INTE0 & (1u << 18u);
}
inline void set_PROC0_INTE0_GPIO4_EDGE_LOW() volatile
{
PROC0_INTE0 |= 1u << 18u;
}
inline void clear_PROC0_INTE0_GPIO4_EDGE_LOW() volatile
{
PROC0_INTE0 &= ~(1u << 18u);
}
inline void toggle_PROC0_INTE0_GPIO4_EDGE_LOW() volatile
{
PROC0_INTE0 ^= 1u << 18u;
}
inline bool get_PROC0_INTE0_GPIO4_EDGE_HIGH() volatile
{
return PROC0_INTE0 & (1u << 19u);
}
inline void set_PROC0_INTE0_GPIO4_EDGE_HIGH() volatile
{
PROC0_INTE0 |= 1u << 19u;
}
inline void clear_PROC0_INTE0_GPIO4_EDGE_HIGH() volatile
{
PROC0_INTE0 &= ~(1u << 19u);
}
inline void toggle_PROC0_INTE0_GPIO4_EDGE_HIGH() volatile
{
PROC0_INTE0 ^= 1u << 19u;
}
inline bool get_PROC0_INTE0_GPIO5_LEVEL_LOW() volatile
{
return PROC0_INTE0 & (1u << 20u);
}
inline void set_PROC0_INTE0_GPIO5_LEVEL_LOW() volatile
{
PROC0_INTE0 |= 1u << 20u;
}
inline void clear_PROC0_INTE0_GPIO5_LEVEL_LOW() volatile
{
PROC0_INTE0 &= ~(1u << 20u);
}
inline void toggle_PROC0_INTE0_GPIO5_LEVEL_LOW() volatile
{
PROC0_INTE0 ^= 1u << 20u;
}
inline bool get_PROC0_INTE0_GPIO5_LEVEL_HIGH() volatile
{
return PROC0_INTE0 & (1u << 21u);
}
inline void set_PROC0_INTE0_GPIO5_LEVEL_HIGH() volatile
{
PROC0_INTE0 |= 1u << 21u;
}
inline void clear_PROC0_INTE0_GPIO5_LEVEL_HIGH() volatile
{
PROC0_INTE0 &= ~(1u << 21u);
}
inline void toggle_PROC0_INTE0_GPIO5_LEVEL_HIGH() volatile
{
PROC0_INTE0 ^= 1u << 21u;
}
inline bool get_PROC0_INTE0_GPIO5_EDGE_LOW() volatile
{
return PROC0_INTE0 & (1u << 22u);
}
inline void set_PROC0_INTE0_GPIO5_EDGE_LOW() volatile
{
PROC0_INTE0 |= 1u << 22u;
}
inline void clear_PROC0_INTE0_GPIO5_EDGE_LOW() volatile
{
PROC0_INTE0 &= ~(1u << 22u);
}
inline void toggle_PROC0_INTE0_GPIO5_EDGE_LOW() volatile
{
PROC0_INTE0 ^= 1u << 22u;
}
inline bool get_PROC0_INTE0_GPIO5_EDGE_HIGH() volatile
{
return PROC0_INTE0 & (1u << 23u);
}
inline void set_PROC0_INTE0_GPIO5_EDGE_HIGH() volatile
{
PROC0_INTE0 |= 1u << 23u;
}
inline void clear_PROC0_INTE0_GPIO5_EDGE_HIGH() volatile
{
PROC0_INTE0 &= ~(1u << 23u);
}
inline void toggle_PROC0_INTE0_GPIO5_EDGE_HIGH() volatile
{
PROC0_INTE0 ^= 1u << 23u;
}
inline bool get_PROC0_INTE0_GPIO6_LEVEL_LOW() volatile
{
return PROC0_INTE0 & (1u << 24u);
}
inline void set_PROC0_INTE0_GPIO6_LEVEL_LOW() volatile
{
PROC0_INTE0 |= 1u << 24u;
}
inline void clear_PROC0_INTE0_GPIO6_LEVEL_LOW() volatile
{
PROC0_INTE0 &= ~(1u << 24u);
}
inline void toggle_PROC0_INTE0_GPIO6_LEVEL_LOW() volatile
{
PROC0_INTE0 ^= 1u << 24u;
}
inline bool get_PROC0_INTE0_GPIO6_LEVEL_HIGH() volatile
{
return PROC0_INTE0 & (1u << 25u);
}
inline void set_PROC0_INTE0_GPIO6_LEVEL_HIGH() volatile
{
PROC0_INTE0 |= 1u << 25u;
}
inline void clear_PROC0_INTE0_GPIO6_LEVEL_HIGH() volatile
{
PROC0_INTE0 &= ~(1u << 25u);
}
inline void toggle_PROC0_INTE0_GPIO6_LEVEL_HIGH() volatile
{
PROC0_INTE0 ^= 1u << 25u;
}
inline bool get_PROC0_INTE0_GPIO6_EDGE_LOW() volatile
{
return PROC0_INTE0 & (1u << 26u);
}
inline void set_PROC0_INTE0_GPIO6_EDGE_LOW() volatile
{
PROC0_INTE0 |= 1u << 26u;
}
inline void clear_PROC0_INTE0_GPIO6_EDGE_LOW() volatile
{
PROC0_INTE0 &= ~(1u << 26u);
}
inline void toggle_PROC0_INTE0_GPIO6_EDGE_LOW() volatile
{
PROC0_INTE0 ^= 1u << 26u;
}
inline bool get_PROC0_INTE0_GPIO6_EDGE_HIGH() volatile
{
return PROC0_INTE0 & (1u << 27u);
}
inline void set_PROC0_INTE0_GPIO6_EDGE_HIGH() volatile
{
PROC0_INTE0 |= 1u << 27u;
}
inline void clear_PROC0_INTE0_GPIO6_EDGE_HIGH() volatile
{
PROC0_INTE0 &= ~(1u << 27u);
}
inline void toggle_PROC0_INTE0_GPIO6_EDGE_HIGH() volatile
{
PROC0_INTE0 ^= 1u << 27u;
}
inline bool get_PROC0_INTE0_GPIO7_LEVEL_LOW() volatile
{
return PROC0_INTE0 & (1u << 28u);
}
inline void set_PROC0_INTE0_GPIO7_LEVEL_LOW() volatile
{
PROC0_INTE0 |= 1u << 28u;
}
inline void clear_PROC0_INTE0_GPIO7_LEVEL_LOW() volatile
{
PROC0_INTE0 &= ~(1u << 28u);
}
inline void toggle_PROC0_INTE0_GPIO7_LEVEL_LOW() volatile
{
PROC0_INTE0 ^= 1u << 28u;
}
inline bool get_PROC0_INTE0_GPIO7_LEVEL_HIGH() volatile
{
return PROC0_INTE0 & (1u << 29u);
}
inline void set_PROC0_INTE0_GPIO7_LEVEL_HIGH() volatile
{
PROC0_INTE0 |= 1u << 29u;
}
inline void clear_PROC0_INTE0_GPIO7_LEVEL_HIGH() volatile
{
PROC0_INTE0 &= ~(1u << 29u);
}
inline void toggle_PROC0_INTE0_GPIO7_LEVEL_HIGH() volatile
{
PROC0_INTE0 ^= 1u << 29u;
}
inline bool get_PROC0_INTE0_GPIO7_EDGE_LOW() volatile
{
return PROC0_INTE0 & (1u << 30u);
}
inline void set_PROC0_INTE0_GPIO7_EDGE_LOW() volatile
{
PROC0_INTE0 |= 1u << 30u;
}
inline void clear_PROC0_INTE0_GPIO7_EDGE_LOW() volatile
{
PROC0_INTE0 &= ~(1u << 30u);
}
inline void toggle_PROC0_INTE0_GPIO7_EDGE_LOW() volatile
{
PROC0_INTE0 ^= 1u << 30u;
}
inline bool get_PROC0_INTE0_GPIO7_EDGE_HIGH() volatile
{
return PROC0_INTE0 & (1u << 31u);
}
inline void set_PROC0_INTE0_GPIO7_EDGE_HIGH() volatile
{
PROC0_INTE0 |= 1u << 31u;
}
inline void clear_PROC0_INTE0_GPIO7_EDGE_HIGH() volatile
{
PROC0_INTE0 &= ~(1u << 31u);
}
inline void toggle_PROC0_INTE0_GPIO7_EDGE_HIGH() volatile
{
PROC0_INTE0 ^= 1u << 31u;
}
inline void get_PROC0_INTE0(
bool &GPIO0_LEVEL_LOW, bool &GPIO0_LEVEL_HIGH, bool &GPIO0_EDGE_LOW,
bool &GPIO0_EDGE_HIGH, bool &GPIO1_LEVEL_LOW, bool &GPIO1_LEVEL_HIGH,
bool &GPIO1_EDGE_LOW, bool &GPIO1_EDGE_HIGH, bool &GPIO2_LEVEL_LOW,
bool &GPIO2_LEVEL_HIGH, bool &GPIO2_EDGE_LOW, bool &GPIO2_EDGE_HIGH,
bool &GPIO3_LEVEL_LOW, bool &GPIO3_LEVEL_HIGH, bool &GPIO3_EDGE_LOW,
bool &GPIO3_EDGE_HIGH, bool &GPIO4_LEVEL_LOW, bool &GPIO4_LEVEL_HIGH,
bool &GPIO4_EDGE_LOW, bool &GPIO4_EDGE_HIGH, bool &GPIO5_LEVEL_LOW,
bool &GPIO5_LEVEL_HIGH, bool &GPIO5_EDGE_LOW, bool &GPIO5_EDGE_HIGH,
bool &GPIO6_LEVEL_LOW, bool &GPIO6_LEVEL_HIGH, bool &GPIO6_EDGE_LOW,
bool &GPIO6_EDGE_HIGH, bool &GPIO7_LEVEL_LOW, bool &GPIO7_LEVEL_HIGH,
bool &GPIO7_EDGE_LOW, bool &GPIO7_EDGE_HIGH) volatile
{
uint32_t curr = PROC0_INTE0;
GPIO0_LEVEL_LOW = curr & (1u << 0u);
GPIO0_LEVEL_HIGH = curr & (1u << 1u);
GPIO0_EDGE_LOW = curr & (1u << 2u);
GPIO0_EDGE_HIGH = curr & (1u << 3u);
GPIO1_LEVEL_LOW = curr & (1u << 4u);
GPIO1_LEVEL_HIGH = curr & (1u << 5u);
GPIO1_EDGE_LOW = curr & (1u << 6u);
GPIO1_EDGE_HIGH = curr & (1u << 7u);
GPIO2_LEVEL_LOW = curr & (1u << 8u);
GPIO2_LEVEL_HIGH = curr & (1u << 9u);
GPIO2_EDGE_LOW = curr & (1u << 10u);
GPIO2_EDGE_HIGH = curr & (1u << 11u);
GPIO3_LEVEL_LOW = curr & (1u << 12u);
GPIO3_LEVEL_HIGH = curr & (1u << 13u);
GPIO3_EDGE_LOW = curr & (1u << 14u);
GPIO3_EDGE_HIGH = curr & (1u << 15u);
GPIO4_LEVEL_LOW = curr & (1u << 16u);
GPIO4_LEVEL_HIGH = curr & (1u << 17u);
GPIO4_EDGE_LOW = curr & (1u << 18u);
GPIO4_EDGE_HIGH = curr & (1u << 19u);
GPIO5_LEVEL_LOW = curr & (1u << 20u);
GPIO5_LEVEL_HIGH = curr & (1u << 21u);
GPIO5_EDGE_LOW = curr & (1u << 22u);
GPIO5_EDGE_HIGH = curr & (1u << 23u);
GPIO6_LEVEL_LOW = curr & (1u << 24u);
GPIO6_LEVEL_HIGH = curr & (1u << 25u);
GPIO6_EDGE_LOW = curr & (1u << 26u);
GPIO6_EDGE_HIGH = curr & (1u << 27u);
GPIO7_LEVEL_LOW = curr & (1u << 28u);
GPIO7_LEVEL_HIGH = curr & (1u << 29u);
GPIO7_EDGE_LOW = curr & (1u << 30u);
GPIO7_EDGE_HIGH = curr & (1u << 31u);
}
inline void set_PROC0_INTE0(
bool GPIO0_LEVEL_LOW, bool GPIO0_LEVEL_HIGH, bool GPIO0_EDGE_LOW,
bool GPIO0_EDGE_HIGH, bool GPIO1_LEVEL_LOW, bool GPIO1_LEVEL_HIGH,
bool GPIO1_EDGE_LOW, bool GPIO1_EDGE_HIGH, bool GPIO2_LEVEL_LOW,
bool GPIO2_LEVEL_HIGH, bool GPIO2_EDGE_LOW, bool GPIO2_EDGE_HIGH,
bool GPIO3_LEVEL_LOW, bool GPIO3_LEVEL_HIGH, bool GPIO3_EDGE_LOW,
bool GPIO3_EDGE_HIGH, bool GPIO4_LEVEL_LOW, bool GPIO4_LEVEL_HIGH,
bool GPIO4_EDGE_LOW, bool GPIO4_EDGE_HIGH, bool GPIO5_LEVEL_LOW,
bool GPIO5_LEVEL_HIGH, bool GPIO5_EDGE_LOW, bool GPIO5_EDGE_HIGH,
bool GPIO6_LEVEL_LOW, bool GPIO6_LEVEL_HIGH, bool GPIO6_EDGE_LOW,
bool GPIO6_EDGE_HIGH, bool GPIO7_LEVEL_LOW, bool GPIO7_LEVEL_HIGH,
bool GPIO7_EDGE_LOW, bool GPIO7_EDGE_HIGH) volatile
{
uint32_t curr = PROC0_INTE0;
curr &= ~(0b1u << 0u);
curr |= (GPIO0_LEVEL_LOW & 0b1u) << 0u;
curr &= ~(0b1u << 1u);
curr |= (GPIO0_LEVEL_HIGH & 0b1u) << 1u;
curr &= ~(0b1u << 2u);
curr |= (GPIO0_EDGE_LOW & 0b1u) << 2u;
curr &= ~(0b1u << 3u);
curr |= (GPIO0_EDGE_HIGH & 0b1u) << 3u;
curr &= ~(0b1u << 4u);
curr |= (GPIO1_LEVEL_LOW & 0b1u) << 4u;
curr &= ~(0b1u << 5u);
curr |= (GPIO1_LEVEL_HIGH & 0b1u) << 5u;
curr &= ~(0b1u << 6u);
curr |= (GPIO1_EDGE_LOW & 0b1u) << 6u;
curr &= ~(0b1u << 7u);
curr |= (GPIO1_EDGE_HIGH & 0b1u) << 7u;
curr &= ~(0b1u << 8u);
curr |= (GPIO2_LEVEL_LOW & 0b1u) << 8u;
curr &= ~(0b1u << 9u);
curr |= (GPIO2_LEVEL_HIGH & 0b1u) << 9u;
curr &= ~(0b1u << 10u);
curr |= (GPIO2_EDGE_LOW & 0b1u) << 10u;
curr &= ~(0b1u << 11u);
curr |= (GPIO2_EDGE_HIGH & 0b1u) << 11u;
curr &= ~(0b1u << 12u);
curr |= (GPIO3_LEVEL_LOW & 0b1u) << 12u;
curr &= ~(0b1u << 13u);
curr |= (GPIO3_LEVEL_HIGH & 0b1u) << 13u;
curr &= ~(0b1u << 14u);
curr |= (GPIO3_EDGE_LOW & 0b1u) << 14u;
curr &= ~(0b1u << 15u);
curr |= (GPIO3_EDGE_HIGH & 0b1u) << 15u;
curr &= ~(0b1u << 16u);
curr |= (GPIO4_LEVEL_LOW & 0b1u) << 16u;
curr &= ~(0b1u << 17u);
curr |= (GPIO4_LEVEL_HIGH & 0b1u) << 17u;
curr &= ~(0b1u << 18u);
curr |= (GPIO4_EDGE_LOW & 0b1u) << 18u;
curr &= ~(0b1u << 19u);
curr |= (GPIO4_EDGE_HIGH & 0b1u) << 19u;
curr &= ~(0b1u << 20u);
curr |= (GPIO5_LEVEL_LOW & 0b1u) << 20u;
curr &= ~(0b1u << 21u);
curr |= (GPIO5_LEVEL_HIGH & 0b1u) << 21u;
curr &= ~(0b1u << 22u);
curr |= (GPIO5_EDGE_LOW & 0b1u) << 22u;
curr &= ~(0b1u << 23u);
curr |= (GPIO5_EDGE_HIGH & 0b1u) << 23u;
curr &= ~(0b1u << 24u);
curr |= (GPIO6_LEVEL_LOW & 0b1u) << 24u;
curr &= ~(0b1u << 25u);
curr |= (GPIO6_LEVEL_HIGH & 0b1u) << 25u;
curr &= ~(0b1u << 26u);
curr |= (GPIO6_EDGE_LOW & 0b1u) << 26u;
curr &= ~(0b1u << 27u);
curr |= (GPIO6_EDGE_HIGH & 0b1u) << 27u;
curr &= ~(0b1u << 28u);
curr |= (GPIO7_LEVEL_LOW & 0b1u) << 28u;
curr &= ~(0b1u << 29u);
curr |= (GPIO7_LEVEL_HIGH & 0b1u) << 29u;
curr &= ~(0b1u << 30u);
curr |= (GPIO7_EDGE_LOW & 0b1u) << 30u;
curr &= ~(0b1u << 31u);
curr |= (GPIO7_EDGE_HIGH & 0b1u) << 31u;
PROC0_INTE0 = curr;
}
inline bool get_PROC0_INTE1_GPIO8_LEVEL_LOW() volatile
{
return PROC0_INTE1 & (1u << 0u);
}
inline void set_PROC0_INTE1_GPIO8_LEVEL_LOW() volatile
{
PROC0_INTE1 |= 1u << 0u;
}
inline void clear_PROC0_INTE1_GPIO8_LEVEL_LOW() volatile
{
PROC0_INTE1 &= ~(1u << 0u);
}
inline void toggle_PROC0_INTE1_GPIO8_LEVEL_LOW() volatile
{
PROC0_INTE1 ^= 1u << 0u;
}
inline bool get_PROC0_INTE1_GPIO8_LEVEL_HIGH() volatile
{
return PROC0_INTE1 & (1u << 1u);
}
inline void set_PROC0_INTE1_GPIO8_LEVEL_HIGH() volatile
{
PROC0_INTE1 |= 1u << 1u;
}
inline void clear_PROC0_INTE1_GPIO8_LEVEL_HIGH() volatile
{
PROC0_INTE1 &= ~(1u << 1u);
}
inline void toggle_PROC0_INTE1_GPIO8_LEVEL_HIGH() volatile
{
PROC0_INTE1 ^= 1u << 1u;
}
inline bool get_PROC0_INTE1_GPIO8_EDGE_LOW() volatile
{
return PROC0_INTE1 & (1u << 2u);
}
inline void set_PROC0_INTE1_GPIO8_EDGE_LOW() volatile
{
PROC0_INTE1 |= 1u << 2u;
}
inline void clear_PROC0_INTE1_GPIO8_EDGE_LOW() volatile
{
PROC0_INTE1 &= ~(1u << 2u);
}
inline void toggle_PROC0_INTE1_GPIO8_EDGE_LOW() volatile
{
PROC0_INTE1 ^= 1u << 2u;
}
inline bool get_PROC0_INTE1_GPIO8_EDGE_HIGH() volatile
{
return PROC0_INTE1 & (1u << 3u);
}
inline void set_PROC0_INTE1_GPIO8_EDGE_HIGH() volatile
{
PROC0_INTE1 |= 1u << 3u;
}
inline void clear_PROC0_INTE1_GPIO8_EDGE_HIGH() volatile
{
PROC0_INTE1 &= ~(1u << 3u);
}
inline void toggle_PROC0_INTE1_GPIO8_EDGE_HIGH() volatile
{
PROC0_INTE1 ^= 1u << 3u;
}
inline bool get_PROC0_INTE1_GPIO9_LEVEL_LOW() volatile
{
return PROC0_INTE1 & (1u << 4u);
}
inline void set_PROC0_INTE1_GPIO9_LEVEL_LOW() volatile
{
PROC0_INTE1 |= 1u << 4u;
}
inline void clear_PROC0_INTE1_GPIO9_LEVEL_LOW() volatile
{
PROC0_INTE1 &= ~(1u << 4u);
}
inline void toggle_PROC0_INTE1_GPIO9_LEVEL_LOW() volatile
{
PROC0_INTE1 ^= 1u << 4u;
}
inline bool get_PROC0_INTE1_GPIO9_LEVEL_HIGH() volatile
{
return PROC0_INTE1 & (1u << 5u);
}
inline void set_PROC0_INTE1_GPIO9_LEVEL_HIGH() volatile
{
PROC0_INTE1 |= 1u << 5u;
}
inline void clear_PROC0_INTE1_GPIO9_LEVEL_HIGH() volatile
{
PROC0_INTE1 &= ~(1u << 5u);
}
inline void toggle_PROC0_INTE1_GPIO9_LEVEL_HIGH() volatile
{
PROC0_INTE1 ^= 1u << 5u;
}
inline bool get_PROC0_INTE1_GPIO9_EDGE_LOW() volatile
{
return PROC0_INTE1 & (1u << 6u);
}
inline void set_PROC0_INTE1_GPIO9_EDGE_LOW() volatile
{
PROC0_INTE1 |= 1u << 6u;
}
inline void clear_PROC0_INTE1_GPIO9_EDGE_LOW() volatile
{
PROC0_INTE1 &= ~(1u << 6u);
}
inline void toggle_PROC0_INTE1_GPIO9_EDGE_LOW() volatile
{
PROC0_INTE1 ^= 1u << 6u;
}
inline bool get_PROC0_INTE1_GPIO9_EDGE_HIGH() volatile
{
return PROC0_INTE1 & (1u << 7u);
}
inline void set_PROC0_INTE1_GPIO9_EDGE_HIGH() volatile
{
PROC0_INTE1 |= 1u << 7u;
}
inline void clear_PROC0_INTE1_GPIO9_EDGE_HIGH() volatile
{
PROC0_INTE1 &= ~(1u << 7u);
}
inline void toggle_PROC0_INTE1_GPIO9_EDGE_HIGH() volatile
{
PROC0_INTE1 ^= 1u << 7u;
}
inline bool get_PROC0_INTE1_GPIO10_LEVEL_LOW() volatile
{
return PROC0_INTE1 & (1u << 8u);
}
inline void set_PROC0_INTE1_GPIO10_LEVEL_LOW() volatile
{
PROC0_INTE1 |= 1u << 8u;
}
inline void clear_PROC0_INTE1_GPIO10_LEVEL_LOW() volatile
{
PROC0_INTE1 &= ~(1u << 8u);
}
inline void toggle_PROC0_INTE1_GPIO10_LEVEL_LOW() volatile
{
PROC0_INTE1 ^= 1u << 8u;
}
inline bool get_PROC0_INTE1_GPIO10_LEVEL_HIGH() volatile
{
return PROC0_INTE1 & (1u << 9u);
}
inline void set_PROC0_INTE1_GPIO10_LEVEL_HIGH() volatile
{
PROC0_INTE1 |= 1u << 9u;
}
inline void clear_PROC0_INTE1_GPIO10_LEVEL_HIGH() volatile
{
PROC0_INTE1 &= ~(1u << 9u);
}
inline void toggle_PROC0_INTE1_GPIO10_LEVEL_HIGH() volatile
{
PROC0_INTE1 ^= 1u << 9u;
}
inline bool get_PROC0_INTE1_GPIO10_EDGE_LOW() volatile
{
return PROC0_INTE1 & (1u << 10u);
}
inline void set_PROC0_INTE1_GPIO10_EDGE_LOW() volatile
{
PROC0_INTE1 |= 1u << 10u;
}
inline void clear_PROC0_INTE1_GPIO10_EDGE_LOW() volatile
{
PROC0_INTE1 &= ~(1u << 10u);
}
inline void toggle_PROC0_INTE1_GPIO10_EDGE_LOW() volatile
{
PROC0_INTE1 ^= 1u << 10u;
}
inline bool get_PROC0_INTE1_GPIO10_EDGE_HIGH() volatile
{
return PROC0_INTE1 & (1u << 11u);
}
inline void set_PROC0_INTE1_GPIO10_EDGE_HIGH() volatile
{
PROC0_INTE1 |= 1u << 11u;
}
inline void clear_PROC0_INTE1_GPIO10_EDGE_HIGH() volatile
{
PROC0_INTE1 &= ~(1u << 11u);
}
inline void toggle_PROC0_INTE1_GPIO10_EDGE_HIGH() volatile
{
PROC0_INTE1 ^= 1u << 11u;
}
inline bool get_PROC0_INTE1_GPIO11_LEVEL_LOW() volatile
{
return PROC0_INTE1 & (1u << 12u);
}
inline void set_PROC0_INTE1_GPIO11_LEVEL_LOW() volatile
{
PROC0_INTE1 |= 1u << 12u;
}
inline void clear_PROC0_INTE1_GPIO11_LEVEL_LOW() volatile
{
PROC0_INTE1 &= ~(1u << 12u);
}
inline void toggle_PROC0_INTE1_GPIO11_LEVEL_LOW() volatile
{
PROC0_INTE1 ^= 1u << 12u;
}
inline bool get_PROC0_INTE1_GPIO11_LEVEL_HIGH() volatile
{
return PROC0_INTE1 & (1u << 13u);
}
inline void set_PROC0_INTE1_GPIO11_LEVEL_HIGH() volatile
{
PROC0_INTE1 |= 1u << 13u;
}
inline void clear_PROC0_INTE1_GPIO11_LEVEL_HIGH() volatile
{
PROC0_INTE1 &= ~(1u << 13u);
}
inline void toggle_PROC0_INTE1_GPIO11_LEVEL_HIGH() volatile
{
PROC0_INTE1 ^= 1u << 13u;
}
inline bool get_PROC0_INTE1_GPIO11_EDGE_LOW() volatile
{
return PROC0_INTE1 & (1u << 14u);
}
inline void set_PROC0_INTE1_GPIO11_EDGE_LOW() volatile
{
PROC0_INTE1 |= 1u << 14u;
}
inline void clear_PROC0_INTE1_GPIO11_EDGE_LOW() volatile
{
PROC0_INTE1 &= ~(1u << 14u);
}
inline void toggle_PROC0_INTE1_GPIO11_EDGE_LOW() volatile
{
PROC0_INTE1 ^= 1u << 14u;
}
inline bool get_PROC0_INTE1_GPIO11_EDGE_HIGH() volatile
{
return PROC0_INTE1 & (1u << 15u);
}
inline void set_PROC0_INTE1_GPIO11_EDGE_HIGH() volatile
{
PROC0_INTE1 |= 1u << 15u;
}
inline void clear_PROC0_INTE1_GPIO11_EDGE_HIGH() volatile
{
PROC0_INTE1 &= ~(1u << 15u);
}
inline void toggle_PROC0_INTE1_GPIO11_EDGE_HIGH() volatile
{
PROC0_INTE1 ^= 1u << 15u;
}
inline bool get_PROC0_INTE1_GPIO12_LEVEL_LOW() volatile
{
return PROC0_INTE1 & (1u << 16u);
}
inline void set_PROC0_INTE1_GPIO12_LEVEL_LOW() volatile
{
PROC0_INTE1 |= 1u << 16u;
}
inline void clear_PROC0_INTE1_GPIO12_LEVEL_LOW() volatile
{
PROC0_INTE1 &= ~(1u << 16u);
}
inline void toggle_PROC0_INTE1_GPIO12_LEVEL_LOW() volatile
{
PROC0_INTE1 ^= 1u << 16u;
}
inline bool get_PROC0_INTE1_GPIO12_LEVEL_HIGH() volatile
{
return PROC0_INTE1 & (1u << 17u);
}
inline void set_PROC0_INTE1_GPIO12_LEVEL_HIGH() volatile
{
PROC0_INTE1 |= 1u << 17u;
}
inline void clear_PROC0_INTE1_GPIO12_LEVEL_HIGH() volatile
{
PROC0_INTE1 &= ~(1u << 17u);
}
inline void toggle_PROC0_INTE1_GPIO12_LEVEL_HIGH() volatile
{
PROC0_INTE1 ^= 1u << 17u;
}
inline bool get_PROC0_INTE1_GPIO12_EDGE_LOW() volatile
{
return PROC0_INTE1 & (1u << 18u);
}
inline void set_PROC0_INTE1_GPIO12_EDGE_LOW() volatile
{
PROC0_INTE1 |= 1u << 18u;
}
inline void clear_PROC0_INTE1_GPIO12_EDGE_LOW() volatile
{
PROC0_INTE1 &= ~(1u << 18u);
}
inline void toggle_PROC0_INTE1_GPIO12_EDGE_LOW() volatile
{
PROC0_INTE1 ^= 1u << 18u;
}
inline bool get_PROC0_INTE1_GPIO12_EDGE_HIGH() volatile
{
return PROC0_INTE1 & (1u << 19u);
}
inline void set_PROC0_INTE1_GPIO12_EDGE_HIGH() volatile
{
PROC0_INTE1 |= 1u << 19u;
}
inline void clear_PROC0_INTE1_GPIO12_EDGE_HIGH() volatile
{
PROC0_INTE1 &= ~(1u << 19u);
}
inline void toggle_PROC0_INTE1_GPIO12_EDGE_HIGH() volatile
{
PROC0_INTE1 ^= 1u << 19u;
}
inline bool get_PROC0_INTE1_GPIO13_LEVEL_LOW() volatile
{
return PROC0_INTE1 & (1u << 20u);
}
inline void set_PROC0_INTE1_GPIO13_LEVEL_LOW() volatile
{
PROC0_INTE1 |= 1u << 20u;
}
inline void clear_PROC0_INTE1_GPIO13_LEVEL_LOW() volatile
{
PROC0_INTE1 &= ~(1u << 20u);
}
inline void toggle_PROC0_INTE1_GPIO13_LEVEL_LOW() volatile
{
PROC0_INTE1 ^= 1u << 20u;
}
inline bool get_PROC0_INTE1_GPIO13_LEVEL_HIGH() volatile
{
return PROC0_INTE1 & (1u << 21u);
}
inline void set_PROC0_INTE1_GPIO13_LEVEL_HIGH() volatile
{
PROC0_INTE1 |= 1u << 21u;
}
inline void clear_PROC0_INTE1_GPIO13_LEVEL_HIGH() volatile
{
PROC0_INTE1 &= ~(1u << 21u);
}
inline void toggle_PROC0_INTE1_GPIO13_LEVEL_HIGH() volatile
{
PROC0_INTE1 ^= 1u << 21u;
}
inline bool get_PROC0_INTE1_GPIO13_EDGE_LOW() volatile
{
return PROC0_INTE1 & (1u << 22u);
}
inline void set_PROC0_INTE1_GPIO13_EDGE_LOW() volatile
{
PROC0_INTE1 |= 1u << 22u;
}
inline void clear_PROC0_INTE1_GPIO13_EDGE_LOW() volatile
{
PROC0_INTE1 &= ~(1u << 22u);
}
inline void toggle_PROC0_INTE1_GPIO13_EDGE_LOW() volatile
{
PROC0_INTE1 ^= 1u << 22u;
}
inline bool get_PROC0_INTE1_GPIO13_EDGE_HIGH() volatile
{
return PROC0_INTE1 & (1u << 23u);
}
inline void set_PROC0_INTE1_GPIO13_EDGE_HIGH() volatile
{
PROC0_INTE1 |= 1u << 23u;
}
inline void clear_PROC0_INTE1_GPIO13_EDGE_HIGH() volatile
{
PROC0_INTE1 &= ~(1u << 23u);
}
inline void toggle_PROC0_INTE1_GPIO13_EDGE_HIGH() volatile
{
PROC0_INTE1 ^= 1u << 23u;
}
inline bool get_PROC0_INTE1_GPIO14_LEVEL_LOW() volatile
{
return PROC0_INTE1 & (1u << 24u);
}
inline void set_PROC0_INTE1_GPIO14_LEVEL_LOW() volatile
{
PROC0_INTE1 |= 1u << 24u;
}
inline void clear_PROC0_INTE1_GPIO14_LEVEL_LOW() volatile
{
PROC0_INTE1 &= ~(1u << 24u);
}
inline void toggle_PROC0_INTE1_GPIO14_LEVEL_LOW() volatile
{
PROC0_INTE1 ^= 1u << 24u;
}
inline bool get_PROC0_INTE1_GPIO14_LEVEL_HIGH() volatile
{
return PROC0_INTE1 & (1u << 25u);
}
inline void set_PROC0_INTE1_GPIO14_LEVEL_HIGH() volatile
{
PROC0_INTE1 |= 1u << 25u;
}
inline void clear_PROC0_INTE1_GPIO14_LEVEL_HIGH() volatile
{
PROC0_INTE1 &= ~(1u << 25u);
}
inline void toggle_PROC0_INTE1_GPIO14_LEVEL_HIGH() volatile
{
PROC0_INTE1 ^= 1u << 25u;
}
inline bool get_PROC0_INTE1_GPIO14_EDGE_LOW() volatile
{
return PROC0_INTE1 & (1u << 26u);
}
inline void set_PROC0_INTE1_GPIO14_EDGE_LOW() volatile
{
PROC0_INTE1 |= 1u << 26u;
}
inline void clear_PROC0_INTE1_GPIO14_EDGE_LOW() volatile
{
PROC0_INTE1 &= ~(1u << 26u);
}
inline void toggle_PROC0_INTE1_GPIO14_EDGE_LOW() volatile
{
PROC0_INTE1 ^= 1u << 26u;
}
inline bool get_PROC0_INTE1_GPIO14_EDGE_HIGH() volatile
{
return PROC0_INTE1 & (1u << 27u);
}
inline void set_PROC0_INTE1_GPIO14_EDGE_HIGH() volatile
{
PROC0_INTE1 |= 1u << 27u;
}
inline void clear_PROC0_INTE1_GPIO14_EDGE_HIGH() volatile
{
PROC0_INTE1 &= ~(1u << 27u);
}
inline void toggle_PROC0_INTE1_GPIO14_EDGE_HIGH() volatile
{
PROC0_INTE1 ^= 1u << 27u;
}
inline bool get_PROC0_INTE1_GPIO15_LEVEL_LOW() volatile
{
return PROC0_INTE1 & (1u << 28u);
}
inline void set_PROC0_INTE1_GPIO15_LEVEL_LOW() volatile
{
PROC0_INTE1 |= 1u << 28u;
}
inline void clear_PROC0_INTE1_GPIO15_LEVEL_LOW() volatile
{
PROC0_INTE1 &= ~(1u << 28u);
}
inline void toggle_PROC0_INTE1_GPIO15_LEVEL_LOW() volatile
{
PROC0_INTE1 ^= 1u << 28u;
}
inline bool get_PROC0_INTE1_GPIO15_LEVEL_HIGH() volatile
{
return PROC0_INTE1 & (1u << 29u);
}
inline void set_PROC0_INTE1_GPIO15_LEVEL_HIGH() volatile
{
PROC0_INTE1 |= 1u << 29u;
}
inline void clear_PROC0_INTE1_GPIO15_LEVEL_HIGH() volatile
{
PROC0_INTE1 &= ~(1u << 29u);
}
inline void toggle_PROC0_INTE1_GPIO15_LEVEL_HIGH() volatile
{
PROC0_INTE1 ^= 1u << 29u;
}
inline bool get_PROC0_INTE1_GPIO15_EDGE_LOW() volatile
{
return PROC0_INTE1 & (1u << 30u);
}
inline void set_PROC0_INTE1_GPIO15_EDGE_LOW() volatile
{
PROC0_INTE1 |= 1u << 30u;
}
inline void clear_PROC0_INTE1_GPIO15_EDGE_LOW() volatile
{
PROC0_INTE1 &= ~(1u << 30u);
}
inline void toggle_PROC0_INTE1_GPIO15_EDGE_LOW() volatile
{
PROC0_INTE1 ^= 1u << 30u;
}
inline bool get_PROC0_INTE1_GPIO15_EDGE_HIGH() volatile
{
return PROC0_INTE1 & (1u << 31u);
}
inline void set_PROC0_INTE1_GPIO15_EDGE_HIGH() volatile
{
PROC0_INTE1 |= 1u << 31u;
}
inline void clear_PROC0_INTE1_GPIO15_EDGE_HIGH() volatile
{
PROC0_INTE1 &= ~(1u << 31u);
}
inline void toggle_PROC0_INTE1_GPIO15_EDGE_HIGH() volatile
{
PROC0_INTE1 ^= 1u << 31u;
}
inline void get_PROC0_INTE1(
bool &GPIO8_LEVEL_LOW, bool &GPIO8_LEVEL_HIGH, bool &GPIO8_EDGE_LOW,
bool &GPIO8_EDGE_HIGH, bool &GPIO9_LEVEL_LOW, bool &GPIO9_LEVEL_HIGH,
bool &GPIO9_EDGE_LOW, bool &GPIO9_EDGE_HIGH, bool &GPIO10_LEVEL_LOW,
bool &GPIO10_LEVEL_HIGH, bool &GPIO10_EDGE_LOW, bool &GPIO10_EDGE_HIGH,
bool &GPIO11_LEVEL_LOW, bool &GPIO11_LEVEL_HIGH, bool &GPIO11_EDGE_LOW,
bool &GPIO11_EDGE_HIGH, bool &GPIO12_LEVEL_LOW,
bool &GPIO12_LEVEL_HIGH, bool &GPIO12_EDGE_LOW, bool &GPIO12_EDGE_HIGH,
bool &GPIO13_LEVEL_LOW, bool &GPIO13_LEVEL_HIGH, bool &GPIO13_EDGE_LOW,
bool &GPIO13_EDGE_HIGH, bool &GPIO14_LEVEL_LOW,
bool &GPIO14_LEVEL_HIGH, bool &GPIO14_EDGE_LOW, bool &GPIO14_EDGE_HIGH,
bool &GPIO15_LEVEL_LOW, bool &GPIO15_LEVEL_HIGH, bool &GPIO15_EDGE_LOW,
bool &GPIO15_EDGE_HIGH) volatile
{
uint32_t curr = PROC0_INTE1;
GPIO8_LEVEL_LOW = curr & (1u << 0u);
GPIO8_LEVEL_HIGH = curr & (1u << 1u);
GPIO8_EDGE_LOW = curr & (1u << 2u);
GPIO8_EDGE_HIGH = curr & (1u << 3u);
GPIO9_LEVEL_LOW = curr & (1u << 4u);
GPIO9_LEVEL_HIGH = curr & (1u << 5u);
GPIO9_EDGE_LOW = curr & (1u << 6u);
GPIO9_EDGE_HIGH = curr & (1u << 7u);
GPIO10_LEVEL_LOW = curr & (1u << 8u);
GPIO10_LEVEL_HIGH = curr & (1u << 9u);
GPIO10_EDGE_LOW = curr & (1u << 10u);
GPIO10_EDGE_HIGH = curr & (1u << 11u);
GPIO11_LEVEL_LOW = curr & (1u << 12u);
GPIO11_LEVEL_HIGH = curr & (1u << 13u);
GPIO11_EDGE_LOW = curr & (1u << 14u);
GPIO11_EDGE_HIGH = curr & (1u << 15u);
GPIO12_LEVEL_LOW = curr & (1u << 16u);
GPIO12_LEVEL_HIGH = curr & (1u << 17u);
GPIO12_EDGE_LOW = curr & (1u << 18u);
GPIO12_EDGE_HIGH = curr & (1u << 19u);
GPIO13_LEVEL_LOW = curr & (1u << 20u);
GPIO13_LEVEL_HIGH = curr & (1u << 21u);
GPIO13_EDGE_LOW = curr & (1u << 22u);
GPIO13_EDGE_HIGH = curr & (1u << 23u);
GPIO14_LEVEL_LOW = curr & (1u << 24u);
GPIO14_LEVEL_HIGH = curr & (1u << 25u);
GPIO14_EDGE_LOW = curr & (1u << 26u);
GPIO14_EDGE_HIGH = curr & (1u << 27u);
GPIO15_LEVEL_LOW = curr & (1u << 28u);
GPIO15_LEVEL_HIGH = curr & (1u << 29u);
GPIO15_EDGE_LOW = curr & (1u << 30u);
GPIO15_EDGE_HIGH = curr & (1u << 31u);
}
inline void set_PROC0_INTE1(
bool GPIO8_LEVEL_LOW, bool GPIO8_LEVEL_HIGH, bool GPIO8_EDGE_LOW,
bool GPIO8_EDGE_HIGH, bool GPIO9_LEVEL_LOW, bool GPIO9_LEVEL_HIGH,
bool GPIO9_EDGE_LOW, bool GPIO9_EDGE_HIGH, bool GPIO10_LEVEL_LOW,
bool GPIO10_LEVEL_HIGH, bool GPIO10_EDGE_LOW, bool GPIO10_EDGE_HIGH,
bool GPIO11_LEVEL_LOW, bool GPIO11_LEVEL_HIGH, bool GPIO11_EDGE_LOW,
bool GPIO11_EDGE_HIGH, bool GPIO12_LEVEL_LOW, bool GPIO12_LEVEL_HIGH,
bool GPIO12_EDGE_LOW, bool GPIO12_EDGE_HIGH, bool GPIO13_LEVEL_LOW,
bool GPIO13_LEVEL_HIGH, bool GPIO13_EDGE_LOW, bool GPIO13_EDGE_HIGH,
bool GPIO14_LEVEL_LOW, bool GPIO14_LEVEL_HIGH, bool GPIO14_EDGE_LOW,
bool GPIO14_EDGE_HIGH, bool GPIO15_LEVEL_LOW, bool GPIO15_LEVEL_HIGH,
bool GPIO15_EDGE_LOW, bool GPIO15_EDGE_HIGH) volatile
{
uint32_t curr = PROC0_INTE1;
curr &= ~(0b1u << 0u);
curr |= (GPIO8_LEVEL_LOW & 0b1u) << 0u;
curr &= ~(0b1u << 1u);
curr |= (GPIO8_LEVEL_HIGH & 0b1u) << 1u;
curr &= ~(0b1u << 2u);
curr |= (GPIO8_EDGE_LOW & 0b1u) << 2u;
curr &= ~(0b1u << 3u);
curr |= (GPIO8_EDGE_HIGH & 0b1u) << 3u;
curr &= ~(0b1u << 4u);
curr |= (GPIO9_LEVEL_LOW & 0b1u) << 4u;
curr &= ~(0b1u << 5u);
curr |= (GPIO9_LEVEL_HIGH & 0b1u) << 5u;
curr &= ~(0b1u << 6u);
curr |= (GPIO9_EDGE_LOW & 0b1u) << 6u;
curr &= ~(0b1u << 7u);
curr |= (GPIO9_EDGE_HIGH & 0b1u) << 7u;
curr &= ~(0b1u << 8u);
curr |= (GPIO10_LEVEL_LOW & 0b1u) << 8u;
curr &= ~(0b1u << 9u);
curr |= (GPIO10_LEVEL_HIGH & 0b1u) << 9u;
curr &= ~(0b1u << 10u);
curr |= (GPIO10_EDGE_LOW & 0b1u) << 10u;
curr &= ~(0b1u << 11u);
curr |= (GPIO10_EDGE_HIGH & 0b1u) << 11u;
curr &= ~(0b1u << 12u);
curr |= (GPIO11_LEVEL_LOW & 0b1u) << 12u;
curr &= ~(0b1u << 13u);
curr |= (GPIO11_LEVEL_HIGH & 0b1u) << 13u;
curr &= ~(0b1u << 14u);
curr |= (GPIO11_EDGE_LOW & 0b1u) << 14u;
curr &= ~(0b1u << 15u);
curr |= (GPIO11_EDGE_HIGH & 0b1u) << 15u;
curr &= ~(0b1u << 16u);
curr |= (GPIO12_LEVEL_LOW & 0b1u) << 16u;
curr &= ~(0b1u << 17u);
curr |= (GPIO12_LEVEL_HIGH & 0b1u) << 17u;
curr &= ~(0b1u << 18u);
curr |= (GPIO12_EDGE_LOW & 0b1u) << 18u;
curr &= ~(0b1u << 19u);
curr |= (GPIO12_EDGE_HIGH & 0b1u) << 19u;
curr &= ~(0b1u << 20u);
curr |= (GPIO13_LEVEL_LOW & 0b1u) << 20u;
curr &= ~(0b1u << 21u);
curr |= (GPIO13_LEVEL_HIGH & 0b1u) << 21u;
curr &= ~(0b1u << 22u);
curr |= (GPIO13_EDGE_LOW & 0b1u) << 22u;
curr &= ~(0b1u << 23u);
curr |= (GPIO13_EDGE_HIGH & 0b1u) << 23u;
curr &= ~(0b1u << 24u);
curr |= (GPIO14_LEVEL_LOW & 0b1u) << 24u;
curr &= ~(0b1u << 25u);
curr |= (GPIO14_LEVEL_HIGH & 0b1u) << 25u;
curr &= ~(0b1u << 26u);
curr |= (GPIO14_EDGE_LOW & 0b1u) << 26u;
curr &= ~(0b1u << 27u);
curr |= (GPIO14_EDGE_HIGH & 0b1u) << 27u;
curr &= ~(0b1u << 28u);
curr |= (GPIO15_LEVEL_LOW & 0b1u) << 28u;
curr &= ~(0b1u << 29u);
curr |= (GPIO15_LEVEL_HIGH & 0b1u) << 29u;
curr &= ~(0b1u << 30u);
curr |= (GPIO15_EDGE_LOW & 0b1u) << 30u;
curr &= ~(0b1u << 31u);
curr |= (GPIO15_EDGE_HIGH & 0b1u) << 31u;
PROC0_INTE1 = curr;
}
inline bool get_PROC0_INTE2_GPIO16_LEVEL_LOW() volatile
{
return PROC0_INTE2 & (1u << 0u);
}
inline void set_PROC0_INTE2_GPIO16_LEVEL_LOW() volatile
{
PROC0_INTE2 |= 1u << 0u;
}
inline void clear_PROC0_INTE2_GPIO16_LEVEL_LOW() volatile
{
PROC0_INTE2 &= ~(1u << 0u);
}
inline void toggle_PROC0_INTE2_GPIO16_LEVEL_LOW() volatile
{
PROC0_INTE2 ^= 1u << 0u;
}
inline bool get_PROC0_INTE2_GPIO16_LEVEL_HIGH() volatile
{
return PROC0_INTE2 & (1u << 1u);
}
inline void set_PROC0_INTE2_GPIO16_LEVEL_HIGH() volatile
{
PROC0_INTE2 |= 1u << 1u;
}
inline void clear_PROC0_INTE2_GPIO16_LEVEL_HIGH() volatile
{
PROC0_INTE2 &= ~(1u << 1u);
}
inline void toggle_PROC0_INTE2_GPIO16_LEVEL_HIGH() volatile
{
PROC0_INTE2 ^= 1u << 1u;
}
inline bool get_PROC0_INTE2_GPIO16_EDGE_LOW() volatile
{
return PROC0_INTE2 & (1u << 2u);
}
inline void set_PROC0_INTE2_GPIO16_EDGE_LOW() volatile
{
PROC0_INTE2 |= 1u << 2u;
}
inline void clear_PROC0_INTE2_GPIO16_EDGE_LOW() volatile
{
PROC0_INTE2 &= ~(1u << 2u);
}
inline void toggle_PROC0_INTE2_GPIO16_EDGE_LOW() volatile
{
PROC0_INTE2 ^= 1u << 2u;
}
inline bool get_PROC0_INTE2_GPIO16_EDGE_HIGH() volatile
{
return PROC0_INTE2 & (1u << 3u);
}
inline void set_PROC0_INTE2_GPIO16_EDGE_HIGH() volatile
{
PROC0_INTE2 |= 1u << 3u;
}
inline void clear_PROC0_INTE2_GPIO16_EDGE_HIGH() volatile
{
PROC0_INTE2 &= ~(1u << 3u);
}
inline void toggle_PROC0_INTE2_GPIO16_EDGE_HIGH() volatile
{
PROC0_INTE2 ^= 1u << 3u;
}
inline bool get_PROC0_INTE2_GPIO17_LEVEL_LOW() volatile
{
return PROC0_INTE2 & (1u << 4u);
}
inline void set_PROC0_INTE2_GPIO17_LEVEL_LOW() volatile
{
PROC0_INTE2 |= 1u << 4u;
}
inline void clear_PROC0_INTE2_GPIO17_LEVEL_LOW() volatile
{
PROC0_INTE2 &= ~(1u << 4u);
}
inline void toggle_PROC0_INTE2_GPIO17_LEVEL_LOW() volatile
{
PROC0_INTE2 ^= 1u << 4u;
}
inline bool get_PROC0_INTE2_GPIO17_LEVEL_HIGH() volatile
{
return PROC0_INTE2 & (1u << 5u);
}
inline void set_PROC0_INTE2_GPIO17_LEVEL_HIGH() volatile
{
PROC0_INTE2 |= 1u << 5u;
}
inline void clear_PROC0_INTE2_GPIO17_LEVEL_HIGH() volatile
{
PROC0_INTE2 &= ~(1u << 5u);
}
inline void toggle_PROC0_INTE2_GPIO17_LEVEL_HIGH() volatile
{
PROC0_INTE2 ^= 1u << 5u;
}
inline bool get_PROC0_INTE2_GPIO17_EDGE_LOW() volatile
{
return PROC0_INTE2 & (1u << 6u);
}
inline void set_PROC0_INTE2_GPIO17_EDGE_LOW() volatile
{
PROC0_INTE2 |= 1u << 6u;
}
inline void clear_PROC0_INTE2_GPIO17_EDGE_LOW() volatile
{
PROC0_INTE2 &= ~(1u << 6u);
}
inline void toggle_PROC0_INTE2_GPIO17_EDGE_LOW() volatile
{
PROC0_INTE2 ^= 1u << 6u;
}
inline bool get_PROC0_INTE2_GPIO17_EDGE_HIGH() volatile
{
return PROC0_INTE2 & (1u << 7u);
}
inline void set_PROC0_INTE2_GPIO17_EDGE_HIGH() volatile
{
PROC0_INTE2 |= 1u << 7u;
}
inline void clear_PROC0_INTE2_GPIO17_EDGE_HIGH() volatile
{
PROC0_INTE2 &= ~(1u << 7u);
}
inline void toggle_PROC0_INTE2_GPIO17_EDGE_HIGH() volatile
{
PROC0_INTE2 ^= 1u << 7u;
}
inline bool get_PROC0_INTE2_GPIO18_LEVEL_LOW() volatile
{
return PROC0_INTE2 & (1u << 8u);
}
inline void set_PROC0_INTE2_GPIO18_LEVEL_LOW() volatile
{
PROC0_INTE2 |= 1u << 8u;
}
inline void clear_PROC0_INTE2_GPIO18_LEVEL_LOW() volatile
{
PROC0_INTE2 &= ~(1u << 8u);
}
inline void toggle_PROC0_INTE2_GPIO18_LEVEL_LOW() volatile
{
PROC0_INTE2 ^= 1u << 8u;
}
inline bool get_PROC0_INTE2_GPIO18_LEVEL_HIGH() volatile
{
return PROC0_INTE2 & (1u << 9u);
}
inline void set_PROC0_INTE2_GPIO18_LEVEL_HIGH() volatile
{
PROC0_INTE2 |= 1u << 9u;
}
inline void clear_PROC0_INTE2_GPIO18_LEVEL_HIGH() volatile
{
PROC0_INTE2 &= ~(1u << 9u);
}
inline void toggle_PROC0_INTE2_GPIO18_LEVEL_HIGH() volatile
{
PROC0_INTE2 ^= 1u << 9u;
}
inline bool get_PROC0_INTE2_GPIO18_EDGE_LOW() volatile
{
return PROC0_INTE2 & (1u << 10u);
}
inline void set_PROC0_INTE2_GPIO18_EDGE_LOW() volatile
{
PROC0_INTE2 |= 1u << 10u;
}
inline void clear_PROC0_INTE2_GPIO18_EDGE_LOW() volatile
{
PROC0_INTE2 &= ~(1u << 10u);
}
inline void toggle_PROC0_INTE2_GPIO18_EDGE_LOW() volatile
{
PROC0_INTE2 ^= 1u << 10u;
}
inline bool get_PROC0_INTE2_GPIO18_EDGE_HIGH() volatile
{
return PROC0_INTE2 & (1u << 11u);
}
inline void set_PROC0_INTE2_GPIO18_EDGE_HIGH() volatile
{
PROC0_INTE2 |= 1u << 11u;
}
inline void clear_PROC0_INTE2_GPIO18_EDGE_HIGH() volatile
{
PROC0_INTE2 &= ~(1u << 11u);
}
inline void toggle_PROC0_INTE2_GPIO18_EDGE_HIGH() volatile
{
PROC0_INTE2 ^= 1u << 11u;
}
inline bool get_PROC0_INTE2_GPIO19_LEVEL_LOW() volatile
{
return PROC0_INTE2 & (1u << 12u);
}
inline void set_PROC0_INTE2_GPIO19_LEVEL_LOW() volatile
{
PROC0_INTE2 |= 1u << 12u;
}
inline void clear_PROC0_INTE2_GPIO19_LEVEL_LOW() volatile
{
PROC0_INTE2 &= ~(1u << 12u);
}
inline void toggle_PROC0_INTE2_GPIO19_LEVEL_LOW() volatile
{
PROC0_INTE2 ^= 1u << 12u;
}
inline bool get_PROC0_INTE2_GPIO19_LEVEL_HIGH() volatile
{
return PROC0_INTE2 & (1u << 13u);
}
inline void set_PROC0_INTE2_GPIO19_LEVEL_HIGH() volatile
{
PROC0_INTE2 |= 1u << 13u;
}
inline void clear_PROC0_INTE2_GPIO19_LEVEL_HIGH() volatile
{
PROC0_INTE2 &= ~(1u << 13u);
}
inline void toggle_PROC0_INTE2_GPIO19_LEVEL_HIGH() volatile
{
PROC0_INTE2 ^= 1u << 13u;
}
inline bool get_PROC0_INTE2_GPIO19_EDGE_LOW() volatile
{
return PROC0_INTE2 & (1u << 14u);
}
inline void set_PROC0_INTE2_GPIO19_EDGE_LOW() volatile
{
PROC0_INTE2 |= 1u << 14u;
}
inline void clear_PROC0_INTE2_GPIO19_EDGE_LOW() volatile
{
PROC0_INTE2 &= ~(1u << 14u);
}
inline void toggle_PROC0_INTE2_GPIO19_EDGE_LOW() volatile
{
PROC0_INTE2 ^= 1u << 14u;
}
inline bool get_PROC0_INTE2_GPIO19_EDGE_HIGH() volatile
{
return PROC0_INTE2 & (1u << 15u);
}
inline void set_PROC0_INTE2_GPIO19_EDGE_HIGH() volatile
{
PROC0_INTE2 |= 1u << 15u;
}
inline void clear_PROC0_INTE2_GPIO19_EDGE_HIGH() volatile
{
PROC0_INTE2 &= ~(1u << 15u);
}
inline void toggle_PROC0_INTE2_GPIO19_EDGE_HIGH() volatile
{
PROC0_INTE2 ^= 1u << 15u;
}
inline bool get_PROC0_INTE2_GPIO20_LEVEL_LOW() volatile
{
return PROC0_INTE2 & (1u << 16u);
}
inline void set_PROC0_INTE2_GPIO20_LEVEL_LOW() volatile
{
PROC0_INTE2 |= 1u << 16u;
}
inline void clear_PROC0_INTE2_GPIO20_LEVEL_LOW() volatile
{
PROC0_INTE2 &= ~(1u << 16u);
}
inline void toggle_PROC0_INTE2_GPIO20_LEVEL_LOW() volatile
{
PROC0_INTE2 ^= 1u << 16u;
}
inline bool get_PROC0_INTE2_GPIO20_LEVEL_HIGH() volatile
{
return PROC0_INTE2 & (1u << 17u);
}
inline void set_PROC0_INTE2_GPIO20_LEVEL_HIGH() volatile
{
PROC0_INTE2 |= 1u << 17u;
}
inline void clear_PROC0_INTE2_GPIO20_LEVEL_HIGH() volatile
{
PROC0_INTE2 &= ~(1u << 17u);
}
inline void toggle_PROC0_INTE2_GPIO20_LEVEL_HIGH() volatile
{
PROC0_INTE2 ^= 1u << 17u;
}
inline bool get_PROC0_INTE2_GPIO20_EDGE_LOW() volatile
{
return PROC0_INTE2 & (1u << 18u);
}
inline void set_PROC0_INTE2_GPIO20_EDGE_LOW() volatile
{
PROC0_INTE2 |= 1u << 18u;
}
inline void clear_PROC0_INTE2_GPIO20_EDGE_LOW() volatile
{
PROC0_INTE2 &= ~(1u << 18u);
}
inline void toggle_PROC0_INTE2_GPIO20_EDGE_LOW() volatile
{
PROC0_INTE2 ^= 1u << 18u;
}
inline bool get_PROC0_INTE2_GPIO20_EDGE_HIGH() volatile
{
return PROC0_INTE2 & (1u << 19u);
}
inline void set_PROC0_INTE2_GPIO20_EDGE_HIGH() volatile
{
PROC0_INTE2 |= 1u << 19u;
}
inline void clear_PROC0_INTE2_GPIO20_EDGE_HIGH() volatile
{
PROC0_INTE2 &= ~(1u << 19u);
}
inline void toggle_PROC0_INTE2_GPIO20_EDGE_HIGH() volatile
{
PROC0_INTE2 ^= 1u << 19u;
}
inline bool get_PROC0_INTE2_GPIO21_LEVEL_LOW() volatile
{
return PROC0_INTE2 & (1u << 20u);
}
inline void set_PROC0_INTE2_GPIO21_LEVEL_LOW() volatile
{
PROC0_INTE2 |= 1u << 20u;
}
inline void clear_PROC0_INTE2_GPIO21_LEVEL_LOW() volatile
{
PROC0_INTE2 &= ~(1u << 20u);
}
inline void toggle_PROC0_INTE2_GPIO21_LEVEL_LOW() volatile
{
PROC0_INTE2 ^= 1u << 20u;
}
inline bool get_PROC0_INTE2_GPIO21_LEVEL_HIGH() volatile
{
return PROC0_INTE2 & (1u << 21u);
}
inline void set_PROC0_INTE2_GPIO21_LEVEL_HIGH() volatile
{
PROC0_INTE2 |= 1u << 21u;
}
inline void clear_PROC0_INTE2_GPIO21_LEVEL_HIGH() volatile
{
PROC0_INTE2 &= ~(1u << 21u);
}
inline void toggle_PROC0_INTE2_GPIO21_LEVEL_HIGH() volatile
{
PROC0_INTE2 ^= 1u << 21u;
}
inline bool get_PROC0_INTE2_GPIO21_EDGE_LOW() volatile
{
return PROC0_INTE2 & (1u << 22u);
}
inline void set_PROC0_INTE2_GPIO21_EDGE_LOW() volatile
{
PROC0_INTE2 |= 1u << 22u;
}
inline void clear_PROC0_INTE2_GPIO21_EDGE_LOW() volatile
{
PROC0_INTE2 &= ~(1u << 22u);
}
inline void toggle_PROC0_INTE2_GPIO21_EDGE_LOW() volatile
{
PROC0_INTE2 ^= 1u << 22u;
}
inline bool get_PROC0_INTE2_GPIO21_EDGE_HIGH() volatile
{
return PROC0_INTE2 & (1u << 23u);
}
inline void set_PROC0_INTE2_GPIO21_EDGE_HIGH() volatile
{
PROC0_INTE2 |= 1u << 23u;
}
inline void clear_PROC0_INTE2_GPIO21_EDGE_HIGH() volatile
{
PROC0_INTE2 &= ~(1u << 23u);
}
inline void toggle_PROC0_INTE2_GPIO21_EDGE_HIGH() volatile
{
PROC0_INTE2 ^= 1u << 23u;
}
inline bool get_PROC0_INTE2_GPIO22_LEVEL_LOW() volatile
{
return PROC0_INTE2 & (1u << 24u);
}
inline void set_PROC0_INTE2_GPIO22_LEVEL_LOW() volatile
{
PROC0_INTE2 |= 1u << 24u;
}
inline void clear_PROC0_INTE2_GPIO22_LEVEL_LOW() volatile
{
PROC0_INTE2 &= ~(1u << 24u);
}
inline void toggle_PROC0_INTE2_GPIO22_LEVEL_LOW() volatile
{
PROC0_INTE2 ^= 1u << 24u;
}
inline bool get_PROC0_INTE2_GPIO22_LEVEL_HIGH() volatile
{
return PROC0_INTE2 & (1u << 25u);
}
inline void set_PROC0_INTE2_GPIO22_LEVEL_HIGH() volatile
{
PROC0_INTE2 |= 1u << 25u;
}
inline void clear_PROC0_INTE2_GPIO22_LEVEL_HIGH() volatile
{
PROC0_INTE2 &= ~(1u << 25u);
}
inline void toggle_PROC0_INTE2_GPIO22_LEVEL_HIGH() volatile
{
PROC0_INTE2 ^= 1u << 25u;
}
inline bool get_PROC0_INTE2_GPIO22_EDGE_LOW() volatile
{
return PROC0_INTE2 & (1u << 26u);
}
inline void set_PROC0_INTE2_GPIO22_EDGE_LOW() volatile
{
PROC0_INTE2 |= 1u << 26u;
}
inline void clear_PROC0_INTE2_GPIO22_EDGE_LOW() volatile
{
PROC0_INTE2 &= ~(1u << 26u);
}
inline void toggle_PROC0_INTE2_GPIO22_EDGE_LOW() volatile
{
PROC0_INTE2 ^= 1u << 26u;
}
inline bool get_PROC0_INTE2_GPIO22_EDGE_HIGH() volatile
{
return PROC0_INTE2 & (1u << 27u);
}
inline void set_PROC0_INTE2_GPIO22_EDGE_HIGH() volatile
{
PROC0_INTE2 |= 1u << 27u;
}
inline void clear_PROC0_INTE2_GPIO22_EDGE_HIGH() volatile
{
PROC0_INTE2 &= ~(1u << 27u);
}
inline void toggle_PROC0_INTE2_GPIO22_EDGE_HIGH() volatile
{
PROC0_INTE2 ^= 1u << 27u;
}
inline bool get_PROC0_INTE2_GPIO23_LEVEL_LOW() volatile
{
return PROC0_INTE2 & (1u << 28u);
}
inline void set_PROC0_INTE2_GPIO23_LEVEL_LOW() volatile
{
PROC0_INTE2 |= 1u << 28u;
}
inline void clear_PROC0_INTE2_GPIO23_LEVEL_LOW() volatile
{
PROC0_INTE2 &= ~(1u << 28u);
}
inline void toggle_PROC0_INTE2_GPIO23_LEVEL_LOW() volatile
{
PROC0_INTE2 ^= 1u << 28u;
}
inline bool get_PROC0_INTE2_GPIO23_LEVEL_HIGH() volatile
{
return PROC0_INTE2 & (1u << 29u);
}
inline void set_PROC0_INTE2_GPIO23_LEVEL_HIGH() volatile
{
PROC0_INTE2 |= 1u << 29u;
}
inline void clear_PROC0_INTE2_GPIO23_LEVEL_HIGH() volatile
{
PROC0_INTE2 &= ~(1u << 29u);
}
inline void toggle_PROC0_INTE2_GPIO23_LEVEL_HIGH() volatile
{
PROC0_INTE2 ^= 1u << 29u;
}
inline bool get_PROC0_INTE2_GPIO23_EDGE_LOW() volatile
{
return PROC0_INTE2 & (1u << 30u);
}
inline void set_PROC0_INTE2_GPIO23_EDGE_LOW() volatile
{
PROC0_INTE2 |= 1u << 30u;
}
inline void clear_PROC0_INTE2_GPIO23_EDGE_LOW() volatile
{
PROC0_INTE2 &= ~(1u << 30u);
}
inline void toggle_PROC0_INTE2_GPIO23_EDGE_LOW() volatile
{
PROC0_INTE2 ^= 1u << 30u;
}
inline bool get_PROC0_INTE2_GPIO23_EDGE_HIGH() volatile
{
return PROC0_INTE2 & (1u << 31u);
}
inline void set_PROC0_INTE2_GPIO23_EDGE_HIGH() volatile
{
PROC0_INTE2 |= 1u << 31u;
}
inline void clear_PROC0_INTE2_GPIO23_EDGE_HIGH() volatile
{
PROC0_INTE2 &= ~(1u << 31u);
}
inline void toggle_PROC0_INTE2_GPIO23_EDGE_HIGH() volatile
{
PROC0_INTE2 ^= 1u << 31u;
}
inline void get_PROC0_INTE2(
bool &GPIO16_LEVEL_LOW, bool &GPIO16_LEVEL_HIGH, bool &GPIO16_EDGE_LOW,
bool &GPIO16_EDGE_HIGH, bool &GPIO17_LEVEL_LOW,
bool &GPIO17_LEVEL_HIGH, bool &GPIO17_EDGE_LOW, bool &GPIO17_EDGE_HIGH,
bool &GPIO18_LEVEL_LOW, bool &GPIO18_LEVEL_HIGH, bool &GPIO18_EDGE_LOW,
bool &GPIO18_EDGE_HIGH, bool &GPIO19_LEVEL_LOW,
bool &GPIO19_LEVEL_HIGH, bool &GPIO19_EDGE_LOW, bool &GPIO19_EDGE_HIGH,
bool &GPIO20_LEVEL_LOW, bool &GPIO20_LEVEL_HIGH, bool &GPIO20_EDGE_LOW,
bool &GPIO20_EDGE_HIGH, bool &GPIO21_LEVEL_LOW,
bool &GPIO21_LEVEL_HIGH, bool &GPIO21_EDGE_LOW, bool &GPIO21_EDGE_HIGH,
bool &GPIO22_LEVEL_LOW, bool &GPIO22_LEVEL_HIGH, bool &GPIO22_EDGE_LOW,
bool &GPIO22_EDGE_HIGH, bool &GPIO23_LEVEL_LOW,
bool &GPIO23_LEVEL_HIGH, bool &GPIO23_EDGE_LOW,
bool &GPIO23_EDGE_HIGH) volatile
{
uint32_t curr = PROC0_INTE2;
GPIO16_LEVEL_LOW = curr & (1u << 0u);
GPIO16_LEVEL_HIGH = curr & (1u << 1u);
GPIO16_EDGE_LOW = curr & (1u << 2u);
GPIO16_EDGE_HIGH = curr & (1u << 3u);
GPIO17_LEVEL_LOW = curr & (1u << 4u);
GPIO17_LEVEL_HIGH = curr & (1u << 5u);
GPIO17_EDGE_LOW = curr & (1u << 6u);
GPIO17_EDGE_HIGH = curr & (1u << 7u);
GPIO18_LEVEL_LOW = curr & (1u << 8u);
GPIO18_LEVEL_HIGH = curr & (1u << 9u);
GPIO18_EDGE_LOW = curr & (1u << 10u);
GPIO18_EDGE_HIGH = curr & (1u << 11u);
GPIO19_LEVEL_LOW = curr & (1u << 12u);
GPIO19_LEVEL_HIGH = curr & (1u << 13u);
GPIO19_EDGE_LOW = curr & (1u << 14u);
GPIO19_EDGE_HIGH = curr & (1u << 15u);
GPIO20_LEVEL_LOW = curr & (1u << 16u);
GPIO20_LEVEL_HIGH = curr & (1u << 17u);
GPIO20_EDGE_LOW = curr & (1u << 18u);
GPIO20_EDGE_HIGH = curr & (1u << 19u);
GPIO21_LEVEL_LOW = curr & (1u << 20u);
GPIO21_LEVEL_HIGH = curr & (1u << 21u);
GPIO21_EDGE_LOW = curr & (1u << 22u);
GPIO21_EDGE_HIGH = curr & (1u << 23u);
GPIO22_LEVEL_LOW = curr & (1u << 24u);
GPIO22_LEVEL_HIGH = curr & (1u << 25u);
GPIO22_EDGE_LOW = curr & (1u << 26u);
GPIO22_EDGE_HIGH = curr & (1u << 27u);
GPIO23_LEVEL_LOW = curr & (1u << 28u);
GPIO23_LEVEL_HIGH = curr & (1u << 29u);
GPIO23_EDGE_LOW = curr & (1u << 30u);
GPIO23_EDGE_HIGH = curr & (1u << 31u);
}
inline void set_PROC0_INTE2(
bool GPIO16_LEVEL_LOW, bool GPIO16_LEVEL_HIGH, bool GPIO16_EDGE_LOW,
bool GPIO16_EDGE_HIGH, bool GPIO17_LEVEL_LOW, bool GPIO17_LEVEL_HIGH,
bool GPIO17_EDGE_LOW, bool GPIO17_EDGE_HIGH, bool GPIO18_LEVEL_LOW,
bool GPIO18_LEVEL_HIGH, bool GPIO18_EDGE_LOW, bool GPIO18_EDGE_HIGH,
bool GPIO19_LEVEL_LOW, bool GPIO19_LEVEL_HIGH, bool GPIO19_EDGE_LOW,
bool GPIO19_EDGE_HIGH, bool GPIO20_LEVEL_LOW, bool GPIO20_LEVEL_HIGH,
bool GPIO20_EDGE_LOW, bool GPIO20_EDGE_HIGH, bool GPIO21_LEVEL_LOW,
bool GPIO21_LEVEL_HIGH, bool GPIO21_EDGE_LOW, bool GPIO21_EDGE_HIGH,
bool GPIO22_LEVEL_LOW, bool GPIO22_LEVEL_HIGH, bool GPIO22_EDGE_LOW,
bool GPIO22_EDGE_HIGH, bool GPIO23_LEVEL_LOW, bool GPIO23_LEVEL_HIGH,
bool GPIO23_EDGE_LOW, bool GPIO23_EDGE_HIGH) volatile
{
uint32_t curr = PROC0_INTE2;
curr &= ~(0b1u << 0u);
curr |= (GPIO16_LEVEL_LOW & 0b1u) << 0u;
curr &= ~(0b1u << 1u);
curr |= (GPIO16_LEVEL_HIGH & 0b1u) << 1u;
curr &= ~(0b1u << 2u);
curr |= (GPIO16_EDGE_LOW & 0b1u) << 2u;
curr &= ~(0b1u << 3u);
curr |= (GPIO16_EDGE_HIGH & 0b1u) << 3u;
curr &= ~(0b1u << 4u);
curr |= (GPIO17_LEVEL_LOW & 0b1u) << 4u;
curr &= ~(0b1u << 5u);
curr |= (GPIO17_LEVEL_HIGH & 0b1u) << 5u;
curr &= ~(0b1u << 6u);
curr |= (GPIO17_EDGE_LOW & 0b1u) << 6u;
curr &= ~(0b1u << 7u);
curr |= (GPIO17_EDGE_HIGH & 0b1u) << 7u;
curr &= ~(0b1u << 8u);
curr |= (GPIO18_LEVEL_LOW & 0b1u) << 8u;
curr &= ~(0b1u << 9u);
curr |= (GPIO18_LEVEL_HIGH & 0b1u) << 9u;
curr &= ~(0b1u << 10u);
curr |= (GPIO18_EDGE_LOW & 0b1u) << 10u;
curr &= ~(0b1u << 11u);
curr |= (GPIO18_EDGE_HIGH & 0b1u) << 11u;
curr &= ~(0b1u << 12u);
curr |= (GPIO19_LEVEL_LOW & 0b1u) << 12u;
curr &= ~(0b1u << 13u);
curr |= (GPIO19_LEVEL_HIGH & 0b1u) << 13u;
curr &= ~(0b1u << 14u);
curr |= (GPIO19_EDGE_LOW & 0b1u) << 14u;
curr &= ~(0b1u << 15u);
curr |= (GPIO19_EDGE_HIGH & 0b1u) << 15u;
curr &= ~(0b1u << 16u);
curr |= (GPIO20_LEVEL_LOW & 0b1u) << 16u;
curr &= ~(0b1u << 17u);
curr |= (GPIO20_LEVEL_HIGH & 0b1u) << 17u;
curr &= ~(0b1u << 18u);
curr |= (GPIO20_EDGE_LOW & 0b1u) << 18u;
curr &= ~(0b1u << 19u);
curr |= (GPIO20_EDGE_HIGH & 0b1u) << 19u;
curr &= ~(0b1u << 20u);
curr |= (GPIO21_LEVEL_LOW & 0b1u) << 20u;
curr &= ~(0b1u << 21u);
curr |= (GPIO21_LEVEL_HIGH & 0b1u) << 21u;
curr &= ~(0b1u << 22u);
curr |= (GPIO21_EDGE_LOW & 0b1u) << 22u;
curr &= ~(0b1u << 23u);
curr |= (GPIO21_EDGE_HIGH & 0b1u) << 23u;
curr &= ~(0b1u << 24u);
curr |= (GPIO22_LEVEL_LOW & 0b1u) << 24u;
curr &= ~(0b1u << 25u);
curr |= (GPIO22_LEVEL_HIGH & 0b1u) << 25u;
curr &= ~(0b1u << 26u);
curr |= (GPIO22_EDGE_LOW & 0b1u) << 26u;
curr &= ~(0b1u << 27u);
curr |= (GPIO22_EDGE_HIGH & 0b1u) << 27u;
curr &= ~(0b1u << 28u);
curr |= (GPIO23_LEVEL_LOW & 0b1u) << 28u;
curr &= ~(0b1u << 29u);
curr |= (GPIO23_LEVEL_HIGH & 0b1u) << 29u;
curr &= ~(0b1u << 30u);
curr |= (GPIO23_EDGE_LOW & 0b1u) << 30u;
curr &= ~(0b1u << 31u);
curr |= (GPIO23_EDGE_HIGH & 0b1u) << 31u;
PROC0_INTE2 = curr;
}
inline bool get_PROC0_INTE3_GPIO24_LEVEL_LOW() volatile
{
return PROC0_INTE3 & (1u << 0u);
}
inline void set_PROC0_INTE3_GPIO24_LEVEL_LOW() volatile
{
PROC0_INTE3 |= 1u << 0u;
}
inline void clear_PROC0_INTE3_GPIO24_LEVEL_LOW() volatile
{
PROC0_INTE3 &= ~(1u << 0u);
}
inline void toggle_PROC0_INTE3_GPIO24_LEVEL_LOW() volatile
{
PROC0_INTE3 ^= 1u << 0u;
}
inline bool get_PROC0_INTE3_GPIO24_LEVEL_HIGH() volatile
{
return PROC0_INTE3 & (1u << 1u);
}
inline void set_PROC0_INTE3_GPIO24_LEVEL_HIGH() volatile
{
PROC0_INTE3 |= 1u << 1u;
}
inline void clear_PROC0_INTE3_GPIO24_LEVEL_HIGH() volatile
{
PROC0_INTE3 &= ~(1u << 1u);
}
inline void toggle_PROC0_INTE3_GPIO24_LEVEL_HIGH() volatile
{
PROC0_INTE3 ^= 1u << 1u;
}
inline bool get_PROC0_INTE3_GPIO24_EDGE_LOW() volatile
{
return PROC0_INTE3 & (1u << 2u);
}
inline void set_PROC0_INTE3_GPIO24_EDGE_LOW() volatile
{
PROC0_INTE3 |= 1u << 2u;
}
inline void clear_PROC0_INTE3_GPIO24_EDGE_LOW() volatile
{
PROC0_INTE3 &= ~(1u << 2u);
}
inline void toggle_PROC0_INTE3_GPIO24_EDGE_LOW() volatile
{
PROC0_INTE3 ^= 1u << 2u;
}
inline bool get_PROC0_INTE3_GPIO24_EDGE_HIGH() volatile
{
return PROC0_INTE3 & (1u << 3u);
}
inline void set_PROC0_INTE3_GPIO24_EDGE_HIGH() volatile
{
PROC0_INTE3 |= 1u << 3u;
}
inline void clear_PROC0_INTE3_GPIO24_EDGE_HIGH() volatile
{
PROC0_INTE3 &= ~(1u << 3u);
}
inline void toggle_PROC0_INTE3_GPIO24_EDGE_HIGH() volatile
{
PROC0_INTE3 ^= 1u << 3u;
}
inline bool get_PROC0_INTE3_GPIO25_LEVEL_LOW() volatile
{
return PROC0_INTE3 & (1u << 4u);
}
inline void set_PROC0_INTE3_GPIO25_LEVEL_LOW() volatile
{
PROC0_INTE3 |= 1u << 4u;
}
inline void clear_PROC0_INTE3_GPIO25_LEVEL_LOW() volatile
{
PROC0_INTE3 &= ~(1u << 4u);
}
inline void toggle_PROC0_INTE3_GPIO25_LEVEL_LOW() volatile
{
PROC0_INTE3 ^= 1u << 4u;
}
inline bool get_PROC0_INTE3_GPIO25_LEVEL_HIGH() volatile
{
return PROC0_INTE3 & (1u << 5u);
}
inline void set_PROC0_INTE3_GPIO25_LEVEL_HIGH() volatile
{
PROC0_INTE3 |= 1u << 5u;
}
inline void clear_PROC0_INTE3_GPIO25_LEVEL_HIGH() volatile
{
PROC0_INTE3 &= ~(1u << 5u);
}
inline void toggle_PROC0_INTE3_GPIO25_LEVEL_HIGH() volatile
{
PROC0_INTE3 ^= 1u << 5u;
}
inline bool get_PROC0_INTE3_GPIO25_EDGE_LOW() volatile
{
return PROC0_INTE3 & (1u << 6u);
}
inline void set_PROC0_INTE3_GPIO25_EDGE_LOW() volatile
{
PROC0_INTE3 |= 1u << 6u;
}
inline void clear_PROC0_INTE3_GPIO25_EDGE_LOW() volatile
{
PROC0_INTE3 &= ~(1u << 6u);
}
inline void toggle_PROC0_INTE3_GPIO25_EDGE_LOW() volatile
{
PROC0_INTE3 ^= 1u << 6u;
}
inline bool get_PROC0_INTE3_GPIO25_EDGE_HIGH() volatile
{
return PROC0_INTE3 & (1u << 7u);
}
inline void set_PROC0_INTE3_GPIO25_EDGE_HIGH() volatile
{
PROC0_INTE3 |= 1u << 7u;
}
inline void clear_PROC0_INTE3_GPIO25_EDGE_HIGH() volatile
{
PROC0_INTE3 &= ~(1u << 7u);
}
inline void toggle_PROC0_INTE3_GPIO25_EDGE_HIGH() volatile
{
PROC0_INTE3 ^= 1u << 7u;
}
inline bool get_PROC0_INTE3_GPIO26_LEVEL_LOW() volatile
{
return PROC0_INTE3 & (1u << 8u);
}
inline void set_PROC0_INTE3_GPIO26_LEVEL_LOW() volatile
{
PROC0_INTE3 |= 1u << 8u;
}
inline void clear_PROC0_INTE3_GPIO26_LEVEL_LOW() volatile
{
PROC0_INTE3 &= ~(1u << 8u);
}
inline void toggle_PROC0_INTE3_GPIO26_LEVEL_LOW() volatile
{
PROC0_INTE3 ^= 1u << 8u;
}
inline bool get_PROC0_INTE3_GPIO26_LEVEL_HIGH() volatile
{
return PROC0_INTE3 & (1u << 9u);
}
inline void set_PROC0_INTE3_GPIO26_LEVEL_HIGH() volatile
{
PROC0_INTE3 |= 1u << 9u;
}
inline void clear_PROC0_INTE3_GPIO26_LEVEL_HIGH() volatile
{
PROC0_INTE3 &= ~(1u << 9u);
}
inline void toggle_PROC0_INTE3_GPIO26_LEVEL_HIGH() volatile
{
PROC0_INTE3 ^= 1u << 9u;
}
inline bool get_PROC0_INTE3_GPIO26_EDGE_LOW() volatile
{
return PROC0_INTE3 & (1u << 10u);
}
inline void set_PROC0_INTE3_GPIO26_EDGE_LOW() volatile
{
PROC0_INTE3 |= 1u << 10u;
}
inline void clear_PROC0_INTE3_GPIO26_EDGE_LOW() volatile
{
PROC0_INTE3 &= ~(1u << 10u);
}
inline void toggle_PROC0_INTE3_GPIO26_EDGE_LOW() volatile
{
PROC0_INTE3 ^= 1u << 10u;
}
inline bool get_PROC0_INTE3_GPIO26_EDGE_HIGH() volatile
{
return PROC0_INTE3 & (1u << 11u);
}
inline void set_PROC0_INTE3_GPIO26_EDGE_HIGH() volatile
{
PROC0_INTE3 |= 1u << 11u;
}
inline void clear_PROC0_INTE3_GPIO26_EDGE_HIGH() volatile
{
PROC0_INTE3 &= ~(1u << 11u);
}
inline void toggle_PROC0_INTE3_GPIO26_EDGE_HIGH() volatile
{
PROC0_INTE3 ^= 1u << 11u;
}
inline bool get_PROC0_INTE3_GPIO27_LEVEL_LOW() volatile
{
return PROC0_INTE3 & (1u << 12u);
}
inline void set_PROC0_INTE3_GPIO27_LEVEL_LOW() volatile
{
PROC0_INTE3 |= 1u << 12u;
}
inline void clear_PROC0_INTE3_GPIO27_LEVEL_LOW() volatile
{
PROC0_INTE3 &= ~(1u << 12u);
}
inline void toggle_PROC0_INTE3_GPIO27_LEVEL_LOW() volatile
{
PROC0_INTE3 ^= 1u << 12u;
}
inline bool get_PROC0_INTE3_GPIO27_LEVEL_HIGH() volatile
{
return PROC0_INTE3 & (1u << 13u);
}
inline void set_PROC0_INTE3_GPIO27_LEVEL_HIGH() volatile
{
PROC0_INTE3 |= 1u << 13u;
}
inline void clear_PROC0_INTE3_GPIO27_LEVEL_HIGH() volatile
{
PROC0_INTE3 &= ~(1u << 13u);
}
inline void toggle_PROC0_INTE3_GPIO27_LEVEL_HIGH() volatile
{
PROC0_INTE3 ^= 1u << 13u;
}
inline bool get_PROC0_INTE3_GPIO27_EDGE_LOW() volatile
{
return PROC0_INTE3 & (1u << 14u);
}
inline void set_PROC0_INTE3_GPIO27_EDGE_LOW() volatile
{
PROC0_INTE3 |= 1u << 14u;
}
inline void clear_PROC0_INTE3_GPIO27_EDGE_LOW() volatile
{
PROC0_INTE3 &= ~(1u << 14u);
}
inline void toggle_PROC0_INTE3_GPIO27_EDGE_LOW() volatile
{
PROC0_INTE3 ^= 1u << 14u;
}
inline bool get_PROC0_INTE3_GPIO27_EDGE_HIGH() volatile
{
return PROC0_INTE3 & (1u << 15u);
}
inline void set_PROC0_INTE3_GPIO27_EDGE_HIGH() volatile
{
PROC0_INTE3 |= 1u << 15u;
}
inline void clear_PROC0_INTE3_GPIO27_EDGE_HIGH() volatile
{
PROC0_INTE3 &= ~(1u << 15u);
}
inline void toggle_PROC0_INTE3_GPIO27_EDGE_HIGH() volatile
{
PROC0_INTE3 ^= 1u << 15u;
}
inline bool get_PROC0_INTE3_GPIO28_LEVEL_LOW() volatile
{
return PROC0_INTE3 & (1u << 16u);
}
inline void set_PROC0_INTE3_GPIO28_LEVEL_LOW() volatile
{
PROC0_INTE3 |= 1u << 16u;
}
inline void clear_PROC0_INTE3_GPIO28_LEVEL_LOW() volatile
{
PROC0_INTE3 &= ~(1u << 16u);
}
inline void toggle_PROC0_INTE3_GPIO28_LEVEL_LOW() volatile
{
PROC0_INTE3 ^= 1u << 16u;
}
inline bool get_PROC0_INTE3_GPIO28_LEVEL_HIGH() volatile
{
return PROC0_INTE3 & (1u << 17u);
}
inline void set_PROC0_INTE3_GPIO28_LEVEL_HIGH() volatile
{
PROC0_INTE3 |= 1u << 17u;
}
inline void clear_PROC0_INTE3_GPIO28_LEVEL_HIGH() volatile
{
PROC0_INTE3 &= ~(1u << 17u);
}
inline void toggle_PROC0_INTE3_GPIO28_LEVEL_HIGH() volatile
{
PROC0_INTE3 ^= 1u << 17u;
}
inline bool get_PROC0_INTE3_GPIO28_EDGE_LOW() volatile
{
return PROC0_INTE3 & (1u << 18u);
}
inline void set_PROC0_INTE3_GPIO28_EDGE_LOW() volatile
{
PROC0_INTE3 |= 1u << 18u;
}
inline void clear_PROC0_INTE3_GPIO28_EDGE_LOW() volatile
{
PROC0_INTE3 &= ~(1u << 18u);
}
inline void toggle_PROC0_INTE3_GPIO28_EDGE_LOW() volatile
{
PROC0_INTE3 ^= 1u << 18u;
}
inline bool get_PROC0_INTE3_GPIO28_EDGE_HIGH() volatile
{
return PROC0_INTE3 & (1u << 19u);
}
inline void set_PROC0_INTE3_GPIO28_EDGE_HIGH() volatile
{
PROC0_INTE3 |= 1u << 19u;
}
inline void clear_PROC0_INTE3_GPIO28_EDGE_HIGH() volatile
{
PROC0_INTE3 &= ~(1u << 19u);
}
inline void toggle_PROC0_INTE3_GPIO28_EDGE_HIGH() volatile
{
PROC0_INTE3 ^= 1u << 19u;
}
inline bool get_PROC0_INTE3_GPIO29_LEVEL_LOW() volatile
{
return PROC0_INTE3 & (1u << 20u);
}
inline void set_PROC0_INTE3_GPIO29_LEVEL_LOW() volatile
{
PROC0_INTE3 |= 1u << 20u;
}
inline void clear_PROC0_INTE3_GPIO29_LEVEL_LOW() volatile
{
PROC0_INTE3 &= ~(1u << 20u);
}
inline void toggle_PROC0_INTE3_GPIO29_LEVEL_LOW() volatile
{
PROC0_INTE3 ^= 1u << 20u;
}
inline bool get_PROC0_INTE3_GPIO29_LEVEL_HIGH() volatile
{
return PROC0_INTE3 & (1u << 21u);
}
inline void set_PROC0_INTE3_GPIO29_LEVEL_HIGH() volatile
{
PROC0_INTE3 |= 1u << 21u;
}
inline void clear_PROC0_INTE3_GPIO29_LEVEL_HIGH() volatile
{
PROC0_INTE3 &= ~(1u << 21u);
}
inline void toggle_PROC0_INTE3_GPIO29_LEVEL_HIGH() volatile
{
PROC0_INTE3 ^= 1u << 21u;
}
inline bool get_PROC0_INTE3_GPIO29_EDGE_LOW() volatile
{
return PROC0_INTE3 & (1u << 22u);
}
inline void set_PROC0_INTE3_GPIO29_EDGE_LOW() volatile
{
PROC0_INTE3 |= 1u << 22u;
}
inline void clear_PROC0_INTE3_GPIO29_EDGE_LOW() volatile
{
PROC0_INTE3 &= ~(1u << 22u);
}
inline void toggle_PROC0_INTE3_GPIO29_EDGE_LOW() volatile
{
PROC0_INTE3 ^= 1u << 22u;
}
inline bool get_PROC0_INTE3_GPIO29_EDGE_HIGH() volatile
{
return PROC0_INTE3 & (1u << 23u);
}
inline void set_PROC0_INTE3_GPIO29_EDGE_HIGH() volatile
{
PROC0_INTE3 |= 1u << 23u;
}
inline void clear_PROC0_INTE3_GPIO29_EDGE_HIGH() volatile
{
PROC0_INTE3 &= ~(1u << 23u);
}
inline void toggle_PROC0_INTE3_GPIO29_EDGE_HIGH() volatile
{
PROC0_INTE3 ^= 1u << 23u;
}
inline void get_PROC0_INTE3(bool &GPIO24_LEVEL_LOW,
bool &GPIO24_LEVEL_HIGH, bool &GPIO24_EDGE_LOW,
bool &GPIO24_EDGE_HIGH, bool &GPIO25_LEVEL_LOW,
bool &GPIO25_LEVEL_HIGH, bool &GPIO25_EDGE_LOW,
bool &GPIO25_EDGE_HIGH, bool &GPIO26_LEVEL_LOW,
bool &GPIO26_LEVEL_HIGH, bool &GPIO26_EDGE_LOW,
bool &GPIO26_EDGE_HIGH, bool &GPIO27_LEVEL_LOW,
bool &GPIO27_LEVEL_HIGH, bool &GPIO27_EDGE_LOW,
bool &GPIO27_EDGE_HIGH, bool &GPIO28_LEVEL_LOW,
bool &GPIO28_LEVEL_HIGH, bool &GPIO28_EDGE_LOW,
bool &GPIO28_EDGE_HIGH, bool &GPIO29_LEVEL_LOW,
bool &GPIO29_LEVEL_HIGH, bool &GPIO29_EDGE_LOW,
bool &GPIO29_EDGE_HIGH) volatile
{
uint32_t curr = PROC0_INTE3;
GPIO24_LEVEL_LOW = curr & (1u << 0u);
GPIO24_LEVEL_HIGH = curr & (1u << 1u);
GPIO24_EDGE_LOW = curr & (1u << 2u);
GPIO24_EDGE_HIGH = curr & (1u << 3u);
GPIO25_LEVEL_LOW = curr & (1u << 4u);
GPIO25_LEVEL_HIGH = curr & (1u << 5u);
GPIO25_EDGE_LOW = curr & (1u << 6u);
GPIO25_EDGE_HIGH = curr & (1u << 7u);
GPIO26_LEVEL_LOW = curr & (1u << 8u);
GPIO26_LEVEL_HIGH = curr & (1u << 9u);
GPIO26_EDGE_LOW = curr & (1u << 10u);
GPIO26_EDGE_HIGH = curr & (1u << 11u);
GPIO27_LEVEL_LOW = curr & (1u << 12u);
GPIO27_LEVEL_HIGH = curr & (1u << 13u);
GPIO27_EDGE_LOW = curr & (1u << 14u);
GPIO27_EDGE_HIGH = curr & (1u << 15u);
GPIO28_LEVEL_LOW = curr & (1u << 16u);
GPIO28_LEVEL_HIGH = curr & (1u << 17u);
GPIO28_EDGE_LOW = curr & (1u << 18u);
GPIO28_EDGE_HIGH = curr & (1u << 19u);
GPIO29_LEVEL_LOW = curr & (1u << 20u);
GPIO29_LEVEL_HIGH = curr & (1u << 21u);
GPIO29_EDGE_LOW = curr & (1u << 22u);
GPIO29_EDGE_HIGH = curr & (1u << 23u);
}
inline void set_PROC0_INTE3(
bool GPIO24_LEVEL_LOW, bool GPIO24_LEVEL_HIGH, bool GPIO24_EDGE_LOW,
bool GPIO24_EDGE_HIGH, bool GPIO25_LEVEL_LOW, bool GPIO25_LEVEL_HIGH,
bool GPIO25_EDGE_LOW, bool GPIO25_EDGE_HIGH, bool GPIO26_LEVEL_LOW,
bool GPIO26_LEVEL_HIGH, bool GPIO26_EDGE_LOW, bool GPIO26_EDGE_HIGH,
bool GPIO27_LEVEL_LOW, bool GPIO27_LEVEL_HIGH, bool GPIO27_EDGE_LOW,
bool GPIO27_EDGE_HIGH, bool GPIO28_LEVEL_LOW, bool GPIO28_LEVEL_HIGH,
bool GPIO28_EDGE_LOW, bool GPIO28_EDGE_HIGH, bool GPIO29_LEVEL_LOW,
bool GPIO29_LEVEL_HIGH, bool GPIO29_EDGE_LOW,
bool GPIO29_EDGE_HIGH) volatile
{
uint32_t curr = PROC0_INTE3;
curr &= ~(0b1u << 0u);
curr |= (GPIO24_LEVEL_LOW & 0b1u) << 0u;
curr &= ~(0b1u << 1u);
curr |= (GPIO24_LEVEL_HIGH & 0b1u) << 1u;
curr &= ~(0b1u << 2u);
curr |= (GPIO24_EDGE_LOW & 0b1u) << 2u;
curr &= ~(0b1u << 3u);
curr |= (GPIO24_EDGE_HIGH & 0b1u) << 3u;
curr &= ~(0b1u << 4u);
curr |= (GPIO25_LEVEL_LOW & 0b1u) << 4u;
curr &= ~(0b1u << 5u);
curr |= (GPIO25_LEVEL_HIGH & 0b1u) << 5u;
curr &= ~(0b1u << 6u);
curr |= (GPIO25_EDGE_LOW & 0b1u) << 6u;
curr &= ~(0b1u << 7u);
curr |= (GPIO25_EDGE_HIGH & 0b1u) << 7u;
curr &= ~(0b1u << 8u);
curr |= (GPIO26_LEVEL_LOW & 0b1u) << 8u;
curr &= ~(0b1u << 9u);
curr |= (GPIO26_LEVEL_HIGH & 0b1u) << 9u;
curr &= ~(0b1u << 10u);
curr |= (GPIO26_EDGE_LOW & 0b1u) << 10u;
curr &= ~(0b1u << 11u);
curr |= (GPIO26_EDGE_HIGH & 0b1u) << 11u;
curr &= ~(0b1u << 12u);
curr |= (GPIO27_LEVEL_LOW & 0b1u) << 12u;
curr &= ~(0b1u << 13u);
curr |= (GPIO27_LEVEL_HIGH & 0b1u) << 13u;
curr &= ~(0b1u << 14u);
curr |= (GPIO27_EDGE_LOW & 0b1u) << 14u;
curr &= ~(0b1u << 15u);
curr |= (GPIO27_EDGE_HIGH & 0b1u) << 15u;
curr &= ~(0b1u << 16u);
curr |= (GPIO28_LEVEL_LOW & 0b1u) << 16u;
curr &= ~(0b1u << 17u);
curr |= (GPIO28_LEVEL_HIGH & 0b1u) << 17u;
curr &= ~(0b1u << 18u);
curr |= (GPIO28_EDGE_LOW & 0b1u) << 18u;
curr &= ~(0b1u << 19u);
curr |= (GPIO28_EDGE_HIGH & 0b1u) << 19u;
curr &= ~(0b1u << 20u);
curr |= (GPIO29_LEVEL_LOW & 0b1u) << 20u;
curr &= ~(0b1u << 21u);
curr |= (GPIO29_LEVEL_HIGH & 0b1u) << 21u;
curr &= ~(0b1u << 22u);
curr |= (GPIO29_EDGE_LOW & 0b1u) << 22u;
curr &= ~(0b1u << 23u);
curr |= (GPIO29_EDGE_HIGH & 0b1u) << 23u;
PROC0_INTE3 = curr;
}
inline bool get_PROC0_INTF0_GPIO0_LEVEL_LOW() volatile
{
return PROC0_INTF0 & (1u << 0u);
}
inline void set_PROC0_INTF0_GPIO0_LEVEL_LOW() volatile
{
PROC0_INTF0 |= 1u << 0u;
}
inline void clear_PROC0_INTF0_GPIO0_LEVEL_LOW() volatile
{
PROC0_INTF0 &= ~(1u << 0u);
}
inline void toggle_PROC0_INTF0_GPIO0_LEVEL_LOW() volatile
{
PROC0_INTF0 ^= 1u << 0u;
}
inline bool get_PROC0_INTF0_GPIO0_LEVEL_HIGH() volatile
{
return PROC0_INTF0 & (1u << 1u);
}
inline void set_PROC0_INTF0_GPIO0_LEVEL_HIGH() volatile
{
PROC0_INTF0 |= 1u << 1u;
}
inline void clear_PROC0_INTF0_GPIO0_LEVEL_HIGH() volatile
{
PROC0_INTF0 &= ~(1u << 1u);
}
inline void toggle_PROC0_INTF0_GPIO0_LEVEL_HIGH() volatile
{
PROC0_INTF0 ^= 1u << 1u;
}
inline bool get_PROC0_INTF0_GPIO0_EDGE_LOW() volatile
{
return PROC0_INTF0 & (1u << 2u);
}
inline void set_PROC0_INTF0_GPIO0_EDGE_LOW() volatile
{
PROC0_INTF0 |= 1u << 2u;
}
inline void clear_PROC0_INTF0_GPIO0_EDGE_LOW() volatile
{
PROC0_INTF0 &= ~(1u << 2u);
}
inline void toggle_PROC0_INTF0_GPIO0_EDGE_LOW() volatile
{
PROC0_INTF0 ^= 1u << 2u;
}
inline bool get_PROC0_INTF0_GPIO0_EDGE_HIGH() volatile
{
return PROC0_INTF0 & (1u << 3u);
}
inline void set_PROC0_INTF0_GPIO0_EDGE_HIGH() volatile
{
PROC0_INTF0 |= 1u << 3u;
}
inline void clear_PROC0_INTF0_GPIO0_EDGE_HIGH() volatile
{
PROC0_INTF0 &= ~(1u << 3u);
}
inline void toggle_PROC0_INTF0_GPIO0_EDGE_HIGH() volatile
{
PROC0_INTF0 ^= 1u << 3u;
}
inline bool get_PROC0_INTF0_GPIO1_LEVEL_LOW() volatile
{
return PROC0_INTF0 & (1u << 4u);
}
inline void set_PROC0_INTF0_GPIO1_LEVEL_LOW() volatile
{
PROC0_INTF0 |= 1u << 4u;
}
inline void clear_PROC0_INTF0_GPIO1_LEVEL_LOW() volatile
{
PROC0_INTF0 &= ~(1u << 4u);
}
inline void toggle_PROC0_INTF0_GPIO1_LEVEL_LOW() volatile
{
PROC0_INTF0 ^= 1u << 4u;
}
inline bool get_PROC0_INTF0_GPIO1_LEVEL_HIGH() volatile
{
return PROC0_INTF0 & (1u << 5u);
}
inline void set_PROC0_INTF0_GPIO1_LEVEL_HIGH() volatile
{
PROC0_INTF0 |= 1u << 5u;
}
inline void clear_PROC0_INTF0_GPIO1_LEVEL_HIGH() volatile
{
PROC0_INTF0 &= ~(1u << 5u);
}
inline void toggle_PROC0_INTF0_GPIO1_LEVEL_HIGH() volatile
{
PROC0_INTF0 ^= 1u << 5u;
}
inline bool get_PROC0_INTF0_GPIO1_EDGE_LOW() volatile
{
return PROC0_INTF0 & (1u << 6u);
}
inline void set_PROC0_INTF0_GPIO1_EDGE_LOW() volatile
{
PROC0_INTF0 |= 1u << 6u;
}
inline void clear_PROC0_INTF0_GPIO1_EDGE_LOW() volatile
{
PROC0_INTF0 &= ~(1u << 6u);
}
inline void toggle_PROC0_INTF0_GPIO1_EDGE_LOW() volatile
{
PROC0_INTF0 ^= 1u << 6u;
}
inline bool get_PROC0_INTF0_GPIO1_EDGE_HIGH() volatile
{
return PROC0_INTF0 & (1u << 7u);
}
inline void set_PROC0_INTF0_GPIO1_EDGE_HIGH() volatile
{
PROC0_INTF0 |= 1u << 7u;
}
inline void clear_PROC0_INTF0_GPIO1_EDGE_HIGH() volatile
{
PROC0_INTF0 &= ~(1u << 7u);
}
inline void toggle_PROC0_INTF0_GPIO1_EDGE_HIGH() volatile
{
PROC0_INTF0 ^= 1u << 7u;
}
inline bool get_PROC0_INTF0_GPIO2_LEVEL_LOW() volatile
{
return PROC0_INTF0 & (1u << 8u);
}
inline void set_PROC0_INTF0_GPIO2_LEVEL_LOW() volatile
{
PROC0_INTF0 |= 1u << 8u;
}
inline void clear_PROC0_INTF0_GPIO2_LEVEL_LOW() volatile
{
PROC0_INTF0 &= ~(1u << 8u);
}
inline void toggle_PROC0_INTF0_GPIO2_LEVEL_LOW() volatile
{
PROC0_INTF0 ^= 1u << 8u;
}
inline bool get_PROC0_INTF0_GPIO2_LEVEL_HIGH() volatile
{
return PROC0_INTF0 & (1u << 9u);
}
inline void set_PROC0_INTF0_GPIO2_LEVEL_HIGH() volatile
{
PROC0_INTF0 |= 1u << 9u;
}
inline void clear_PROC0_INTF0_GPIO2_LEVEL_HIGH() volatile
{
PROC0_INTF0 &= ~(1u << 9u);
}
inline void toggle_PROC0_INTF0_GPIO2_LEVEL_HIGH() volatile
{
PROC0_INTF0 ^= 1u << 9u;
}
inline bool get_PROC0_INTF0_GPIO2_EDGE_LOW() volatile
{
return PROC0_INTF0 & (1u << 10u);
}
inline void set_PROC0_INTF0_GPIO2_EDGE_LOW() volatile
{
PROC0_INTF0 |= 1u << 10u;
}
inline void clear_PROC0_INTF0_GPIO2_EDGE_LOW() volatile
{
PROC0_INTF0 &= ~(1u << 10u);
}
inline void toggle_PROC0_INTF0_GPIO2_EDGE_LOW() volatile
{
PROC0_INTF0 ^= 1u << 10u;
}
inline bool get_PROC0_INTF0_GPIO2_EDGE_HIGH() volatile
{
return PROC0_INTF0 & (1u << 11u);
}
inline void set_PROC0_INTF0_GPIO2_EDGE_HIGH() volatile
{
PROC0_INTF0 |= 1u << 11u;
}
inline void clear_PROC0_INTF0_GPIO2_EDGE_HIGH() volatile
{
PROC0_INTF0 &= ~(1u << 11u);
}
inline void toggle_PROC0_INTF0_GPIO2_EDGE_HIGH() volatile
{
PROC0_INTF0 ^= 1u << 11u;
}
inline bool get_PROC0_INTF0_GPIO3_LEVEL_LOW() volatile
{
return PROC0_INTF0 & (1u << 12u);
}
inline void set_PROC0_INTF0_GPIO3_LEVEL_LOW() volatile
{
PROC0_INTF0 |= 1u << 12u;
}
inline void clear_PROC0_INTF0_GPIO3_LEVEL_LOW() volatile
{
PROC0_INTF0 &= ~(1u << 12u);
}
inline void toggle_PROC0_INTF0_GPIO3_LEVEL_LOW() volatile
{
PROC0_INTF0 ^= 1u << 12u;
}
inline bool get_PROC0_INTF0_GPIO3_LEVEL_HIGH() volatile
{
return PROC0_INTF0 & (1u << 13u);
}
inline void set_PROC0_INTF0_GPIO3_LEVEL_HIGH() volatile
{
PROC0_INTF0 |= 1u << 13u;
}
inline void clear_PROC0_INTF0_GPIO3_LEVEL_HIGH() volatile
{
PROC0_INTF0 &= ~(1u << 13u);
}
inline void toggle_PROC0_INTF0_GPIO3_LEVEL_HIGH() volatile
{
PROC0_INTF0 ^= 1u << 13u;
}
inline bool get_PROC0_INTF0_GPIO3_EDGE_LOW() volatile
{
return PROC0_INTF0 & (1u << 14u);
}
inline void set_PROC0_INTF0_GPIO3_EDGE_LOW() volatile
{
PROC0_INTF0 |= 1u << 14u;
}
inline void clear_PROC0_INTF0_GPIO3_EDGE_LOW() volatile
{
PROC0_INTF0 &= ~(1u << 14u);
}
inline void toggle_PROC0_INTF0_GPIO3_EDGE_LOW() volatile
{
PROC0_INTF0 ^= 1u << 14u;
}
inline bool get_PROC0_INTF0_GPIO3_EDGE_HIGH() volatile
{
return PROC0_INTF0 & (1u << 15u);
}
inline void set_PROC0_INTF0_GPIO3_EDGE_HIGH() volatile
{
PROC0_INTF0 |= 1u << 15u;
}
inline void clear_PROC0_INTF0_GPIO3_EDGE_HIGH() volatile
{
PROC0_INTF0 &= ~(1u << 15u);
}
inline void toggle_PROC0_INTF0_GPIO3_EDGE_HIGH() volatile
{
PROC0_INTF0 ^= 1u << 15u;
}
inline bool get_PROC0_INTF0_GPIO4_LEVEL_LOW() volatile
{
return PROC0_INTF0 & (1u << 16u);
}
inline void set_PROC0_INTF0_GPIO4_LEVEL_LOW() volatile
{
PROC0_INTF0 |= 1u << 16u;
}
inline void clear_PROC0_INTF0_GPIO4_LEVEL_LOW() volatile
{
PROC0_INTF0 &= ~(1u << 16u);
}
inline void toggle_PROC0_INTF0_GPIO4_LEVEL_LOW() volatile
{
PROC0_INTF0 ^= 1u << 16u;
}
inline bool get_PROC0_INTF0_GPIO4_LEVEL_HIGH() volatile
{
return PROC0_INTF0 & (1u << 17u);
}
inline void set_PROC0_INTF0_GPIO4_LEVEL_HIGH() volatile
{
PROC0_INTF0 |= 1u << 17u;
}
inline void clear_PROC0_INTF0_GPIO4_LEVEL_HIGH() volatile
{
PROC0_INTF0 &= ~(1u << 17u);
}
inline void toggle_PROC0_INTF0_GPIO4_LEVEL_HIGH() volatile
{
PROC0_INTF0 ^= 1u << 17u;
}
inline bool get_PROC0_INTF0_GPIO4_EDGE_LOW() volatile
{
return PROC0_INTF0 & (1u << 18u);
}
inline void set_PROC0_INTF0_GPIO4_EDGE_LOW() volatile
{
PROC0_INTF0 |= 1u << 18u;
}
inline void clear_PROC0_INTF0_GPIO4_EDGE_LOW() volatile
{
PROC0_INTF0 &= ~(1u << 18u);
}
inline void toggle_PROC0_INTF0_GPIO4_EDGE_LOW() volatile
{
PROC0_INTF0 ^= 1u << 18u;
}
inline bool get_PROC0_INTF0_GPIO4_EDGE_HIGH() volatile
{
return PROC0_INTF0 & (1u << 19u);
}
inline void set_PROC0_INTF0_GPIO4_EDGE_HIGH() volatile
{
PROC0_INTF0 |= 1u << 19u;
}
inline void clear_PROC0_INTF0_GPIO4_EDGE_HIGH() volatile
{
PROC0_INTF0 &= ~(1u << 19u);
}
inline void toggle_PROC0_INTF0_GPIO4_EDGE_HIGH() volatile
{
PROC0_INTF0 ^= 1u << 19u;
}
inline bool get_PROC0_INTF0_GPIO5_LEVEL_LOW() volatile
{
return PROC0_INTF0 & (1u << 20u);
}
inline void set_PROC0_INTF0_GPIO5_LEVEL_LOW() volatile
{
PROC0_INTF0 |= 1u << 20u;
}
inline void clear_PROC0_INTF0_GPIO5_LEVEL_LOW() volatile
{
PROC0_INTF0 &= ~(1u << 20u);
}
inline void toggle_PROC0_INTF0_GPIO5_LEVEL_LOW() volatile
{
PROC0_INTF0 ^= 1u << 20u;
}
inline bool get_PROC0_INTF0_GPIO5_LEVEL_HIGH() volatile
{
return PROC0_INTF0 & (1u << 21u);
}
inline void set_PROC0_INTF0_GPIO5_LEVEL_HIGH() volatile
{
PROC0_INTF0 |= 1u << 21u;
}
inline void clear_PROC0_INTF0_GPIO5_LEVEL_HIGH() volatile
{
PROC0_INTF0 &= ~(1u << 21u);
}
inline void toggle_PROC0_INTF0_GPIO5_LEVEL_HIGH() volatile
{
PROC0_INTF0 ^= 1u << 21u;
}
inline bool get_PROC0_INTF0_GPIO5_EDGE_LOW() volatile
{
return PROC0_INTF0 & (1u << 22u);
}
inline void set_PROC0_INTF0_GPIO5_EDGE_LOW() volatile
{
PROC0_INTF0 |= 1u << 22u;
}
inline void clear_PROC0_INTF0_GPIO5_EDGE_LOW() volatile
{
PROC0_INTF0 &= ~(1u << 22u);
}
inline void toggle_PROC0_INTF0_GPIO5_EDGE_LOW() volatile
{
PROC0_INTF0 ^= 1u << 22u;
}
inline bool get_PROC0_INTF0_GPIO5_EDGE_HIGH() volatile
{
return PROC0_INTF0 & (1u << 23u);
}
inline void set_PROC0_INTF0_GPIO5_EDGE_HIGH() volatile
{
PROC0_INTF0 |= 1u << 23u;
}
inline void clear_PROC0_INTF0_GPIO5_EDGE_HIGH() volatile
{
PROC0_INTF0 &= ~(1u << 23u);
}
inline void toggle_PROC0_INTF0_GPIO5_EDGE_HIGH() volatile
{
PROC0_INTF0 ^= 1u << 23u;
}
inline bool get_PROC0_INTF0_GPIO6_LEVEL_LOW() volatile
{
return PROC0_INTF0 & (1u << 24u);
}
inline void set_PROC0_INTF0_GPIO6_LEVEL_LOW() volatile
{
PROC0_INTF0 |= 1u << 24u;
}
inline void clear_PROC0_INTF0_GPIO6_LEVEL_LOW() volatile
{
PROC0_INTF0 &= ~(1u << 24u);
}
inline void toggle_PROC0_INTF0_GPIO6_LEVEL_LOW() volatile
{
PROC0_INTF0 ^= 1u << 24u;
}
inline bool get_PROC0_INTF0_GPIO6_LEVEL_HIGH() volatile
{
return PROC0_INTF0 & (1u << 25u);
}
inline void set_PROC0_INTF0_GPIO6_LEVEL_HIGH() volatile
{
PROC0_INTF0 |= 1u << 25u;
}
inline void clear_PROC0_INTF0_GPIO6_LEVEL_HIGH() volatile
{
PROC0_INTF0 &= ~(1u << 25u);
}
inline void toggle_PROC0_INTF0_GPIO6_LEVEL_HIGH() volatile
{
PROC0_INTF0 ^= 1u << 25u;
}
inline bool get_PROC0_INTF0_GPIO6_EDGE_LOW() volatile
{
return PROC0_INTF0 & (1u << 26u);
}
inline void set_PROC0_INTF0_GPIO6_EDGE_LOW() volatile
{
PROC0_INTF0 |= 1u << 26u;
}
inline void clear_PROC0_INTF0_GPIO6_EDGE_LOW() volatile
{
PROC0_INTF0 &= ~(1u << 26u);
}
inline void toggle_PROC0_INTF0_GPIO6_EDGE_LOW() volatile
{
PROC0_INTF0 ^= 1u << 26u;
}
inline bool get_PROC0_INTF0_GPIO6_EDGE_HIGH() volatile
{
return PROC0_INTF0 & (1u << 27u);
}
inline void set_PROC0_INTF0_GPIO6_EDGE_HIGH() volatile
{
PROC0_INTF0 |= 1u << 27u;
}
inline void clear_PROC0_INTF0_GPIO6_EDGE_HIGH() volatile
{
PROC0_INTF0 &= ~(1u << 27u);
}
inline void toggle_PROC0_INTF0_GPIO6_EDGE_HIGH() volatile
{
PROC0_INTF0 ^= 1u << 27u;
}
inline bool get_PROC0_INTF0_GPIO7_LEVEL_LOW() volatile
{
return PROC0_INTF0 & (1u << 28u);
}
inline void set_PROC0_INTF0_GPIO7_LEVEL_LOW() volatile
{
PROC0_INTF0 |= 1u << 28u;
}
inline void clear_PROC0_INTF0_GPIO7_LEVEL_LOW() volatile
{
PROC0_INTF0 &= ~(1u << 28u);
}
inline void toggle_PROC0_INTF0_GPIO7_LEVEL_LOW() volatile
{
PROC0_INTF0 ^= 1u << 28u;
}
inline bool get_PROC0_INTF0_GPIO7_LEVEL_HIGH() volatile
{
return PROC0_INTF0 & (1u << 29u);
}
inline void set_PROC0_INTF0_GPIO7_LEVEL_HIGH() volatile
{
PROC0_INTF0 |= 1u << 29u;
}
inline void clear_PROC0_INTF0_GPIO7_LEVEL_HIGH() volatile
{
PROC0_INTF0 &= ~(1u << 29u);
}
inline void toggle_PROC0_INTF0_GPIO7_LEVEL_HIGH() volatile
{
PROC0_INTF0 ^= 1u << 29u;
}
inline bool get_PROC0_INTF0_GPIO7_EDGE_LOW() volatile
{
return PROC0_INTF0 & (1u << 30u);
}
inline void set_PROC0_INTF0_GPIO7_EDGE_LOW() volatile
{
PROC0_INTF0 |= 1u << 30u;
}
inline void clear_PROC0_INTF0_GPIO7_EDGE_LOW() volatile
{
PROC0_INTF0 &= ~(1u << 30u);
}
inline void toggle_PROC0_INTF0_GPIO7_EDGE_LOW() volatile
{
PROC0_INTF0 ^= 1u << 30u;
}
inline bool get_PROC0_INTF0_GPIO7_EDGE_HIGH() volatile
{
return PROC0_INTF0 & (1u << 31u);
}
inline void set_PROC0_INTF0_GPIO7_EDGE_HIGH() volatile
{
PROC0_INTF0 |= 1u << 31u;
}
inline void clear_PROC0_INTF0_GPIO7_EDGE_HIGH() volatile
{
PROC0_INTF0 &= ~(1u << 31u);
}
inline void toggle_PROC0_INTF0_GPIO7_EDGE_HIGH() volatile
{
PROC0_INTF0 ^= 1u << 31u;
}
inline void get_PROC0_INTF0(
bool &GPIO0_LEVEL_LOW, bool &GPIO0_LEVEL_HIGH, bool &GPIO0_EDGE_LOW,
bool &GPIO0_EDGE_HIGH, bool &GPIO1_LEVEL_LOW, bool &GPIO1_LEVEL_HIGH,
bool &GPIO1_EDGE_LOW, bool &GPIO1_EDGE_HIGH, bool &GPIO2_LEVEL_LOW,
bool &GPIO2_LEVEL_HIGH, bool &GPIO2_EDGE_LOW, bool &GPIO2_EDGE_HIGH,
bool &GPIO3_LEVEL_LOW, bool &GPIO3_LEVEL_HIGH, bool &GPIO3_EDGE_LOW,
bool &GPIO3_EDGE_HIGH, bool &GPIO4_LEVEL_LOW, bool &GPIO4_LEVEL_HIGH,
bool &GPIO4_EDGE_LOW, bool &GPIO4_EDGE_HIGH, bool &GPIO5_LEVEL_LOW,
bool &GPIO5_LEVEL_HIGH, bool &GPIO5_EDGE_LOW, bool &GPIO5_EDGE_HIGH,
bool &GPIO6_LEVEL_LOW, bool &GPIO6_LEVEL_HIGH, bool &GPIO6_EDGE_LOW,
bool &GPIO6_EDGE_HIGH, bool &GPIO7_LEVEL_LOW, bool &GPIO7_LEVEL_HIGH,
bool &GPIO7_EDGE_LOW, bool &GPIO7_EDGE_HIGH) volatile
{
uint32_t curr = PROC0_INTF0;
GPIO0_LEVEL_LOW = curr & (1u << 0u);
GPIO0_LEVEL_HIGH = curr & (1u << 1u);
GPIO0_EDGE_LOW = curr & (1u << 2u);
GPIO0_EDGE_HIGH = curr & (1u << 3u);
GPIO1_LEVEL_LOW = curr & (1u << 4u);
GPIO1_LEVEL_HIGH = curr & (1u << 5u);
GPIO1_EDGE_LOW = curr & (1u << 6u);
GPIO1_EDGE_HIGH = curr & (1u << 7u);
GPIO2_LEVEL_LOW = curr & (1u << 8u);
GPIO2_LEVEL_HIGH = curr & (1u << 9u);
GPIO2_EDGE_LOW = curr & (1u << 10u);
GPIO2_EDGE_HIGH = curr & (1u << 11u);
GPIO3_LEVEL_LOW = curr & (1u << 12u);
GPIO3_LEVEL_HIGH = curr & (1u << 13u);
GPIO3_EDGE_LOW = curr & (1u << 14u);
GPIO3_EDGE_HIGH = curr & (1u << 15u);
GPIO4_LEVEL_LOW = curr & (1u << 16u);
GPIO4_LEVEL_HIGH = curr & (1u << 17u);
GPIO4_EDGE_LOW = curr & (1u << 18u);
GPIO4_EDGE_HIGH = curr & (1u << 19u);
GPIO5_LEVEL_LOW = curr & (1u << 20u);
GPIO5_LEVEL_HIGH = curr & (1u << 21u);
GPIO5_EDGE_LOW = curr & (1u << 22u);
GPIO5_EDGE_HIGH = curr & (1u << 23u);
GPIO6_LEVEL_LOW = curr & (1u << 24u);
GPIO6_LEVEL_HIGH = curr & (1u << 25u);
GPIO6_EDGE_LOW = curr & (1u << 26u);
GPIO6_EDGE_HIGH = curr & (1u << 27u);
GPIO7_LEVEL_LOW = curr & (1u << 28u);
GPIO7_LEVEL_HIGH = curr & (1u << 29u);
GPIO7_EDGE_LOW = curr & (1u << 30u);
GPIO7_EDGE_HIGH = curr & (1u << 31u);
}
inline void set_PROC0_INTF0(
bool GPIO0_LEVEL_LOW, bool GPIO0_LEVEL_HIGH, bool GPIO0_EDGE_LOW,
bool GPIO0_EDGE_HIGH, bool GPIO1_LEVEL_LOW, bool GPIO1_LEVEL_HIGH,
bool GPIO1_EDGE_LOW, bool GPIO1_EDGE_HIGH, bool GPIO2_LEVEL_LOW,
bool GPIO2_LEVEL_HIGH, bool GPIO2_EDGE_LOW, bool GPIO2_EDGE_HIGH,
bool GPIO3_LEVEL_LOW, bool GPIO3_LEVEL_HIGH, bool GPIO3_EDGE_LOW,
bool GPIO3_EDGE_HIGH, bool GPIO4_LEVEL_LOW, bool GPIO4_LEVEL_HIGH,
bool GPIO4_EDGE_LOW, bool GPIO4_EDGE_HIGH, bool GPIO5_LEVEL_LOW,
bool GPIO5_LEVEL_HIGH, bool GPIO5_EDGE_LOW, bool GPIO5_EDGE_HIGH,
bool GPIO6_LEVEL_LOW, bool GPIO6_LEVEL_HIGH, bool GPIO6_EDGE_LOW,
bool GPIO6_EDGE_HIGH, bool GPIO7_LEVEL_LOW, bool GPIO7_LEVEL_HIGH,
bool GPIO7_EDGE_LOW, bool GPIO7_EDGE_HIGH) volatile
{
uint32_t curr = PROC0_INTF0;
curr &= ~(0b1u << 0u);
curr |= (GPIO0_LEVEL_LOW & 0b1u) << 0u;
curr &= ~(0b1u << 1u);
curr |= (GPIO0_LEVEL_HIGH & 0b1u) << 1u;
curr &= ~(0b1u << 2u);
curr |= (GPIO0_EDGE_LOW & 0b1u) << 2u;
curr &= ~(0b1u << 3u);
curr |= (GPIO0_EDGE_HIGH & 0b1u) << 3u;
curr &= ~(0b1u << 4u);
curr |= (GPIO1_LEVEL_LOW & 0b1u) << 4u;
curr &= ~(0b1u << 5u);
curr |= (GPIO1_LEVEL_HIGH & 0b1u) << 5u;
curr &= ~(0b1u << 6u);
curr |= (GPIO1_EDGE_LOW & 0b1u) << 6u;
curr &= ~(0b1u << 7u);
curr |= (GPIO1_EDGE_HIGH & 0b1u) << 7u;
curr &= ~(0b1u << 8u);
curr |= (GPIO2_LEVEL_LOW & 0b1u) << 8u;
curr &= ~(0b1u << 9u);
curr |= (GPIO2_LEVEL_HIGH & 0b1u) << 9u;
curr &= ~(0b1u << 10u);
curr |= (GPIO2_EDGE_LOW & 0b1u) << 10u;
curr &= ~(0b1u << 11u);
curr |= (GPIO2_EDGE_HIGH & 0b1u) << 11u;
curr &= ~(0b1u << 12u);
curr |= (GPIO3_LEVEL_LOW & 0b1u) << 12u;
curr &= ~(0b1u << 13u);
curr |= (GPIO3_LEVEL_HIGH & 0b1u) << 13u;
curr &= ~(0b1u << 14u);
curr |= (GPIO3_EDGE_LOW & 0b1u) << 14u;
curr &= ~(0b1u << 15u);
curr |= (GPIO3_EDGE_HIGH & 0b1u) << 15u;
curr &= ~(0b1u << 16u);
curr |= (GPIO4_LEVEL_LOW & 0b1u) << 16u;
curr &= ~(0b1u << 17u);
curr |= (GPIO4_LEVEL_HIGH & 0b1u) << 17u;
curr &= ~(0b1u << 18u);
curr |= (GPIO4_EDGE_LOW & 0b1u) << 18u;
curr &= ~(0b1u << 19u);
curr |= (GPIO4_EDGE_HIGH & 0b1u) << 19u;
curr &= ~(0b1u << 20u);
curr |= (GPIO5_LEVEL_LOW & 0b1u) << 20u;
curr &= ~(0b1u << 21u);
curr |= (GPIO5_LEVEL_HIGH & 0b1u) << 21u;
curr &= ~(0b1u << 22u);
curr |= (GPIO5_EDGE_LOW & 0b1u) << 22u;
curr &= ~(0b1u << 23u);
curr |= (GPIO5_EDGE_HIGH & 0b1u) << 23u;
curr &= ~(0b1u << 24u);
curr |= (GPIO6_LEVEL_LOW & 0b1u) << 24u;
curr &= ~(0b1u << 25u);
curr |= (GPIO6_LEVEL_HIGH & 0b1u) << 25u;
curr &= ~(0b1u << 26u);
curr |= (GPIO6_EDGE_LOW & 0b1u) << 26u;
curr &= ~(0b1u << 27u);
curr |= (GPIO6_EDGE_HIGH & 0b1u) << 27u;
curr &= ~(0b1u << 28u);
curr |= (GPIO7_LEVEL_LOW & 0b1u) << 28u;
curr &= ~(0b1u << 29u);
curr |= (GPIO7_LEVEL_HIGH & 0b1u) << 29u;
curr &= ~(0b1u << 30u);
curr |= (GPIO7_EDGE_LOW & 0b1u) << 30u;
curr &= ~(0b1u << 31u);
curr |= (GPIO7_EDGE_HIGH & 0b1u) << 31u;
PROC0_INTF0 = curr;
}
inline bool get_PROC0_INTF1_GPIO8_LEVEL_LOW() volatile
{
return PROC0_INTF1 & (1u << 0u);
}
inline void set_PROC0_INTF1_GPIO8_LEVEL_LOW() volatile
{
PROC0_INTF1 |= 1u << 0u;
}
inline void clear_PROC0_INTF1_GPIO8_LEVEL_LOW() volatile
{
PROC0_INTF1 &= ~(1u << 0u);
}
inline void toggle_PROC0_INTF1_GPIO8_LEVEL_LOW() volatile
{
PROC0_INTF1 ^= 1u << 0u;
}
inline bool get_PROC0_INTF1_GPIO8_LEVEL_HIGH() volatile
{
return PROC0_INTF1 & (1u << 1u);
}
inline void set_PROC0_INTF1_GPIO8_LEVEL_HIGH() volatile
{
PROC0_INTF1 |= 1u << 1u;
}
inline void clear_PROC0_INTF1_GPIO8_LEVEL_HIGH() volatile
{
PROC0_INTF1 &= ~(1u << 1u);
}
inline void toggle_PROC0_INTF1_GPIO8_LEVEL_HIGH() volatile
{
PROC0_INTF1 ^= 1u << 1u;
}
inline bool get_PROC0_INTF1_GPIO8_EDGE_LOW() volatile
{
return PROC0_INTF1 & (1u << 2u);
}
inline void set_PROC0_INTF1_GPIO8_EDGE_LOW() volatile
{
PROC0_INTF1 |= 1u << 2u;
}
inline void clear_PROC0_INTF1_GPIO8_EDGE_LOW() volatile
{
PROC0_INTF1 &= ~(1u << 2u);
}
inline void toggle_PROC0_INTF1_GPIO8_EDGE_LOW() volatile
{
PROC0_INTF1 ^= 1u << 2u;
}
inline bool get_PROC0_INTF1_GPIO8_EDGE_HIGH() volatile
{
return PROC0_INTF1 & (1u << 3u);
}
inline void set_PROC0_INTF1_GPIO8_EDGE_HIGH() volatile
{
PROC0_INTF1 |= 1u << 3u;
}
inline void clear_PROC0_INTF1_GPIO8_EDGE_HIGH() volatile
{
PROC0_INTF1 &= ~(1u << 3u);
}
inline void toggle_PROC0_INTF1_GPIO8_EDGE_HIGH() volatile
{
PROC0_INTF1 ^= 1u << 3u;
}
inline bool get_PROC0_INTF1_GPIO9_LEVEL_LOW() volatile
{
return PROC0_INTF1 & (1u << 4u);
}
inline void set_PROC0_INTF1_GPIO9_LEVEL_LOW() volatile
{
PROC0_INTF1 |= 1u << 4u;
}
inline void clear_PROC0_INTF1_GPIO9_LEVEL_LOW() volatile
{
PROC0_INTF1 &= ~(1u << 4u);
}
inline void toggle_PROC0_INTF1_GPIO9_LEVEL_LOW() volatile
{
PROC0_INTF1 ^= 1u << 4u;
}
inline bool get_PROC0_INTF1_GPIO9_LEVEL_HIGH() volatile
{
return PROC0_INTF1 & (1u << 5u);
}
inline void set_PROC0_INTF1_GPIO9_LEVEL_HIGH() volatile
{
PROC0_INTF1 |= 1u << 5u;
}
inline void clear_PROC0_INTF1_GPIO9_LEVEL_HIGH() volatile
{
PROC0_INTF1 &= ~(1u << 5u);
}
inline void toggle_PROC0_INTF1_GPIO9_LEVEL_HIGH() volatile
{
PROC0_INTF1 ^= 1u << 5u;
}
inline bool get_PROC0_INTF1_GPIO9_EDGE_LOW() volatile
{
return PROC0_INTF1 & (1u << 6u);
}
inline void set_PROC0_INTF1_GPIO9_EDGE_LOW() volatile
{
PROC0_INTF1 |= 1u << 6u;
}
inline void clear_PROC0_INTF1_GPIO9_EDGE_LOW() volatile
{
PROC0_INTF1 &= ~(1u << 6u);
}
inline void toggle_PROC0_INTF1_GPIO9_EDGE_LOW() volatile
{
PROC0_INTF1 ^= 1u << 6u;
}
inline bool get_PROC0_INTF1_GPIO9_EDGE_HIGH() volatile
{
return PROC0_INTF1 & (1u << 7u);
}
inline void set_PROC0_INTF1_GPIO9_EDGE_HIGH() volatile
{
PROC0_INTF1 |= 1u << 7u;
}
inline void clear_PROC0_INTF1_GPIO9_EDGE_HIGH() volatile
{
PROC0_INTF1 &= ~(1u << 7u);
}
inline void toggle_PROC0_INTF1_GPIO9_EDGE_HIGH() volatile
{
PROC0_INTF1 ^= 1u << 7u;
}
inline bool get_PROC0_INTF1_GPIO10_LEVEL_LOW() volatile
{
return PROC0_INTF1 & (1u << 8u);
}
inline void set_PROC0_INTF1_GPIO10_LEVEL_LOW() volatile
{
PROC0_INTF1 |= 1u << 8u;
}
inline void clear_PROC0_INTF1_GPIO10_LEVEL_LOW() volatile
{
PROC0_INTF1 &= ~(1u << 8u);
}
inline void toggle_PROC0_INTF1_GPIO10_LEVEL_LOW() volatile
{
PROC0_INTF1 ^= 1u << 8u;
}
inline bool get_PROC0_INTF1_GPIO10_LEVEL_HIGH() volatile
{
return PROC0_INTF1 & (1u << 9u);
}
inline void set_PROC0_INTF1_GPIO10_LEVEL_HIGH() volatile
{
PROC0_INTF1 |= 1u << 9u;
}
inline void clear_PROC0_INTF1_GPIO10_LEVEL_HIGH() volatile
{
PROC0_INTF1 &= ~(1u << 9u);
}
inline void toggle_PROC0_INTF1_GPIO10_LEVEL_HIGH() volatile
{
PROC0_INTF1 ^= 1u << 9u;
}
inline bool get_PROC0_INTF1_GPIO10_EDGE_LOW() volatile
{
return PROC0_INTF1 & (1u << 10u);
}
inline void set_PROC0_INTF1_GPIO10_EDGE_LOW() volatile
{
PROC0_INTF1 |= 1u << 10u;
}
inline void clear_PROC0_INTF1_GPIO10_EDGE_LOW() volatile
{
PROC0_INTF1 &= ~(1u << 10u);
}
inline void toggle_PROC0_INTF1_GPIO10_EDGE_LOW() volatile
{
PROC0_INTF1 ^= 1u << 10u;
}
inline bool get_PROC0_INTF1_GPIO10_EDGE_HIGH() volatile
{
return PROC0_INTF1 & (1u << 11u);
}
inline void set_PROC0_INTF1_GPIO10_EDGE_HIGH() volatile
{
PROC0_INTF1 |= 1u << 11u;
}
inline void clear_PROC0_INTF1_GPIO10_EDGE_HIGH() volatile
{
PROC0_INTF1 &= ~(1u << 11u);
}
inline void toggle_PROC0_INTF1_GPIO10_EDGE_HIGH() volatile
{
PROC0_INTF1 ^= 1u << 11u;
}
inline bool get_PROC0_INTF1_GPIO11_LEVEL_LOW() volatile
{
return PROC0_INTF1 & (1u << 12u);
}
inline void set_PROC0_INTF1_GPIO11_LEVEL_LOW() volatile
{
PROC0_INTF1 |= 1u << 12u;
}
inline void clear_PROC0_INTF1_GPIO11_LEVEL_LOW() volatile
{
PROC0_INTF1 &= ~(1u << 12u);
}
inline void toggle_PROC0_INTF1_GPIO11_LEVEL_LOW() volatile
{
PROC0_INTF1 ^= 1u << 12u;
}
inline bool get_PROC0_INTF1_GPIO11_LEVEL_HIGH() volatile
{
return PROC0_INTF1 & (1u << 13u);
}
inline void set_PROC0_INTF1_GPIO11_LEVEL_HIGH() volatile
{
PROC0_INTF1 |= 1u << 13u;
}
inline void clear_PROC0_INTF1_GPIO11_LEVEL_HIGH() volatile
{
PROC0_INTF1 &= ~(1u << 13u);
}
inline void toggle_PROC0_INTF1_GPIO11_LEVEL_HIGH() volatile
{
PROC0_INTF1 ^= 1u << 13u;
}
inline bool get_PROC0_INTF1_GPIO11_EDGE_LOW() volatile
{
return PROC0_INTF1 & (1u << 14u);
}
inline void set_PROC0_INTF1_GPIO11_EDGE_LOW() volatile
{
PROC0_INTF1 |= 1u << 14u;
}
inline void clear_PROC0_INTF1_GPIO11_EDGE_LOW() volatile
{
PROC0_INTF1 &= ~(1u << 14u);
}
inline void toggle_PROC0_INTF1_GPIO11_EDGE_LOW() volatile
{
PROC0_INTF1 ^= 1u << 14u;
}
inline bool get_PROC0_INTF1_GPIO11_EDGE_HIGH() volatile
{
return PROC0_INTF1 & (1u << 15u);
}
inline void set_PROC0_INTF1_GPIO11_EDGE_HIGH() volatile
{
PROC0_INTF1 |= 1u << 15u;
}
inline void clear_PROC0_INTF1_GPIO11_EDGE_HIGH() volatile
{
PROC0_INTF1 &= ~(1u << 15u);
}
inline void toggle_PROC0_INTF1_GPIO11_EDGE_HIGH() volatile
{
PROC0_INTF1 ^= 1u << 15u;
}
inline bool get_PROC0_INTF1_GPIO12_LEVEL_LOW() volatile
{
return PROC0_INTF1 & (1u << 16u);
}
inline void set_PROC0_INTF1_GPIO12_LEVEL_LOW() volatile
{
PROC0_INTF1 |= 1u << 16u;
}
inline void clear_PROC0_INTF1_GPIO12_LEVEL_LOW() volatile
{
PROC0_INTF1 &= ~(1u << 16u);
}
inline void toggle_PROC0_INTF1_GPIO12_LEVEL_LOW() volatile
{
PROC0_INTF1 ^= 1u << 16u;
}
inline bool get_PROC0_INTF1_GPIO12_LEVEL_HIGH() volatile
{
return PROC0_INTF1 & (1u << 17u);
}
inline void set_PROC0_INTF1_GPIO12_LEVEL_HIGH() volatile
{
PROC0_INTF1 |= 1u << 17u;
}
inline void clear_PROC0_INTF1_GPIO12_LEVEL_HIGH() volatile
{
PROC0_INTF1 &= ~(1u << 17u);
}
inline void toggle_PROC0_INTF1_GPIO12_LEVEL_HIGH() volatile
{
PROC0_INTF1 ^= 1u << 17u;
}
inline bool get_PROC0_INTF1_GPIO12_EDGE_LOW() volatile
{
return PROC0_INTF1 & (1u << 18u);
}
inline void set_PROC0_INTF1_GPIO12_EDGE_LOW() volatile
{
PROC0_INTF1 |= 1u << 18u;
}
inline void clear_PROC0_INTF1_GPIO12_EDGE_LOW() volatile
{
PROC0_INTF1 &= ~(1u << 18u);
}
inline void toggle_PROC0_INTF1_GPIO12_EDGE_LOW() volatile
{
PROC0_INTF1 ^= 1u << 18u;
}
inline bool get_PROC0_INTF1_GPIO12_EDGE_HIGH() volatile
{
return PROC0_INTF1 & (1u << 19u);
}
inline void set_PROC0_INTF1_GPIO12_EDGE_HIGH() volatile
{
PROC0_INTF1 |= 1u << 19u;
}
inline void clear_PROC0_INTF1_GPIO12_EDGE_HIGH() volatile
{
PROC0_INTF1 &= ~(1u << 19u);
}
inline void toggle_PROC0_INTF1_GPIO12_EDGE_HIGH() volatile
{
PROC0_INTF1 ^= 1u << 19u;
}
inline bool get_PROC0_INTF1_GPIO13_LEVEL_LOW() volatile
{
return PROC0_INTF1 & (1u << 20u);
}
inline void set_PROC0_INTF1_GPIO13_LEVEL_LOW() volatile
{
PROC0_INTF1 |= 1u << 20u;
}
inline void clear_PROC0_INTF1_GPIO13_LEVEL_LOW() volatile
{
PROC0_INTF1 &= ~(1u << 20u);
}
inline void toggle_PROC0_INTF1_GPIO13_LEVEL_LOW() volatile
{
PROC0_INTF1 ^= 1u << 20u;
}
inline bool get_PROC0_INTF1_GPIO13_LEVEL_HIGH() volatile
{
return PROC0_INTF1 & (1u << 21u);
}
inline void set_PROC0_INTF1_GPIO13_LEVEL_HIGH() volatile
{
PROC0_INTF1 |= 1u << 21u;
}
inline void clear_PROC0_INTF1_GPIO13_LEVEL_HIGH() volatile
{
PROC0_INTF1 &= ~(1u << 21u);
}
inline void toggle_PROC0_INTF1_GPIO13_LEVEL_HIGH() volatile
{
PROC0_INTF1 ^= 1u << 21u;
}
inline bool get_PROC0_INTF1_GPIO13_EDGE_LOW() volatile
{
return PROC0_INTF1 & (1u << 22u);
}
inline void set_PROC0_INTF1_GPIO13_EDGE_LOW() volatile
{
PROC0_INTF1 |= 1u << 22u;
}
inline void clear_PROC0_INTF1_GPIO13_EDGE_LOW() volatile
{
PROC0_INTF1 &= ~(1u << 22u);
}
inline void toggle_PROC0_INTF1_GPIO13_EDGE_LOW() volatile
{
PROC0_INTF1 ^= 1u << 22u;
}
inline bool get_PROC0_INTF1_GPIO13_EDGE_HIGH() volatile
{
return PROC0_INTF1 & (1u << 23u);
}
inline void set_PROC0_INTF1_GPIO13_EDGE_HIGH() volatile
{
PROC0_INTF1 |= 1u << 23u;
}
inline void clear_PROC0_INTF1_GPIO13_EDGE_HIGH() volatile
{
PROC0_INTF1 &= ~(1u << 23u);
}
inline void toggle_PROC0_INTF1_GPIO13_EDGE_HIGH() volatile
{
PROC0_INTF1 ^= 1u << 23u;
}
inline bool get_PROC0_INTF1_GPIO14_LEVEL_LOW() volatile
{
return PROC0_INTF1 & (1u << 24u);
}
inline void set_PROC0_INTF1_GPIO14_LEVEL_LOW() volatile
{
PROC0_INTF1 |= 1u << 24u;
}
inline void clear_PROC0_INTF1_GPIO14_LEVEL_LOW() volatile
{
PROC0_INTF1 &= ~(1u << 24u);
}
inline void toggle_PROC0_INTF1_GPIO14_LEVEL_LOW() volatile
{
PROC0_INTF1 ^= 1u << 24u;
}
inline bool get_PROC0_INTF1_GPIO14_LEVEL_HIGH() volatile
{
return PROC0_INTF1 & (1u << 25u);
}
inline void set_PROC0_INTF1_GPIO14_LEVEL_HIGH() volatile
{
PROC0_INTF1 |= 1u << 25u;
}
inline void clear_PROC0_INTF1_GPIO14_LEVEL_HIGH() volatile
{
PROC0_INTF1 &= ~(1u << 25u);
}
inline void toggle_PROC0_INTF1_GPIO14_LEVEL_HIGH() volatile
{
PROC0_INTF1 ^= 1u << 25u;
}
inline bool get_PROC0_INTF1_GPIO14_EDGE_LOW() volatile
{
return PROC0_INTF1 & (1u << 26u);
}
inline void set_PROC0_INTF1_GPIO14_EDGE_LOW() volatile
{
PROC0_INTF1 |= 1u << 26u;
}
inline void clear_PROC0_INTF1_GPIO14_EDGE_LOW() volatile
{
PROC0_INTF1 &= ~(1u << 26u);
}
inline void toggle_PROC0_INTF1_GPIO14_EDGE_LOW() volatile
{
PROC0_INTF1 ^= 1u << 26u;
}
inline bool get_PROC0_INTF1_GPIO14_EDGE_HIGH() volatile
{
return PROC0_INTF1 & (1u << 27u);
}
inline void set_PROC0_INTF1_GPIO14_EDGE_HIGH() volatile
{
PROC0_INTF1 |= 1u << 27u;
}
inline void clear_PROC0_INTF1_GPIO14_EDGE_HIGH() volatile
{
PROC0_INTF1 &= ~(1u << 27u);
}
inline void toggle_PROC0_INTF1_GPIO14_EDGE_HIGH() volatile
{
PROC0_INTF1 ^= 1u << 27u;
}
inline bool get_PROC0_INTF1_GPIO15_LEVEL_LOW() volatile
{
return PROC0_INTF1 & (1u << 28u);
}
inline void set_PROC0_INTF1_GPIO15_LEVEL_LOW() volatile
{
PROC0_INTF1 |= 1u << 28u;
}
inline void clear_PROC0_INTF1_GPIO15_LEVEL_LOW() volatile
{
PROC0_INTF1 &= ~(1u << 28u);
}
inline void toggle_PROC0_INTF1_GPIO15_LEVEL_LOW() volatile
{
PROC0_INTF1 ^= 1u << 28u;
}
inline bool get_PROC0_INTF1_GPIO15_LEVEL_HIGH() volatile
{
return PROC0_INTF1 & (1u << 29u);
}
inline void set_PROC0_INTF1_GPIO15_LEVEL_HIGH() volatile
{
PROC0_INTF1 |= 1u << 29u;
}
inline void clear_PROC0_INTF1_GPIO15_LEVEL_HIGH() volatile
{
PROC0_INTF1 &= ~(1u << 29u);
}
inline void toggle_PROC0_INTF1_GPIO15_LEVEL_HIGH() volatile
{
PROC0_INTF1 ^= 1u << 29u;
}
inline bool get_PROC0_INTF1_GPIO15_EDGE_LOW() volatile
{
return PROC0_INTF1 & (1u << 30u);
}
inline void set_PROC0_INTF1_GPIO15_EDGE_LOW() volatile
{
PROC0_INTF1 |= 1u << 30u;
}
inline void clear_PROC0_INTF1_GPIO15_EDGE_LOW() volatile
{
PROC0_INTF1 &= ~(1u << 30u);
}
inline void toggle_PROC0_INTF1_GPIO15_EDGE_LOW() volatile
{
PROC0_INTF1 ^= 1u << 30u;
}
inline bool get_PROC0_INTF1_GPIO15_EDGE_HIGH() volatile
{
return PROC0_INTF1 & (1u << 31u);
}
inline void set_PROC0_INTF1_GPIO15_EDGE_HIGH() volatile
{
PROC0_INTF1 |= 1u << 31u;
}
inline void clear_PROC0_INTF1_GPIO15_EDGE_HIGH() volatile
{
PROC0_INTF1 &= ~(1u << 31u);
}
inline void toggle_PROC0_INTF1_GPIO15_EDGE_HIGH() volatile
{
PROC0_INTF1 ^= 1u << 31u;
}
inline void get_PROC0_INTF1(
bool &GPIO8_LEVEL_LOW, bool &GPIO8_LEVEL_HIGH, bool &GPIO8_EDGE_LOW,
bool &GPIO8_EDGE_HIGH, bool &GPIO9_LEVEL_LOW, bool &GPIO9_LEVEL_HIGH,
bool &GPIO9_EDGE_LOW, bool &GPIO9_EDGE_HIGH, bool &GPIO10_LEVEL_LOW,
bool &GPIO10_LEVEL_HIGH, bool &GPIO10_EDGE_LOW, bool &GPIO10_EDGE_HIGH,
bool &GPIO11_LEVEL_LOW, bool &GPIO11_LEVEL_HIGH, bool &GPIO11_EDGE_LOW,
bool &GPIO11_EDGE_HIGH, bool &GPIO12_LEVEL_LOW,
bool &GPIO12_LEVEL_HIGH, bool &GPIO12_EDGE_LOW, bool &GPIO12_EDGE_HIGH,
bool &GPIO13_LEVEL_LOW, bool &GPIO13_LEVEL_HIGH, bool &GPIO13_EDGE_LOW,
bool &GPIO13_EDGE_HIGH, bool &GPIO14_LEVEL_LOW,
bool &GPIO14_LEVEL_HIGH, bool &GPIO14_EDGE_LOW, bool &GPIO14_EDGE_HIGH,
bool &GPIO15_LEVEL_LOW, bool &GPIO15_LEVEL_HIGH, bool &GPIO15_EDGE_LOW,
bool &GPIO15_EDGE_HIGH) volatile
{
uint32_t curr = PROC0_INTF1;
GPIO8_LEVEL_LOW = curr & (1u << 0u);
GPIO8_LEVEL_HIGH = curr & (1u << 1u);
GPIO8_EDGE_LOW = curr & (1u << 2u);
GPIO8_EDGE_HIGH = curr & (1u << 3u);
GPIO9_LEVEL_LOW = curr & (1u << 4u);
GPIO9_LEVEL_HIGH = curr & (1u << 5u);
GPIO9_EDGE_LOW = curr & (1u << 6u);
GPIO9_EDGE_HIGH = curr & (1u << 7u);
GPIO10_LEVEL_LOW = curr & (1u << 8u);
GPIO10_LEVEL_HIGH = curr & (1u << 9u);
GPIO10_EDGE_LOW = curr & (1u << 10u);
GPIO10_EDGE_HIGH = curr & (1u << 11u);
GPIO11_LEVEL_LOW = curr & (1u << 12u);
GPIO11_LEVEL_HIGH = curr & (1u << 13u);
GPIO11_EDGE_LOW = curr & (1u << 14u);
GPIO11_EDGE_HIGH = curr & (1u << 15u);
GPIO12_LEVEL_LOW = curr & (1u << 16u);
GPIO12_LEVEL_HIGH = curr & (1u << 17u);
GPIO12_EDGE_LOW = curr & (1u << 18u);
GPIO12_EDGE_HIGH = curr & (1u << 19u);
GPIO13_LEVEL_LOW = curr & (1u << 20u);
GPIO13_LEVEL_HIGH = curr & (1u << 21u);
GPIO13_EDGE_LOW = curr & (1u << 22u);
GPIO13_EDGE_HIGH = curr & (1u << 23u);
GPIO14_LEVEL_LOW = curr & (1u << 24u);
GPIO14_LEVEL_HIGH = curr & (1u << 25u);
GPIO14_EDGE_LOW = curr & (1u << 26u);
GPIO14_EDGE_HIGH = curr & (1u << 27u);
GPIO15_LEVEL_LOW = curr & (1u << 28u);
GPIO15_LEVEL_HIGH = curr & (1u << 29u);
GPIO15_EDGE_LOW = curr & (1u << 30u);
GPIO15_EDGE_HIGH = curr & (1u << 31u);
}
inline void set_PROC0_INTF1(
bool GPIO8_LEVEL_LOW, bool GPIO8_LEVEL_HIGH, bool GPIO8_EDGE_LOW,
bool GPIO8_EDGE_HIGH, bool GPIO9_LEVEL_LOW, bool GPIO9_LEVEL_HIGH,
bool GPIO9_EDGE_LOW, bool GPIO9_EDGE_HIGH, bool GPIO10_LEVEL_LOW,
bool GPIO10_LEVEL_HIGH, bool GPIO10_EDGE_LOW, bool GPIO10_EDGE_HIGH,
bool GPIO11_LEVEL_LOW, bool GPIO11_LEVEL_HIGH, bool GPIO11_EDGE_LOW,
bool GPIO11_EDGE_HIGH, bool GPIO12_LEVEL_LOW, bool GPIO12_LEVEL_HIGH,
bool GPIO12_EDGE_LOW, bool GPIO12_EDGE_HIGH, bool GPIO13_LEVEL_LOW,
bool GPIO13_LEVEL_HIGH, bool GPIO13_EDGE_LOW, bool GPIO13_EDGE_HIGH,
bool GPIO14_LEVEL_LOW, bool GPIO14_LEVEL_HIGH, bool GPIO14_EDGE_LOW,
bool GPIO14_EDGE_HIGH, bool GPIO15_LEVEL_LOW, bool GPIO15_LEVEL_HIGH,
bool GPIO15_EDGE_LOW, bool GPIO15_EDGE_HIGH) volatile
{
uint32_t curr = PROC0_INTF1;
curr &= ~(0b1u << 0u);
curr |= (GPIO8_LEVEL_LOW & 0b1u) << 0u;
curr &= ~(0b1u << 1u);
curr |= (GPIO8_LEVEL_HIGH & 0b1u) << 1u;
curr &= ~(0b1u << 2u);
curr |= (GPIO8_EDGE_LOW & 0b1u) << 2u;
curr &= ~(0b1u << 3u);
curr |= (GPIO8_EDGE_HIGH & 0b1u) << 3u;
curr &= ~(0b1u << 4u);
curr |= (GPIO9_LEVEL_LOW & 0b1u) << 4u;
curr &= ~(0b1u << 5u);
curr |= (GPIO9_LEVEL_HIGH & 0b1u) << 5u;
curr &= ~(0b1u << 6u);
curr |= (GPIO9_EDGE_LOW & 0b1u) << 6u;
curr &= ~(0b1u << 7u);
curr |= (GPIO9_EDGE_HIGH & 0b1u) << 7u;
curr &= ~(0b1u << 8u);
curr |= (GPIO10_LEVEL_LOW & 0b1u) << 8u;
curr &= ~(0b1u << 9u);
curr |= (GPIO10_LEVEL_HIGH & 0b1u) << 9u;
curr &= ~(0b1u << 10u);
curr |= (GPIO10_EDGE_LOW & 0b1u) << 10u;
curr &= ~(0b1u << 11u);
curr |= (GPIO10_EDGE_HIGH & 0b1u) << 11u;
curr &= ~(0b1u << 12u);
curr |= (GPIO11_LEVEL_LOW & 0b1u) << 12u;
curr &= ~(0b1u << 13u);
curr |= (GPIO11_LEVEL_HIGH & 0b1u) << 13u;
curr &= ~(0b1u << 14u);
curr |= (GPIO11_EDGE_LOW & 0b1u) << 14u;
curr &= ~(0b1u << 15u);
curr |= (GPIO11_EDGE_HIGH & 0b1u) << 15u;
curr &= ~(0b1u << 16u);
curr |= (GPIO12_LEVEL_LOW & 0b1u) << 16u;
curr &= ~(0b1u << 17u);
curr |= (GPIO12_LEVEL_HIGH & 0b1u) << 17u;
curr &= ~(0b1u << 18u);
curr |= (GPIO12_EDGE_LOW & 0b1u) << 18u;
curr &= ~(0b1u << 19u);
curr |= (GPIO12_EDGE_HIGH & 0b1u) << 19u;
curr &= ~(0b1u << 20u);
curr |= (GPIO13_LEVEL_LOW & 0b1u) << 20u;
curr &= ~(0b1u << 21u);
curr |= (GPIO13_LEVEL_HIGH & 0b1u) << 21u;
curr &= ~(0b1u << 22u);
curr |= (GPIO13_EDGE_LOW & 0b1u) << 22u;
curr &= ~(0b1u << 23u);
curr |= (GPIO13_EDGE_HIGH & 0b1u) << 23u;
curr &= ~(0b1u << 24u);
curr |= (GPIO14_LEVEL_LOW & 0b1u) << 24u;
curr &= ~(0b1u << 25u);
curr |= (GPIO14_LEVEL_HIGH & 0b1u) << 25u;
curr &= ~(0b1u << 26u);
curr |= (GPIO14_EDGE_LOW & 0b1u) << 26u;
curr &= ~(0b1u << 27u);
curr |= (GPIO14_EDGE_HIGH & 0b1u) << 27u;
curr &= ~(0b1u << 28u);
curr |= (GPIO15_LEVEL_LOW & 0b1u) << 28u;
curr &= ~(0b1u << 29u);
curr |= (GPIO15_LEVEL_HIGH & 0b1u) << 29u;
curr &= ~(0b1u << 30u);
curr |= (GPIO15_EDGE_LOW & 0b1u) << 30u;
curr &= ~(0b1u << 31u);
curr |= (GPIO15_EDGE_HIGH & 0b1u) << 31u;
PROC0_INTF1 = curr;
}
inline bool get_PROC0_INTF2_GPIO16_LEVEL_LOW() volatile
{
return PROC0_INTF2 & (1u << 0u);
}
inline void set_PROC0_INTF2_GPIO16_LEVEL_LOW() volatile
{
PROC0_INTF2 |= 1u << 0u;
}
inline void clear_PROC0_INTF2_GPIO16_LEVEL_LOW() volatile
{
PROC0_INTF2 &= ~(1u << 0u);
}
inline void toggle_PROC0_INTF2_GPIO16_LEVEL_LOW() volatile
{
PROC0_INTF2 ^= 1u << 0u;
}
inline bool get_PROC0_INTF2_GPIO16_LEVEL_HIGH() volatile
{
return PROC0_INTF2 & (1u << 1u);
}
inline void set_PROC0_INTF2_GPIO16_LEVEL_HIGH() volatile
{
PROC0_INTF2 |= 1u << 1u;
}
inline void clear_PROC0_INTF2_GPIO16_LEVEL_HIGH() volatile
{
PROC0_INTF2 &= ~(1u << 1u);
}
inline void toggle_PROC0_INTF2_GPIO16_LEVEL_HIGH() volatile
{
PROC0_INTF2 ^= 1u << 1u;
}
inline bool get_PROC0_INTF2_GPIO16_EDGE_LOW() volatile
{
return PROC0_INTF2 & (1u << 2u);
}
inline void set_PROC0_INTF2_GPIO16_EDGE_LOW() volatile
{
PROC0_INTF2 |= 1u << 2u;
}
inline void clear_PROC0_INTF2_GPIO16_EDGE_LOW() volatile
{
PROC0_INTF2 &= ~(1u << 2u);
}
inline void toggle_PROC0_INTF2_GPIO16_EDGE_LOW() volatile
{
PROC0_INTF2 ^= 1u << 2u;
}
inline bool get_PROC0_INTF2_GPIO16_EDGE_HIGH() volatile
{
return PROC0_INTF2 & (1u << 3u);
}
inline void set_PROC0_INTF2_GPIO16_EDGE_HIGH() volatile
{
PROC0_INTF2 |= 1u << 3u;
}
inline void clear_PROC0_INTF2_GPIO16_EDGE_HIGH() volatile
{
PROC0_INTF2 &= ~(1u << 3u);
}
inline void toggle_PROC0_INTF2_GPIO16_EDGE_HIGH() volatile
{
PROC0_INTF2 ^= 1u << 3u;
}
inline bool get_PROC0_INTF2_GPIO17_LEVEL_LOW() volatile
{
return PROC0_INTF2 & (1u << 4u);
}
inline void set_PROC0_INTF2_GPIO17_LEVEL_LOW() volatile
{
PROC0_INTF2 |= 1u << 4u;
}
inline void clear_PROC0_INTF2_GPIO17_LEVEL_LOW() volatile
{
PROC0_INTF2 &= ~(1u << 4u);
}
inline void toggle_PROC0_INTF2_GPIO17_LEVEL_LOW() volatile
{
PROC0_INTF2 ^= 1u << 4u;
}
inline bool get_PROC0_INTF2_GPIO17_LEVEL_HIGH() volatile
{
return PROC0_INTF2 & (1u << 5u);
}
inline void set_PROC0_INTF2_GPIO17_LEVEL_HIGH() volatile
{
PROC0_INTF2 |= 1u << 5u;
}
inline void clear_PROC0_INTF2_GPIO17_LEVEL_HIGH() volatile
{
PROC0_INTF2 &= ~(1u << 5u);
}
inline void toggle_PROC0_INTF2_GPIO17_LEVEL_HIGH() volatile
{
PROC0_INTF2 ^= 1u << 5u;
}
inline bool get_PROC0_INTF2_GPIO17_EDGE_LOW() volatile
{
return PROC0_INTF2 & (1u << 6u);
}
inline void set_PROC0_INTF2_GPIO17_EDGE_LOW() volatile
{
PROC0_INTF2 |= 1u << 6u;
}
inline void clear_PROC0_INTF2_GPIO17_EDGE_LOW() volatile
{
PROC0_INTF2 &= ~(1u << 6u);
}
inline void toggle_PROC0_INTF2_GPIO17_EDGE_LOW() volatile
{
PROC0_INTF2 ^= 1u << 6u;
}
inline bool get_PROC0_INTF2_GPIO17_EDGE_HIGH() volatile
{
return PROC0_INTF2 & (1u << 7u);
}
inline void set_PROC0_INTF2_GPIO17_EDGE_HIGH() volatile
{
PROC0_INTF2 |= 1u << 7u;
}
inline void clear_PROC0_INTF2_GPIO17_EDGE_HIGH() volatile
{
PROC0_INTF2 &= ~(1u << 7u);
}
inline void toggle_PROC0_INTF2_GPIO17_EDGE_HIGH() volatile
{
PROC0_INTF2 ^= 1u << 7u;
}
inline bool get_PROC0_INTF2_GPIO18_LEVEL_LOW() volatile
{
return PROC0_INTF2 & (1u << 8u);
}
inline void set_PROC0_INTF2_GPIO18_LEVEL_LOW() volatile
{
PROC0_INTF2 |= 1u << 8u;
}
inline void clear_PROC0_INTF2_GPIO18_LEVEL_LOW() volatile
{
PROC0_INTF2 &= ~(1u << 8u);
}
inline void toggle_PROC0_INTF2_GPIO18_LEVEL_LOW() volatile
{
PROC0_INTF2 ^= 1u << 8u;
}
inline bool get_PROC0_INTF2_GPIO18_LEVEL_HIGH() volatile
{
return PROC0_INTF2 & (1u << 9u);
}
inline void set_PROC0_INTF2_GPIO18_LEVEL_HIGH() volatile
{
PROC0_INTF2 |= 1u << 9u;
}
inline void clear_PROC0_INTF2_GPIO18_LEVEL_HIGH() volatile
{
PROC0_INTF2 &= ~(1u << 9u);
}
inline void toggle_PROC0_INTF2_GPIO18_LEVEL_HIGH() volatile
{
PROC0_INTF2 ^= 1u << 9u;
}
inline bool get_PROC0_INTF2_GPIO18_EDGE_LOW() volatile
{
return PROC0_INTF2 & (1u << 10u);
}
inline void set_PROC0_INTF2_GPIO18_EDGE_LOW() volatile
{
PROC0_INTF2 |= 1u << 10u;
}
inline void clear_PROC0_INTF2_GPIO18_EDGE_LOW() volatile
{
PROC0_INTF2 &= ~(1u << 10u);
}
inline void toggle_PROC0_INTF2_GPIO18_EDGE_LOW() volatile
{
PROC0_INTF2 ^= 1u << 10u;
}
inline bool get_PROC0_INTF2_GPIO18_EDGE_HIGH() volatile
{
return PROC0_INTF2 & (1u << 11u);
}
inline void set_PROC0_INTF2_GPIO18_EDGE_HIGH() volatile
{
PROC0_INTF2 |= 1u << 11u;
}
inline void clear_PROC0_INTF2_GPIO18_EDGE_HIGH() volatile
{
PROC0_INTF2 &= ~(1u << 11u);
}
inline void toggle_PROC0_INTF2_GPIO18_EDGE_HIGH() volatile
{
PROC0_INTF2 ^= 1u << 11u;
}
inline bool get_PROC0_INTF2_GPIO19_LEVEL_LOW() volatile
{
return PROC0_INTF2 & (1u << 12u);
}
inline void set_PROC0_INTF2_GPIO19_LEVEL_LOW() volatile
{
PROC0_INTF2 |= 1u << 12u;
}
inline void clear_PROC0_INTF2_GPIO19_LEVEL_LOW() volatile
{
PROC0_INTF2 &= ~(1u << 12u);
}
inline void toggle_PROC0_INTF2_GPIO19_LEVEL_LOW() volatile
{
PROC0_INTF2 ^= 1u << 12u;
}
inline bool get_PROC0_INTF2_GPIO19_LEVEL_HIGH() volatile
{
return PROC0_INTF2 & (1u << 13u);
}
inline void set_PROC0_INTF2_GPIO19_LEVEL_HIGH() volatile
{
PROC0_INTF2 |= 1u << 13u;
}
inline void clear_PROC0_INTF2_GPIO19_LEVEL_HIGH() volatile
{
PROC0_INTF2 &= ~(1u << 13u);
}
inline void toggle_PROC0_INTF2_GPIO19_LEVEL_HIGH() volatile
{
PROC0_INTF2 ^= 1u << 13u;
}
inline bool get_PROC0_INTF2_GPIO19_EDGE_LOW() volatile
{
return PROC0_INTF2 & (1u << 14u);
}
inline void set_PROC0_INTF2_GPIO19_EDGE_LOW() volatile
{
PROC0_INTF2 |= 1u << 14u;
}
inline void clear_PROC0_INTF2_GPIO19_EDGE_LOW() volatile
{
PROC0_INTF2 &= ~(1u << 14u);
}
inline void toggle_PROC0_INTF2_GPIO19_EDGE_LOW() volatile
{
PROC0_INTF2 ^= 1u << 14u;
}
inline bool get_PROC0_INTF2_GPIO19_EDGE_HIGH() volatile
{
return PROC0_INTF2 & (1u << 15u);
}
inline void set_PROC0_INTF2_GPIO19_EDGE_HIGH() volatile
{
PROC0_INTF2 |= 1u << 15u;
}
inline void clear_PROC0_INTF2_GPIO19_EDGE_HIGH() volatile
{
PROC0_INTF2 &= ~(1u << 15u);
}
inline void toggle_PROC0_INTF2_GPIO19_EDGE_HIGH() volatile
{
PROC0_INTF2 ^= 1u << 15u;
}
inline bool get_PROC0_INTF2_GPIO20_LEVEL_LOW() volatile
{
return PROC0_INTF2 & (1u << 16u);
}
inline void set_PROC0_INTF2_GPIO20_LEVEL_LOW() volatile
{
PROC0_INTF2 |= 1u << 16u;
}
inline void clear_PROC0_INTF2_GPIO20_LEVEL_LOW() volatile
{
PROC0_INTF2 &= ~(1u << 16u);
}
inline void toggle_PROC0_INTF2_GPIO20_LEVEL_LOW() volatile
{
PROC0_INTF2 ^= 1u << 16u;
}
inline bool get_PROC0_INTF2_GPIO20_LEVEL_HIGH() volatile
{
return PROC0_INTF2 & (1u << 17u);
}
inline void set_PROC0_INTF2_GPIO20_LEVEL_HIGH() volatile
{
PROC0_INTF2 |= 1u << 17u;
}
inline void clear_PROC0_INTF2_GPIO20_LEVEL_HIGH() volatile
{
PROC0_INTF2 &= ~(1u << 17u);
}
inline void toggle_PROC0_INTF2_GPIO20_LEVEL_HIGH() volatile
{
PROC0_INTF2 ^= 1u << 17u;
}
inline bool get_PROC0_INTF2_GPIO20_EDGE_LOW() volatile
{
return PROC0_INTF2 & (1u << 18u);
}
inline void set_PROC0_INTF2_GPIO20_EDGE_LOW() volatile
{
PROC0_INTF2 |= 1u << 18u;
}
inline void clear_PROC0_INTF2_GPIO20_EDGE_LOW() volatile
{
PROC0_INTF2 &= ~(1u << 18u);
}
inline void toggle_PROC0_INTF2_GPIO20_EDGE_LOW() volatile
{
PROC0_INTF2 ^= 1u << 18u;
}
inline bool get_PROC0_INTF2_GPIO20_EDGE_HIGH() volatile
{
return PROC0_INTF2 & (1u << 19u);
}
inline void set_PROC0_INTF2_GPIO20_EDGE_HIGH() volatile
{
PROC0_INTF2 |= 1u << 19u;
}
inline void clear_PROC0_INTF2_GPIO20_EDGE_HIGH() volatile
{
PROC0_INTF2 &= ~(1u << 19u);
}
inline void toggle_PROC0_INTF2_GPIO20_EDGE_HIGH() volatile
{
PROC0_INTF2 ^= 1u << 19u;
}
inline bool get_PROC0_INTF2_GPIO21_LEVEL_LOW() volatile
{
return PROC0_INTF2 & (1u << 20u);
}
inline void set_PROC0_INTF2_GPIO21_LEVEL_LOW() volatile
{
PROC0_INTF2 |= 1u << 20u;
}
inline void clear_PROC0_INTF2_GPIO21_LEVEL_LOW() volatile
{
PROC0_INTF2 &= ~(1u << 20u);
}
inline void toggle_PROC0_INTF2_GPIO21_LEVEL_LOW() volatile
{
PROC0_INTF2 ^= 1u << 20u;
}
inline bool get_PROC0_INTF2_GPIO21_LEVEL_HIGH() volatile
{
return PROC0_INTF2 & (1u << 21u);
}
inline void set_PROC0_INTF2_GPIO21_LEVEL_HIGH() volatile
{
PROC0_INTF2 |= 1u << 21u;
}
inline void clear_PROC0_INTF2_GPIO21_LEVEL_HIGH() volatile
{
PROC0_INTF2 &= ~(1u << 21u);
}
inline void toggle_PROC0_INTF2_GPIO21_LEVEL_HIGH() volatile
{
PROC0_INTF2 ^= 1u << 21u;
}
inline bool get_PROC0_INTF2_GPIO21_EDGE_LOW() volatile
{
return PROC0_INTF2 & (1u << 22u);
}
inline void set_PROC0_INTF2_GPIO21_EDGE_LOW() volatile
{
PROC0_INTF2 |= 1u << 22u;
}
inline void clear_PROC0_INTF2_GPIO21_EDGE_LOW() volatile
{
PROC0_INTF2 &= ~(1u << 22u);
}
inline void toggle_PROC0_INTF2_GPIO21_EDGE_LOW() volatile
{
PROC0_INTF2 ^= 1u << 22u;
}
inline bool get_PROC0_INTF2_GPIO21_EDGE_HIGH() volatile
{
return PROC0_INTF2 & (1u << 23u);
}
inline void set_PROC0_INTF2_GPIO21_EDGE_HIGH() volatile
{
PROC0_INTF2 |= 1u << 23u;
}
inline void clear_PROC0_INTF2_GPIO21_EDGE_HIGH() volatile
{
PROC0_INTF2 &= ~(1u << 23u);
}
inline void toggle_PROC0_INTF2_GPIO21_EDGE_HIGH() volatile
{
PROC0_INTF2 ^= 1u << 23u;
}
inline bool get_PROC0_INTF2_GPIO22_LEVEL_LOW() volatile
{
return PROC0_INTF2 & (1u << 24u);
}
inline void set_PROC0_INTF2_GPIO22_LEVEL_LOW() volatile
{
PROC0_INTF2 |= 1u << 24u;
}
inline void clear_PROC0_INTF2_GPIO22_LEVEL_LOW() volatile
{
PROC0_INTF2 &= ~(1u << 24u);
}
inline void toggle_PROC0_INTF2_GPIO22_LEVEL_LOW() volatile
{
PROC0_INTF2 ^= 1u << 24u;
}
inline bool get_PROC0_INTF2_GPIO22_LEVEL_HIGH() volatile
{
return PROC0_INTF2 & (1u << 25u);
}
inline void set_PROC0_INTF2_GPIO22_LEVEL_HIGH() volatile
{
PROC0_INTF2 |= 1u << 25u;
}
inline void clear_PROC0_INTF2_GPIO22_LEVEL_HIGH() volatile
{
PROC0_INTF2 &= ~(1u << 25u);
}
inline void toggle_PROC0_INTF2_GPIO22_LEVEL_HIGH() volatile
{
PROC0_INTF2 ^= 1u << 25u;
}
inline bool get_PROC0_INTF2_GPIO22_EDGE_LOW() volatile
{
return PROC0_INTF2 & (1u << 26u);
}
inline void set_PROC0_INTF2_GPIO22_EDGE_LOW() volatile
{
PROC0_INTF2 |= 1u << 26u;
}
inline void clear_PROC0_INTF2_GPIO22_EDGE_LOW() volatile
{
PROC0_INTF2 &= ~(1u << 26u);
}
inline void toggle_PROC0_INTF2_GPIO22_EDGE_LOW() volatile
{
PROC0_INTF2 ^= 1u << 26u;
}
inline bool get_PROC0_INTF2_GPIO22_EDGE_HIGH() volatile
{
return PROC0_INTF2 & (1u << 27u);
}
inline void set_PROC0_INTF2_GPIO22_EDGE_HIGH() volatile
{
PROC0_INTF2 |= 1u << 27u;
}
inline void clear_PROC0_INTF2_GPIO22_EDGE_HIGH() volatile
{
PROC0_INTF2 &= ~(1u << 27u);
}
inline void toggle_PROC0_INTF2_GPIO22_EDGE_HIGH() volatile
{
PROC0_INTF2 ^= 1u << 27u;
}
inline bool get_PROC0_INTF2_GPIO23_LEVEL_LOW() volatile
{
return PROC0_INTF2 & (1u << 28u);
}
inline void set_PROC0_INTF2_GPIO23_LEVEL_LOW() volatile
{
PROC0_INTF2 |= 1u << 28u;
}
inline void clear_PROC0_INTF2_GPIO23_LEVEL_LOW() volatile
{
PROC0_INTF2 &= ~(1u << 28u);
}
inline void toggle_PROC0_INTF2_GPIO23_LEVEL_LOW() volatile
{
PROC0_INTF2 ^= 1u << 28u;
}
inline bool get_PROC0_INTF2_GPIO23_LEVEL_HIGH() volatile
{
return PROC0_INTF2 & (1u << 29u);
}
inline void set_PROC0_INTF2_GPIO23_LEVEL_HIGH() volatile
{
PROC0_INTF2 |= 1u << 29u;
}
inline void clear_PROC0_INTF2_GPIO23_LEVEL_HIGH() volatile
{
PROC0_INTF2 &= ~(1u << 29u);
}
inline void toggle_PROC0_INTF2_GPIO23_LEVEL_HIGH() volatile
{
PROC0_INTF2 ^= 1u << 29u;
}
inline bool get_PROC0_INTF2_GPIO23_EDGE_LOW() volatile
{
return PROC0_INTF2 & (1u << 30u);
}
inline void set_PROC0_INTF2_GPIO23_EDGE_LOW() volatile
{
PROC0_INTF2 |= 1u << 30u;
}
inline void clear_PROC0_INTF2_GPIO23_EDGE_LOW() volatile
{
PROC0_INTF2 &= ~(1u << 30u);
}
inline void toggle_PROC0_INTF2_GPIO23_EDGE_LOW() volatile
{
PROC0_INTF2 ^= 1u << 30u;
}
inline bool get_PROC0_INTF2_GPIO23_EDGE_HIGH() volatile
{
return PROC0_INTF2 & (1u << 31u);
}
inline void set_PROC0_INTF2_GPIO23_EDGE_HIGH() volatile
{
PROC0_INTF2 |= 1u << 31u;
}
inline void clear_PROC0_INTF2_GPIO23_EDGE_HIGH() volatile
{
PROC0_INTF2 &= ~(1u << 31u);
}
inline void toggle_PROC0_INTF2_GPIO23_EDGE_HIGH() volatile
{
PROC0_INTF2 ^= 1u << 31u;
}
inline void get_PROC0_INTF2(
bool &GPIO16_LEVEL_LOW, bool &GPIO16_LEVEL_HIGH, bool &GPIO16_EDGE_LOW,
bool &GPIO16_EDGE_HIGH, bool &GPIO17_LEVEL_LOW,
bool &GPIO17_LEVEL_HIGH, bool &GPIO17_EDGE_LOW, bool &GPIO17_EDGE_HIGH,
bool &GPIO18_LEVEL_LOW, bool &GPIO18_LEVEL_HIGH, bool &GPIO18_EDGE_LOW,
bool &GPIO18_EDGE_HIGH, bool &GPIO19_LEVEL_LOW,
bool &GPIO19_LEVEL_HIGH, bool &GPIO19_EDGE_LOW, bool &GPIO19_EDGE_HIGH,
bool &GPIO20_LEVEL_LOW, bool &GPIO20_LEVEL_HIGH, bool &GPIO20_EDGE_LOW,
bool &GPIO20_EDGE_HIGH, bool &GPIO21_LEVEL_LOW,
bool &GPIO21_LEVEL_HIGH, bool &GPIO21_EDGE_LOW, bool &GPIO21_EDGE_HIGH,
bool &GPIO22_LEVEL_LOW, bool &GPIO22_LEVEL_HIGH, bool &GPIO22_EDGE_LOW,
bool &GPIO22_EDGE_HIGH, bool &GPIO23_LEVEL_LOW,
bool &GPIO23_LEVEL_HIGH, bool &GPIO23_EDGE_LOW,
bool &GPIO23_EDGE_HIGH) volatile
{
uint32_t curr = PROC0_INTF2;
GPIO16_LEVEL_LOW = curr & (1u << 0u);
GPIO16_LEVEL_HIGH = curr & (1u << 1u);
GPIO16_EDGE_LOW = curr & (1u << 2u);
GPIO16_EDGE_HIGH = curr & (1u << 3u);
GPIO17_LEVEL_LOW = curr & (1u << 4u);
GPIO17_LEVEL_HIGH = curr & (1u << 5u);
GPIO17_EDGE_LOW = curr & (1u << 6u);
GPIO17_EDGE_HIGH = curr & (1u << 7u);
GPIO18_LEVEL_LOW = curr & (1u << 8u);
GPIO18_LEVEL_HIGH = curr & (1u << 9u);
GPIO18_EDGE_LOW = curr & (1u << 10u);
GPIO18_EDGE_HIGH = curr & (1u << 11u);
GPIO19_LEVEL_LOW = curr & (1u << 12u);
GPIO19_LEVEL_HIGH = curr & (1u << 13u);
GPIO19_EDGE_LOW = curr & (1u << 14u);
GPIO19_EDGE_HIGH = curr & (1u << 15u);
GPIO20_LEVEL_LOW = curr & (1u << 16u);
GPIO20_LEVEL_HIGH = curr & (1u << 17u);
GPIO20_EDGE_LOW = curr & (1u << 18u);
GPIO20_EDGE_HIGH = curr & (1u << 19u);
GPIO21_LEVEL_LOW = curr & (1u << 20u);
GPIO21_LEVEL_HIGH = curr & (1u << 21u);
GPIO21_EDGE_LOW = curr & (1u << 22u);
GPIO21_EDGE_HIGH = curr & (1u << 23u);
GPIO22_LEVEL_LOW = curr & (1u << 24u);
GPIO22_LEVEL_HIGH = curr & (1u << 25u);
GPIO22_EDGE_LOW = curr & (1u << 26u);
GPIO22_EDGE_HIGH = curr & (1u << 27u);
GPIO23_LEVEL_LOW = curr & (1u << 28u);
GPIO23_LEVEL_HIGH = curr & (1u << 29u);
GPIO23_EDGE_LOW = curr & (1u << 30u);
GPIO23_EDGE_HIGH = curr & (1u << 31u);
}
inline void set_PROC0_INTF2(
bool GPIO16_LEVEL_LOW, bool GPIO16_LEVEL_HIGH, bool GPIO16_EDGE_LOW,
bool GPIO16_EDGE_HIGH, bool GPIO17_LEVEL_LOW, bool GPIO17_LEVEL_HIGH,
bool GPIO17_EDGE_LOW, bool GPIO17_EDGE_HIGH, bool GPIO18_LEVEL_LOW,
bool GPIO18_LEVEL_HIGH, bool GPIO18_EDGE_LOW, bool GPIO18_EDGE_HIGH,
bool GPIO19_LEVEL_LOW, bool GPIO19_LEVEL_HIGH, bool GPIO19_EDGE_LOW,
bool GPIO19_EDGE_HIGH, bool GPIO20_LEVEL_LOW, bool GPIO20_LEVEL_HIGH,
bool GPIO20_EDGE_LOW, bool GPIO20_EDGE_HIGH, bool GPIO21_LEVEL_LOW,
bool GPIO21_LEVEL_HIGH, bool GPIO21_EDGE_LOW, bool GPIO21_EDGE_HIGH,
bool GPIO22_LEVEL_LOW, bool GPIO22_LEVEL_HIGH, bool GPIO22_EDGE_LOW,
bool GPIO22_EDGE_HIGH, bool GPIO23_LEVEL_LOW, bool GPIO23_LEVEL_HIGH,
bool GPIO23_EDGE_LOW, bool GPIO23_EDGE_HIGH) volatile
{
uint32_t curr = PROC0_INTF2;
curr &= ~(0b1u << 0u);
curr |= (GPIO16_LEVEL_LOW & 0b1u) << 0u;
curr &= ~(0b1u << 1u);
curr |= (GPIO16_LEVEL_HIGH & 0b1u) << 1u;
curr &= ~(0b1u << 2u);
curr |= (GPIO16_EDGE_LOW & 0b1u) << 2u;
curr &= ~(0b1u << 3u);
curr |= (GPIO16_EDGE_HIGH & 0b1u) << 3u;
curr &= ~(0b1u << 4u);
curr |= (GPIO17_LEVEL_LOW & 0b1u) << 4u;
curr &= ~(0b1u << 5u);
curr |= (GPIO17_LEVEL_HIGH & 0b1u) << 5u;
curr &= ~(0b1u << 6u);
curr |= (GPIO17_EDGE_LOW & 0b1u) << 6u;
curr &= ~(0b1u << 7u);
curr |= (GPIO17_EDGE_HIGH & 0b1u) << 7u;
curr &= ~(0b1u << 8u);
curr |= (GPIO18_LEVEL_LOW & 0b1u) << 8u;
curr &= ~(0b1u << 9u);
curr |= (GPIO18_LEVEL_HIGH & 0b1u) << 9u;
curr &= ~(0b1u << 10u);
curr |= (GPIO18_EDGE_LOW & 0b1u) << 10u;
curr &= ~(0b1u << 11u);
curr |= (GPIO18_EDGE_HIGH & 0b1u) << 11u;
curr &= ~(0b1u << 12u);
curr |= (GPIO19_LEVEL_LOW & 0b1u) << 12u;
curr &= ~(0b1u << 13u);
curr |= (GPIO19_LEVEL_HIGH & 0b1u) << 13u;
curr &= ~(0b1u << 14u);
curr |= (GPIO19_EDGE_LOW & 0b1u) << 14u;
curr &= ~(0b1u << 15u);
curr |= (GPIO19_EDGE_HIGH & 0b1u) << 15u;
curr &= ~(0b1u << 16u);
curr |= (GPIO20_LEVEL_LOW & 0b1u) << 16u;
curr &= ~(0b1u << 17u);
curr |= (GPIO20_LEVEL_HIGH & 0b1u) << 17u;
curr &= ~(0b1u << 18u);
curr |= (GPIO20_EDGE_LOW & 0b1u) << 18u;
curr &= ~(0b1u << 19u);
curr |= (GPIO20_EDGE_HIGH & 0b1u) << 19u;
curr &= ~(0b1u << 20u);
curr |= (GPIO21_LEVEL_LOW & 0b1u) << 20u;
curr &= ~(0b1u << 21u);
curr |= (GPIO21_LEVEL_HIGH & 0b1u) << 21u;
curr &= ~(0b1u << 22u);
curr |= (GPIO21_EDGE_LOW & 0b1u) << 22u;
curr &= ~(0b1u << 23u);
curr |= (GPIO21_EDGE_HIGH & 0b1u) << 23u;
curr &= ~(0b1u << 24u);
curr |= (GPIO22_LEVEL_LOW & 0b1u) << 24u;
curr &= ~(0b1u << 25u);
curr |= (GPIO22_LEVEL_HIGH & 0b1u) << 25u;
curr &= ~(0b1u << 26u);
curr |= (GPIO22_EDGE_LOW & 0b1u) << 26u;
curr &= ~(0b1u << 27u);
curr |= (GPIO22_EDGE_HIGH & 0b1u) << 27u;
curr &= ~(0b1u << 28u);
curr |= (GPIO23_LEVEL_LOW & 0b1u) << 28u;
curr &= ~(0b1u << 29u);
curr |= (GPIO23_LEVEL_HIGH & 0b1u) << 29u;
curr &= ~(0b1u << 30u);
curr |= (GPIO23_EDGE_LOW & 0b1u) << 30u;
curr &= ~(0b1u << 31u);
curr |= (GPIO23_EDGE_HIGH & 0b1u) << 31u;
PROC0_INTF2 = curr;
}
inline bool get_PROC0_INTF3_GPIO24_LEVEL_LOW() volatile
{
return PROC0_INTF3 & (1u << 0u);
}
inline void set_PROC0_INTF3_GPIO24_LEVEL_LOW() volatile
{
PROC0_INTF3 |= 1u << 0u;
}
inline void clear_PROC0_INTF3_GPIO24_LEVEL_LOW() volatile
{
PROC0_INTF3 &= ~(1u << 0u);
}
inline void toggle_PROC0_INTF3_GPIO24_LEVEL_LOW() volatile
{
PROC0_INTF3 ^= 1u << 0u;
}
inline bool get_PROC0_INTF3_GPIO24_LEVEL_HIGH() volatile
{
return PROC0_INTF3 & (1u << 1u);
}
inline void set_PROC0_INTF3_GPIO24_LEVEL_HIGH() volatile
{
PROC0_INTF3 |= 1u << 1u;
}
inline void clear_PROC0_INTF3_GPIO24_LEVEL_HIGH() volatile
{
PROC0_INTF3 &= ~(1u << 1u);
}
inline void toggle_PROC0_INTF3_GPIO24_LEVEL_HIGH() volatile
{
PROC0_INTF3 ^= 1u << 1u;
}
inline bool get_PROC0_INTF3_GPIO24_EDGE_LOW() volatile
{
return PROC0_INTF3 & (1u << 2u);
}
inline void set_PROC0_INTF3_GPIO24_EDGE_LOW() volatile
{
PROC0_INTF3 |= 1u << 2u;
}
inline void clear_PROC0_INTF3_GPIO24_EDGE_LOW() volatile
{
PROC0_INTF3 &= ~(1u << 2u);
}
inline void toggle_PROC0_INTF3_GPIO24_EDGE_LOW() volatile
{
PROC0_INTF3 ^= 1u << 2u;
}
inline bool get_PROC0_INTF3_GPIO24_EDGE_HIGH() volatile
{
return PROC0_INTF3 & (1u << 3u);
}
inline void set_PROC0_INTF3_GPIO24_EDGE_HIGH() volatile
{
PROC0_INTF3 |= 1u << 3u;
}
inline void clear_PROC0_INTF3_GPIO24_EDGE_HIGH() volatile
{
PROC0_INTF3 &= ~(1u << 3u);
}
inline void toggle_PROC0_INTF3_GPIO24_EDGE_HIGH() volatile
{
PROC0_INTF3 ^= 1u << 3u;
}
inline bool get_PROC0_INTF3_GPIO25_LEVEL_LOW() volatile
{
return PROC0_INTF3 & (1u << 4u);
}
inline void set_PROC0_INTF3_GPIO25_LEVEL_LOW() volatile
{
PROC0_INTF3 |= 1u << 4u;
}
inline void clear_PROC0_INTF3_GPIO25_LEVEL_LOW() volatile
{
PROC0_INTF3 &= ~(1u << 4u);
}
inline void toggle_PROC0_INTF3_GPIO25_LEVEL_LOW() volatile
{
PROC0_INTF3 ^= 1u << 4u;
}
inline bool get_PROC0_INTF3_GPIO25_LEVEL_HIGH() volatile
{
return PROC0_INTF3 & (1u << 5u);
}
inline void set_PROC0_INTF3_GPIO25_LEVEL_HIGH() volatile
{
PROC0_INTF3 |= 1u << 5u;
}
inline void clear_PROC0_INTF3_GPIO25_LEVEL_HIGH() volatile
{
PROC0_INTF3 &= ~(1u << 5u);
}
inline void toggle_PROC0_INTF3_GPIO25_LEVEL_HIGH() volatile
{
PROC0_INTF3 ^= 1u << 5u;
}
inline bool get_PROC0_INTF3_GPIO25_EDGE_LOW() volatile
{
return PROC0_INTF3 & (1u << 6u);
}
inline void set_PROC0_INTF3_GPIO25_EDGE_LOW() volatile
{
PROC0_INTF3 |= 1u << 6u;
}
inline void clear_PROC0_INTF3_GPIO25_EDGE_LOW() volatile
{
PROC0_INTF3 &= ~(1u << 6u);
}
inline void toggle_PROC0_INTF3_GPIO25_EDGE_LOW() volatile
{
PROC0_INTF3 ^= 1u << 6u;
}
inline bool get_PROC0_INTF3_GPIO25_EDGE_HIGH() volatile
{
return PROC0_INTF3 & (1u << 7u);
}
inline void set_PROC0_INTF3_GPIO25_EDGE_HIGH() volatile
{
PROC0_INTF3 |= 1u << 7u;
}
inline void clear_PROC0_INTF3_GPIO25_EDGE_HIGH() volatile
{
PROC0_INTF3 &= ~(1u << 7u);
}
inline void toggle_PROC0_INTF3_GPIO25_EDGE_HIGH() volatile
{
PROC0_INTF3 ^= 1u << 7u;
}
inline bool get_PROC0_INTF3_GPIO26_LEVEL_LOW() volatile
{
return PROC0_INTF3 & (1u << 8u);
}
inline void set_PROC0_INTF3_GPIO26_LEVEL_LOW() volatile
{
PROC0_INTF3 |= 1u << 8u;
}
inline void clear_PROC0_INTF3_GPIO26_LEVEL_LOW() volatile
{
PROC0_INTF3 &= ~(1u << 8u);
}
inline void toggle_PROC0_INTF3_GPIO26_LEVEL_LOW() volatile
{
PROC0_INTF3 ^= 1u << 8u;
}
inline bool get_PROC0_INTF3_GPIO26_LEVEL_HIGH() volatile
{
return PROC0_INTF3 & (1u << 9u);
}
inline void set_PROC0_INTF3_GPIO26_LEVEL_HIGH() volatile
{
PROC0_INTF3 |= 1u << 9u;
}
inline void clear_PROC0_INTF3_GPIO26_LEVEL_HIGH() volatile
{
PROC0_INTF3 &= ~(1u << 9u);
}
inline void toggle_PROC0_INTF3_GPIO26_LEVEL_HIGH() volatile
{
PROC0_INTF3 ^= 1u << 9u;
}
inline bool get_PROC0_INTF3_GPIO26_EDGE_LOW() volatile
{
return PROC0_INTF3 & (1u << 10u);
}
inline void set_PROC0_INTF3_GPIO26_EDGE_LOW() volatile
{
PROC0_INTF3 |= 1u << 10u;
}
inline void clear_PROC0_INTF3_GPIO26_EDGE_LOW() volatile
{
PROC0_INTF3 &= ~(1u << 10u);
}
inline void toggle_PROC0_INTF3_GPIO26_EDGE_LOW() volatile
{
PROC0_INTF3 ^= 1u << 10u;
}
inline bool get_PROC0_INTF3_GPIO26_EDGE_HIGH() volatile
{
return PROC0_INTF3 & (1u << 11u);
}
inline void set_PROC0_INTF3_GPIO26_EDGE_HIGH() volatile
{
PROC0_INTF3 |= 1u << 11u;
}
inline void clear_PROC0_INTF3_GPIO26_EDGE_HIGH() volatile
{
PROC0_INTF3 &= ~(1u << 11u);
}
inline void toggle_PROC0_INTF3_GPIO26_EDGE_HIGH() volatile
{
PROC0_INTF3 ^= 1u << 11u;
}
inline bool get_PROC0_INTF3_GPIO27_LEVEL_LOW() volatile
{
return PROC0_INTF3 & (1u << 12u);
}
inline void set_PROC0_INTF3_GPIO27_LEVEL_LOW() volatile
{
PROC0_INTF3 |= 1u << 12u;
}
inline void clear_PROC0_INTF3_GPIO27_LEVEL_LOW() volatile
{
PROC0_INTF3 &= ~(1u << 12u);
}
inline void toggle_PROC0_INTF3_GPIO27_LEVEL_LOW() volatile
{
PROC0_INTF3 ^= 1u << 12u;
}
inline bool get_PROC0_INTF3_GPIO27_LEVEL_HIGH() volatile
{
return PROC0_INTF3 & (1u << 13u);
}
inline void set_PROC0_INTF3_GPIO27_LEVEL_HIGH() volatile
{
PROC0_INTF3 |= 1u << 13u;
}
inline void clear_PROC0_INTF3_GPIO27_LEVEL_HIGH() volatile
{
PROC0_INTF3 &= ~(1u << 13u);
}
inline void toggle_PROC0_INTF3_GPIO27_LEVEL_HIGH() volatile
{
PROC0_INTF3 ^= 1u << 13u;
}
inline bool get_PROC0_INTF3_GPIO27_EDGE_LOW() volatile
{
return PROC0_INTF3 & (1u << 14u);
}
inline void set_PROC0_INTF3_GPIO27_EDGE_LOW() volatile
{
PROC0_INTF3 |= 1u << 14u;
}
inline void clear_PROC0_INTF3_GPIO27_EDGE_LOW() volatile
{
PROC0_INTF3 &= ~(1u << 14u);
}
inline void toggle_PROC0_INTF3_GPIO27_EDGE_LOW() volatile
{
PROC0_INTF3 ^= 1u << 14u;
}
inline bool get_PROC0_INTF3_GPIO27_EDGE_HIGH() volatile
{
return PROC0_INTF3 & (1u << 15u);
}
inline void set_PROC0_INTF3_GPIO27_EDGE_HIGH() volatile
{
PROC0_INTF3 |= 1u << 15u;
}
inline void clear_PROC0_INTF3_GPIO27_EDGE_HIGH() volatile
{
PROC0_INTF3 &= ~(1u << 15u);
}
inline void toggle_PROC0_INTF3_GPIO27_EDGE_HIGH() volatile
{
PROC0_INTF3 ^= 1u << 15u;
}
inline bool get_PROC0_INTF3_GPIO28_LEVEL_LOW() volatile
{
return PROC0_INTF3 & (1u << 16u);
}
inline void set_PROC0_INTF3_GPIO28_LEVEL_LOW() volatile
{
PROC0_INTF3 |= 1u << 16u;
}
inline void clear_PROC0_INTF3_GPIO28_LEVEL_LOW() volatile
{
PROC0_INTF3 &= ~(1u << 16u);
}
inline void toggle_PROC0_INTF3_GPIO28_LEVEL_LOW() volatile
{
PROC0_INTF3 ^= 1u << 16u;
}
inline bool get_PROC0_INTF3_GPIO28_LEVEL_HIGH() volatile
{
return PROC0_INTF3 & (1u << 17u);
}
inline void set_PROC0_INTF3_GPIO28_LEVEL_HIGH() volatile
{
PROC0_INTF3 |= 1u << 17u;
}
inline void clear_PROC0_INTF3_GPIO28_LEVEL_HIGH() volatile
{
PROC0_INTF3 &= ~(1u << 17u);
}
inline void toggle_PROC0_INTF3_GPIO28_LEVEL_HIGH() volatile
{
PROC0_INTF3 ^= 1u << 17u;
}
inline bool get_PROC0_INTF3_GPIO28_EDGE_LOW() volatile
{
return PROC0_INTF3 & (1u << 18u);
}
inline void set_PROC0_INTF3_GPIO28_EDGE_LOW() volatile
{
PROC0_INTF3 |= 1u << 18u;
}
inline void clear_PROC0_INTF3_GPIO28_EDGE_LOW() volatile
{
PROC0_INTF3 &= ~(1u << 18u);
}
inline void toggle_PROC0_INTF3_GPIO28_EDGE_LOW() volatile
{
PROC0_INTF3 ^= 1u << 18u;
}
inline bool get_PROC0_INTF3_GPIO28_EDGE_HIGH() volatile
{
return PROC0_INTF3 & (1u << 19u);
}
inline void set_PROC0_INTF3_GPIO28_EDGE_HIGH() volatile
{
PROC0_INTF3 |= 1u << 19u;
}
inline void clear_PROC0_INTF3_GPIO28_EDGE_HIGH() volatile
{
PROC0_INTF3 &= ~(1u << 19u);
}
inline void toggle_PROC0_INTF3_GPIO28_EDGE_HIGH() volatile
{
PROC0_INTF3 ^= 1u << 19u;
}
inline bool get_PROC0_INTF3_GPIO29_LEVEL_LOW() volatile
{
return PROC0_INTF3 & (1u << 20u);
}
inline void set_PROC0_INTF3_GPIO29_LEVEL_LOW() volatile
{
PROC0_INTF3 |= 1u << 20u;
}
inline void clear_PROC0_INTF3_GPIO29_LEVEL_LOW() volatile
{
PROC0_INTF3 &= ~(1u << 20u);
}
inline void toggle_PROC0_INTF3_GPIO29_LEVEL_LOW() volatile
{
PROC0_INTF3 ^= 1u << 20u;
}
inline bool get_PROC0_INTF3_GPIO29_LEVEL_HIGH() volatile
{
return PROC0_INTF3 & (1u << 21u);
}
inline void set_PROC0_INTF3_GPIO29_LEVEL_HIGH() volatile
{
PROC0_INTF3 |= 1u << 21u;
}
inline void clear_PROC0_INTF3_GPIO29_LEVEL_HIGH() volatile
{
PROC0_INTF3 &= ~(1u << 21u);
}
inline void toggle_PROC0_INTF3_GPIO29_LEVEL_HIGH() volatile
{
PROC0_INTF3 ^= 1u << 21u;
}
inline bool get_PROC0_INTF3_GPIO29_EDGE_LOW() volatile
{
return PROC0_INTF3 & (1u << 22u);
}
inline void set_PROC0_INTF3_GPIO29_EDGE_LOW() volatile
{
PROC0_INTF3 |= 1u << 22u;
}
inline void clear_PROC0_INTF3_GPIO29_EDGE_LOW() volatile
{
PROC0_INTF3 &= ~(1u << 22u);
}
inline void toggle_PROC0_INTF3_GPIO29_EDGE_LOW() volatile
{
PROC0_INTF3 ^= 1u << 22u;
}
inline bool get_PROC0_INTF3_GPIO29_EDGE_HIGH() volatile
{
return PROC0_INTF3 & (1u << 23u);
}
inline void set_PROC0_INTF3_GPIO29_EDGE_HIGH() volatile
{
PROC0_INTF3 |= 1u << 23u;
}
inline void clear_PROC0_INTF3_GPIO29_EDGE_HIGH() volatile
{
PROC0_INTF3 &= ~(1u << 23u);
}
inline void toggle_PROC0_INTF3_GPIO29_EDGE_HIGH() volatile
{
PROC0_INTF3 ^= 1u << 23u;
}
inline void get_PROC0_INTF3(bool &GPIO24_LEVEL_LOW,
bool &GPIO24_LEVEL_HIGH, bool &GPIO24_EDGE_LOW,
bool &GPIO24_EDGE_HIGH, bool &GPIO25_LEVEL_LOW,
bool &GPIO25_LEVEL_HIGH, bool &GPIO25_EDGE_LOW,
bool &GPIO25_EDGE_HIGH, bool &GPIO26_LEVEL_LOW,
bool &GPIO26_LEVEL_HIGH, bool &GPIO26_EDGE_LOW,
bool &GPIO26_EDGE_HIGH, bool &GPIO27_LEVEL_LOW,
bool &GPIO27_LEVEL_HIGH, bool &GPIO27_EDGE_LOW,
bool &GPIO27_EDGE_HIGH, bool &GPIO28_LEVEL_LOW,
bool &GPIO28_LEVEL_HIGH, bool &GPIO28_EDGE_LOW,
bool &GPIO28_EDGE_HIGH, bool &GPIO29_LEVEL_LOW,
bool &GPIO29_LEVEL_HIGH, bool &GPIO29_EDGE_LOW,
bool &GPIO29_EDGE_HIGH) volatile
{
uint32_t curr = PROC0_INTF3;
GPIO24_LEVEL_LOW = curr & (1u << 0u);
GPIO24_LEVEL_HIGH = curr & (1u << 1u);
GPIO24_EDGE_LOW = curr & (1u << 2u);
GPIO24_EDGE_HIGH = curr & (1u << 3u);
GPIO25_LEVEL_LOW = curr & (1u << 4u);
GPIO25_LEVEL_HIGH = curr & (1u << 5u);
GPIO25_EDGE_LOW = curr & (1u << 6u);
GPIO25_EDGE_HIGH = curr & (1u << 7u);
GPIO26_LEVEL_LOW = curr & (1u << 8u);
GPIO26_LEVEL_HIGH = curr & (1u << 9u);
GPIO26_EDGE_LOW = curr & (1u << 10u);
GPIO26_EDGE_HIGH = curr & (1u << 11u);
GPIO27_LEVEL_LOW = curr & (1u << 12u);
GPIO27_LEVEL_HIGH = curr & (1u << 13u);
GPIO27_EDGE_LOW = curr & (1u << 14u);
GPIO27_EDGE_HIGH = curr & (1u << 15u);
GPIO28_LEVEL_LOW = curr & (1u << 16u);
GPIO28_LEVEL_HIGH = curr & (1u << 17u);
GPIO28_EDGE_LOW = curr & (1u << 18u);
GPIO28_EDGE_HIGH = curr & (1u << 19u);
GPIO29_LEVEL_LOW = curr & (1u << 20u);
GPIO29_LEVEL_HIGH = curr & (1u << 21u);
GPIO29_EDGE_LOW = curr & (1u << 22u);
GPIO29_EDGE_HIGH = curr & (1u << 23u);
}
inline void set_PROC0_INTF3(
bool GPIO24_LEVEL_LOW, bool GPIO24_LEVEL_HIGH, bool GPIO24_EDGE_LOW,
bool GPIO24_EDGE_HIGH, bool GPIO25_LEVEL_LOW, bool GPIO25_LEVEL_HIGH,
bool GPIO25_EDGE_LOW, bool GPIO25_EDGE_HIGH, bool GPIO26_LEVEL_LOW,
bool GPIO26_LEVEL_HIGH, bool GPIO26_EDGE_LOW, bool GPIO26_EDGE_HIGH,
bool GPIO27_LEVEL_LOW, bool GPIO27_LEVEL_HIGH, bool GPIO27_EDGE_LOW,
bool GPIO27_EDGE_HIGH, bool GPIO28_LEVEL_LOW, bool GPIO28_LEVEL_HIGH,
bool GPIO28_EDGE_LOW, bool GPIO28_EDGE_HIGH, bool GPIO29_LEVEL_LOW,
bool GPIO29_LEVEL_HIGH, bool GPIO29_EDGE_LOW,
bool GPIO29_EDGE_HIGH) volatile
{
uint32_t curr = PROC0_INTF3;
curr &= ~(0b1u << 0u);
curr |= (GPIO24_LEVEL_LOW & 0b1u) << 0u;
curr &= ~(0b1u << 1u);
curr |= (GPIO24_LEVEL_HIGH & 0b1u) << 1u;
curr &= ~(0b1u << 2u);
curr |= (GPIO24_EDGE_LOW & 0b1u) << 2u;
curr &= ~(0b1u << 3u);
curr |= (GPIO24_EDGE_HIGH & 0b1u) << 3u;
curr &= ~(0b1u << 4u);
curr |= (GPIO25_LEVEL_LOW & 0b1u) << 4u;
curr &= ~(0b1u << 5u);
curr |= (GPIO25_LEVEL_HIGH & 0b1u) << 5u;
curr &= ~(0b1u << 6u);
curr |= (GPIO25_EDGE_LOW & 0b1u) << 6u;
curr &= ~(0b1u << 7u);
curr |= (GPIO25_EDGE_HIGH & 0b1u) << 7u;
curr &= ~(0b1u << 8u);
curr |= (GPIO26_LEVEL_LOW & 0b1u) << 8u;
curr &= ~(0b1u << 9u);
curr |= (GPIO26_LEVEL_HIGH & 0b1u) << 9u;
curr &= ~(0b1u << 10u);
curr |= (GPIO26_EDGE_LOW & 0b1u) << 10u;
curr &= ~(0b1u << 11u);
curr |= (GPIO26_EDGE_HIGH & 0b1u) << 11u;
curr &= ~(0b1u << 12u);
curr |= (GPIO27_LEVEL_LOW & 0b1u) << 12u;
curr &= ~(0b1u << 13u);
curr |= (GPIO27_LEVEL_HIGH & 0b1u) << 13u;
curr &= ~(0b1u << 14u);
curr |= (GPIO27_EDGE_LOW & 0b1u) << 14u;
curr &= ~(0b1u << 15u);
curr |= (GPIO27_EDGE_HIGH & 0b1u) << 15u;
curr &= ~(0b1u << 16u);
curr |= (GPIO28_LEVEL_LOW & 0b1u) << 16u;
curr &= ~(0b1u << 17u);
curr |= (GPIO28_LEVEL_HIGH & 0b1u) << 17u;
curr &= ~(0b1u << 18u);
curr |= (GPIO28_EDGE_LOW & 0b1u) << 18u;
curr &= ~(0b1u << 19u);
curr |= (GPIO28_EDGE_HIGH & 0b1u) << 19u;
curr &= ~(0b1u << 20u);
curr |= (GPIO29_LEVEL_LOW & 0b1u) << 20u;
curr &= ~(0b1u << 21u);
curr |= (GPIO29_LEVEL_HIGH & 0b1u) << 21u;
curr &= ~(0b1u << 22u);
curr |= (GPIO29_EDGE_LOW & 0b1u) << 22u;
curr &= ~(0b1u << 23u);
curr |= (GPIO29_EDGE_HIGH & 0b1u) << 23u;
PROC0_INTF3 = curr;
}
inline bool get_PROC0_INTS0_GPIO0_LEVEL_LOW() volatile
{
return PROC0_INTS0 & (1u << 0u);
}
inline bool get_PROC0_INTS0_GPIO0_LEVEL_HIGH() volatile
{
return PROC0_INTS0 & (1u << 1u);
}
inline bool get_PROC0_INTS0_GPIO0_EDGE_LOW() volatile
{
return PROC0_INTS0 & (1u << 2u);
}
inline bool get_PROC0_INTS0_GPIO0_EDGE_HIGH() volatile
{
return PROC0_INTS0 & (1u << 3u);
}
inline bool get_PROC0_INTS0_GPIO1_LEVEL_LOW() volatile
{
return PROC0_INTS0 & (1u << 4u);
}
inline bool get_PROC0_INTS0_GPIO1_LEVEL_HIGH() volatile
{
return PROC0_INTS0 & (1u << 5u);
}
inline bool get_PROC0_INTS0_GPIO1_EDGE_LOW() volatile
{
return PROC0_INTS0 & (1u << 6u);
}
inline bool get_PROC0_INTS0_GPIO1_EDGE_HIGH() volatile
{
return PROC0_INTS0 & (1u << 7u);
}
inline bool get_PROC0_INTS0_GPIO2_LEVEL_LOW() volatile
{
return PROC0_INTS0 & (1u << 8u);
}
inline bool get_PROC0_INTS0_GPIO2_LEVEL_HIGH() volatile
{
return PROC0_INTS0 & (1u << 9u);
}
inline bool get_PROC0_INTS0_GPIO2_EDGE_LOW() volatile
{
return PROC0_INTS0 & (1u << 10u);
}
inline bool get_PROC0_INTS0_GPIO2_EDGE_HIGH() volatile
{
return PROC0_INTS0 & (1u << 11u);
}
inline bool get_PROC0_INTS0_GPIO3_LEVEL_LOW() volatile
{
return PROC0_INTS0 & (1u << 12u);
}
inline bool get_PROC0_INTS0_GPIO3_LEVEL_HIGH() volatile
{
return PROC0_INTS0 & (1u << 13u);
}
inline bool get_PROC0_INTS0_GPIO3_EDGE_LOW() volatile
{
return PROC0_INTS0 & (1u << 14u);
}
inline bool get_PROC0_INTS0_GPIO3_EDGE_HIGH() volatile
{
return PROC0_INTS0 & (1u << 15u);
}
inline bool get_PROC0_INTS0_GPIO4_LEVEL_LOW() volatile
{
return PROC0_INTS0 & (1u << 16u);
}
inline bool get_PROC0_INTS0_GPIO4_LEVEL_HIGH() volatile
{
return PROC0_INTS0 & (1u << 17u);
}
inline bool get_PROC0_INTS0_GPIO4_EDGE_LOW() volatile
{
return PROC0_INTS0 & (1u << 18u);
}
inline bool get_PROC0_INTS0_GPIO4_EDGE_HIGH() volatile
{
return PROC0_INTS0 & (1u << 19u);
}
inline bool get_PROC0_INTS0_GPIO5_LEVEL_LOW() volatile
{
return PROC0_INTS0 & (1u << 20u);
}
inline bool get_PROC0_INTS0_GPIO5_LEVEL_HIGH() volatile
{
return PROC0_INTS0 & (1u << 21u);
}
inline bool get_PROC0_INTS0_GPIO5_EDGE_LOW() volatile
{
return PROC0_INTS0 & (1u << 22u);
}
inline bool get_PROC0_INTS0_GPIO5_EDGE_HIGH() volatile
{
return PROC0_INTS0 & (1u << 23u);
}
inline bool get_PROC0_INTS0_GPIO6_LEVEL_LOW() volatile
{
return PROC0_INTS0 & (1u << 24u);
}
inline bool get_PROC0_INTS0_GPIO6_LEVEL_HIGH() volatile
{
return PROC0_INTS0 & (1u << 25u);
}
inline bool get_PROC0_INTS0_GPIO6_EDGE_LOW() volatile
{
return PROC0_INTS0 & (1u << 26u);
}
inline bool get_PROC0_INTS0_GPIO6_EDGE_HIGH() volatile
{
return PROC0_INTS0 & (1u << 27u);
}
inline bool get_PROC0_INTS0_GPIO7_LEVEL_LOW() volatile
{
return PROC0_INTS0 & (1u << 28u);
}
inline bool get_PROC0_INTS0_GPIO7_LEVEL_HIGH() volatile
{
return PROC0_INTS0 & (1u << 29u);
}
inline bool get_PROC0_INTS0_GPIO7_EDGE_LOW() volatile
{
return PROC0_INTS0 & (1u << 30u);
}
inline bool get_PROC0_INTS0_GPIO7_EDGE_HIGH() volatile
{
return PROC0_INTS0 & (1u << 31u);
}
inline void get_PROC0_INTS0(
bool &GPIO0_LEVEL_LOW, bool &GPIO0_LEVEL_HIGH, bool &GPIO0_EDGE_LOW,
bool &GPIO0_EDGE_HIGH, bool &GPIO1_LEVEL_LOW, bool &GPIO1_LEVEL_HIGH,
bool &GPIO1_EDGE_LOW, bool &GPIO1_EDGE_HIGH, bool &GPIO2_LEVEL_LOW,
bool &GPIO2_LEVEL_HIGH, bool &GPIO2_EDGE_LOW, bool &GPIO2_EDGE_HIGH,
bool &GPIO3_LEVEL_LOW, bool &GPIO3_LEVEL_HIGH, bool &GPIO3_EDGE_LOW,
bool &GPIO3_EDGE_HIGH, bool &GPIO4_LEVEL_LOW, bool &GPIO4_LEVEL_HIGH,
bool &GPIO4_EDGE_LOW, bool &GPIO4_EDGE_HIGH, bool &GPIO5_LEVEL_LOW,
bool &GPIO5_LEVEL_HIGH, bool &GPIO5_EDGE_LOW, bool &GPIO5_EDGE_HIGH,
bool &GPIO6_LEVEL_LOW, bool &GPIO6_LEVEL_HIGH, bool &GPIO6_EDGE_LOW,
bool &GPIO6_EDGE_HIGH, bool &GPIO7_LEVEL_LOW, bool &GPIO7_LEVEL_HIGH,
bool &GPIO7_EDGE_LOW, bool &GPIO7_EDGE_HIGH) volatile
{
uint32_t curr = PROC0_INTS0;
GPIO0_LEVEL_LOW = curr & (1u << 0u);
GPIO0_LEVEL_HIGH = curr & (1u << 1u);
GPIO0_EDGE_LOW = curr & (1u << 2u);
GPIO0_EDGE_HIGH = curr & (1u << 3u);
GPIO1_LEVEL_LOW = curr & (1u << 4u);
GPIO1_LEVEL_HIGH = curr & (1u << 5u);
GPIO1_EDGE_LOW = curr & (1u << 6u);
GPIO1_EDGE_HIGH = curr & (1u << 7u);
GPIO2_LEVEL_LOW = curr & (1u << 8u);
GPIO2_LEVEL_HIGH = curr & (1u << 9u);
GPIO2_EDGE_LOW = curr & (1u << 10u);
GPIO2_EDGE_HIGH = curr & (1u << 11u);
GPIO3_LEVEL_LOW = curr & (1u << 12u);
GPIO3_LEVEL_HIGH = curr & (1u << 13u);
GPIO3_EDGE_LOW = curr & (1u << 14u);
GPIO3_EDGE_HIGH = curr & (1u << 15u);
GPIO4_LEVEL_LOW = curr & (1u << 16u);
GPIO4_LEVEL_HIGH = curr & (1u << 17u);
GPIO4_EDGE_LOW = curr & (1u << 18u);
GPIO4_EDGE_HIGH = curr & (1u << 19u);
GPIO5_LEVEL_LOW = curr & (1u << 20u);
GPIO5_LEVEL_HIGH = curr & (1u << 21u);
GPIO5_EDGE_LOW = curr & (1u << 22u);
GPIO5_EDGE_HIGH = curr & (1u << 23u);
GPIO6_LEVEL_LOW = curr & (1u << 24u);
GPIO6_LEVEL_HIGH = curr & (1u << 25u);
GPIO6_EDGE_LOW = curr & (1u << 26u);
GPIO6_EDGE_HIGH = curr & (1u << 27u);
GPIO7_LEVEL_LOW = curr & (1u << 28u);
GPIO7_LEVEL_HIGH = curr & (1u << 29u);
GPIO7_EDGE_LOW = curr & (1u << 30u);
GPIO7_EDGE_HIGH = curr & (1u << 31u);
}
inline bool get_PROC0_INTS1_GPIO8_LEVEL_LOW() volatile
{
return PROC0_INTS1 & (1u << 0u);
}
inline bool get_PROC0_INTS1_GPIO8_LEVEL_HIGH() volatile
{
return PROC0_INTS1 & (1u << 1u);
}
inline bool get_PROC0_INTS1_GPIO8_EDGE_LOW() volatile
{
return PROC0_INTS1 & (1u << 2u);
}
inline bool get_PROC0_INTS1_GPIO8_EDGE_HIGH() volatile
{
return PROC0_INTS1 & (1u << 3u);
}
inline bool get_PROC0_INTS1_GPIO9_LEVEL_LOW() volatile
{
return PROC0_INTS1 & (1u << 4u);
}
inline bool get_PROC0_INTS1_GPIO9_LEVEL_HIGH() volatile
{
return PROC0_INTS1 & (1u << 5u);
}
inline bool get_PROC0_INTS1_GPIO9_EDGE_LOW() volatile
{
return PROC0_INTS1 & (1u << 6u);
}
inline bool get_PROC0_INTS1_GPIO9_EDGE_HIGH() volatile
{
return PROC0_INTS1 & (1u << 7u);
}
inline bool get_PROC0_INTS1_GPIO10_LEVEL_LOW() volatile
{
return PROC0_INTS1 & (1u << 8u);
}
inline bool get_PROC0_INTS1_GPIO10_LEVEL_HIGH() volatile
{
return PROC0_INTS1 & (1u << 9u);
}
inline bool get_PROC0_INTS1_GPIO10_EDGE_LOW() volatile
{
return PROC0_INTS1 & (1u << 10u);
}
inline bool get_PROC0_INTS1_GPIO10_EDGE_HIGH() volatile
{
return PROC0_INTS1 & (1u << 11u);
}
inline bool get_PROC0_INTS1_GPIO11_LEVEL_LOW() volatile
{
return PROC0_INTS1 & (1u << 12u);
}
inline bool get_PROC0_INTS1_GPIO11_LEVEL_HIGH() volatile
{
return PROC0_INTS1 & (1u << 13u);
}
inline bool get_PROC0_INTS1_GPIO11_EDGE_LOW() volatile
{
return PROC0_INTS1 & (1u << 14u);
}
inline bool get_PROC0_INTS1_GPIO11_EDGE_HIGH() volatile
{
return PROC0_INTS1 & (1u << 15u);
}
inline bool get_PROC0_INTS1_GPIO12_LEVEL_LOW() volatile
{
return PROC0_INTS1 & (1u << 16u);
}
inline bool get_PROC0_INTS1_GPIO12_LEVEL_HIGH() volatile
{
return PROC0_INTS1 & (1u << 17u);
}
inline bool get_PROC0_INTS1_GPIO12_EDGE_LOW() volatile
{
return PROC0_INTS1 & (1u << 18u);
}
inline bool get_PROC0_INTS1_GPIO12_EDGE_HIGH() volatile
{
return PROC0_INTS1 & (1u << 19u);
}
inline bool get_PROC0_INTS1_GPIO13_LEVEL_LOW() volatile
{
return PROC0_INTS1 & (1u << 20u);
}
inline bool get_PROC0_INTS1_GPIO13_LEVEL_HIGH() volatile
{
return PROC0_INTS1 & (1u << 21u);
}
inline bool get_PROC0_INTS1_GPIO13_EDGE_LOW() volatile
{
return PROC0_INTS1 & (1u << 22u);
}
inline bool get_PROC0_INTS1_GPIO13_EDGE_HIGH() volatile
{
return PROC0_INTS1 & (1u << 23u);
}
inline bool get_PROC0_INTS1_GPIO14_LEVEL_LOW() volatile
{
return PROC0_INTS1 & (1u << 24u);
}
inline bool get_PROC0_INTS1_GPIO14_LEVEL_HIGH() volatile
{
return PROC0_INTS1 & (1u << 25u);
}
inline bool get_PROC0_INTS1_GPIO14_EDGE_LOW() volatile
{
return PROC0_INTS1 & (1u << 26u);
}
inline bool get_PROC0_INTS1_GPIO14_EDGE_HIGH() volatile
{
return PROC0_INTS1 & (1u << 27u);
}
inline bool get_PROC0_INTS1_GPIO15_LEVEL_LOW() volatile
{
return PROC0_INTS1 & (1u << 28u);
}
inline bool get_PROC0_INTS1_GPIO15_LEVEL_HIGH() volatile
{
return PROC0_INTS1 & (1u << 29u);
}
inline bool get_PROC0_INTS1_GPIO15_EDGE_LOW() volatile
{
return PROC0_INTS1 & (1u << 30u);
}
inline bool get_PROC0_INTS1_GPIO15_EDGE_HIGH() volatile
{
return PROC0_INTS1 & (1u << 31u);
}
inline void get_PROC0_INTS1(
bool &GPIO8_LEVEL_LOW, bool &GPIO8_LEVEL_HIGH, bool &GPIO8_EDGE_LOW,
bool &GPIO8_EDGE_HIGH, bool &GPIO9_LEVEL_LOW, bool &GPIO9_LEVEL_HIGH,
bool &GPIO9_EDGE_LOW, bool &GPIO9_EDGE_HIGH, bool &GPIO10_LEVEL_LOW,
bool &GPIO10_LEVEL_HIGH, bool &GPIO10_EDGE_LOW, bool &GPIO10_EDGE_HIGH,
bool &GPIO11_LEVEL_LOW, bool &GPIO11_LEVEL_HIGH, bool &GPIO11_EDGE_LOW,
bool &GPIO11_EDGE_HIGH, bool &GPIO12_LEVEL_LOW,
bool &GPIO12_LEVEL_HIGH, bool &GPIO12_EDGE_LOW, bool &GPIO12_EDGE_HIGH,
bool &GPIO13_LEVEL_LOW, bool &GPIO13_LEVEL_HIGH, bool &GPIO13_EDGE_LOW,
bool &GPIO13_EDGE_HIGH, bool &GPIO14_LEVEL_LOW,
bool &GPIO14_LEVEL_HIGH, bool &GPIO14_EDGE_LOW, bool &GPIO14_EDGE_HIGH,
bool &GPIO15_LEVEL_LOW, bool &GPIO15_LEVEL_HIGH, bool &GPIO15_EDGE_LOW,
bool &GPIO15_EDGE_HIGH) volatile
{
uint32_t curr = PROC0_INTS1;
GPIO8_LEVEL_LOW = curr & (1u << 0u);
GPIO8_LEVEL_HIGH = curr & (1u << 1u);
GPIO8_EDGE_LOW = curr & (1u << 2u);
GPIO8_EDGE_HIGH = curr & (1u << 3u);
GPIO9_LEVEL_LOW = curr & (1u << 4u);
GPIO9_LEVEL_HIGH = curr & (1u << 5u);
GPIO9_EDGE_LOW = curr & (1u << 6u);
GPIO9_EDGE_HIGH = curr & (1u << 7u);
GPIO10_LEVEL_LOW = curr & (1u << 8u);
GPIO10_LEVEL_HIGH = curr & (1u << 9u);
GPIO10_EDGE_LOW = curr & (1u << 10u);
GPIO10_EDGE_HIGH = curr & (1u << 11u);
GPIO11_LEVEL_LOW = curr & (1u << 12u);
GPIO11_LEVEL_HIGH = curr & (1u << 13u);
GPIO11_EDGE_LOW = curr & (1u << 14u);
GPIO11_EDGE_HIGH = curr & (1u << 15u);
GPIO12_LEVEL_LOW = curr & (1u << 16u);
GPIO12_LEVEL_HIGH = curr & (1u << 17u);
GPIO12_EDGE_LOW = curr & (1u << 18u);
GPIO12_EDGE_HIGH = curr & (1u << 19u);
GPIO13_LEVEL_LOW = curr & (1u << 20u);
GPIO13_LEVEL_HIGH = curr & (1u << 21u);
GPIO13_EDGE_LOW = curr & (1u << 22u);
GPIO13_EDGE_HIGH = curr & (1u << 23u);
GPIO14_LEVEL_LOW = curr & (1u << 24u);
GPIO14_LEVEL_HIGH = curr & (1u << 25u);
GPIO14_EDGE_LOW = curr & (1u << 26u);
GPIO14_EDGE_HIGH = curr & (1u << 27u);
GPIO15_LEVEL_LOW = curr & (1u << 28u);
GPIO15_LEVEL_HIGH = curr & (1u << 29u);
GPIO15_EDGE_LOW = curr & (1u << 30u);
GPIO15_EDGE_HIGH = curr & (1u << 31u);
}
inline bool get_PROC0_INTS2_GPIO16_LEVEL_LOW() volatile
{
return PROC0_INTS2 & (1u << 0u);
}
inline bool get_PROC0_INTS2_GPIO16_LEVEL_HIGH() volatile
{
return PROC0_INTS2 & (1u << 1u);
}
inline bool get_PROC0_INTS2_GPIO16_EDGE_LOW() volatile
{
return PROC0_INTS2 & (1u << 2u);
}
inline bool get_PROC0_INTS2_GPIO16_EDGE_HIGH() volatile
{
return PROC0_INTS2 & (1u << 3u);
}
inline bool get_PROC0_INTS2_GPIO17_LEVEL_LOW() volatile
{
return PROC0_INTS2 & (1u << 4u);
}
inline bool get_PROC0_INTS2_GPIO17_LEVEL_HIGH() volatile
{
return PROC0_INTS2 & (1u << 5u);
}
inline bool get_PROC0_INTS2_GPIO17_EDGE_LOW() volatile
{
return PROC0_INTS2 & (1u << 6u);
}
inline bool get_PROC0_INTS2_GPIO17_EDGE_HIGH() volatile
{
return PROC0_INTS2 & (1u << 7u);
}
inline bool get_PROC0_INTS2_GPIO18_LEVEL_LOW() volatile
{
return PROC0_INTS2 & (1u << 8u);
}
inline bool get_PROC0_INTS2_GPIO18_LEVEL_HIGH() volatile
{
return PROC0_INTS2 & (1u << 9u);
}
inline bool get_PROC0_INTS2_GPIO18_EDGE_LOW() volatile
{
return PROC0_INTS2 & (1u << 10u);
}
inline bool get_PROC0_INTS2_GPIO18_EDGE_HIGH() volatile
{
return PROC0_INTS2 & (1u << 11u);
}
inline bool get_PROC0_INTS2_GPIO19_LEVEL_LOW() volatile
{
return PROC0_INTS2 & (1u << 12u);
}
inline bool get_PROC0_INTS2_GPIO19_LEVEL_HIGH() volatile
{
return PROC0_INTS2 & (1u << 13u);
}
inline bool get_PROC0_INTS2_GPIO19_EDGE_LOW() volatile
{
return PROC0_INTS2 & (1u << 14u);
}
inline bool get_PROC0_INTS2_GPIO19_EDGE_HIGH() volatile
{
return PROC0_INTS2 & (1u << 15u);
}
inline bool get_PROC0_INTS2_GPIO20_LEVEL_LOW() volatile
{
return PROC0_INTS2 & (1u << 16u);
}
inline bool get_PROC0_INTS2_GPIO20_LEVEL_HIGH() volatile
{
return PROC0_INTS2 & (1u << 17u);
}
inline bool get_PROC0_INTS2_GPIO20_EDGE_LOW() volatile
{
return PROC0_INTS2 & (1u << 18u);
}
inline bool get_PROC0_INTS2_GPIO20_EDGE_HIGH() volatile
{
return PROC0_INTS2 & (1u << 19u);
}
inline bool get_PROC0_INTS2_GPIO21_LEVEL_LOW() volatile
{
return PROC0_INTS2 & (1u << 20u);
}
inline bool get_PROC0_INTS2_GPIO21_LEVEL_HIGH() volatile
{
return PROC0_INTS2 & (1u << 21u);
}
inline bool get_PROC0_INTS2_GPIO21_EDGE_LOW() volatile
{
return PROC0_INTS2 & (1u << 22u);
}
inline bool get_PROC0_INTS2_GPIO21_EDGE_HIGH() volatile
{
return PROC0_INTS2 & (1u << 23u);
}
inline bool get_PROC0_INTS2_GPIO22_LEVEL_LOW() volatile
{
return PROC0_INTS2 & (1u << 24u);
}
inline bool get_PROC0_INTS2_GPIO22_LEVEL_HIGH() volatile
{
return PROC0_INTS2 & (1u << 25u);
}
inline bool get_PROC0_INTS2_GPIO22_EDGE_LOW() volatile
{
return PROC0_INTS2 & (1u << 26u);
}
inline bool get_PROC0_INTS2_GPIO22_EDGE_HIGH() volatile
{
return PROC0_INTS2 & (1u << 27u);
}
inline bool get_PROC0_INTS2_GPIO23_LEVEL_LOW() volatile
{
return PROC0_INTS2 & (1u << 28u);
}
inline bool get_PROC0_INTS2_GPIO23_LEVEL_HIGH() volatile
{
return PROC0_INTS2 & (1u << 29u);
}
inline bool get_PROC0_INTS2_GPIO23_EDGE_LOW() volatile
{
return PROC0_INTS2 & (1u << 30u);
}
inline bool get_PROC0_INTS2_GPIO23_EDGE_HIGH() volatile
{
return PROC0_INTS2 & (1u << 31u);
}
inline void get_PROC0_INTS2(
bool &GPIO16_LEVEL_LOW, bool &GPIO16_LEVEL_HIGH, bool &GPIO16_EDGE_LOW,
bool &GPIO16_EDGE_HIGH, bool &GPIO17_LEVEL_LOW,
bool &GPIO17_LEVEL_HIGH, bool &GPIO17_EDGE_LOW, bool &GPIO17_EDGE_HIGH,
bool &GPIO18_LEVEL_LOW, bool &GPIO18_LEVEL_HIGH, bool &GPIO18_EDGE_LOW,
bool &GPIO18_EDGE_HIGH, bool &GPIO19_LEVEL_LOW,
bool &GPIO19_LEVEL_HIGH, bool &GPIO19_EDGE_LOW, bool &GPIO19_EDGE_HIGH,
bool &GPIO20_LEVEL_LOW, bool &GPIO20_LEVEL_HIGH, bool &GPIO20_EDGE_LOW,
bool &GPIO20_EDGE_HIGH, bool &GPIO21_LEVEL_LOW,
bool &GPIO21_LEVEL_HIGH, bool &GPIO21_EDGE_LOW, bool &GPIO21_EDGE_HIGH,
bool &GPIO22_LEVEL_LOW, bool &GPIO22_LEVEL_HIGH, bool &GPIO22_EDGE_LOW,
bool &GPIO22_EDGE_HIGH, bool &GPIO23_LEVEL_LOW,
bool &GPIO23_LEVEL_HIGH, bool &GPIO23_EDGE_LOW,
bool &GPIO23_EDGE_HIGH) volatile
{
uint32_t curr = PROC0_INTS2;
GPIO16_LEVEL_LOW = curr & (1u << 0u);
GPIO16_LEVEL_HIGH = curr & (1u << 1u);
GPIO16_EDGE_LOW = curr & (1u << 2u);
GPIO16_EDGE_HIGH = curr & (1u << 3u);
GPIO17_LEVEL_LOW = curr & (1u << 4u);
GPIO17_LEVEL_HIGH = curr & (1u << 5u);
GPIO17_EDGE_LOW = curr & (1u << 6u);
GPIO17_EDGE_HIGH = curr & (1u << 7u);
GPIO18_LEVEL_LOW = curr & (1u << 8u);
GPIO18_LEVEL_HIGH = curr & (1u << 9u);
GPIO18_EDGE_LOW = curr & (1u << 10u);
GPIO18_EDGE_HIGH = curr & (1u << 11u);
GPIO19_LEVEL_LOW = curr & (1u << 12u);
GPIO19_LEVEL_HIGH = curr & (1u << 13u);
GPIO19_EDGE_LOW = curr & (1u << 14u);
GPIO19_EDGE_HIGH = curr & (1u << 15u);
GPIO20_LEVEL_LOW = curr & (1u << 16u);
GPIO20_LEVEL_HIGH = curr & (1u << 17u);
GPIO20_EDGE_LOW = curr & (1u << 18u);
GPIO20_EDGE_HIGH = curr & (1u << 19u);
GPIO21_LEVEL_LOW = curr & (1u << 20u);
GPIO21_LEVEL_HIGH = curr & (1u << 21u);
GPIO21_EDGE_LOW = curr & (1u << 22u);
GPIO21_EDGE_HIGH = curr & (1u << 23u);
GPIO22_LEVEL_LOW = curr & (1u << 24u);
GPIO22_LEVEL_HIGH = curr & (1u << 25u);
GPIO22_EDGE_LOW = curr & (1u << 26u);
GPIO22_EDGE_HIGH = curr & (1u << 27u);
GPIO23_LEVEL_LOW = curr & (1u << 28u);
GPIO23_LEVEL_HIGH = curr & (1u << 29u);
GPIO23_EDGE_LOW = curr & (1u << 30u);
GPIO23_EDGE_HIGH = curr & (1u << 31u);
}
inline bool get_PROC0_INTS3_GPIO24_LEVEL_LOW() volatile
{
return PROC0_INTS3 & (1u << 0u);
}
inline bool get_PROC0_INTS3_GPIO24_LEVEL_HIGH() volatile
{
return PROC0_INTS3 & (1u << 1u);
}
inline bool get_PROC0_INTS3_GPIO24_EDGE_LOW() volatile
{
return PROC0_INTS3 & (1u << 2u);
}
inline bool get_PROC0_INTS3_GPIO24_EDGE_HIGH() volatile
{
return PROC0_INTS3 & (1u << 3u);
}
inline bool get_PROC0_INTS3_GPIO25_LEVEL_LOW() volatile
{
return PROC0_INTS3 & (1u << 4u);
}
inline bool get_PROC0_INTS3_GPIO25_LEVEL_HIGH() volatile
{
return PROC0_INTS3 & (1u << 5u);
}
inline bool get_PROC0_INTS3_GPIO25_EDGE_LOW() volatile
{
return PROC0_INTS3 & (1u << 6u);
}
inline bool get_PROC0_INTS3_GPIO25_EDGE_HIGH() volatile
{
return PROC0_INTS3 & (1u << 7u);
}
inline bool get_PROC0_INTS3_GPIO26_LEVEL_LOW() volatile
{
return PROC0_INTS3 & (1u << 8u);
}
inline bool get_PROC0_INTS3_GPIO26_LEVEL_HIGH() volatile
{
return PROC0_INTS3 & (1u << 9u);
}
inline bool get_PROC0_INTS3_GPIO26_EDGE_LOW() volatile
{
return PROC0_INTS3 & (1u << 10u);
}
inline bool get_PROC0_INTS3_GPIO26_EDGE_HIGH() volatile
{
return PROC0_INTS3 & (1u << 11u);
}
inline bool get_PROC0_INTS3_GPIO27_LEVEL_LOW() volatile
{
return PROC0_INTS3 & (1u << 12u);
}
inline bool get_PROC0_INTS3_GPIO27_LEVEL_HIGH() volatile
{
return PROC0_INTS3 & (1u << 13u);
}
inline bool get_PROC0_INTS3_GPIO27_EDGE_LOW() volatile
{
return PROC0_INTS3 & (1u << 14u);
}
inline bool get_PROC0_INTS3_GPIO27_EDGE_HIGH() volatile
{
return PROC0_INTS3 & (1u << 15u);
}
inline bool get_PROC0_INTS3_GPIO28_LEVEL_LOW() volatile
{
return PROC0_INTS3 & (1u << 16u);
}
inline bool get_PROC0_INTS3_GPIO28_LEVEL_HIGH() volatile
{
return PROC0_INTS3 & (1u << 17u);
}
inline bool get_PROC0_INTS3_GPIO28_EDGE_LOW() volatile
{
return PROC0_INTS3 & (1u << 18u);
}
inline bool get_PROC0_INTS3_GPIO28_EDGE_HIGH() volatile
{
return PROC0_INTS3 & (1u << 19u);
}
inline bool get_PROC0_INTS3_GPIO29_LEVEL_LOW() volatile
{
return PROC0_INTS3 & (1u << 20u);
}
inline bool get_PROC0_INTS3_GPIO29_LEVEL_HIGH() volatile
{
return PROC0_INTS3 & (1u << 21u);
}
inline bool get_PROC0_INTS3_GPIO29_EDGE_LOW() volatile
{
return PROC0_INTS3 & (1u << 22u);
}
inline bool get_PROC0_INTS3_GPIO29_EDGE_HIGH() volatile
{
return PROC0_INTS3 & (1u << 23u);
}
inline void get_PROC0_INTS3(bool &GPIO24_LEVEL_LOW,
bool &GPIO24_LEVEL_HIGH, bool &GPIO24_EDGE_LOW,
bool &GPIO24_EDGE_HIGH, bool &GPIO25_LEVEL_LOW,
bool &GPIO25_LEVEL_HIGH, bool &GPIO25_EDGE_LOW,
bool &GPIO25_EDGE_HIGH, bool &GPIO26_LEVEL_LOW,
bool &GPIO26_LEVEL_HIGH, bool &GPIO26_EDGE_LOW,
bool &GPIO26_EDGE_HIGH, bool &GPIO27_LEVEL_LOW,
bool &GPIO27_LEVEL_HIGH, bool &GPIO27_EDGE_LOW,
bool &GPIO27_EDGE_HIGH, bool &GPIO28_LEVEL_LOW,
bool &GPIO28_LEVEL_HIGH, bool &GPIO28_EDGE_LOW,
bool &GPIO28_EDGE_HIGH, bool &GPIO29_LEVEL_LOW,
bool &GPIO29_LEVEL_HIGH, bool &GPIO29_EDGE_LOW,
bool &GPIO29_EDGE_HIGH) volatile
{
uint32_t curr = PROC0_INTS3;
GPIO24_LEVEL_LOW = curr & (1u << 0u);
GPIO24_LEVEL_HIGH = curr & (1u << 1u);
GPIO24_EDGE_LOW = curr & (1u << 2u);
GPIO24_EDGE_HIGH = curr & (1u << 3u);
GPIO25_LEVEL_LOW = curr & (1u << 4u);
GPIO25_LEVEL_HIGH = curr & (1u << 5u);
GPIO25_EDGE_LOW = curr & (1u << 6u);
GPIO25_EDGE_HIGH = curr & (1u << 7u);
GPIO26_LEVEL_LOW = curr & (1u << 8u);
GPIO26_LEVEL_HIGH = curr & (1u << 9u);
GPIO26_EDGE_LOW = curr & (1u << 10u);
GPIO26_EDGE_HIGH = curr & (1u << 11u);
GPIO27_LEVEL_LOW = curr & (1u << 12u);
GPIO27_LEVEL_HIGH = curr & (1u << 13u);
GPIO27_EDGE_LOW = curr & (1u << 14u);
GPIO27_EDGE_HIGH = curr & (1u << 15u);
GPIO28_LEVEL_LOW = curr & (1u << 16u);
GPIO28_LEVEL_HIGH = curr & (1u << 17u);
GPIO28_EDGE_LOW = curr & (1u << 18u);
GPIO28_EDGE_HIGH = curr & (1u << 19u);
GPIO29_LEVEL_LOW = curr & (1u << 20u);
GPIO29_LEVEL_HIGH = curr & (1u << 21u);
GPIO29_EDGE_LOW = curr & (1u << 22u);
GPIO29_EDGE_HIGH = curr & (1u << 23u);
}
inline bool get_PROC1_INTE0_GPIO0_LEVEL_LOW() volatile
{
return PROC1_INTE0 & (1u << 0u);
}
inline void set_PROC1_INTE0_GPIO0_LEVEL_LOW() volatile
{
PROC1_INTE0 |= 1u << 0u;
}
inline void clear_PROC1_INTE0_GPIO0_LEVEL_LOW() volatile
{
PROC1_INTE0 &= ~(1u << 0u);
}
inline void toggle_PROC1_INTE0_GPIO0_LEVEL_LOW() volatile
{
PROC1_INTE0 ^= 1u << 0u;
}
inline bool get_PROC1_INTE0_GPIO0_LEVEL_HIGH() volatile
{
return PROC1_INTE0 & (1u << 1u);
}
inline void set_PROC1_INTE0_GPIO0_LEVEL_HIGH() volatile
{
PROC1_INTE0 |= 1u << 1u;
}
inline void clear_PROC1_INTE0_GPIO0_LEVEL_HIGH() volatile
{
PROC1_INTE0 &= ~(1u << 1u);
}
inline void toggle_PROC1_INTE0_GPIO0_LEVEL_HIGH() volatile
{
PROC1_INTE0 ^= 1u << 1u;
}
inline bool get_PROC1_INTE0_GPIO0_EDGE_LOW() volatile
{
return PROC1_INTE0 & (1u << 2u);
}
inline void set_PROC1_INTE0_GPIO0_EDGE_LOW() volatile
{
PROC1_INTE0 |= 1u << 2u;
}
inline void clear_PROC1_INTE0_GPIO0_EDGE_LOW() volatile
{
PROC1_INTE0 &= ~(1u << 2u);
}
inline void toggle_PROC1_INTE0_GPIO0_EDGE_LOW() volatile
{
PROC1_INTE0 ^= 1u << 2u;
}
inline bool get_PROC1_INTE0_GPIO0_EDGE_HIGH() volatile
{
return PROC1_INTE0 & (1u << 3u);
}
inline void set_PROC1_INTE0_GPIO0_EDGE_HIGH() volatile
{
PROC1_INTE0 |= 1u << 3u;
}
inline void clear_PROC1_INTE0_GPIO0_EDGE_HIGH() volatile
{
PROC1_INTE0 &= ~(1u << 3u);
}
inline void toggle_PROC1_INTE0_GPIO0_EDGE_HIGH() volatile
{
PROC1_INTE0 ^= 1u << 3u;
}
inline bool get_PROC1_INTE0_GPIO1_LEVEL_LOW() volatile
{
return PROC1_INTE0 & (1u << 4u);
}
inline void set_PROC1_INTE0_GPIO1_LEVEL_LOW() volatile
{
PROC1_INTE0 |= 1u << 4u;
}
inline void clear_PROC1_INTE0_GPIO1_LEVEL_LOW() volatile
{
PROC1_INTE0 &= ~(1u << 4u);
}
inline void toggle_PROC1_INTE0_GPIO1_LEVEL_LOW() volatile
{
PROC1_INTE0 ^= 1u << 4u;
}
inline bool get_PROC1_INTE0_GPIO1_LEVEL_HIGH() volatile
{
return PROC1_INTE0 & (1u << 5u);
}
inline void set_PROC1_INTE0_GPIO1_LEVEL_HIGH() volatile
{
PROC1_INTE0 |= 1u << 5u;
}
inline void clear_PROC1_INTE0_GPIO1_LEVEL_HIGH() volatile
{
PROC1_INTE0 &= ~(1u << 5u);
}
inline void toggle_PROC1_INTE0_GPIO1_LEVEL_HIGH() volatile
{
PROC1_INTE0 ^= 1u << 5u;
}
inline bool get_PROC1_INTE0_GPIO1_EDGE_LOW() volatile
{
return PROC1_INTE0 & (1u << 6u);
}
inline void set_PROC1_INTE0_GPIO1_EDGE_LOW() volatile
{
PROC1_INTE0 |= 1u << 6u;
}
inline void clear_PROC1_INTE0_GPIO1_EDGE_LOW() volatile
{
PROC1_INTE0 &= ~(1u << 6u);
}
inline void toggle_PROC1_INTE0_GPIO1_EDGE_LOW() volatile
{
PROC1_INTE0 ^= 1u << 6u;
}
inline bool get_PROC1_INTE0_GPIO1_EDGE_HIGH() volatile
{
return PROC1_INTE0 & (1u << 7u);
}
inline void set_PROC1_INTE0_GPIO1_EDGE_HIGH() volatile
{
PROC1_INTE0 |= 1u << 7u;
}
inline void clear_PROC1_INTE0_GPIO1_EDGE_HIGH() volatile
{
PROC1_INTE0 &= ~(1u << 7u);
}
inline void toggle_PROC1_INTE0_GPIO1_EDGE_HIGH() volatile
{
PROC1_INTE0 ^= 1u << 7u;
}
inline bool get_PROC1_INTE0_GPIO2_LEVEL_LOW() volatile
{
return PROC1_INTE0 & (1u << 8u);
}
inline void set_PROC1_INTE0_GPIO2_LEVEL_LOW() volatile
{
PROC1_INTE0 |= 1u << 8u;
}
inline void clear_PROC1_INTE0_GPIO2_LEVEL_LOW() volatile
{
PROC1_INTE0 &= ~(1u << 8u);
}
inline void toggle_PROC1_INTE0_GPIO2_LEVEL_LOW() volatile
{
PROC1_INTE0 ^= 1u << 8u;
}
inline bool get_PROC1_INTE0_GPIO2_LEVEL_HIGH() volatile
{
return PROC1_INTE0 & (1u << 9u);
}
inline void set_PROC1_INTE0_GPIO2_LEVEL_HIGH() volatile
{
PROC1_INTE0 |= 1u << 9u;
}
inline void clear_PROC1_INTE0_GPIO2_LEVEL_HIGH() volatile
{
PROC1_INTE0 &= ~(1u << 9u);
}
inline void toggle_PROC1_INTE0_GPIO2_LEVEL_HIGH() volatile
{
PROC1_INTE0 ^= 1u << 9u;
}
inline bool get_PROC1_INTE0_GPIO2_EDGE_LOW() volatile
{
return PROC1_INTE0 & (1u << 10u);
}
inline void set_PROC1_INTE0_GPIO2_EDGE_LOW() volatile
{
PROC1_INTE0 |= 1u << 10u;
}
inline void clear_PROC1_INTE0_GPIO2_EDGE_LOW() volatile
{
PROC1_INTE0 &= ~(1u << 10u);
}
inline void toggle_PROC1_INTE0_GPIO2_EDGE_LOW() volatile
{
PROC1_INTE0 ^= 1u << 10u;
}
inline bool get_PROC1_INTE0_GPIO2_EDGE_HIGH() volatile
{
return PROC1_INTE0 & (1u << 11u);
}
inline void set_PROC1_INTE0_GPIO2_EDGE_HIGH() volatile
{
PROC1_INTE0 |= 1u << 11u;
}
inline void clear_PROC1_INTE0_GPIO2_EDGE_HIGH() volatile
{
PROC1_INTE0 &= ~(1u << 11u);
}
inline void toggle_PROC1_INTE0_GPIO2_EDGE_HIGH() volatile
{
PROC1_INTE0 ^= 1u << 11u;
}
inline bool get_PROC1_INTE0_GPIO3_LEVEL_LOW() volatile
{
return PROC1_INTE0 & (1u << 12u);
}
inline void set_PROC1_INTE0_GPIO3_LEVEL_LOW() volatile
{
PROC1_INTE0 |= 1u << 12u;
}
inline void clear_PROC1_INTE0_GPIO3_LEVEL_LOW() volatile
{
PROC1_INTE0 &= ~(1u << 12u);
}
inline void toggle_PROC1_INTE0_GPIO3_LEVEL_LOW() volatile
{
PROC1_INTE0 ^= 1u << 12u;
}
inline bool get_PROC1_INTE0_GPIO3_LEVEL_HIGH() volatile
{
return PROC1_INTE0 & (1u << 13u);
}
inline void set_PROC1_INTE0_GPIO3_LEVEL_HIGH() volatile
{
PROC1_INTE0 |= 1u << 13u;
}
inline void clear_PROC1_INTE0_GPIO3_LEVEL_HIGH() volatile
{
PROC1_INTE0 &= ~(1u << 13u);
}
inline void toggle_PROC1_INTE0_GPIO3_LEVEL_HIGH() volatile
{
PROC1_INTE0 ^= 1u << 13u;
}
inline bool get_PROC1_INTE0_GPIO3_EDGE_LOW() volatile
{
return PROC1_INTE0 & (1u << 14u);
}
inline void set_PROC1_INTE0_GPIO3_EDGE_LOW() volatile
{
PROC1_INTE0 |= 1u << 14u;
}
inline void clear_PROC1_INTE0_GPIO3_EDGE_LOW() volatile
{
PROC1_INTE0 &= ~(1u << 14u);
}
inline void toggle_PROC1_INTE0_GPIO3_EDGE_LOW() volatile
{
PROC1_INTE0 ^= 1u << 14u;
}
inline bool get_PROC1_INTE0_GPIO3_EDGE_HIGH() volatile
{
return PROC1_INTE0 & (1u << 15u);
}
inline void set_PROC1_INTE0_GPIO3_EDGE_HIGH() volatile
{
PROC1_INTE0 |= 1u << 15u;
}
inline void clear_PROC1_INTE0_GPIO3_EDGE_HIGH() volatile
{
PROC1_INTE0 &= ~(1u << 15u);
}
inline void toggle_PROC1_INTE0_GPIO3_EDGE_HIGH() volatile
{
PROC1_INTE0 ^= 1u << 15u;
}
inline bool get_PROC1_INTE0_GPIO4_LEVEL_LOW() volatile
{
return PROC1_INTE0 & (1u << 16u);
}
inline void set_PROC1_INTE0_GPIO4_LEVEL_LOW() volatile
{
PROC1_INTE0 |= 1u << 16u;
}
inline void clear_PROC1_INTE0_GPIO4_LEVEL_LOW() volatile
{
PROC1_INTE0 &= ~(1u << 16u);
}
inline void toggle_PROC1_INTE0_GPIO4_LEVEL_LOW() volatile
{
PROC1_INTE0 ^= 1u << 16u;
}
inline bool get_PROC1_INTE0_GPIO4_LEVEL_HIGH() volatile
{
return PROC1_INTE0 & (1u << 17u);
}
inline void set_PROC1_INTE0_GPIO4_LEVEL_HIGH() volatile
{
PROC1_INTE0 |= 1u << 17u;
}
inline void clear_PROC1_INTE0_GPIO4_LEVEL_HIGH() volatile
{
PROC1_INTE0 &= ~(1u << 17u);
}
inline void toggle_PROC1_INTE0_GPIO4_LEVEL_HIGH() volatile
{
PROC1_INTE0 ^= 1u << 17u;
}
inline bool get_PROC1_INTE0_GPIO4_EDGE_LOW() volatile
{
return PROC1_INTE0 & (1u << 18u);
}
inline void set_PROC1_INTE0_GPIO4_EDGE_LOW() volatile
{
PROC1_INTE0 |= 1u << 18u;
}
inline void clear_PROC1_INTE0_GPIO4_EDGE_LOW() volatile
{
PROC1_INTE0 &= ~(1u << 18u);
}
inline void toggle_PROC1_INTE0_GPIO4_EDGE_LOW() volatile
{
PROC1_INTE0 ^= 1u << 18u;
}
inline bool get_PROC1_INTE0_GPIO4_EDGE_HIGH() volatile
{
return PROC1_INTE0 & (1u << 19u);
}
inline void set_PROC1_INTE0_GPIO4_EDGE_HIGH() volatile
{
PROC1_INTE0 |= 1u << 19u;
}
inline void clear_PROC1_INTE0_GPIO4_EDGE_HIGH() volatile
{
PROC1_INTE0 &= ~(1u << 19u);
}
inline void toggle_PROC1_INTE0_GPIO4_EDGE_HIGH() volatile
{
PROC1_INTE0 ^= 1u << 19u;
}
inline bool get_PROC1_INTE0_GPIO5_LEVEL_LOW() volatile
{
return PROC1_INTE0 & (1u << 20u);
}
inline void set_PROC1_INTE0_GPIO5_LEVEL_LOW() volatile
{
PROC1_INTE0 |= 1u << 20u;
}
inline void clear_PROC1_INTE0_GPIO5_LEVEL_LOW() volatile
{
PROC1_INTE0 &= ~(1u << 20u);
}
inline void toggle_PROC1_INTE0_GPIO5_LEVEL_LOW() volatile
{
PROC1_INTE0 ^= 1u << 20u;
}
inline bool get_PROC1_INTE0_GPIO5_LEVEL_HIGH() volatile
{
return PROC1_INTE0 & (1u << 21u);
}
inline void set_PROC1_INTE0_GPIO5_LEVEL_HIGH() volatile
{
PROC1_INTE0 |= 1u << 21u;
}
inline void clear_PROC1_INTE0_GPIO5_LEVEL_HIGH() volatile
{
PROC1_INTE0 &= ~(1u << 21u);
}
inline void toggle_PROC1_INTE0_GPIO5_LEVEL_HIGH() volatile
{
PROC1_INTE0 ^= 1u << 21u;
}
inline bool get_PROC1_INTE0_GPIO5_EDGE_LOW() volatile
{
return PROC1_INTE0 & (1u << 22u);
}
inline void set_PROC1_INTE0_GPIO5_EDGE_LOW() volatile
{
PROC1_INTE0 |= 1u << 22u;
}
inline void clear_PROC1_INTE0_GPIO5_EDGE_LOW() volatile
{
PROC1_INTE0 &= ~(1u << 22u);
}
inline void toggle_PROC1_INTE0_GPIO5_EDGE_LOW() volatile
{
PROC1_INTE0 ^= 1u << 22u;
}
inline bool get_PROC1_INTE0_GPIO5_EDGE_HIGH() volatile
{
return PROC1_INTE0 & (1u << 23u);
}
inline void set_PROC1_INTE0_GPIO5_EDGE_HIGH() volatile
{
PROC1_INTE0 |= 1u << 23u;
}
inline void clear_PROC1_INTE0_GPIO5_EDGE_HIGH() volatile
{
PROC1_INTE0 &= ~(1u << 23u);
}
inline void toggle_PROC1_INTE0_GPIO5_EDGE_HIGH() volatile
{
PROC1_INTE0 ^= 1u << 23u;
}
inline bool get_PROC1_INTE0_GPIO6_LEVEL_LOW() volatile
{
return PROC1_INTE0 & (1u << 24u);
}
inline void set_PROC1_INTE0_GPIO6_LEVEL_LOW() volatile
{
PROC1_INTE0 |= 1u << 24u;
}
inline void clear_PROC1_INTE0_GPIO6_LEVEL_LOW() volatile
{
PROC1_INTE0 &= ~(1u << 24u);
}
inline void toggle_PROC1_INTE0_GPIO6_LEVEL_LOW() volatile
{
PROC1_INTE0 ^= 1u << 24u;
}
inline bool get_PROC1_INTE0_GPIO6_LEVEL_HIGH() volatile
{
return PROC1_INTE0 & (1u << 25u);
}
inline void set_PROC1_INTE0_GPIO6_LEVEL_HIGH() volatile
{
PROC1_INTE0 |= 1u << 25u;
}
inline void clear_PROC1_INTE0_GPIO6_LEVEL_HIGH() volatile
{
PROC1_INTE0 &= ~(1u << 25u);
}
inline void toggle_PROC1_INTE0_GPIO6_LEVEL_HIGH() volatile
{
PROC1_INTE0 ^= 1u << 25u;
}
inline bool get_PROC1_INTE0_GPIO6_EDGE_LOW() volatile
{
return PROC1_INTE0 & (1u << 26u);
}
inline void set_PROC1_INTE0_GPIO6_EDGE_LOW() volatile
{
PROC1_INTE0 |= 1u << 26u;
}
inline void clear_PROC1_INTE0_GPIO6_EDGE_LOW() volatile
{
PROC1_INTE0 &= ~(1u << 26u);
}
inline void toggle_PROC1_INTE0_GPIO6_EDGE_LOW() volatile
{
PROC1_INTE0 ^= 1u << 26u;
}
inline bool get_PROC1_INTE0_GPIO6_EDGE_HIGH() volatile
{
return PROC1_INTE0 & (1u << 27u);
}
inline void set_PROC1_INTE0_GPIO6_EDGE_HIGH() volatile
{
PROC1_INTE0 |= 1u << 27u;
}
inline void clear_PROC1_INTE0_GPIO6_EDGE_HIGH() volatile
{
PROC1_INTE0 &= ~(1u << 27u);
}
inline void toggle_PROC1_INTE0_GPIO6_EDGE_HIGH() volatile
{
PROC1_INTE0 ^= 1u << 27u;
}
inline bool get_PROC1_INTE0_GPIO7_LEVEL_LOW() volatile
{
return PROC1_INTE0 & (1u << 28u);
}
inline void set_PROC1_INTE0_GPIO7_LEVEL_LOW() volatile
{
PROC1_INTE0 |= 1u << 28u;
}
inline void clear_PROC1_INTE0_GPIO7_LEVEL_LOW() volatile
{
PROC1_INTE0 &= ~(1u << 28u);
}
inline void toggle_PROC1_INTE0_GPIO7_LEVEL_LOW() volatile
{
PROC1_INTE0 ^= 1u << 28u;
}
inline bool get_PROC1_INTE0_GPIO7_LEVEL_HIGH() volatile
{
return PROC1_INTE0 & (1u << 29u);
}
inline void set_PROC1_INTE0_GPIO7_LEVEL_HIGH() volatile
{
PROC1_INTE0 |= 1u << 29u;
}
inline void clear_PROC1_INTE0_GPIO7_LEVEL_HIGH() volatile
{
PROC1_INTE0 &= ~(1u << 29u);
}
inline void toggle_PROC1_INTE0_GPIO7_LEVEL_HIGH() volatile
{
PROC1_INTE0 ^= 1u << 29u;
}
inline bool get_PROC1_INTE0_GPIO7_EDGE_LOW() volatile
{
return PROC1_INTE0 & (1u << 30u);
}
inline void set_PROC1_INTE0_GPIO7_EDGE_LOW() volatile
{
PROC1_INTE0 |= 1u << 30u;
}
inline void clear_PROC1_INTE0_GPIO7_EDGE_LOW() volatile
{
PROC1_INTE0 &= ~(1u << 30u);
}
inline void toggle_PROC1_INTE0_GPIO7_EDGE_LOW() volatile
{
PROC1_INTE0 ^= 1u << 30u;
}
inline bool get_PROC1_INTE0_GPIO7_EDGE_HIGH() volatile
{
return PROC1_INTE0 & (1u << 31u);
}
inline void set_PROC1_INTE0_GPIO7_EDGE_HIGH() volatile
{
PROC1_INTE0 |= 1u << 31u;
}
inline void clear_PROC1_INTE0_GPIO7_EDGE_HIGH() volatile
{
PROC1_INTE0 &= ~(1u << 31u);
}
inline void toggle_PROC1_INTE0_GPIO7_EDGE_HIGH() volatile
{
PROC1_INTE0 ^= 1u << 31u;
}
inline void get_PROC1_INTE0(
bool &GPIO0_LEVEL_LOW, bool &GPIO0_LEVEL_HIGH, bool &GPIO0_EDGE_LOW,
bool &GPIO0_EDGE_HIGH, bool &GPIO1_LEVEL_LOW, bool &GPIO1_LEVEL_HIGH,
bool &GPIO1_EDGE_LOW, bool &GPIO1_EDGE_HIGH, bool &GPIO2_LEVEL_LOW,
bool &GPIO2_LEVEL_HIGH, bool &GPIO2_EDGE_LOW, bool &GPIO2_EDGE_HIGH,
bool &GPIO3_LEVEL_LOW, bool &GPIO3_LEVEL_HIGH, bool &GPIO3_EDGE_LOW,
bool &GPIO3_EDGE_HIGH, bool &GPIO4_LEVEL_LOW, bool &GPIO4_LEVEL_HIGH,
bool &GPIO4_EDGE_LOW, bool &GPIO4_EDGE_HIGH, bool &GPIO5_LEVEL_LOW,
bool &GPIO5_LEVEL_HIGH, bool &GPIO5_EDGE_LOW, bool &GPIO5_EDGE_HIGH,
bool &GPIO6_LEVEL_LOW, bool &GPIO6_LEVEL_HIGH, bool &GPIO6_EDGE_LOW,
bool &GPIO6_EDGE_HIGH, bool &GPIO7_LEVEL_LOW, bool &GPIO7_LEVEL_HIGH,
bool &GPIO7_EDGE_LOW, bool &GPIO7_EDGE_HIGH) volatile
{
uint32_t curr = PROC1_INTE0;
GPIO0_LEVEL_LOW = curr & (1u << 0u);
GPIO0_LEVEL_HIGH = curr & (1u << 1u);
GPIO0_EDGE_LOW = curr & (1u << 2u);
GPIO0_EDGE_HIGH = curr & (1u << 3u);
GPIO1_LEVEL_LOW = curr & (1u << 4u);
GPIO1_LEVEL_HIGH = curr & (1u << 5u);
GPIO1_EDGE_LOW = curr & (1u << 6u);
GPIO1_EDGE_HIGH = curr & (1u << 7u);
GPIO2_LEVEL_LOW = curr & (1u << 8u);
GPIO2_LEVEL_HIGH = curr & (1u << 9u);
GPIO2_EDGE_LOW = curr & (1u << 10u);
GPIO2_EDGE_HIGH = curr & (1u << 11u);
GPIO3_LEVEL_LOW = curr & (1u << 12u);
GPIO3_LEVEL_HIGH = curr & (1u << 13u);
GPIO3_EDGE_LOW = curr & (1u << 14u);
GPIO3_EDGE_HIGH = curr & (1u << 15u);
GPIO4_LEVEL_LOW = curr & (1u << 16u);
GPIO4_LEVEL_HIGH = curr & (1u << 17u);
GPIO4_EDGE_LOW = curr & (1u << 18u);
GPIO4_EDGE_HIGH = curr & (1u << 19u);
GPIO5_LEVEL_LOW = curr & (1u << 20u);
GPIO5_LEVEL_HIGH = curr & (1u << 21u);
GPIO5_EDGE_LOW = curr & (1u << 22u);
GPIO5_EDGE_HIGH = curr & (1u << 23u);
GPIO6_LEVEL_LOW = curr & (1u << 24u);
GPIO6_LEVEL_HIGH = curr & (1u << 25u);
GPIO6_EDGE_LOW = curr & (1u << 26u);
GPIO6_EDGE_HIGH = curr & (1u << 27u);
GPIO7_LEVEL_LOW = curr & (1u << 28u);
GPIO7_LEVEL_HIGH = curr & (1u << 29u);
GPIO7_EDGE_LOW = curr & (1u << 30u);
GPIO7_EDGE_HIGH = curr & (1u << 31u);
}
inline void set_PROC1_INTE0(
bool GPIO0_LEVEL_LOW, bool GPIO0_LEVEL_HIGH, bool GPIO0_EDGE_LOW,
bool GPIO0_EDGE_HIGH, bool GPIO1_LEVEL_LOW, bool GPIO1_LEVEL_HIGH,
bool GPIO1_EDGE_LOW, bool GPIO1_EDGE_HIGH, bool GPIO2_LEVEL_LOW,
bool GPIO2_LEVEL_HIGH, bool GPIO2_EDGE_LOW, bool GPIO2_EDGE_HIGH,
bool GPIO3_LEVEL_LOW, bool GPIO3_LEVEL_HIGH, bool GPIO3_EDGE_LOW,
bool GPIO3_EDGE_HIGH, bool GPIO4_LEVEL_LOW, bool GPIO4_LEVEL_HIGH,
bool GPIO4_EDGE_LOW, bool GPIO4_EDGE_HIGH, bool GPIO5_LEVEL_LOW,
bool GPIO5_LEVEL_HIGH, bool GPIO5_EDGE_LOW, bool GPIO5_EDGE_HIGH,
bool GPIO6_LEVEL_LOW, bool GPIO6_LEVEL_HIGH, bool GPIO6_EDGE_LOW,
bool GPIO6_EDGE_HIGH, bool GPIO7_LEVEL_LOW, bool GPIO7_LEVEL_HIGH,
bool GPIO7_EDGE_LOW, bool GPIO7_EDGE_HIGH) volatile
{
uint32_t curr = PROC1_INTE0;
curr &= ~(0b1u << 0u);
curr |= (GPIO0_LEVEL_LOW & 0b1u) << 0u;
curr &= ~(0b1u << 1u);
curr |= (GPIO0_LEVEL_HIGH & 0b1u) << 1u;
curr &= ~(0b1u << 2u);
curr |= (GPIO0_EDGE_LOW & 0b1u) << 2u;
curr &= ~(0b1u << 3u);
curr |= (GPIO0_EDGE_HIGH & 0b1u) << 3u;
curr &= ~(0b1u << 4u);
curr |= (GPIO1_LEVEL_LOW & 0b1u) << 4u;
curr &= ~(0b1u << 5u);
curr |= (GPIO1_LEVEL_HIGH & 0b1u) << 5u;
curr &= ~(0b1u << 6u);
curr |= (GPIO1_EDGE_LOW & 0b1u) << 6u;
curr &= ~(0b1u << 7u);
curr |= (GPIO1_EDGE_HIGH & 0b1u) << 7u;
curr &= ~(0b1u << 8u);
curr |= (GPIO2_LEVEL_LOW & 0b1u) << 8u;
curr &= ~(0b1u << 9u);
curr |= (GPIO2_LEVEL_HIGH & 0b1u) << 9u;
curr &= ~(0b1u << 10u);
curr |= (GPIO2_EDGE_LOW & 0b1u) << 10u;
curr &= ~(0b1u << 11u);
curr |= (GPIO2_EDGE_HIGH & 0b1u) << 11u;
curr &= ~(0b1u << 12u);
curr |= (GPIO3_LEVEL_LOW & 0b1u) << 12u;
curr &= ~(0b1u << 13u);
curr |= (GPIO3_LEVEL_HIGH & 0b1u) << 13u;
curr &= ~(0b1u << 14u);
curr |= (GPIO3_EDGE_LOW & 0b1u) << 14u;
curr &= ~(0b1u << 15u);
curr |= (GPIO3_EDGE_HIGH & 0b1u) << 15u;
curr &= ~(0b1u << 16u);
curr |= (GPIO4_LEVEL_LOW & 0b1u) << 16u;
curr &= ~(0b1u << 17u);
curr |= (GPIO4_LEVEL_HIGH & 0b1u) << 17u;
curr &= ~(0b1u << 18u);
curr |= (GPIO4_EDGE_LOW & 0b1u) << 18u;
curr &= ~(0b1u << 19u);
curr |= (GPIO4_EDGE_HIGH & 0b1u) << 19u;
curr &= ~(0b1u << 20u);
curr |= (GPIO5_LEVEL_LOW & 0b1u) << 20u;
curr &= ~(0b1u << 21u);
curr |= (GPIO5_LEVEL_HIGH & 0b1u) << 21u;
curr &= ~(0b1u << 22u);
curr |= (GPIO5_EDGE_LOW & 0b1u) << 22u;
curr &= ~(0b1u << 23u);
curr |= (GPIO5_EDGE_HIGH & 0b1u) << 23u;
curr &= ~(0b1u << 24u);
curr |= (GPIO6_LEVEL_LOW & 0b1u) << 24u;
curr &= ~(0b1u << 25u);
curr |= (GPIO6_LEVEL_HIGH & 0b1u) << 25u;
curr &= ~(0b1u << 26u);
curr |= (GPIO6_EDGE_LOW & 0b1u) << 26u;
curr &= ~(0b1u << 27u);
curr |= (GPIO6_EDGE_HIGH & 0b1u) << 27u;
curr &= ~(0b1u << 28u);
curr |= (GPIO7_LEVEL_LOW & 0b1u) << 28u;
curr &= ~(0b1u << 29u);
curr |= (GPIO7_LEVEL_HIGH & 0b1u) << 29u;
curr &= ~(0b1u << 30u);
curr |= (GPIO7_EDGE_LOW & 0b1u) << 30u;
curr &= ~(0b1u << 31u);
curr |= (GPIO7_EDGE_HIGH & 0b1u) << 31u;
PROC1_INTE0 = curr;
}
inline bool get_PROC1_INTE1_GPIO8_LEVEL_LOW() volatile
{
return PROC1_INTE1 & (1u << 0u);
}
inline void set_PROC1_INTE1_GPIO8_LEVEL_LOW() volatile
{
PROC1_INTE1 |= 1u << 0u;
}
inline void clear_PROC1_INTE1_GPIO8_LEVEL_LOW() volatile
{
PROC1_INTE1 &= ~(1u << 0u);
}
inline void toggle_PROC1_INTE1_GPIO8_LEVEL_LOW() volatile
{
PROC1_INTE1 ^= 1u << 0u;
}
inline bool get_PROC1_INTE1_GPIO8_LEVEL_HIGH() volatile
{
return PROC1_INTE1 & (1u << 1u);
}
inline void set_PROC1_INTE1_GPIO8_LEVEL_HIGH() volatile
{
PROC1_INTE1 |= 1u << 1u;
}
inline void clear_PROC1_INTE1_GPIO8_LEVEL_HIGH() volatile
{
PROC1_INTE1 &= ~(1u << 1u);
}
inline void toggle_PROC1_INTE1_GPIO8_LEVEL_HIGH() volatile
{
PROC1_INTE1 ^= 1u << 1u;
}
inline bool get_PROC1_INTE1_GPIO8_EDGE_LOW() volatile
{
return PROC1_INTE1 & (1u << 2u);
}
inline void set_PROC1_INTE1_GPIO8_EDGE_LOW() volatile
{
PROC1_INTE1 |= 1u << 2u;
}
inline void clear_PROC1_INTE1_GPIO8_EDGE_LOW() volatile
{
PROC1_INTE1 &= ~(1u << 2u);
}
inline void toggle_PROC1_INTE1_GPIO8_EDGE_LOW() volatile
{
PROC1_INTE1 ^= 1u << 2u;
}
inline bool get_PROC1_INTE1_GPIO8_EDGE_HIGH() volatile
{
return PROC1_INTE1 & (1u << 3u);
}
inline void set_PROC1_INTE1_GPIO8_EDGE_HIGH() volatile
{
PROC1_INTE1 |= 1u << 3u;
}
inline void clear_PROC1_INTE1_GPIO8_EDGE_HIGH() volatile
{
PROC1_INTE1 &= ~(1u << 3u);
}
inline void toggle_PROC1_INTE1_GPIO8_EDGE_HIGH() volatile
{
PROC1_INTE1 ^= 1u << 3u;
}
inline bool get_PROC1_INTE1_GPIO9_LEVEL_LOW() volatile
{
return PROC1_INTE1 & (1u << 4u);
}
inline void set_PROC1_INTE1_GPIO9_LEVEL_LOW() volatile
{
PROC1_INTE1 |= 1u << 4u;
}
inline void clear_PROC1_INTE1_GPIO9_LEVEL_LOW() volatile
{
PROC1_INTE1 &= ~(1u << 4u);
}
inline void toggle_PROC1_INTE1_GPIO9_LEVEL_LOW() volatile
{
PROC1_INTE1 ^= 1u << 4u;
}
inline bool get_PROC1_INTE1_GPIO9_LEVEL_HIGH() volatile
{
return PROC1_INTE1 & (1u << 5u);
}
inline void set_PROC1_INTE1_GPIO9_LEVEL_HIGH() volatile
{
PROC1_INTE1 |= 1u << 5u;
}
inline void clear_PROC1_INTE1_GPIO9_LEVEL_HIGH() volatile
{
PROC1_INTE1 &= ~(1u << 5u);
}
inline void toggle_PROC1_INTE1_GPIO9_LEVEL_HIGH() volatile
{
PROC1_INTE1 ^= 1u << 5u;
}
inline bool get_PROC1_INTE1_GPIO9_EDGE_LOW() volatile
{
return PROC1_INTE1 & (1u << 6u);
}
inline void set_PROC1_INTE1_GPIO9_EDGE_LOW() volatile
{
PROC1_INTE1 |= 1u << 6u;
}
inline void clear_PROC1_INTE1_GPIO9_EDGE_LOW() volatile
{
PROC1_INTE1 &= ~(1u << 6u);
}
inline void toggle_PROC1_INTE1_GPIO9_EDGE_LOW() volatile
{
PROC1_INTE1 ^= 1u << 6u;
}
inline bool get_PROC1_INTE1_GPIO9_EDGE_HIGH() volatile
{
return PROC1_INTE1 & (1u << 7u);
}
inline void set_PROC1_INTE1_GPIO9_EDGE_HIGH() volatile
{
PROC1_INTE1 |= 1u << 7u;
}
inline void clear_PROC1_INTE1_GPIO9_EDGE_HIGH() volatile
{
PROC1_INTE1 &= ~(1u << 7u);
}
inline void toggle_PROC1_INTE1_GPIO9_EDGE_HIGH() volatile
{
PROC1_INTE1 ^= 1u << 7u;
}
inline bool get_PROC1_INTE1_GPIO10_LEVEL_LOW() volatile
{
return PROC1_INTE1 & (1u << 8u);
}
inline void set_PROC1_INTE1_GPIO10_LEVEL_LOW() volatile
{
PROC1_INTE1 |= 1u << 8u;
}
inline void clear_PROC1_INTE1_GPIO10_LEVEL_LOW() volatile
{
PROC1_INTE1 &= ~(1u << 8u);
}
inline void toggle_PROC1_INTE1_GPIO10_LEVEL_LOW() volatile
{
PROC1_INTE1 ^= 1u << 8u;
}
inline bool get_PROC1_INTE1_GPIO10_LEVEL_HIGH() volatile
{
return PROC1_INTE1 & (1u << 9u);
}
inline void set_PROC1_INTE1_GPIO10_LEVEL_HIGH() volatile
{
PROC1_INTE1 |= 1u << 9u;
}
inline void clear_PROC1_INTE1_GPIO10_LEVEL_HIGH() volatile
{
PROC1_INTE1 &= ~(1u << 9u);
}
inline void toggle_PROC1_INTE1_GPIO10_LEVEL_HIGH() volatile
{
PROC1_INTE1 ^= 1u << 9u;
}
inline bool get_PROC1_INTE1_GPIO10_EDGE_LOW() volatile
{
return PROC1_INTE1 & (1u << 10u);
}
inline void set_PROC1_INTE1_GPIO10_EDGE_LOW() volatile
{
PROC1_INTE1 |= 1u << 10u;
}
inline void clear_PROC1_INTE1_GPIO10_EDGE_LOW() volatile
{
PROC1_INTE1 &= ~(1u << 10u);
}
inline void toggle_PROC1_INTE1_GPIO10_EDGE_LOW() volatile
{
PROC1_INTE1 ^= 1u << 10u;
}
inline bool get_PROC1_INTE1_GPIO10_EDGE_HIGH() volatile
{
return PROC1_INTE1 & (1u << 11u);
}
inline void set_PROC1_INTE1_GPIO10_EDGE_HIGH() volatile
{
PROC1_INTE1 |= 1u << 11u;
}
inline void clear_PROC1_INTE1_GPIO10_EDGE_HIGH() volatile
{
PROC1_INTE1 &= ~(1u << 11u);
}
inline void toggle_PROC1_INTE1_GPIO10_EDGE_HIGH() volatile
{
PROC1_INTE1 ^= 1u << 11u;
}
inline bool get_PROC1_INTE1_GPIO11_LEVEL_LOW() volatile
{
return PROC1_INTE1 & (1u << 12u);
}
inline void set_PROC1_INTE1_GPIO11_LEVEL_LOW() volatile
{
PROC1_INTE1 |= 1u << 12u;
}
inline void clear_PROC1_INTE1_GPIO11_LEVEL_LOW() volatile
{
PROC1_INTE1 &= ~(1u << 12u);
}
inline void toggle_PROC1_INTE1_GPIO11_LEVEL_LOW() volatile
{
PROC1_INTE1 ^= 1u << 12u;
}
inline bool get_PROC1_INTE1_GPIO11_LEVEL_HIGH() volatile
{
return PROC1_INTE1 & (1u << 13u);
}
inline void set_PROC1_INTE1_GPIO11_LEVEL_HIGH() volatile
{
PROC1_INTE1 |= 1u << 13u;
}
inline void clear_PROC1_INTE1_GPIO11_LEVEL_HIGH() volatile
{
PROC1_INTE1 &= ~(1u << 13u);
}
inline void toggle_PROC1_INTE1_GPIO11_LEVEL_HIGH() volatile
{
PROC1_INTE1 ^= 1u << 13u;
}
inline bool get_PROC1_INTE1_GPIO11_EDGE_LOW() volatile
{
return PROC1_INTE1 & (1u << 14u);
}
inline void set_PROC1_INTE1_GPIO11_EDGE_LOW() volatile
{
PROC1_INTE1 |= 1u << 14u;
}
inline void clear_PROC1_INTE1_GPIO11_EDGE_LOW() volatile
{
PROC1_INTE1 &= ~(1u << 14u);
}
inline void toggle_PROC1_INTE1_GPIO11_EDGE_LOW() volatile
{
PROC1_INTE1 ^= 1u << 14u;
}
inline bool get_PROC1_INTE1_GPIO11_EDGE_HIGH() volatile
{
return PROC1_INTE1 & (1u << 15u);
}
inline void set_PROC1_INTE1_GPIO11_EDGE_HIGH() volatile
{
PROC1_INTE1 |= 1u << 15u;
}
inline void clear_PROC1_INTE1_GPIO11_EDGE_HIGH() volatile
{
PROC1_INTE1 &= ~(1u << 15u);
}
inline void toggle_PROC1_INTE1_GPIO11_EDGE_HIGH() volatile
{
PROC1_INTE1 ^= 1u << 15u;
}
inline bool get_PROC1_INTE1_GPIO12_LEVEL_LOW() volatile
{
return PROC1_INTE1 & (1u << 16u);
}
inline void set_PROC1_INTE1_GPIO12_LEVEL_LOW() volatile
{
PROC1_INTE1 |= 1u << 16u;
}
inline void clear_PROC1_INTE1_GPIO12_LEVEL_LOW() volatile
{
PROC1_INTE1 &= ~(1u << 16u);
}
inline void toggle_PROC1_INTE1_GPIO12_LEVEL_LOW() volatile
{
PROC1_INTE1 ^= 1u << 16u;
}
inline bool get_PROC1_INTE1_GPIO12_LEVEL_HIGH() volatile
{
return PROC1_INTE1 & (1u << 17u);
}
inline void set_PROC1_INTE1_GPIO12_LEVEL_HIGH() volatile
{
PROC1_INTE1 |= 1u << 17u;
}
inline void clear_PROC1_INTE1_GPIO12_LEVEL_HIGH() volatile
{
PROC1_INTE1 &= ~(1u << 17u);
}
inline void toggle_PROC1_INTE1_GPIO12_LEVEL_HIGH() volatile
{
PROC1_INTE1 ^= 1u << 17u;
}
inline bool get_PROC1_INTE1_GPIO12_EDGE_LOW() volatile
{
return PROC1_INTE1 & (1u << 18u);
}
inline void set_PROC1_INTE1_GPIO12_EDGE_LOW() volatile
{
PROC1_INTE1 |= 1u << 18u;
}
inline void clear_PROC1_INTE1_GPIO12_EDGE_LOW() volatile
{
PROC1_INTE1 &= ~(1u << 18u);
}
inline void toggle_PROC1_INTE1_GPIO12_EDGE_LOW() volatile
{
PROC1_INTE1 ^= 1u << 18u;
}
inline bool get_PROC1_INTE1_GPIO12_EDGE_HIGH() volatile
{
return PROC1_INTE1 & (1u << 19u);
}
inline void set_PROC1_INTE1_GPIO12_EDGE_HIGH() volatile
{
PROC1_INTE1 |= 1u << 19u;
}
inline void clear_PROC1_INTE1_GPIO12_EDGE_HIGH() volatile
{
PROC1_INTE1 &= ~(1u << 19u);
}
inline void toggle_PROC1_INTE1_GPIO12_EDGE_HIGH() volatile
{
PROC1_INTE1 ^= 1u << 19u;
}
inline bool get_PROC1_INTE1_GPIO13_LEVEL_LOW() volatile
{
return PROC1_INTE1 & (1u << 20u);
}
inline void set_PROC1_INTE1_GPIO13_LEVEL_LOW() volatile
{
PROC1_INTE1 |= 1u << 20u;
}
inline void clear_PROC1_INTE1_GPIO13_LEVEL_LOW() volatile
{
PROC1_INTE1 &= ~(1u << 20u);
}
inline void toggle_PROC1_INTE1_GPIO13_LEVEL_LOW() volatile
{
PROC1_INTE1 ^= 1u << 20u;
}
inline bool get_PROC1_INTE1_GPIO13_LEVEL_HIGH() volatile
{
return PROC1_INTE1 & (1u << 21u);
}
inline void set_PROC1_INTE1_GPIO13_LEVEL_HIGH() volatile
{
PROC1_INTE1 |= 1u << 21u;
}
inline void clear_PROC1_INTE1_GPIO13_LEVEL_HIGH() volatile
{
PROC1_INTE1 &= ~(1u << 21u);
}
inline void toggle_PROC1_INTE1_GPIO13_LEVEL_HIGH() volatile
{
PROC1_INTE1 ^= 1u << 21u;
}
inline bool get_PROC1_INTE1_GPIO13_EDGE_LOW() volatile
{
return PROC1_INTE1 & (1u << 22u);
}
inline void set_PROC1_INTE1_GPIO13_EDGE_LOW() volatile
{
PROC1_INTE1 |= 1u << 22u;
}
inline void clear_PROC1_INTE1_GPIO13_EDGE_LOW() volatile
{
PROC1_INTE1 &= ~(1u << 22u);
}
inline void toggle_PROC1_INTE1_GPIO13_EDGE_LOW() volatile
{
PROC1_INTE1 ^= 1u << 22u;
}
inline bool get_PROC1_INTE1_GPIO13_EDGE_HIGH() volatile
{
return PROC1_INTE1 & (1u << 23u);
}
inline void set_PROC1_INTE1_GPIO13_EDGE_HIGH() volatile
{
PROC1_INTE1 |= 1u << 23u;
}
inline void clear_PROC1_INTE1_GPIO13_EDGE_HIGH() volatile
{
PROC1_INTE1 &= ~(1u << 23u);
}
inline void toggle_PROC1_INTE1_GPIO13_EDGE_HIGH() volatile
{
PROC1_INTE1 ^= 1u << 23u;
}
inline bool get_PROC1_INTE1_GPIO14_LEVEL_LOW() volatile
{
return PROC1_INTE1 & (1u << 24u);
}
inline void set_PROC1_INTE1_GPIO14_LEVEL_LOW() volatile
{
PROC1_INTE1 |= 1u << 24u;
}
inline void clear_PROC1_INTE1_GPIO14_LEVEL_LOW() volatile
{
PROC1_INTE1 &= ~(1u << 24u);
}
inline void toggle_PROC1_INTE1_GPIO14_LEVEL_LOW() volatile
{
PROC1_INTE1 ^= 1u << 24u;
}
inline bool get_PROC1_INTE1_GPIO14_LEVEL_HIGH() volatile
{
return PROC1_INTE1 & (1u << 25u);
}
inline void set_PROC1_INTE1_GPIO14_LEVEL_HIGH() volatile
{
PROC1_INTE1 |= 1u << 25u;
}
inline void clear_PROC1_INTE1_GPIO14_LEVEL_HIGH() volatile
{
PROC1_INTE1 &= ~(1u << 25u);
}
inline void toggle_PROC1_INTE1_GPIO14_LEVEL_HIGH() volatile
{
PROC1_INTE1 ^= 1u << 25u;
}
inline bool get_PROC1_INTE1_GPIO14_EDGE_LOW() volatile
{
return PROC1_INTE1 & (1u << 26u);
}
inline void set_PROC1_INTE1_GPIO14_EDGE_LOW() volatile
{
PROC1_INTE1 |= 1u << 26u;
}
inline void clear_PROC1_INTE1_GPIO14_EDGE_LOW() volatile
{
PROC1_INTE1 &= ~(1u << 26u);
}
inline void toggle_PROC1_INTE1_GPIO14_EDGE_LOW() volatile
{
PROC1_INTE1 ^= 1u << 26u;
}
inline bool get_PROC1_INTE1_GPIO14_EDGE_HIGH() volatile
{
return PROC1_INTE1 & (1u << 27u);
}
inline void set_PROC1_INTE1_GPIO14_EDGE_HIGH() volatile
{
PROC1_INTE1 |= 1u << 27u;
}
inline void clear_PROC1_INTE1_GPIO14_EDGE_HIGH() volatile
{
PROC1_INTE1 &= ~(1u << 27u);
}
inline void toggle_PROC1_INTE1_GPIO14_EDGE_HIGH() volatile
{
PROC1_INTE1 ^= 1u << 27u;
}
inline bool get_PROC1_INTE1_GPIO15_LEVEL_LOW() volatile
{
return PROC1_INTE1 & (1u << 28u);
}
inline void set_PROC1_INTE1_GPIO15_LEVEL_LOW() volatile
{
PROC1_INTE1 |= 1u << 28u;
}
inline void clear_PROC1_INTE1_GPIO15_LEVEL_LOW() volatile
{
PROC1_INTE1 &= ~(1u << 28u);
}
inline void toggle_PROC1_INTE1_GPIO15_LEVEL_LOW() volatile
{
PROC1_INTE1 ^= 1u << 28u;
}
inline bool get_PROC1_INTE1_GPIO15_LEVEL_HIGH() volatile
{
return PROC1_INTE1 & (1u << 29u);
}
inline void set_PROC1_INTE1_GPIO15_LEVEL_HIGH() volatile
{
PROC1_INTE1 |= 1u << 29u;
}
inline void clear_PROC1_INTE1_GPIO15_LEVEL_HIGH() volatile
{
PROC1_INTE1 &= ~(1u << 29u);
}
inline void toggle_PROC1_INTE1_GPIO15_LEVEL_HIGH() volatile
{
PROC1_INTE1 ^= 1u << 29u;
}
inline bool get_PROC1_INTE1_GPIO15_EDGE_LOW() volatile
{
return PROC1_INTE1 & (1u << 30u);
}
inline void set_PROC1_INTE1_GPIO15_EDGE_LOW() volatile
{
PROC1_INTE1 |= 1u << 30u;
}
inline void clear_PROC1_INTE1_GPIO15_EDGE_LOW() volatile
{
PROC1_INTE1 &= ~(1u << 30u);
}
inline void toggle_PROC1_INTE1_GPIO15_EDGE_LOW() volatile
{
PROC1_INTE1 ^= 1u << 30u;
}
inline bool get_PROC1_INTE1_GPIO15_EDGE_HIGH() volatile
{
return PROC1_INTE1 & (1u << 31u);
}
inline void set_PROC1_INTE1_GPIO15_EDGE_HIGH() volatile
{
PROC1_INTE1 |= 1u << 31u;
}
inline void clear_PROC1_INTE1_GPIO15_EDGE_HIGH() volatile
{
PROC1_INTE1 &= ~(1u << 31u);
}
inline void toggle_PROC1_INTE1_GPIO15_EDGE_HIGH() volatile
{
PROC1_INTE1 ^= 1u << 31u;
}
inline void get_PROC1_INTE1(
bool &GPIO8_LEVEL_LOW, bool &GPIO8_LEVEL_HIGH, bool &GPIO8_EDGE_LOW,
bool &GPIO8_EDGE_HIGH, bool &GPIO9_LEVEL_LOW, bool &GPIO9_LEVEL_HIGH,
bool &GPIO9_EDGE_LOW, bool &GPIO9_EDGE_HIGH, bool &GPIO10_LEVEL_LOW,
bool &GPIO10_LEVEL_HIGH, bool &GPIO10_EDGE_LOW, bool &GPIO10_EDGE_HIGH,
bool &GPIO11_LEVEL_LOW, bool &GPIO11_LEVEL_HIGH, bool &GPIO11_EDGE_LOW,
bool &GPIO11_EDGE_HIGH, bool &GPIO12_LEVEL_LOW,
bool &GPIO12_LEVEL_HIGH, bool &GPIO12_EDGE_LOW, bool &GPIO12_EDGE_HIGH,
bool &GPIO13_LEVEL_LOW, bool &GPIO13_LEVEL_HIGH, bool &GPIO13_EDGE_LOW,
bool &GPIO13_EDGE_HIGH, bool &GPIO14_LEVEL_LOW,
bool &GPIO14_LEVEL_HIGH, bool &GPIO14_EDGE_LOW, bool &GPIO14_EDGE_HIGH,
bool &GPIO15_LEVEL_LOW, bool &GPIO15_LEVEL_HIGH, bool &GPIO15_EDGE_LOW,
bool &GPIO15_EDGE_HIGH) volatile
{
uint32_t curr = PROC1_INTE1;
GPIO8_LEVEL_LOW = curr & (1u << 0u);
GPIO8_LEVEL_HIGH = curr & (1u << 1u);
GPIO8_EDGE_LOW = curr & (1u << 2u);
GPIO8_EDGE_HIGH = curr & (1u << 3u);
GPIO9_LEVEL_LOW = curr & (1u << 4u);
GPIO9_LEVEL_HIGH = curr & (1u << 5u);
GPIO9_EDGE_LOW = curr & (1u << 6u);
GPIO9_EDGE_HIGH = curr & (1u << 7u);
GPIO10_LEVEL_LOW = curr & (1u << 8u);
GPIO10_LEVEL_HIGH = curr & (1u << 9u);
GPIO10_EDGE_LOW = curr & (1u << 10u);
GPIO10_EDGE_HIGH = curr & (1u << 11u);
GPIO11_LEVEL_LOW = curr & (1u << 12u);
GPIO11_LEVEL_HIGH = curr & (1u << 13u);
GPIO11_EDGE_LOW = curr & (1u << 14u);
GPIO11_EDGE_HIGH = curr & (1u << 15u);
GPIO12_LEVEL_LOW = curr & (1u << 16u);
GPIO12_LEVEL_HIGH = curr & (1u << 17u);
GPIO12_EDGE_LOW = curr & (1u << 18u);
GPIO12_EDGE_HIGH = curr & (1u << 19u);
GPIO13_LEVEL_LOW = curr & (1u << 20u);
GPIO13_LEVEL_HIGH = curr & (1u << 21u);
GPIO13_EDGE_LOW = curr & (1u << 22u);
GPIO13_EDGE_HIGH = curr & (1u << 23u);
GPIO14_LEVEL_LOW = curr & (1u << 24u);
GPIO14_LEVEL_HIGH = curr & (1u << 25u);
GPIO14_EDGE_LOW = curr & (1u << 26u);
GPIO14_EDGE_HIGH = curr & (1u << 27u);
GPIO15_LEVEL_LOW = curr & (1u << 28u);
GPIO15_LEVEL_HIGH = curr & (1u << 29u);
GPIO15_EDGE_LOW = curr & (1u << 30u);
GPIO15_EDGE_HIGH = curr & (1u << 31u);
}
inline void set_PROC1_INTE1(
bool GPIO8_LEVEL_LOW, bool GPIO8_LEVEL_HIGH, bool GPIO8_EDGE_LOW,
bool GPIO8_EDGE_HIGH, bool GPIO9_LEVEL_LOW, bool GPIO9_LEVEL_HIGH,
bool GPIO9_EDGE_LOW, bool GPIO9_EDGE_HIGH, bool GPIO10_LEVEL_LOW,
bool GPIO10_LEVEL_HIGH, bool GPIO10_EDGE_LOW, bool GPIO10_EDGE_HIGH,
bool GPIO11_LEVEL_LOW, bool GPIO11_LEVEL_HIGH, bool GPIO11_EDGE_LOW,
bool GPIO11_EDGE_HIGH, bool GPIO12_LEVEL_LOW, bool GPIO12_LEVEL_HIGH,
bool GPIO12_EDGE_LOW, bool GPIO12_EDGE_HIGH, bool GPIO13_LEVEL_LOW,
bool GPIO13_LEVEL_HIGH, bool GPIO13_EDGE_LOW, bool GPIO13_EDGE_HIGH,
bool GPIO14_LEVEL_LOW, bool GPIO14_LEVEL_HIGH, bool GPIO14_EDGE_LOW,
bool GPIO14_EDGE_HIGH, bool GPIO15_LEVEL_LOW, bool GPIO15_LEVEL_HIGH,
bool GPIO15_EDGE_LOW, bool GPIO15_EDGE_HIGH) volatile
{
uint32_t curr = PROC1_INTE1;
curr &= ~(0b1u << 0u);
curr |= (GPIO8_LEVEL_LOW & 0b1u) << 0u;
curr &= ~(0b1u << 1u);
curr |= (GPIO8_LEVEL_HIGH & 0b1u) << 1u;
curr &= ~(0b1u << 2u);
curr |= (GPIO8_EDGE_LOW & 0b1u) << 2u;
curr &= ~(0b1u << 3u);
curr |= (GPIO8_EDGE_HIGH & 0b1u) << 3u;
curr &= ~(0b1u << 4u);
curr |= (GPIO9_LEVEL_LOW & 0b1u) << 4u;
curr &= ~(0b1u << 5u);
curr |= (GPIO9_LEVEL_HIGH & 0b1u) << 5u;
curr &= ~(0b1u << 6u);
curr |= (GPIO9_EDGE_LOW & 0b1u) << 6u;
curr &= ~(0b1u << 7u);
curr |= (GPIO9_EDGE_HIGH & 0b1u) << 7u;
curr &= ~(0b1u << 8u);
curr |= (GPIO10_LEVEL_LOW & 0b1u) << 8u;
curr &= ~(0b1u << 9u);
curr |= (GPIO10_LEVEL_HIGH & 0b1u) << 9u;
curr &= ~(0b1u << 10u);
curr |= (GPIO10_EDGE_LOW & 0b1u) << 10u;
curr &= ~(0b1u << 11u);
curr |= (GPIO10_EDGE_HIGH & 0b1u) << 11u;
curr &= ~(0b1u << 12u);
curr |= (GPIO11_LEVEL_LOW & 0b1u) << 12u;
curr &= ~(0b1u << 13u);
curr |= (GPIO11_LEVEL_HIGH & 0b1u) << 13u;
curr &= ~(0b1u << 14u);
curr |= (GPIO11_EDGE_LOW & 0b1u) << 14u;
curr &= ~(0b1u << 15u);
curr |= (GPIO11_EDGE_HIGH & 0b1u) << 15u;
curr &= ~(0b1u << 16u);
curr |= (GPIO12_LEVEL_LOW & 0b1u) << 16u;
curr &= ~(0b1u << 17u);
curr |= (GPIO12_LEVEL_HIGH & 0b1u) << 17u;
curr &= ~(0b1u << 18u);
curr |= (GPIO12_EDGE_LOW & 0b1u) << 18u;
curr &= ~(0b1u << 19u);
curr |= (GPIO12_EDGE_HIGH & 0b1u) << 19u;
curr &= ~(0b1u << 20u);
curr |= (GPIO13_LEVEL_LOW & 0b1u) << 20u;
curr &= ~(0b1u << 21u);
curr |= (GPIO13_LEVEL_HIGH & 0b1u) << 21u;
curr &= ~(0b1u << 22u);
curr |= (GPIO13_EDGE_LOW & 0b1u) << 22u;
curr &= ~(0b1u << 23u);
curr |= (GPIO13_EDGE_HIGH & 0b1u) << 23u;
curr &= ~(0b1u << 24u);
curr |= (GPIO14_LEVEL_LOW & 0b1u) << 24u;
curr &= ~(0b1u << 25u);
curr |= (GPIO14_LEVEL_HIGH & 0b1u) << 25u;
curr &= ~(0b1u << 26u);
curr |= (GPIO14_EDGE_LOW & 0b1u) << 26u;
curr &= ~(0b1u << 27u);
curr |= (GPIO14_EDGE_HIGH & 0b1u) << 27u;
curr &= ~(0b1u << 28u);
curr |= (GPIO15_LEVEL_LOW & 0b1u) << 28u;
curr &= ~(0b1u << 29u);
curr |= (GPIO15_LEVEL_HIGH & 0b1u) << 29u;
curr &= ~(0b1u << 30u);
curr |= (GPIO15_EDGE_LOW & 0b1u) << 30u;
curr &= ~(0b1u << 31u);
curr |= (GPIO15_EDGE_HIGH & 0b1u) << 31u;
PROC1_INTE1 = curr;
}
inline bool get_PROC1_INTE2_GPIO16_LEVEL_LOW() volatile
{
return PROC1_INTE2 & (1u << 0u);
}
inline void set_PROC1_INTE2_GPIO16_LEVEL_LOW() volatile
{
PROC1_INTE2 |= 1u << 0u;
}
inline void clear_PROC1_INTE2_GPIO16_LEVEL_LOW() volatile
{
PROC1_INTE2 &= ~(1u << 0u);
}
inline void toggle_PROC1_INTE2_GPIO16_LEVEL_LOW() volatile
{
PROC1_INTE2 ^= 1u << 0u;
}
inline bool get_PROC1_INTE2_GPIO16_LEVEL_HIGH() volatile
{
return PROC1_INTE2 & (1u << 1u);
}
inline void set_PROC1_INTE2_GPIO16_LEVEL_HIGH() volatile
{
PROC1_INTE2 |= 1u << 1u;
}
inline void clear_PROC1_INTE2_GPIO16_LEVEL_HIGH() volatile
{
PROC1_INTE2 &= ~(1u << 1u);
}
inline void toggle_PROC1_INTE2_GPIO16_LEVEL_HIGH() volatile
{
PROC1_INTE2 ^= 1u << 1u;
}
inline bool get_PROC1_INTE2_GPIO16_EDGE_LOW() volatile
{
return PROC1_INTE2 & (1u << 2u);
}
inline void set_PROC1_INTE2_GPIO16_EDGE_LOW() volatile
{
PROC1_INTE2 |= 1u << 2u;
}
inline void clear_PROC1_INTE2_GPIO16_EDGE_LOW() volatile
{
PROC1_INTE2 &= ~(1u << 2u);
}
inline void toggle_PROC1_INTE2_GPIO16_EDGE_LOW() volatile
{
PROC1_INTE2 ^= 1u << 2u;
}
inline bool get_PROC1_INTE2_GPIO16_EDGE_HIGH() volatile
{
return PROC1_INTE2 & (1u << 3u);
}
inline void set_PROC1_INTE2_GPIO16_EDGE_HIGH() volatile
{
PROC1_INTE2 |= 1u << 3u;
}
inline void clear_PROC1_INTE2_GPIO16_EDGE_HIGH() volatile
{
PROC1_INTE2 &= ~(1u << 3u);
}
inline void toggle_PROC1_INTE2_GPIO16_EDGE_HIGH() volatile
{
PROC1_INTE2 ^= 1u << 3u;
}
inline bool get_PROC1_INTE2_GPIO17_LEVEL_LOW() volatile
{
return PROC1_INTE2 & (1u << 4u);
}
inline void set_PROC1_INTE2_GPIO17_LEVEL_LOW() volatile
{
PROC1_INTE2 |= 1u << 4u;
}
inline void clear_PROC1_INTE2_GPIO17_LEVEL_LOW() volatile
{
PROC1_INTE2 &= ~(1u << 4u);
}
inline void toggle_PROC1_INTE2_GPIO17_LEVEL_LOW() volatile
{
PROC1_INTE2 ^= 1u << 4u;
}
inline bool get_PROC1_INTE2_GPIO17_LEVEL_HIGH() volatile
{
return PROC1_INTE2 & (1u << 5u);
}
inline void set_PROC1_INTE2_GPIO17_LEVEL_HIGH() volatile
{
PROC1_INTE2 |= 1u << 5u;
}
inline void clear_PROC1_INTE2_GPIO17_LEVEL_HIGH() volatile
{
PROC1_INTE2 &= ~(1u << 5u);
}
inline void toggle_PROC1_INTE2_GPIO17_LEVEL_HIGH() volatile
{
PROC1_INTE2 ^= 1u << 5u;
}
inline bool get_PROC1_INTE2_GPIO17_EDGE_LOW() volatile
{
return PROC1_INTE2 & (1u << 6u);
}
inline void set_PROC1_INTE2_GPIO17_EDGE_LOW() volatile
{
PROC1_INTE2 |= 1u << 6u;
}
inline void clear_PROC1_INTE2_GPIO17_EDGE_LOW() volatile
{
PROC1_INTE2 &= ~(1u << 6u);
}
inline void toggle_PROC1_INTE2_GPIO17_EDGE_LOW() volatile
{
PROC1_INTE2 ^= 1u << 6u;
}
inline bool get_PROC1_INTE2_GPIO17_EDGE_HIGH() volatile
{
return PROC1_INTE2 & (1u << 7u);
}
inline void set_PROC1_INTE2_GPIO17_EDGE_HIGH() volatile
{
PROC1_INTE2 |= 1u << 7u;
}
inline void clear_PROC1_INTE2_GPIO17_EDGE_HIGH() volatile
{
PROC1_INTE2 &= ~(1u << 7u);
}
inline void toggle_PROC1_INTE2_GPIO17_EDGE_HIGH() volatile
{
PROC1_INTE2 ^= 1u << 7u;
}
inline bool get_PROC1_INTE2_GPIO18_LEVEL_LOW() volatile
{
return PROC1_INTE2 & (1u << 8u);
}
inline void set_PROC1_INTE2_GPIO18_LEVEL_LOW() volatile
{
PROC1_INTE2 |= 1u << 8u;
}
inline void clear_PROC1_INTE2_GPIO18_LEVEL_LOW() volatile
{
PROC1_INTE2 &= ~(1u << 8u);
}
inline void toggle_PROC1_INTE2_GPIO18_LEVEL_LOW() volatile
{
PROC1_INTE2 ^= 1u << 8u;
}
inline bool get_PROC1_INTE2_GPIO18_LEVEL_HIGH() volatile
{
return PROC1_INTE2 & (1u << 9u);
}
inline void set_PROC1_INTE2_GPIO18_LEVEL_HIGH() volatile
{
PROC1_INTE2 |= 1u << 9u;
}
inline void clear_PROC1_INTE2_GPIO18_LEVEL_HIGH() volatile
{
PROC1_INTE2 &= ~(1u << 9u);
}
inline void toggle_PROC1_INTE2_GPIO18_LEVEL_HIGH() volatile
{
PROC1_INTE2 ^= 1u << 9u;
}
inline bool get_PROC1_INTE2_GPIO18_EDGE_LOW() volatile
{
return PROC1_INTE2 & (1u << 10u);
}
inline void set_PROC1_INTE2_GPIO18_EDGE_LOW() volatile
{
PROC1_INTE2 |= 1u << 10u;
}
inline void clear_PROC1_INTE2_GPIO18_EDGE_LOW() volatile
{
PROC1_INTE2 &= ~(1u << 10u);
}
inline void toggle_PROC1_INTE2_GPIO18_EDGE_LOW() volatile
{
PROC1_INTE2 ^= 1u << 10u;
}
inline bool get_PROC1_INTE2_GPIO18_EDGE_HIGH() volatile
{
return PROC1_INTE2 & (1u << 11u);
}
inline void set_PROC1_INTE2_GPIO18_EDGE_HIGH() volatile
{
PROC1_INTE2 |= 1u << 11u;
}
inline void clear_PROC1_INTE2_GPIO18_EDGE_HIGH() volatile
{
PROC1_INTE2 &= ~(1u << 11u);
}
inline void toggle_PROC1_INTE2_GPIO18_EDGE_HIGH() volatile
{
PROC1_INTE2 ^= 1u << 11u;
}
inline bool get_PROC1_INTE2_GPIO19_LEVEL_LOW() volatile
{
return PROC1_INTE2 & (1u << 12u);
}
inline void set_PROC1_INTE2_GPIO19_LEVEL_LOW() volatile
{
PROC1_INTE2 |= 1u << 12u;
}
inline void clear_PROC1_INTE2_GPIO19_LEVEL_LOW() volatile
{
PROC1_INTE2 &= ~(1u << 12u);
}
inline void toggle_PROC1_INTE2_GPIO19_LEVEL_LOW() volatile
{
PROC1_INTE2 ^= 1u << 12u;
}
inline bool get_PROC1_INTE2_GPIO19_LEVEL_HIGH() volatile
{
return PROC1_INTE2 & (1u << 13u);
}
inline void set_PROC1_INTE2_GPIO19_LEVEL_HIGH() volatile
{
PROC1_INTE2 |= 1u << 13u;
}
inline void clear_PROC1_INTE2_GPIO19_LEVEL_HIGH() volatile
{
PROC1_INTE2 &= ~(1u << 13u);
}
inline void toggle_PROC1_INTE2_GPIO19_LEVEL_HIGH() volatile
{
PROC1_INTE2 ^= 1u << 13u;
}
inline bool get_PROC1_INTE2_GPIO19_EDGE_LOW() volatile
{
return PROC1_INTE2 & (1u << 14u);
}
inline void set_PROC1_INTE2_GPIO19_EDGE_LOW() volatile
{
PROC1_INTE2 |= 1u << 14u;
}
inline void clear_PROC1_INTE2_GPIO19_EDGE_LOW() volatile
{
PROC1_INTE2 &= ~(1u << 14u);
}
inline void toggle_PROC1_INTE2_GPIO19_EDGE_LOW() volatile
{
PROC1_INTE2 ^= 1u << 14u;
}
inline bool get_PROC1_INTE2_GPIO19_EDGE_HIGH() volatile
{
return PROC1_INTE2 & (1u << 15u);
}
inline void set_PROC1_INTE2_GPIO19_EDGE_HIGH() volatile
{
PROC1_INTE2 |= 1u << 15u;
}
inline void clear_PROC1_INTE2_GPIO19_EDGE_HIGH() volatile
{
PROC1_INTE2 &= ~(1u << 15u);
}
inline void toggle_PROC1_INTE2_GPIO19_EDGE_HIGH() volatile
{
PROC1_INTE2 ^= 1u << 15u;
}
inline bool get_PROC1_INTE2_GPIO20_LEVEL_LOW() volatile
{
return PROC1_INTE2 & (1u << 16u);
}
inline void set_PROC1_INTE2_GPIO20_LEVEL_LOW() volatile
{
PROC1_INTE2 |= 1u << 16u;
}
inline void clear_PROC1_INTE2_GPIO20_LEVEL_LOW() volatile
{
PROC1_INTE2 &= ~(1u << 16u);
}
inline void toggle_PROC1_INTE2_GPIO20_LEVEL_LOW() volatile
{
PROC1_INTE2 ^= 1u << 16u;
}
inline bool get_PROC1_INTE2_GPIO20_LEVEL_HIGH() volatile
{
return PROC1_INTE2 & (1u << 17u);
}
inline void set_PROC1_INTE2_GPIO20_LEVEL_HIGH() volatile
{
PROC1_INTE2 |= 1u << 17u;
}
inline void clear_PROC1_INTE2_GPIO20_LEVEL_HIGH() volatile
{
PROC1_INTE2 &= ~(1u << 17u);
}
inline void toggle_PROC1_INTE2_GPIO20_LEVEL_HIGH() volatile
{
PROC1_INTE2 ^= 1u << 17u;
}
inline bool get_PROC1_INTE2_GPIO20_EDGE_LOW() volatile
{
return PROC1_INTE2 & (1u << 18u);
}
inline void set_PROC1_INTE2_GPIO20_EDGE_LOW() volatile
{
PROC1_INTE2 |= 1u << 18u;
}
inline void clear_PROC1_INTE2_GPIO20_EDGE_LOW() volatile
{
PROC1_INTE2 &= ~(1u << 18u);
}
inline void toggle_PROC1_INTE2_GPIO20_EDGE_LOW() volatile
{
PROC1_INTE2 ^= 1u << 18u;
}
inline bool get_PROC1_INTE2_GPIO20_EDGE_HIGH() volatile
{
return PROC1_INTE2 & (1u << 19u);
}
inline void set_PROC1_INTE2_GPIO20_EDGE_HIGH() volatile
{
PROC1_INTE2 |= 1u << 19u;
}
inline void clear_PROC1_INTE2_GPIO20_EDGE_HIGH() volatile
{
PROC1_INTE2 &= ~(1u << 19u);
}
inline void toggle_PROC1_INTE2_GPIO20_EDGE_HIGH() volatile
{
PROC1_INTE2 ^= 1u << 19u;
}
inline bool get_PROC1_INTE2_GPIO21_LEVEL_LOW() volatile
{
return PROC1_INTE2 & (1u << 20u);
}
inline void set_PROC1_INTE2_GPIO21_LEVEL_LOW() volatile
{
PROC1_INTE2 |= 1u << 20u;
}
inline void clear_PROC1_INTE2_GPIO21_LEVEL_LOW() volatile
{
PROC1_INTE2 &= ~(1u << 20u);
}
inline void toggle_PROC1_INTE2_GPIO21_LEVEL_LOW() volatile
{
PROC1_INTE2 ^= 1u << 20u;
}
inline bool get_PROC1_INTE2_GPIO21_LEVEL_HIGH() volatile
{
return PROC1_INTE2 & (1u << 21u);
}
inline void set_PROC1_INTE2_GPIO21_LEVEL_HIGH() volatile
{
PROC1_INTE2 |= 1u << 21u;
}
inline void clear_PROC1_INTE2_GPIO21_LEVEL_HIGH() volatile
{
PROC1_INTE2 &= ~(1u << 21u);
}
inline void toggle_PROC1_INTE2_GPIO21_LEVEL_HIGH() volatile
{
PROC1_INTE2 ^= 1u << 21u;
}
inline bool get_PROC1_INTE2_GPIO21_EDGE_LOW() volatile
{
return PROC1_INTE2 & (1u << 22u);
}
inline void set_PROC1_INTE2_GPIO21_EDGE_LOW() volatile
{
PROC1_INTE2 |= 1u << 22u;
}
inline void clear_PROC1_INTE2_GPIO21_EDGE_LOW() volatile
{
PROC1_INTE2 &= ~(1u << 22u);
}
inline void toggle_PROC1_INTE2_GPIO21_EDGE_LOW() volatile
{
PROC1_INTE2 ^= 1u << 22u;
}
inline bool get_PROC1_INTE2_GPIO21_EDGE_HIGH() volatile
{
return PROC1_INTE2 & (1u << 23u);
}
inline void set_PROC1_INTE2_GPIO21_EDGE_HIGH() volatile
{
PROC1_INTE2 |= 1u << 23u;
}
inline void clear_PROC1_INTE2_GPIO21_EDGE_HIGH() volatile
{
PROC1_INTE2 &= ~(1u << 23u);
}
inline void toggle_PROC1_INTE2_GPIO21_EDGE_HIGH() volatile
{
PROC1_INTE2 ^= 1u << 23u;
}
inline bool get_PROC1_INTE2_GPIO22_LEVEL_LOW() volatile
{
return PROC1_INTE2 & (1u << 24u);
}
inline void set_PROC1_INTE2_GPIO22_LEVEL_LOW() volatile
{
PROC1_INTE2 |= 1u << 24u;
}
inline void clear_PROC1_INTE2_GPIO22_LEVEL_LOW() volatile
{
PROC1_INTE2 &= ~(1u << 24u);
}
inline void toggle_PROC1_INTE2_GPIO22_LEVEL_LOW() volatile
{
PROC1_INTE2 ^= 1u << 24u;
}
inline bool get_PROC1_INTE2_GPIO22_LEVEL_HIGH() volatile
{
return PROC1_INTE2 & (1u << 25u);
}
inline void set_PROC1_INTE2_GPIO22_LEVEL_HIGH() volatile
{
PROC1_INTE2 |= 1u << 25u;
}
inline void clear_PROC1_INTE2_GPIO22_LEVEL_HIGH() volatile
{
PROC1_INTE2 &= ~(1u << 25u);
}
inline void toggle_PROC1_INTE2_GPIO22_LEVEL_HIGH() volatile
{
PROC1_INTE2 ^= 1u << 25u;
}
inline bool get_PROC1_INTE2_GPIO22_EDGE_LOW() volatile
{
return PROC1_INTE2 & (1u << 26u);
}
inline void set_PROC1_INTE2_GPIO22_EDGE_LOW() volatile
{
PROC1_INTE2 |= 1u << 26u;
}
inline void clear_PROC1_INTE2_GPIO22_EDGE_LOW() volatile
{
PROC1_INTE2 &= ~(1u << 26u);
}
inline void toggle_PROC1_INTE2_GPIO22_EDGE_LOW() volatile
{
PROC1_INTE2 ^= 1u << 26u;
}
inline bool get_PROC1_INTE2_GPIO22_EDGE_HIGH() volatile
{
return PROC1_INTE2 & (1u << 27u);
}
inline void set_PROC1_INTE2_GPIO22_EDGE_HIGH() volatile
{
PROC1_INTE2 |= 1u << 27u;
}
inline void clear_PROC1_INTE2_GPIO22_EDGE_HIGH() volatile
{
PROC1_INTE2 &= ~(1u << 27u);
}
inline void toggle_PROC1_INTE2_GPIO22_EDGE_HIGH() volatile
{
PROC1_INTE2 ^= 1u << 27u;
}
inline bool get_PROC1_INTE2_GPIO23_LEVEL_LOW() volatile
{
return PROC1_INTE2 & (1u << 28u);
}
inline void set_PROC1_INTE2_GPIO23_LEVEL_LOW() volatile
{
PROC1_INTE2 |= 1u << 28u;
}
inline void clear_PROC1_INTE2_GPIO23_LEVEL_LOW() volatile
{
PROC1_INTE2 &= ~(1u << 28u);
}
inline void toggle_PROC1_INTE2_GPIO23_LEVEL_LOW() volatile
{
PROC1_INTE2 ^= 1u << 28u;
}
inline bool get_PROC1_INTE2_GPIO23_LEVEL_HIGH() volatile
{
return PROC1_INTE2 & (1u << 29u);
}
inline void set_PROC1_INTE2_GPIO23_LEVEL_HIGH() volatile
{
PROC1_INTE2 |= 1u << 29u;
}
inline void clear_PROC1_INTE2_GPIO23_LEVEL_HIGH() volatile
{
PROC1_INTE2 &= ~(1u << 29u);
}
inline void toggle_PROC1_INTE2_GPIO23_LEVEL_HIGH() volatile
{
PROC1_INTE2 ^= 1u << 29u;
}
inline bool get_PROC1_INTE2_GPIO23_EDGE_LOW() volatile
{
return PROC1_INTE2 & (1u << 30u);
}
inline void set_PROC1_INTE2_GPIO23_EDGE_LOW() volatile
{
PROC1_INTE2 |= 1u << 30u;
}
inline void clear_PROC1_INTE2_GPIO23_EDGE_LOW() volatile
{
PROC1_INTE2 &= ~(1u << 30u);
}
inline void toggle_PROC1_INTE2_GPIO23_EDGE_LOW() volatile
{
PROC1_INTE2 ^= 1u << 30u;
}
inline bool get_PROC1_INTE2_GPIO23_EDGE_HIGH() volatile
{
return PROC1_INTE2 & (1u << 31u);
}
inline void set_PROC1_INTE2_GPIO23_EDGE_HIGH() volatile
{
PROC1_INTE2 |= 1u << 31u;
}
inline void clear_PROC1_INTE2_GPIO23_EDGE_HIGH() volatile
{
PROC1_INTE2 &= ~(1u << 31u);
}
inline void toggle_PROC1_INTE2_GPIO23_EDGE_HIGH() volatile
{
PROC1_INTE2 ^= 1u << 31u;
}
inline void get_PROC1_INTE2(
bool &GPIO16_LEVEL_LOW, bool &GPIO16_LEVEL_HIGH, bool &GPIO16_EDGE_LOW,
bool &GPIO16_EDGE_HIGH, bool &GPIO17_LEVEL_LOW,
bool &GPIO17_LEVEL_HIGH, bool &GPIO17_EDGE_LOW, bool &GPIO17_EDGE_HIGH,
bool &GPIO18_LEVEL_LOW, bool &GPIO18_LEVEL_HIGH, bool &GPIO18_EDGE_LOW,
bool &GPIO18_EDGE_HIGH, bool &GPIO19_LEVEL_LOW,
bool &GPIO19_LEVEL_HIGH, bool &GPIO19_EDGE_LOW, bool &GPIO19_EDGE_HIGH,
bool &GPIO20_LEVEL_LOW, bool &GPIO20_LEVEL_HIGH, bool &GPIO20_EDGE_LOW,
bool &GPIO20_EDGE_HIGH, bool &GPIO21_LEVEL_LOW,
bool &GPIO21_LEVEL_HIGH, bool &GPIO21_EDGE_LOW, bool &GPIO21_EDGE_HIGH,
bool &GPIO22_LEVEL_LOW, bool &GPIO22_LEVEL_HIGH, bool &GPIO22_EDGE_LOW,
bool &GPIO22_EDGE_HIGH, bool &GPIO23_LEVEL_LOW,
bool &GPIO23_LEVEL_HIGH, bool &GPIO23_EDGE_LOW,
bool &GPIO23_EDGE_HIGH) volatile
{
uint32_t curr = PROC1_INTE2;
GPIO16_LEVEL_LOW = curr & (1u << 0u);
GPIO16_LEVEL_HIGH = curr & (1u << 1u);
GPIO16_EDGE_LOW = curr & (1u << 2u);
GPIO16_EDGE_HIGH = curr & (1u << 3u);
GPIO17_LEVEL_LOW = curr & (1u << 4u);
GPIO17_LEVEL_HIGH = curr & (1u << 5u);
GPIO17_EDGE_LOW = curr & (1u << 6u);
GPIO17_EDGE_HIGH = curr & (1u << 7u);
GPIO18_LEVEL_LOW = curr & (1u << 8u);
GPIO18_LEVEL_HIGH = curr & (1u << 9u);
GPIO18_EDGE_LOW = curr & (1u << 10u);
GPIO18_EDGE_HIGH = curr & (1u << 11u);
GPIO19_LEVEL_LOW = curr & (1u << 12u);
GPIO19_LEVEL_HIGH = curr & (1u << 13u);
GPIO19_EDGE_LOW = curr & (1u << 14u);
GPIO19_EDGE_HIGH = curr & (1u << 15u);
GPIO20_LEVEL_LOW = curr & (1u << 16u);
GPIO20_LEVEL_HIGH = curr & (1u << 17u);
GPIO20_EDGE_LOW = curr & (1u << 18u);
GPIO20_EDGE_HIGH = curr & (1u << 19u);
GPIO21_LEVEL_LOW = curr & (1u << 20u);
GPIO21_LEVEL_HIGH = curr & (1u << 21u);
GPIO21_EDGE_LOW = curr & (1u << 22u);
GPIO21_EDGE_HIGH = curr & (1u << 23u);
GPIO22_LEVEL_LOW = curr & (1u << 24u);
GPIO22_LEVEL_HIGH = curr & (1u << 25u);
GPIO22_EDGE_LOW = curr & (1u << 26u);
GPIO22_EDGE_HIGH = curr & (1u << 27u);
GPIO23_LEVEL_LOW = curr & (1u << 28u);
GPIO23_LEVEL_HIGH = curr & (1u << 29u);
GPIO23_EDGE_LOW = curr & (1u << 30u);
GPIO23_EDGE_HIGH = curr & (1u << 31u);
}
inline void set_PROC1_INTE2(
bool GPIO16_LEVEL_LOW, bool GPIO16_LEVEL_HIGH, bool GPIO16_EDGE_LOW,
bool GPIO16_EDGE_HIGH, bool GPIO17_LEVEL_LOW, bool GPIO17_LEVEL_HIGH,
bool GPIO17_EDGE_LOW, bool GPIO17_EDGE_HIGH, bool GPIO18_LEVEL_LOW,
bool GPIO18_LEVEL_HIGH, bool GPIO18_EDGE_LOW, bool GPIO18_EDGE_HIGH,
bool GPIO19_LEVEL_LOW, bool GPIO19_LEVEL_HIGH, bool GPIO19_EDGE_LOW,
bool GPIO19_EDGE_HIGH, bool GPIO20_LEVEL_LOW, bool GPIO20_LEVEL_HIGH,
bool GPIO20_EDGE_LOW, bool GPIO20_EDGE_HIGH, bool GPIO21_LEVEL_LOW,
bool GPIO21_LEVEL_HIGH, bool GPIO21_EDGE_LOW, bool GPIO21_EDGE_HIGH,
bool GPIO22_LEVEL_LOW, bool GPIO22_LEVEL_HIGH, bool GPIO22_EDGE_LOW,
bool GPIO22_EDGE_HIGH, bool GPIO23_LEVEL_LOW, bool GPIO23_LEVEL_HIGH,
bool GPIO23_EDGE_LOW, bool GPIO23_EDGE_HIGH) volatile
{
uint32_t curr = PROC1_INTE2;
curr &= ~(0b1u << 0u);
curr |= (GPIO16_LEVEL_LOW & 0b1u) << 0u;
curr &= ~(0b1u << 1u);
curr |= (GPIO16_LEVEL_HIGH & 0b1u) << 1u;
curr &= ~(0b1u << 2u);
curr |= (GPIO16_EDGE_LOW & 0b1u) << 2u;
curr &= ~(0b1u << 3u);
curr |= (GPIO16_EDGE_HIGH & 0b1u) << 3u;
curr &= ~(0b1u << 4u);
curr |= (GPIO17_LEVEL_LOW & 0b1u) << 4u;
curr &= ~(0b1u << 5u);
curr |= (GPIO17_LEVEL_HIGH & 0b1u) << 5u;
curr &= ~(0b1u << 6u);
curr |= (GPIO17_EDGE_LOW & 0b1u) << 6u;
curr &= ~(0b1u << 7u);
curr |= (GPIO17_EDGE_HIGH & 0b1u) << 7u;
curr &= ~(0b1u << 8u);
curr |= (GPIO18_LEVEL_LOW & 0b1u) << 8u;
curr &= ~(0b1u << 9u);
curr |= (GPIO18_LEVEL_HIGH & 0b1u) << 9u;
curr &= ~(0b1u << 10u);
curr |= (GPIO18_EDGE_LOW & 0b1u) << 10u;
curr &= ~(0b1u << 11u);
curr |= (GPIO18_EDGE_HIGH & 0b1u) << 11u;
curr &= ~(0b1u << 12u);
curr |= (GPIO19_LEVEL_LOW & 0b1u) << 12u;
curr &= ~(0b1u << 13u);
curr |= (GPIO19_LEVEL_HIGH & 0b1u) << 13u;
curr &= ~(0b1u << 14u);
curr |= (GPIO19_EDGE_LOW & 0b1u) << 14u;
curr &= ~(0b1u << 15u);
curr |= (GPIO19_EDGE_HIGH & 0b1u) << 15u;
curr &= ~(0b1u << 16u);
curr |= (GPIO20_LEVEL_LOW & 0b1u) << 16u;
curr &= ~(0b1u << 17u);
curr |= (GPIO20_LEVEL_HIGH & 0b1u) << 17u;
curr &= ~(0b1u << 18u);
curr |= (GPIO20_EDGE_LOW & 0b1u) << 18u;
curr &= ~(0b1u << 19u);
curr |= (GPIO20_EDGE_HIGH & 0b1u) << 19u;
curr &= ~(0b1u << 20u);
curr |= (GPIO21_LEVEL_LOW & 0b1u) << 20u;
curr &= ~(0b1u << 21u);
curr |= (GPIO21_LEVEL_HIGH & 0b1u) << 21u;
curr &= ~(0b1u << 22u);
curr |= (GPIO21_EDGE_LOW & 0b1u) << 22u;
curr &= ~(0b1u << 23u);
curr |= (GPIO21_EDGE_HIGH & 0b1u) << 23u;
curr &= ~(0b1u << 24u);
curr |= (GPIO22_LEVEL_LOW & 0b1u) << 24u;
curr &= ~(0b1u << 25u);
curr |= (GPIO22_LEVEL_HIGH & 0b1u) << 25u;
curr &= ~(0b1u << 26u);
curr |= (GPIO22_EDGE_LOW & 0b1u) << 26u;
curr &= ~(0b1u << 27u);
curr |= (GPIO22_EDGE_HIGH & 0b1u) << 27u;
curr &= ~(0b1u << 28u);
curr |= (GPIO23_LEVEL_LOW & 0b1u) << 28u;
curr &= ~(0b1u << 29u);
curr |= (GPIO23_LEVEL_HIGH & 0b1u) << 29u;
curr &= ~(0b1u << 30u);
curr |= (GPIO23_EDGE_LOW & 0b1u) << 30u;
curr &= ~(0b1u << 31u);
curr |= (GPIO23_EDGE_HIGH & 0b1u) << 31u;
PROC1_INTE2 = curr;
}
inline bool get_PROC1_INTE3_GPIO24_LEVEL_LOW() volatile
{
return PROC1_INTE3 & (1u << 0u);
}
inline void set_PROC1_INTE3_GPIO24_LEVEL_LOW() volatile
{
PROC1_INTE3 |= 1u << 0u;
}
inline void clear_PROC1_INTE3_GPIO24_LEVEL_LOW() volatile
{
PROC1_INTE3 &= ~(1u << 0u);
}
inline void toggle_PROC1_INTE3_GPIO24_LEVEL_LOW() volatile
{
PROC1_INTE3 ^= 1u << 0u;
}
inline bool get_PROC1_INTE3_GPIO24_LEVEL_HIGH() volatile
{
return PROC1_INTE3 & (1u << 1u);
}
inline void set_PROC1_INTE3_GPIO24_LEVEL_HIGH() volatile
{
PROC1_INTE3 |= 1u << 1u;
}
inline void clear_PROC1_INTE3_GPIO24_LEVEL_HIGH() volatile
{
PROC1_INTE3 &= ~(1u << 1u);
}
inline void toggle_PROC1_INTE3_GPIO24_LEVEL_HIGH() volatile
{
PROC1_INTE3 ^= 1u << 1u;
}
inline bool get_PROC1_INTE3_GPIO24_EDGE_LOW() volatile
{
return PROC1_INTE3 & (1u << 2u);
}
inline void set_PROC1_INTE3_GPIO24_EDGE_LOW() volatile
{
PROC1_INTE3 |= 1u << 2u;
}
inline void clear_PROC1_INTE3_GPIO24_EDGE_LOW() volatile
{
PROC1_INTE3 &= ~(1u << 2u);
}
inline void toggle_PROC1_INTE3_GPIO24_EDGE_LOW() volatile
{
PROC1_INTE3 ^= 1u << 2u;
}
inline bool get_PROC1_INTE3_GPIO24_EDGE_HIGH() volatile
{
return PROC1_INTE3 & (1u << 3u);
}
inline void set_PROC1_INTE3_GPIO24_EDGE_HIGH() volatile
{
PROC1_INTE3 |= 1u << 3u;
}
inline void clear_PROC1_INTE3_GPIO24_EDGE_HIGH() volatile
{
PROC1_INTE3 &= ~(1u << 3u);
}
inline void toggle_PROC1_INTE3_GPIO24_EDGE_HIGH() volatile
{
PROC1_INTE3 ^= 1u << 3u;
}
inline bool get_PROC1_INTE3_GPIO25_LEVEL_LOW() volatile
{
return PROC1_INTE3 & (1u << 4u);
}
inline void set_PROC1_INTE3_GPIO25_LEVEL_LOW() volatile
{
PROC1_INTE3 |= 1u << 4u;
}
inline void clear_PROC1_INTE3_GPIO25_LEVEL_LOW() volatile
{
PROC1_INTE3 &= ~(1u << 4u);
}
inline void toggle_PROC1_INTE3_GPIO25_LEVEL_LOW() volatile
{
PROC1_INTE3 ^= 1u << 4u;
}
inline bool get_PROC1_INTE3_GPIO25_LEVEL_HIGH() volatile
{
return PROC1_INTE3 & (1u << 5u);
}
inline void set_PROC1_INTE3_GPIO25_LEVEL_HIGH() volatile
{
PROC1_INTE3 |= 1u << 5u;
}
inline void clear_PROC1_INTE3_GPIO25_LEVEL_HIGH() volatile
{
PROC1_INTE3 &= ~(1u << 5u);
}
inline void toggle_PROC1_INTE3_GPIO25_LEVEL_HIGH() volatile
{
PROC1_INTE3 ^= 1u << 5u;
}
inline bool get_PROC1_INTE3_GPIO25_EDGE_LOW() volatile
{
return PROC1_INTE3 & (1u << 6u);
}
inline void set_PROC1_INTE3_GPIO25_EDGE_LOW() volatile
{
PROC1_INTE3 |= 1u << 6u;
}
inline void clear_PROC1_INTE3_GPIO25_EDGE_LOW() volatile
{
PROC1_INTE3 &= ~(1u << 6u);
}
inline void toggle_PROC1_INTE3_GPIO25_EDGE_LOW() volatile
{
PROC1_INTE3 ^= 1u << 6u;
}
inline bool get_PROC1_INTE3_GPIO25_EDGE_HIGH() volatile
{
return PROC1_INTE3 & (1u << 7u);
}
inline void set_PROC1_INTE3_GPIO25_EDGE_HIGH() volatile
{
PROC1_INTE3 |= 1u << 7u;
}
inline void clear_PROC1_INTE3_GPIO25_EDGE_HIGH() volatile
{
PROC1_INTE3 &= ~(1u << 7u);
}
inline void toggle_PROC1_INTE3_GPIO25_EDGE_HIGH() volatile
{
PROC1_INTE3 ^= 1u << 7u;
}
inline bool get_PROC1_INTE3_GPIO26_LEVEL_LOW() volatile
{
return PROC1_INTE3 & (1u << 8u);
}
inline void set_PROC1_INTE3_GPIO26_LEVEL_LOW() volatile
{
PROC1_INTE3 |= 1u << 8u;
}
inline void clear_PROC1_INTE3_GPIO26_LEVEL_LOW() volatile
{
PROC1_INTE3 &= ~(1u << 8u);
}
inline void toggle_PROC1_INTE3_GPIO26_LEVEL_LOW() volatile
{
PROC1_INTE3 ^= 1u << 8u;
}
inline bool get_PROC1_INTE3_GPIO26_LEVEL_HIGH() volatile
{
return PROC1_INTE3 & (1u << 9u);
}
inline void set_PROC1_INTE3_GPIO26_LEVEL_HIGH() volatile
{
PROC1_INTE3 |= 1u << 9u;
}
inline void clear_PROC1_INTE3_GPIO26_LEVEL_HIGH() volatile
{
PROC1_INTE3 &= ~(1u << 9u);
}
inline void toggle_PROC1_INTE3_GPIO26_LEVEL_HIGH() volatile
{
PROC1_INTE3 ^= 1u << 9u;
}
inline bool get_PROC1_INTE3_GPIO26_EDGE_LOW() volatile
{
return PROC1_INTE3 & (1u << 10u);
}
inline void set_PROC1_INTE3_GPIO26_EDGE_LOW() volatile
{
PROC1_INTE3 |= 1u << 10u;
}
inline void clear_PROC1_INTE3_GPIO26_EDGE_LOW() volatile
{
PROC1_INTE3 &= ~(1u << 10u);
}
inline void toggle_PROC1_INTE3_GPIO26_EDGE_LOW() volatile
{
PROC1_INTE3 ^= 1u << 10u;
}
inline bool get_PROC1_INTE3_GPIO26_EDGE_HIGH() volatile
{
return PROC1_INTE3 & (1u << 11u);
}
inline void set_PROC1_INTE3_GPIO26_EDGE_HIGH() volatile
{
PROC1_INTE3 |= 1u << 11u;
}
inline void clear_PROC1_INTE3_GPIO26_EDGE_HIGH() volatile
{
PROC1_INTE3 &= ~(1u << 11u);
}
inline void toggle_PROC1_INTE3_GPIO26_EDGE_HIGH() volatile
{
PROC1_INTE3 ^= 1u << 11u;
}
inline bool get_PROC1_INTE3_GPIO27_LEVEL_LOW() volatile
{
return PROC1_INTE3 & (1u << 12u);
}
inline void set_PROC1_INTE3_GPIO27_LEVEL_LOW() volatile
{
PROC1_INTE3 |= 1u << 12u;
}
inline void clear_PROC1_INTE3_GPIO27_LEVEL_LOW() volatile
{
PROC1_INTE3 &= ~(1u << 12u);
}
inline void toggle_PROC1_INTE3_GPIO27_LEVEL_LOW() volatile
{
PROC1_INTE3 ^= 1u << 12u;
}
inline bool get_PROC1_INTE3_GPIO27_LEVEL_HIGH() volatile
{
return PROC1_INTE3 & (1u << 13u);
}
inline void set_PROC1_INTE3_GPIO27_LEVEL_HIGH() volatile
{
PROC1_INTE3 |= 1u << 13u;
}
inline void clear_PROC1_INTE3_GPIO27_LEVEL_HIGH() volatile
{
PROC1_INTE3 &= ~(1u << 13u);
}
inline void toggle_PROC1_INTE3_GPIO27_LEVEL_HIGH() volatile
{
PROC1_INTE3 ^= 1u << 13u;
}
inline bool get_PROC1_INTE3_GPIO27_EDGE_LOW() volatile
{
return PROC1_INTE3 & (1u << 14u);
}
inline void set_PROC1_INTE3_GPIO27_EDGE_LOW() volatile
{
PROC1_INTE3 |= 1u << 14u;
}
inline void clear_PROC1_INTE3_GPIO27_EDGE_LOW() volatile
{
PROC1_INTE3 &= ~(1u << 14u);
}
inline void toggle_PROC1_INTE3_GPIO27_EDGE_LOW() volatile
{
PROC1_INTE3 ^= 1u << 14u;
}
inline bool get_PROC1_INTE3_GPIO27_EDGE_HIGH() volatile
{
return PROC1_INTE3 & (1u << 15u);
}
inline void set_PROC1_INTE3_GPIO27_EDGE_HIGH() volatile
{
PROC1_INTE3 |= 1u << 15u;
}
inline void clear_PROC1_INTE3_GPIO27_EDGE_HIGH() volatile
{
PROC1_INTE3 &= ~(1u << 15u);
}
inline void toggle_PROC1_INTE3_GPIO27_EDGE_HIGH() volatile
{
PROC1_INTE3 ^= 1u << 15u;
}
inline bool get_PROC1_INTE3_GPIO28_LEVEL_LOW() volatile
{
return PROC1_INTE3 & (1u << 16u);
}
inline void set_PROC1_INTE3_GPIO28_LEVEL_LOW() volatile
{
PROC1_INTE3 |= 1u << 16u;
}
inline void clear_PROC1_INTE3_GPIO28_LEVEL_LOW() volatile
{
PROC1_INTE3 &= ~(1u << 16u);
}
inline void toggle_PROC1_INTE3_GPIO28_LEVEL_LOW() volatile
{
PROC1_INTE3 ^= 1u << 16u;
}
inline bool get_PROC1_INTE3_GPIO28_LEVEL_HIGH() volatile
{
return PROC1_INTE3 & (1u << 17u);
}
inline void set_PROC1_INTE3_GPIO28_LEVEL_HIGH() volatile
{
PROC1_INTE3 |= 1u << 17u;
}
inline void clear_PROC1_INTE3_GPIO28_LEVEL_HIGH() volatile
{
PROC1_INTE3 &= ~(1u << 17u);
}
inline void toggle_PROC1_INTE3_GPIO28_LEVEL_HIGH() volatile
{
PROC1_INTE3 ^= 1u << 17u;
}
inline bool get_PROC1_INTE3_GPIO28_EDGE_LOW() volatile
{
return PROC1_INTE3 & (1u << 18u);
}
inline void set_PROC1_INTE3_GPIO28_EDGE_LOW() volatile
{
PROC1_INTE3 |= 1u << 18u;
}
inline void clear_PROC1_INTE3_GPIO28_EDGE_LOW() volatile
{
PROC1_INTE3 &= ~(1u << 18u);
}
inline void toggle_PROC1_INTE3_GPIO28_EDGE_LOW() volatile
{
PROC1_INTE3 ^= 1u << 18u;
}
inline bool get_PROC1_INTE3_GPIO28_EDGE_HIGH() volatile
{
return PROC1_INTE3 & (1u << 19u);
}
inline void set_PROC1_INTE3_GPIO28_EDGE_HIGH() volatile
{
PROC1_INTE3 |= 1u << 19u;
}
inline void clear_PROC1_INTE3_GPIO28_EDGE_HIGH() volatile
{
PROC1_INTE3 &= ~(1u << 19u);
}
inline void toggle_PROC1_INTE3_GPIO28_EDGE_HIGH() volatile
{
PROC1_INTE3 ^= 1u << 19u;
}
inline bool get_PROC1_INTE3_GPIO29_LEVEL_LOW() volatile
{
return PROC1_INTE3 & (1u << 20u);
}
inline void set_PROC1_INTE3_GPIO29_LEVEL_LOW() volatile
{
PROC1_INTE3 |= 1u << 20u;
}
inline void clear_PROC1_INTE3_GPIO29_LEVEL_LOW() volatile
{
PROC1_INTE3 &= ~(1u << 20u);
}
inline void toggle_PROC1_INTE3_GPIO29_LEVEL_LOW() volatile
{
PROC1_INTE3 ^= 1u << 20u;
}
inline bool get_PROC1_INTE3_GPIO29_LEVEL_HIGH() volatile
{
return PROC1_INTE3 & (1u << 21u);
}
inline void set_PROC1_INTE3_GPIO29_LEVEL_HIGH() volatile
{
PROC1_INTE3 |= 1u << 21u;
}
inline void clear_PROC1_INTE3_GPIO29_LEVEL_HIGH() volatile
{
PROC1_INTE3 &= ~(1u << 21u);
}
inline void toggle_PROC1_INTE3_GPIO29_LEVEL_HIGH() volatile
{
PROC1_INTE3 ^= 1u << 21u;
}
inline bool get_PROC1_INTE3_GPIO29_EDGE_LOW() volatile
{
return PROC1_INTE3 & (1u << 22u);
}
inline void set_PROC1_INTE3_GPIO29_EDGE_LOW() volatile
{
PROC1_INTE3 |= 1u << 22u;
}
inline void clear_PROC1_INTE3_GPIO29_EDGE_LOW() volatile
{
PROC1_INTE3 &= ~(1u << 22u);
}
inline void toggle_PROC1_INTE3_GPIO29_EDGE_LOW() volatile
{
PROC1_INTE3 ^= 1u << 22u;
}
inline bool get_PROC1_INTE3_GPIO29_EDGE_HIGH() volatile
{
return PROC1_INTE3 & (1u << 23u);
}
inline void set_PROC1_INTE3_GPIO29_EDGE_HIGH() volatile
{
PROC1_INTE3 |= 1u << 23u;
}
inline void clear_PROC1_INTE3_GPIO29_EDGE_HIGH() volatile
{
PROC1_INTE3 &= ~(1u << 23u);
}
inline void toggle_PROC1_INTE3_GPIO29_EDGE_HIGH() volatile
{
PROC1_INTE3 ^= 1u << 23u;
}
inline void get_PROC1_INTE3(bool &GPIO24_LEVEL_LOW,
bool &GPIO24_LEVEL_HIGH, bool &GPIO24_EDGE_LOW,
bool &GPIO24_EDGE_HIGH, bool &GPIO25_LEVEL_LOW,
bool &GPIO25_LEVEL_HIGH, bool &GPIO25_EDGE_LOW,
bool &GPIO25_EDGE_HIGH, bool &GPIO26_LEVEL_LOW,
bool &GPIO26_LEVEL_HIGH, bool &GPIO26_EDGE_LOW,
bool &GPIO26_EDGE_HIGH, bool &GPIO27_LEVEL_LOW,
bool &GPIO27_LEVEL_HIGH, bool &GPIO27_EDGE_LOW,
bool &GPIO27_EDGE_HIGH, bool &GPIO28_LEVEL_LOW,
bool &GPIO28_LEVEL_HIGH, bool &GPIO28_EDGE_LOW,
bool &GPIO28_EDGE_HIGH, bool &GPIO29_LEVEL_LOW,
bool &GPIO29_LEVEL_HIGH, bool &GPIO29_EDGE_LOW,
bool &GPIO29_EDGE_HIGH) volatile
{
uint32_t curr = PROC1_INTE3;
GPIO24_LEVEL_LOW = curr & (1u << 0u);
GPIO24_LEVEL_HIGH = curr & (1u << 1u);
GPIO24_EDGE_LOW = curr & (1u << 2u);
GPIO24_EDGE_HIGH = curr & (1u << 3u);
GPIO25_LEVEL_LOW = curr & (1u << 4u);
GPIO25_LEVEL_HIGH = curr & (1u << 5u);
GPIO25_EDGE_LOW = curr & (1u << 6u);
GPIO25_EDGE_HIGH = curr & (1u << 7u);
GPIO26_LEVEL_LOW = curr & (1u << 8u);
GPIO26_LEVEL_HIGH = curr & (1u << 9u);
GPIO26_EDGE_LOW = curr & (1u << 10u);
GPIO26_EDGE_HIGH = curr & (1u << 11u);
GPIO27_LEVEL_LOW = curr & (1u << 12u);
GPIO27_LEVEL_HIGH = curr & (1u << 13u);
GPIO27_EDGE_LOW = curr & (1u << 14u);
GPIO27_EDGE_HIGH = curr & (1u << 15u);
GPIO28_LEVEL_LOW = curr & (1u << 16u);
GPIO28_LEVEL_HIGH = curr & (1u << 17u);
GPIO28_EDGE_LOW = curr & (1u << 18u);
GPIO28_EDGE_HIGH = curr & (1u << 19u);
GPIO29_LEVEL_LOW = curr & (1u << 20u);
GPIO29_LEVEL_HIGH = curr & (1u << 21u);
GPIO29_EDGE_LOW = curr & (1u << 22u);
GPIO29_EDGE_HIGH = curr & (1u << 23u);
}
inline void set_PROC1_INTE3(
bool GPIO24_LEVEL_LOW, bool GPIO24_LEVEL_HIGH, bool GPIO24_EDGE_LOW,
bool GPIO24_EDGE_HIGH, bool GPIO25_LEVEL_LOW, bool GPIO25_LEVEL_HIGH,
bool GPIO25_EDGE_LOW, bool GPIO25_EDGE_HIGH, bool GPIO26_LEVEL_LOW,
bool GPIO26_LEVEL_HIGH, bool GPIO26_EDGE_LOW, bool GPIO26_EDGE_HIGH,
bool GPIO27_LEVEL_LOW, bool GPIO27_LEVEL_HIGH, bool GPIO27_EDGE_LOW,
bool GPIO27_EDGE_HIGH, bool GPIO28_LEVEL_LOW, bool GPIO28_LEVEL_HIGH,
bool GPIO28_EDGE_LOW, bool GPIO28_EDGE_HIGH, bool GPIO29_LEVEL_LOW,
bool GPIO29_LEVEL_HIGH, bool GPIO29_EDGE_LOW,
bool GPIO29_EDGE_HIGH) volatile
{
uint32_t curr = PROC1_INTE3;
curr &= ~(0b1u << 0u);
curr |= (GPIO24_LEVEL_LOW & 0b1u) << 0u;
curr &= ~(0b1u << 1u);
curr |= (GPIO24_LEVEL_HIGH & 0b1u) << 1u;
curr &= ~(0b1u << 2u);
curr |= (GPIO24_EDGE_LOW & 0b1u) << 2u;
curr &= ~(0b1u << 3u);
curr |= (GPIO24_EDGE_HIGH & 0b1u) << 3u;
curr &= ~(0b1u << 4u);
curr |= (GPIO25_LEVEL_LOW & 0b1u) << 4u;
curr &= ~(0b1u << 5u);
curr |= (GPIO25_LEVEL_HIGH & 0b1u) << 5u;
curr &= ~(0b1u << 6u);
curr |= (GPIO25_EDGE_LOW & 0b1u) << 6u;
curr &= ~(0b1u << 7u);
curr |= (GPIO25_EDGE_HIGH & 0b1u) << 7u;
curr &= ~(0b1u << 8u);
curr |= (GPIO26_LEVEL_LOW & 0b1u) << 8u;
curr &= ~(0b1u << 9u);
curr |= (GPIO26_LEVEL_HIGH & 0b1u) << 9u;
curr &= ~(0b1u << 10u);
curr |= (GPIO26_EDGE_LOW & 0b1u) << 10u;
curr &= ~(0b1u << 11u);
curr |= (GPIO26_EDGE_HIGH & 0b1u) << 11u;
curr &= ~(0b1u << 12u);
curr |= (GPIO27_LEVEL_LOW & 0b1u) << 12u;
curr &= ~(0b1u << 13u);
curr |= (GPIO27_LEVEL_HIGH & 0b1u) << 13u;
curr &= ~(0b1u << 14u);
curr |= (GPIO27_EDGE_LOW & 0b1u) << 14u;
curr &= ~(0b1u << 15u);
curr |= (GPIO27_EDGE_HIGH & 0b1u) << 15u;
curr &= ~(0b1u << 16u);
curr |= (GPIO28_LEVEL_LOW & 0b1u) << 16u;
curr &= ~(0b1u << 17u);
curr |= (GPIO28_LEVEL_HIGH & 0b1u) << 17u;
curr &= ~(0b1u << 18u);
curr |= (GPIO28_EDGE_LOW & 0b1u) << 18u;
curr &= ~(0b1u << 19u);
curr |= (GPIO28_EDGE_HIGH & 0b1u) << 19u;
curr &= ~(0b1u << 20u);
curr |= (GPIO29_LEVEL_LOW & 0b1u) << 20u;
curr &= ~(0b1u << 21u);
curr |= (GPIO29_LEVEL_HIGH & 0b1u) << 21u;
curr &= ~(0b1u << 22u);
curr |= (GPIO29_EDGE_LOW & 0b1u) << 22u;
curr &= ~(0b1u << 23u);
curr |= (GPIO29_EDGE_HIGH & 0b1u) << 23u;
PROC1_INTE3 = curr;
}
inline bool get_PROC1_INTF0_GPIO0_LEVEL_LOW() volatile
{
return PROC1_INTF0 & (1u << 0u);
}
inline void set_PROC1_INTF0_GPIO0_LEVEL_LOW() volatile
{
PROC1_INTF0 |= 1u << 0u;
}
inline void clear_PROC1_INTF0_GPIO0_LEVEL_LOW() volatile
{
PROC1_INTF0 &= ~(1u << 0u);
}
inline void toggle_PROC1_INTF0_GPIO0_LEVEL_LOW() volatile
{
PROC1_INTF0 ^= 1u << 0u;
}
inline bool get_PROC1_INTF0_GPIO0_LEVEL_HIGH() volatile
{
return PROC1_INTF0 & (1u << 1u);
}
inline void set_PROC1_INTF0_GPIO0_LEVEL_HIGH() volatile
{
PROC1_INTF0 |= 1u << 1u;
}
inline void clear_PROC1_INTF0_GPIO0_LEVEL_HIGH() volatile
{
PROC1_INTF0 &= ~(1u << 1u);
}
inline void toggle_PROC1_INTF0_GPIO0_LEVEL_HIGH() volatile
{
PROC1_INTF0 ^= 1u << 1u;
}
inline bool get_PROC1_INTF0_GPIO0_EDGE_LOW() volatile
{
return PROC1_INTF0 & (1u << 2u);
}
inline void set_PROC1_INTF0_GPIO0_EDGE_LOW() volatile
{
PROC1_INTF0 |= 1u << 2u;
}
inline void clear_PROC1_INTF0_GPIO0_EDGE_LOW() volatile
{
PROC1_INTF0 &= ~(1u << 2u);
}
inline void toggle_PROC1_INTF0_GPIO0_EDGE_LOW() volatile
{
PROC1_INTF0 ^= 1u << 2u;
}
inline bool get_PROC1_INTF0_GPIO0_EDGE_HIGH() volatile
{
return PROC1_INTF0 & (1u << 3u);
}
inline void set_PROC1_INTF0_GPIO0_EDGE_HIGH() volatile
{
PROC1_INTF0 |= 1u << 3u;
}
inline void clear_PROC1_INTF0_GPIO0_EDGE_HIGH() volatile
{
PROC1_INTF0 &= ~(1u << 3u);
}
inline void toggle_PROC1_INTF0_GPIO0_EDGE_HIGH() volatile
{
PROC1_INTF0 ^= 1u << 3u;
}
inline bool get_PROC1_INTF0_GPIO1_LEVEL_LOW() volatile
{
return PROC1_INTF0 & (1u << 4u);
}
inline void set_PROC1_INTF0_GPIO1_LEVEL_LOW() volatile
{
PROC1_INTF0 |= 1u << 4u;
}
inline void clear_PROC1_INTF0_GPIO1_LEVEL_LOW() volatile
{
PROC1_INTF0 &= ~(1u << 4u);
}
inline void toggle_PROC1_INTF0_GPIO1_LEVEL_LOW() volatile
{
PROC1_INTF0 ^= 1u << 4u;
}
inline bool get_PROC1_INTF0_GPIO1_LEVEL_HIGH() volatile
{
return PROC1_INTF0 & (1u << 5u);
}
inline void set_PROC1_INTF0_GPIO1_LEVEL_HIGH() volatile
{
PROC1_INTF0 |= 1u << 5u;
}
inline void clear_PROC1_INTF0_GPIO1_LEVEL_HIGH() volatile
{
PROC1_INTF0 &= ~(1u << 5u);
}
inline void toggle_PROC1_INTF0_GPIO1_LEVEL_HIGH() volatile
{
PROC1_INTF0 ^= 1u << 5u;
}
inline bool get_PROC1_INTF0_GPIO1_EDGE_LOW() volatile
{
return PROC1_INTF0 & (1u << 6u);
}
inline void set_PROC1_INTF0_GPIO1_EDGE_LOW() volatile
{
PROC1_INTF0 |= 1u << 6u;
}
inline void clear_PROC1_INTF0_GPIO1_EDGE_LOW() volatile
{
PROC1_INTF0 &= ~(1u << 6u);
}
inline void toggle_PROC1_INTF0_GPIO1_EDGE_LOW() volatile
{
PROC1_INTF0 ^= 1u << 6u;
}
inline bool get_PROC1_INTF0_GPIO1_EDGE_HIGH() volatile
{
return PROC1_INTF0 & (1u << 7u);
}
inline void set_PROC1_INTF0_GPIO1_EDGE_HIGH() volatile
{
PROC1_INTF0 |= 1u << 7u;
}
inline void clear_PROC1_INTF0_GPIO1_EDGE_HIGH() volatile
{
PROC1_INTF0 &= ~(1u << 7u);
}
inline void toggle_PROC1_INTF0_GPIO1_EDGE_HIGH() volatile
{
PROC1_INTF0 ^= 1u << 7u;
}
inline bool get_PROC1_INTF0_GPIO2_LEVEL_LOW() volatile
{
return PROC1_INTF0 & (1u << 8u);
}
inline void set_PROC1_INTF0_GPIO2_LEVEL_LOW() volatile
{
PROC1_INTF0 |= 1u << 8u;
}
inline void clear_PROC1_INTF0_GPIO2_LEVEL_LOW() volatile
{
PROC1_INTF0 &= ~(1u << 8u);
}
inline void toggle_PROC1_INTF0_GPIO2_LEVEL_LOW() volatile
{
PROC1_INTF0 ^= 1u << 8u;
}
inline bool get_PROC1_INTF0_GPIO2_LEVEL_HIGH() volatile
{
return PROC1_INTF0 & (1u << 9u);
}
inline void set_PROC1_INTF0_GPIO2_LEVEL_HIGH() volatile
{
PROC1_INTF0 |= 1u << 9u;
}
inline void clear_PROC1_INTF0_GPIO2_LEVEL_HIGH() volatile
{
PROC1_INTF0 &= ~(1u << 9u);
}
inline void toggle_PROC1_INTF0_GPIO2_LEVEL_HIGH() volatile
{
PROC1_INTF0 ^= 1u << 9u;
}
inline bool get_PROC1_INTF0_GPIO2_EDGE_LOW() volatile
{
return PROC1_INTF0 & (1u << 10u);
}
inline void set_PROC1_INTF0_GPIO2_EDGE_LOW() volatile
{
PROC1_INTF0 |= 1u << 10u;
}
inline void clear_PROC1_INTF0_GPIO2_EDGE_LOW() volatile
{
PROC1_INTF0 &= ~(1u << 10u);
}
inline void toggle_PROC1_INTF0_GPIO2_EDGE_LOW() volatile
{
PROC1_INTF0 ^= 1u << 10u;
}
inline bool get_PROC1_INTF0_GPIO2_EDGE_HIGH() volatile
{
return PROC1_INTF0 & (1u << 11u);
}
inline void set_PROC1_INTF0_GPIO2_EDGE_HIGH() volatile
{
PROC1_INTF0 |= 1u << 11u;
}
inline void clear_PROC1_INTF0_GPIO2_EDGE_HIGH() volatile
{
PROC1_INTF0 &= ~(1u << 11u);
}
inline void toggle_PROC1_INTF0_GPIO2_EDGE_HIGH() volatile
{
PROC1_INTF0 ^= 1u << 11u;
}
inline bool get_PROC1_INTF0_GPIO3_LEVEL_LOW() volatile
{
return PROC1_INTF0 & (1u << 12u);
}
inline void set_PROC1_INTF0_GPIO3_LEVEL_LOW() volatile
{
PROC1_INTF0 |= 1u << 12u;
}
inline void clear_PROC1_INTF0_GPIO3_LEVEL_LOW() volatile
{
PROC1_INTF0 &= ~(1u << 12u);
}
inline void toggle_PROC1_INTF0_GPIO3_LEVEL_LOW() volatile
{
PROC1_INTF0 ^= 1u << 12u;
}
inline bool get_PROC1_INTF0_GPIO3_LEVEL_HIGH() volatile
{
return PROC1_INTF0 & (1u << 13u);
}
inline void set_PROC1_INTF0_GPIO3_LEVEL_HIGH() volatile
{
PROC1_INTF0 |= 1u << 13u;
}
inline void clear_PROC1_INTF0_GPIO3_LEVEL_HIGH() volatile
{
PROC1_INTF0 &= ~(1u << 13u);
}
inline void toggle_PROC1_INTF0_GPIO3_LEVEL_HIGH() volatile
{
PROC1_INTF0 ^= 1u << 13u;
}
inline bool get_PROC1_INTF0_GPIO3_EDGE_LOW() volatile
{
return PROC1_INTF0 & (1u << 14u);
}
inline void set_PROC1_INTF0_GPIO3_EDGE_LOW() volatile
{
PROC1_INTF0 |= 1u << 14u;
}
inline void clear_PROC1_INTF0_GPIO3_EDGE_LOW() volatile
{
PROC1_INTF0 &= ~(1u << 14u);
}
inline void toggle_PROC1_INTF0_GPIO3_EDGE_LOW() volatile
{
PROC1_INTF0 ^= 1u << 14u;
}
inline bool get_PROC1_INTF0_GPIO3_EDGE_HIGH() volatile
{
return PROC1_INTF0 & (1u << 15u);
}
inline void set_PROC1_INTF0_GPIO3_EDGE_HIGH() volatile
{
PROC1_INTF0 |= 1u << 15u;
}
inline void clear_PROC1_INTF0_GPIO3_EDGE_HIGH() volatile
{
PROC1_INTF0 &= ~(1u << 15u);
}
inline void toggle_PROC1_INTF0_GPIO3_EDGE_HIGH() volatile
{
PROC1_INTF0 ^= 1u << 15u;
}
inline bool get_PROC1_INTF0_GPIO4_LEVEL_LOW() volatile
{
return PROC1_INTF0 & (1u << 16u);
}
inline void set_PROC1_INTF0_GPIO4_LEVEL_LOW() volatile
{
PROC1_INTF0 |= 1u << 16u;
}
inline void clear_PROC1_INTF0_GPIO4_LEVEL_LOW() volatile
{
PROC1_INTF0 &= ~(1u << 16u);
}
inline void toggle_PROC1_INTF0_GPIO4_LEVEL_LOW() volatile
{
PROC1_INTF0 ^= 1u << 16u;
}
inline bool get_PROC1_INTF0_GPIO4_LEVEL_HIGH() volatile
{
return PROC1_INTF0 & (1u << 17u);
}
inline void set_PROC1_INTF0_GPIO4_LEVEL_HIGH() volatile
{
PROC1_INTF0 |= 1u << 17u;
}
inline void clear_PROC1_INTF0_GPIO4_LEVEL_HIGH() volatile
{
PROC1_INTF0 &= ~(1u << 17u);
}
inline void toggle_PROC1_INTF0_GPIO4_LEVEL_HIGH() volatile
{
PROC1_INTF0 ^= 1u << 17u;
}
inline bool get_PROC1_INTF0_GPIO4_EDGE_LOW() volatile
{
return PROC1_INTF0 & (1u << 18u);
}
inline void set_PROC1_INTF0_GPIO4_EDGE_LOW() volatile
{
PROC1_INTF0 |= 1u << 18u;
}
inline void clear_PROC1_INTF0_GPIO4_EDGE_LOW() volatile
{
PROC1_INTF0 &= ~(1u << 18u);
}
inline void toggle_PROC1_INTF0_GPIO4_EDGE_LOW() volatile
{
PROC1_INTF0 ^= 1u << 18u;
}
inline bool get_PROC1_INTF0_GPIO4_EDGE_HIGH() volatile
{
return PROC1_INTF0 & (1u << 19u);
}
inline void set_PROC1_INTF0_GPIO4_EDGE_HIGH() volatile
{
PROC1_INTF0 |= 1u << 19u;
}
inline void clear_PROC1_INTF0_GPIO4_EDGE_HIGH() volatile
{
PROC1_INTF0 &= ~(1u << 19u);
}
inline void toggle_PROC1_INTF0_GPIO4_EDGE_HIGH() volatile
{
PROC1_INTF0 ^= 1u << 19u;
}
inline bool get_PROC1_INTF0_GPIO5_LEVEL_LOW() volatile
{
return PROC1_INTF0 & (1u << 20u);
}
inline void set_PROC1_INTF0_GPIO5_LEVEL_LOW() volatile
{
PROC1_INTF0 |= 1u << 20u;
}
inline void clear_PROC1_INTF0_GPIO5_LEVEL_LOW() volatile
{
PROC1_INTF0 &= ~(1u << 20u);
}
inline void toggle_PROC1_INTF0_GPIO5_LEVEL_LOW() volatile
{
PROC1_INTF0 ^= 1u << 20u;
}
inline bool get_PROC1_INTF0_GPIO5_LEVEL_HIGH() volatile
{
return PROC1_INTF0 & (1u << 21u);
}
inline void set_PROC1_INTF0_GPIO5_LEVEL_HIGH() volatile
{
PROC1_INTF0 |= 1u << 21u;
}
inline void clear_PROC1_INTF0_GPIO5_LEVEL_HIGH() volatile
{
PROC1_INTF0 &= ~(1u << 21u);
}
inline void toggle_PROC1_INTF0_GPIO5_LEVEL_HIGH() volatile
{
PROC1_INTF0 ^= 1u << 21u;
}
inline bool get_PROC1_INTF0_GPIO5_EDGE_LOW() volatile
{
return PROC1_INTF0 & (1u << 22u);
}
inline void set_PROC1_INTF0_GPIO5_EDGE_LOW() volatile
{
PROC1_INTF0 |= 1u << 22u;
}
inline void clear_PROC1_INTF0_GPIO5_EDGE_LOW() volatile
{
PROC1_INTF0 &= ~(1u << 22u);
}
inline void toggle_PROC1_INTF0_GPIO5_EDGE_LOW() volatile
{
PROC1_INTF0 ^= 1u << 22u;
}
inline bool get_PROC1_INTF0_GPIO5_EDGE_HIGH() volatile
{
return PROC1_INTF0 & (1u << 23u);
}
inline void set_PROC1_INTF0_GPIO5_EDGE_HIGH() volatile
{
PROC1_INTF0 |= 1u << 23u;
}
inline void clear_PROC1_INTF0_GPIO5_EDGE_HIGH() volatile
{
PROC1_INTF0 &= ~(1u << 23u);
}
inline void toggle_PROC1_INTF0_GPIO5_EDGE_HIGH() volatile
{
PROC1_INTF0 ^= 1u << 23u;
}
inline bool get_PROC1_INTF0_GPIO6_LEVEL_LOW() volatile
{
return PROC1_INTF0 & (1u << 24u);
}
inline void set_PROC1_INTF0_GPIO6_LEVEL_LOW() volatile
{
PROC1_INTF0 |= 1u << 24u;
}
inline void clear_PROC1_INTF0_GPIO6_LEVEL_LOW() volatile
{
PROC1_INTF0 &= ~(1u << 24u);
}
inline void toggle_PROC1_INTF0_GPIO6_LEVEL_LOW() volatile
{
PROC1_INTF0 ^= 1u << 24u;
}
inline bool get_PROC1_INTF0_GPIO6_LEVEL_HIGH() volatile
{
return PROC1_INTF0 & (1u << 25u);
}
inline void set_PROC1_INTF0_GPIO6_LEVEL_HIGH() volatile
{
PROC1_INTF0 |= 1u << 25u;
}
inline void clear_PROC1_INTF0_GPIO6_LEVEL_HIGH() volatile
{
PROC1_INTF0 &= ~(1u << 25u);
}
inline void toggle_PROC1_INTF0_GPIO6_LEVEL_HIGH() volatile
{
PROC1_INTF0 ^= 1u << 25u;
}
inline bool get_PROC1_INTF0_GPIO6_EDGE_LOW() volatile
{
return PROC1_INTF0 & (1u << 26u);
}
inline void set_PROC1_INTF0_GPIO6_EDGE_LOW() volatile
{
PROC1_INTF0 |= 1u << 26u;
}
inline void clear_PROC1_INTF0_GPIO6_EDGE_LOW() volatile
{
PROC1_INTF0 &= ~(1u << 26u);
}
inline void toggle_PROC1_INTF0_GPIO6_EDGE_LOW() volatile
{
PROC1_INTF0 ^= 1u << 26u;
}
inline bool get_PROC1_INTF0_GPIO6_EDGE_HIGH() volatile
{
return PROC1_INTF0 & (1u << 27u);
}
inline void set_PROC1_INTF0_GPIO6_EDGE_HIGH() volatile
{
PROC1_INTF0 |= 1u << 27u;
}
inline void clear_PROC1_INTF0_GPIO6_EDGE_HIGH() volatile
{
PROC1_INTF0 &= ~(1u << 27u);
}
inline void toggle_PROC1_INTF0_GPIO6_EDGE_HIGH() volatile
{
PROC1_INTF0 ^= 1u << 27u;
}
inline bool get_PROC1_INTF0_GPIO7_LEVEL_LOW() volatile
{
return PROC1_INTF0 & (1u << 28u);
}
inline void set_PROC1_INTF0_GPIO7_LEVEL_LOW() volatile
{
PROC1_INTF0 |= 1u << 28u;
}
inline void clear_PROC1_INTF0_GPIO7_LEVEL_LOW() volatile
{
PROC1_INTF0 &= ~(1u << 28u);
}
inline void toggle_PROC1_INTF0_GPIO7_LEVEL_LOW() volatile
{
PROC1_INTF0 ^= 1u << 28u;
}
inline bool get_PROC1_INTF0_GPIO7_LEVEL_HIGH() volatile
{
return PROC1_INTF0 & (1u << 29u);
}
inline void set_PROC1_INTF0_GPIO7_LEVEL_HIGH() volatile
{
PROC1_INTF0 |= 1u << 29u;
}
inline void clear_PROC1_INTF0_GPIO7_LEVEL_HIGH() volatile
{
PROC1_INTF0 &= ~(1u << 29u);
}
inline void toggle_PROC1_INTF0_GPIO7_LEVEL_HIGH() volatile
{
PROC1_INTF0 ^= 1u << 29u;
}
inline bool get_PROC1_INTF0_GPIO7_EDGE_LOW() volatile
{
return PROC1_INTF0 & (1u << 30u);
}
inline void set_PROC1_INTF0_GPIO7_EDGE_LOW() volatile
{
PROC1_INTF0 |= 1u << 30u;
}
inline void clear_PROC1_INTF0_GPIO7_EDGE_LOW() volatile
{
PROC1_INTF0 &= ~(1u << 30u);
}
inline void toggle_PROC1_INTF0_GPIO7_EDGE_LOW() volatile
{
PROC1_INTF0 ^= 1u << 30u;
}
inline bool get_PROC1_INTF0_GPIO7_EDGE_HIGH() volatile
{
return PROC1_INTF0 & (1u << 31u);
}
inline void set_PROC1_INTF0_GPIO7_EDGE_HIGH() volatile
{
PROC1_INTF0 |= 1u << 31u;
}
inline void clear_PROC1_INTF0_GPIO7_EDGE_HIGH() volatile
{
PROC1_INTF0 &= ~(1u << 31u);
}
inline void toggle_PROC1_INTF0_GPIO7_EDGE_HIGH() volatile
{
PROC1_INTF0 ^= 1u << 31u;
}
inline void get_PROC1_INTF0(
bool &GPIO0_LEVEL_LOW, bool &GPIO0_LEVEL_HIGH, bool &GPIO0_EDGE_LOW,
bool &GPIO0_EDGE_HIGH, bool &GPIO1_LEVEL_LOW, bool &GPIO1_LEVEL_HIGH,
bool &GPIO1_EDGE_LOW, bool &GPIO1_EDGE_HIGH, bool &GPIO2_LEVEL_LOW,
bool &GPIO2_LEVEL_HIGH, bool &GPIO2_EDGE_LOW, bool &GPIO2_EDGE_HIGH,
bool &GPIO3_LEVEL_LOW, bool &GPIO3_LEVEL_HIGH, bool &GPIO3_EDGE_LOW,
bool &GPIO3_EDGE_HIGH, bool &GPIO4_LEVEL_LOW, bool &GPIO4_LEVEL_HIGH,
bool &GPIO4_EDGE_LOW, bool &GPIO4_EDGE_HIGH, bool &GPIO5_LEVEL_LOW,
bool &GPIO5_LEVEL_HIGH, bool &GPIO5_EDGE_LOW, bool &GPIO5_EDGE_HIGH,
bool &GPIO6_LEVEL_LOW, bool &GPIO6_LEVEL_HIGH, bool &GPIO6_EDGE_LOW,
bool &GPIO6_EDGE_HIGH, bool &GPIO7_LEVEL_LOW, bool &GPIO7_LEVEL_HIGH,
bool &GPIO7_EDGE_LOW, bool &GPIO7_EDGE_HIGH) volatile
{
uint32_t curr = PROC1_INTF0;
GPIO0_LEVEL_LOW = curr & (1u << 0u);
GPIO0_LEVEL_HIGH = curr & (1u << 1u);
GPIO0_EDGE_LOW = curr & (1u << 2u);
GPIO0_EDGE_HIGH = curr & (1u << 3u);
GPIO1_LEVEL_LOW = curr & (1u << 4u);
GPIO1_LEVEL_HIGH = curr & (1u << 5u);
GPIO1_EDGE_LOW = curr & (1u << 6u);
GPIO1_EDGE_HIGH = curr & (1u << 7u);
GPIO2_LEVEL_LOW = curr & (1u << 8u);
GPIO2_LEVEL_HIGH = curr & (1u << 9u);
GPIO2_EDGE_LOW = curr & (1u << 10u);
GPIO2_EDGE_HIGH = curr & (1u << 11u);
GPIO3_LEVEL_LOW = curr & (1u << 12u);
GPIO3_LEVEL_HIGH = curr & (1u << 13u);
GPIO3_EDGE_LOW = curr & (1u << 14u);
GPIO3_EDGE_HIGH = curr & (1u << 15u);
GPIO4_LEVEL_LOW = curr & (1u << 16u);
GPIO4_LEVEL_HIGH = curr & (1u << 17u);
GPIO4_EDGE_LOW = curr & (1u << 18u);
GPIO4_EDGE_HIGH = curr & (1u << 19u);
GPIO5_LEVEL_LOW = curr & (1u << 20u);
GPIO5_LEVEL_HIGH = curr & (1u << 21u);
GPIO5_EDGE_LOW = curr & (1u << 22u);
GPIO5_EDGE_HIGH = curr & (1u << 23u);
GPIO6_LEVEL_LOW = curr & (1u << 24u);
GPIO6_LEVEL_HIGH = curr & (1u << 25u);
GPIO6_EDGE_LOW = curr & (1u << 26u);
GPIO6_EDGE_HIGH = curr & (1u << 27u);
GPIO7_LEVEL_LOW = curr & (1u << 28u);
GPIO7_LEVEL_HIGH = curr & (1u << 29u);
GPIO7_EDGE_LOW = curr & (1u << 30u);
GPIO7_EDGE_HIGH = curr & (1u << 31u);
}
inline void set_PROC1_INTF0(
bool GPIO0_LEVEL_LOW, bool GPIO0_LEVEL_HIGH, bool GPIO0_EDGE_LOW,
bool GPIO0_EDGE_HIGH, bool GPIO1_LEVEL_LOW, bool GPIO1_LEVEL_HIGH,
bool GPIO1_EDGE_LOW, bool GPIO1_EDGE_HIGH, bool GPIO2_LEVEL_LOW,
bool GPIO2_LEVEL_HIGH, bool GPIO2_EDGE_LOW, bool GPIO2_EDGE_HIGH,
bool GPIO3_LEVEL_LOW, bool GPIO3_LEVEL_HIGH, bool GPIO3_EDGE_LOW,
bool GPIO3_EDGE_HIGH, bool GPIO4_LEVEL_LOW, bool GPIO4_LEVEL_HIGH,
bool GPIO4_EDGE_LOW, bool GPIO4_EDGE_HIGH, bool GPIO5_LEVEL_LOW,
bool GPIO5_LEVEL_HIGH, bool GPIO5_EDGE_LOW, bool GPIO5_EDGE_HIGH,
bool GPIO6_LEVEL_LOW, bool GPIO6_LEVEL_HIGH, bool GPIO6_EDGE_LOW,
bool GPIO6_EDGE_HIGH, bool GPIO7_LEVEL_LOW, bool GPIO7_LEVEL_HIGH,
bool GPIO7_EDGE_LOW, bool GPIO7_EDGE_HIGH) volatile
{
uint32_t curr = PROC1_INTF0;
curr &= ~(0b1u << 0u);
curr |= (GPIO0_LEVEL_LOW & 0b1u) << 0u;
curr &= ~(0b1u << 1u);
curr |= (GPIO0_LEVEL_HIGH & 0b1u) << 1u;
curr &= ~(0b1u << 2u);
curr |= (GPIO0_EDGE_LOW & 0b1u) << 2u;
curr &= ~(0b1u << 3u);
curr |= (GPIO0_EDGE_HIGH & 0b1u) << 3u;
curr &= ~(0b1u << 4u);
curr |= (GPIO1_LEVEL_LOW & 0b1u) << 4u;
curr &= ~(0b1u << 5u);
curr |= (GPIO1_LEVEL_HIGH & 0b1u) << 5u;
curr &= ~(0b1u << 6u);
curr |= (GPIO1_EDGE_LOW & 0b1u) << 6u;
curr &= ~(0b1u << 7u);
curr |= (GPIO1_EDGE_HIGH & 0b1u) << 7u;
curr &= ~(0b1u << 8u);
curr |= (GPIO2_LEVEL_LOW & 0b1u) << 8u;
curr &= ~(0b1u << 9u);
curr |= (GPIO2_LEVEL_HIGH & 0b1u) << 9u;
curr &= ~(0b1u << 10u);
curr |= (GPIO2_EDGE_LOW & 0b1u) << 10u;
curr &= ~(0b1u << 11u);
curr |= (GPIO2_EDGE_HIGH & 0b1u) << 11u;
curr &= ~(0b1u << 12u);
curr |= (GPIO3_LEVEL_LOW & 0b1u) << 12u;
curr &= ~(0b1u << 13u);
curr |= (GPIO3_LEVEL_HIGH & 0b1u) << 13u;
curr &= ~(0b1u << 14u);
curr |= (GPIO3_EDGE_LOW & 0b1u) << 14u;
curr &= ~(0b1u << 15u);
curr |= (GPIO3_EDGE_HIGH & 0b1u) << 15u;
curr &= ~(0b1u << 16u);
curr |= (GPIO4_LEVEL_LOW & 0b1u) << 16u;
curr &= ~(0b1u << 17u);
curr |= (GPIO4_LEVEL_HIGH & 0b1u) << 17u;
curr &= ~(0b1u << 18u);
curr |= (GPIO4_EDGE_LOW & 0b1u) << 18u;
curr &= ~(0b1u << 19u);
curr |= (GPIO4_EDGE_HIGH & 0b1u) << 19u;
curr &= ~(0b1u << 20u);
curr |= (GPIO5_LEVEL_LOW & 0b1u) << 20u;
curr &= ~(0b1u << 21u);
curr |= (GPIO5_LEVEL_HIGH & 0b1u) << 21u;
curr &= ~(0b1u << 22u);
curr |= (GPIO5_EDGE_LOW & 0b1u) << 22u;
curr &= ~(0b1u << 23u);
curr |= (GPIO5_EDGE_HIGH & 0b1u) << 23u;
curr &= ~(0b1u << 24u);
curr |= (GPIO6_LEVEL_LOW & 0b1u) << 24u;
curr &= ~(0b1u << 25u);
curr |= (GPIO6_LEVEL_HIGH & 0b1u) << 25u;
curr &= ~(0b1u << 26u);
curr |= (GPIO6_EDGE_LOW & 0b1u) << 26u;
curr &= ~(0b1u << 27u);
curr |= (GPIO6_EDGE_HIGH & 0b1u) << 27u;
curr &= ~(0b1u << 28u);
curr |= (GPIO7_LEVEL_LOW & 0b1u) << 28u;
curr &= ~(0b1u << 29u);
curr |= (GPIO7_LEVEL_HIGH & 0b1u) << 29u;
curr &= ~(0b1u << 30u);
curr |= (GPIO7_EDGE_LOW & 0b1u) << 30u;
curr &= ~(0b1u << 31u);
curr |= (GPIO7_EDGE_HIGH & 0b1u) << 31u;
PROC1_INTF0 = curr;
}
inline bool get_PROC1_INTF1_GPIO8_LEVEL_LOW() volatile
{
return PROC1_INTF1 & (1u << 0u);
}
inline void set_PROC1_INTF1_GPIO8_LEVEL_LOW() volatile
{
PROC1_INTF1 |= 1u << 0u;
}
inline void clear_PROC1_INTF1_GPIO8_LEVEL_LOW() volatile
{
PROC1_INTF1 &= ~(1u << 0u);
}
inline void toggle_PROC1_INTF1_GPIO8_LEVEL_LOW() volatile
{
PROC1_INTF1 ^= 1u << 0u;
}
inline bool get_PROC1_INTF1_GPIO8_LEVEL_HIGH() volatile
{
return PROC1_INTF1 & (1u << 1u);
}
inline void set_PROC1_INTF1_GPIO8_LEVEL_HIGH() volatile
{
PROC1_INTF1 |= 1u << 1u;
}
inline void clear_PROC1_INTF1_GPIO8_LEVEL_HIGH() volatile
{
PROC1_INTF1 &= ~(1u << 1u);
}
inline void toggle_PROC1_INTF1_GPIO8_LEVEL_HIGH() volatile
{
PROC1_INTF1 ^= 1u << 1u;
}
inline bool get_PROC1_INTF1_GPIO8_EDGE_LOW() volatile
{
return PROC1_INTF1 & (1u << 2u);
}
inline void set_PROC1_INTF1_GPIO8_EDGE_LOW() volatile
{
PROC1_INTF1 |= 1u << 2u;
}
inline void clear_PROC1_INTF1_GPIO8_EDGE_LOW() volatile
{
PROC1_INTF1 &= ~(1u << 2u);
}
inline void toggle_PROC1_INTF1_GPIO8_EDGE_LOW() volatile
{
PROC1_INTF1 ^= 1u << 2u;
}
inline bool get_PROC1_INTF1_GPIO8_EDGE_HIGH() volatile
{
return PROC1_INTF1 & (1u << 3u);
}
inline void set_PROC1_INTF1_GPIO8_EDGE_HIGH() volatile
{
PROC1_INTF1 |= 1u << 3u;
}
inline void clear_PROC1_INTF1_GPIO8_EDGE_HIGH() volatile
{
PROC1_INTF1 &= ~(1u << 3u);
}
inline void toggle_PROC1_INTF1_GPIO8_EDGE_HIGH() volatile
{
PROC1_INTF1 ^= 1u << 3u;
}
inline bool get_PROC1_INTF1_GPIO9_LEVEL_LOW() volatile
{
return PROC1_INTF1 & (1u << 4u);
}
inline void set_PROC1_INTF1_GPIO9_LEVEL_LOW() volatile
{
PROC1_INTF1 |= 1u << 4u;
}
inline void clear_PROC1_INTF1_GPIO9_LEVEL_LOW() volatile
{
PROC1_INTF1 &= ~(1u << 4u);
}
inline void toggle_PROC1_INTF1_GPIO9_LEVEL_LOW() volatile
{
PROC1_INTF1 ^= 1u << 4u;
}
inline bool get_PROC1_INTF1_GPIO9_LEVEL_HIGH() volatile
{
return PROC1_INTF1 & (1u << 5u);
}
inline void set_PROC1_INTF1_GPIO9_LEVEL_HIGH() volatile
{
PROC1_INTF1 |= 1u << 5u;
}
inline void clear_PROC1_INTF1_GPIO9_LEVEL_HIGH() volatile
{
PROC1_INTF1 &= ~(1u << 5u);
}
inline void toggle_PROC1_INTF1_GPIO9_LEVEL_HIGH() volatile
{
PROC1_INTF1 ^= 1u << 5u;
}
inline bool get_PROC1_INTF1_GPIO9_EDGE_LOW() volatile
{
return PROC1_INTF1 & (1u << 6u);
}
inline void set_PROC1_INTF1_GPIO9_EDGE_LOW() volatile
{
PROC1_INTF1 |= 1u << 6u;
}
inline void clear_PROC1_INTF1_GPIO9_EDGE_LOW() volatile
{
PROC1_INTF1 &= ~(1u << 6u);
}
inline void toggle_PROC1_INTF1_GPIO9_EDGE_LOW() volatile
{
PROC1_INTF1 ^= 1u << 6u;
}
inline bool get_PROC1_INTF1_GPIO9_EDGE_HIGH() volatile
{
return PROC1_INTF1 & (1u << 7u);
}
inline void set_PROC1_INTF1_GPIO9_EDGE_HIGH() volatile
{
PROC1_INTF1 |= 1u << 7u;
}
inline void clear_PROC1_INTF1_GPIO9_EDGE_HIGH() volatile
{
PROC1_INTF1 &= ~(1u << 7u);
}
inline void toggle_PROC1_INTF1_GPIO9_EDGE_HIGH() volatile
{
PROC1_INTF1 ^= 1u << 7u;
}
inline bool get_PROC1_INTF1_GPIO10_LEVEL_LOW() volatile
{
return PROC1_INTF1 & (1u << 8u);
}
inline void set_PROC1_INTF1_GPIO10_LEVEL_LOW() volatile
{
PROC1_INTF1 |= 1u << 8u;
}
inline void clear_PROC1_INTF1_GPIO10_LEVEL_LOW() volatile
{
PROC1_INTF1 &= ~(1u << 8u);
}
inline void toggle_PROC1_INTF1_GPIO10_LEVEL_LOW() volatile
{
PROC1_INTF1 ^= 1u << 8u;
}
inline bool get_PROC1_INTF1_GPIO10_LEVEL_HIGH() volatile
{
return PROC1_INTF1 & (1u << 9u);
}
inline void set_PROC1_INTF1_GPIO10_LEVEL_HIGH() volatile
{
PROC1_INTF1 |= 1u << 9u;
}
inline void clear_PROC1_INTF1_GPIO10_LEVEL_HIGH() volatile
{
PROC1_INTF1 &= ~(1u << 9u);
}
inline void toggle_PROC1_INTF1_GPIO10_LEVEL_HIGH() volatile
{
PROC1_INTF1 ^= 1u << 9u;
}
inline bool get_PROC1_INTF1_GPIO10_EDGE_LOW() volatile
{
return PROC1_INTF1 & (1u << 10u);
}
inline void set_PROC1_INTF1_GPIO10_EDGE_LOW() volatile
{
PROC1_INTF1 |= 1u << 10u;
}
inline void clear_PROC1_INTF1_GPIO10_EDGE_LOW() volatile
{
PROC1_INTF1 &= ~(1u << 10u);
}
inline void toggle_PROC1_INTF1_GPIO10_EDGE_LOW() volatile
{
PROC1_INTF1 ^= 1u << 10u;
}
inline bool get_PROC1_INTF1_GPIO10_EDGE_HIGH() volatile
{
return PROC1_INTF1 & (1u << 11u);
}
inline void set_PROC1_INTF1_GPIO10_EDGE_HIGH() volatile
{
PROC1_INTF1 |= 1u << 11u;
}
inline void clear_PROC1_INTF1_GPIO10_EDGE_HIGH() volatile
{
PROC1_INTF1 &= ~(1u << 11u);
}
inline void toggle_PROC1_INTF1_GPIO10_EDGE_HIGH() volatile
{
PROC1_INTF1 ^= 1u << 11u;
}
inline bool get_PROC1_INTF1_GPIO11_LEVEL_LOW() volatile
{
return PROC1_INTF1 & (1u << 12u);
}
inline void set_PROC1_INTF1_GPIO11_LEVEL_LOW() volatile
{
PROC1_INTF1 |= 1u << 12u;
}
inline void clear_PROC1_INTF1_GPIO11_LEVEL_LOW() volatile
{
PROC1_INTF1 &= ~(1u << 12u);
}
inline void toggle_PROC1_INTF1_GPIO11_LEVEL_LOW() volatile
{
PROC1_INTF1 ^= 1u << 12u;
}
inline bool get_PROC1_INTF1_GPIO11_LEVEL_HIGH() volatile
{
return PROC1_INTF1 & (1u << 13u);
}
inline void set_PROC1_INTF1_GPIO11_LEVEL_HIGH() volatile
{
PROC1_INTF1 |= 1u << 13u;
}
inline void clear_PROC1_INTF1_GPIO11_LEVEL_HIGH() volatile
{
PROC1_INTF1 &= ~(1u << 13u);
}
inline void toggle_PROC1_INTF1_GPIO11_LEVEL_HIGH() volatile
{
PROC1_INTF1 ^= 1u << 13u;
}
inline bool get_PROC1_INTF1_GPIO11_EDGE_LOW() volatile
{
return PROC1_INTF1 & (1u << 14u);
}
inline void set_PROC1_INTF1_GPIO11_EDGE_LOW() volatile
{
PROC1_INTF1 |= 1u << 14u;
}
inline void clear_PROC1_INTF1_GPIO11_EDGE_LOW() volatile
{
PROC1_INTF1 &= ~(1u << 14u);
}
inline void toggle_PROC1_INTF1_GPIO11_EDGE_LOW() volatile
{
PROC1_INTF1 ^= 1u << 14u;
}
inline bool get_PROC1_INTF1_GPIO11_EDGE_HIGH() volatile
{
return PROC1_INTF1 & (1u << 15u);
}
inline void set_PROC1_INTF1_GPIO11_EDGE_HIGH() volatile
{
PROC1_INTF1 |= 1u << 15u;
}
inline void clear_PROC1_INTF1_GPIO11_EDGE_HIGH() volatile
{
PROC1_INTF1 &= ~(1u << 15u);
}
inline void toggle_PROC1_INTF1_GPIO11_EDGE_HIGH() volatile
{
PROC1_INTF1 ^= 1u << 15u;
}
inline bool get_PROC1_INTF1_GPIO12_LEVEL_LOW() volatile
{
return PROC1_INTF1 & (1u << 16u);
}
inline void set_PROC1_INTF1_GPIO12_LEVEL_LOW() volatile
{
PROC1_INTF1 |= 1u << 16u;
}
inline void clear_PROC1_INTF1_GPIO12_LEVEL_LOW() volatile
{
PROC1_INTF1 &= ~(1u << 16u);
}
inline void toggle_PROC1_INTF1_GPIO12_LEVEL_LOW() volatile
{
PROC1_INTF1 ^= 1u << 16u;
}
inline bool get_PROC1_INTF1_GPIO12_LEVEL_HIGH() volatile
{
return PROC1_INTF1 & (1u << 17u);
}
inline void set_PROC1_INTF1_GPIO12_LEVEL_HIGH() volatile
{
PROC1_INTF1 |= 1u << 17u;
}
inline void clear_PROC1_INTF1_GPIO12_LEVEL_HIGH() volatile
{
PROC1_INTF1 &= ~(1u << 17u);
}
inline void toggle_PROC1_INTF1_GPIO12_LEVEL_HIGH() volatile
{
PROC1_INTF1 ^= 1u << 17u;
}
inline bool get_PROC1_INTF1_GPIO12_EDGE_LOW() volatile
{
return PROC1_INTF1 & (1u << 18u);
}
inline void set_PROC1_INTF1_GPIO12_EDGE_LOW() volatile
{
PROC1_INTF1 |= 1u << 18u;
}
inline void clear_PROC1_INTF1_GPIO12_EDGE_LOW() volatile
{
PROC1_INTF1 &= ~(1u << 18u);
}
inline void toggle_PROC1_INTF1_GPIO12_EDGE_LOW() volatile
{
PROC1_INTF1 ^= 1u << 18u;
}
inline bool get_PROC1_INTF1_GPIO12_EDGE_HIGH() volatile
{
return PROC1_INTF1 & (1u << 19u);
}
inline void set_PROC1_INTF1_GPIO12_EDGE_HIGH() volatile
{
PROC1_INTF1 |= 1u << 19u;
}
inline void clear_PROC1_INTF1_GPIO12_EDGE_HIGH() volatile
{
PROC1_INTF1 &= ~(1u << 19u);
}
inline void toggle_PROC1_INTF1_GPIO12_EDGE_HIGH() volatile
{
PROC1_INTF1 ^= 1u << 19u;
}
inline bool get_PROC1_INTF1_GPIO13_LEVEL_LOW() volatile
{
return PROC1_INTF1 & (1u << 20u);
}
inline void set_PROC1_INTF1_GPIO13_LEVEL_LOW() volatile
{
PROC1_INTF1 |= 1u << 20u;
}
inline void clear_PROC1_INTF1_GPIO13_LEVEL_LOW() volatile
{
PROC1_INTF1 &= ~(1u << 20u);
}
inline void toggle_PROC1_INTF1_GPIO13_LEVEL_LOW() volatile
{
PROC1_INTF1 ^= 1u << 20u;
}
inline bool get_PROC1_INTF1_GPIO13_LEVEL_HIGH() volatile
{
return PROC1_INTF1 & (1u << 21u);
}
inline void set_PROC1_INTF1_GPIO13_LEVEL_HIGH() volatile
{
PROC1_INTF1 |= 1u << 21u;
}
inline void clear_PROC1_INTF1_GPIO13_LEVEL_HIGH() volatile
{
PROC1_INTF1 &= ~(1u << 21u);
}
inline void toggle_PROC1_INTF1_GPIO13_LEVEL_HIGH() volatile
{
PROC1_INTF1 ^= 1u << 21u;
}
inline bool get_PROC1_INTF1_GPIO13_EDGE_LOW() volatile
{
return PROC1_INTF1 & (1u << 22u);
}
inline void set_PROC1_INTF1_GPIO13_EDGE_LOW() volatile
{
PROC1_INTF1 |= 1u << 22u;
}
inline void clear_PROC1_INTF1_GPIO13_EDGE_LOW() volatile
{
PROC1_INTF1 &= ~(1u << 22u);
}
inline void toggle_PROC1_INTF1_GPIO13_EDGE_LOW() volatile
{
PROC1_INTF1 ^= 1u << 22u;
}
inline bool get_PROC1_INTF1_GPIO13_EDGE_HIGH() volatile
{
return PROC1_INTF1 & (1u << 23u);
}
inline void set_PROC1_INTF1_GPIO13_EDGE_HIGH() volatile
{
PROC1_INTF1 |= 1u << 23u;
}
inline void clear_PROC1_INTF1_GPIO13_EDGE_HIGH() volatile
{
PROC1_INTF1 &= ~(1u << 23u);
}
inline void toggle_PROC1_INTF1_GPIO13_EDGE_HIGH() volatile
{
PROC1_INTF1 ^= 1u << 23u;
}
inline bool get_PROC1_INTF1_GPIO14_LEVEL_LOW() volatile
{
return PROC1_INTF1 & (1u << 24u);
}
inline void set_PROC1_INTF1_GPIO14_LEVEL_LOW() volatile
{
PROC1_INTF1 |= 1u << 24u;
}
inline void clear_PROC1_INTF1_GPIO14_LEVEL_LOW() volatile
{
PROC1_INTF1 &= ~(1u << 24u);
}
inline void toggle_PROC1_INTF1_GPIO14_LEVEL_LOW() volatile
{
PROC1_INTF1 ^= 1u << 24u;
}
inline bool get_PROC1_INTF1_GPIO14_LEVEL_HIGH() volatile
{
return PROC1_INTF1 & (1u << 25u);
}
inline void set_PROC1_INTF1_GPIO14_LEVEL_HIGH() volatile
{
PROC1_INTF1 |= 1u << 25u;
}
inline void clear_PROC1_INTF1_GPIO14_LEVEL_HIGH() volatile
{
PROC1_INTF1 &= ~(1u << 25u);
}
inline void toggle_PROC1_INTF1_GPIO14_LEVEL_HIGH() volatile
{
PROC1_INTF1 ^= 1u << 25u;
}
inline bool get_PROC1_INTF1_GPIO14_EDGE_LOW() volatile
{
return PROC1_INTF1 & (1u << 26u);
}
inline void set_PROC1_INTF1_GPIO14_EDGE_LOW() volatile
{
PROC1_INTF1 |= 1u << 26u;
}
inline void clear_PROC1_INTF1_GPIO14_EDGE_LOW() volatile
{
PROC1_INTF1 &= ~(1u << 26u);
}
inline void toggle_PROC1_INTF1_GPIO14_EDGE_LOW() volatile
{
PROC1_INTF1 ^= 1u << 26u;
}
inline bool get_PROC1_INTF1_GPIO14_EDGE_HIGH() volatile
{
return PROC1_INTF1 & (1u << 27u);
}
inline void set_PROC1_INTF1_GPIO14_EDGE_HIGH() volatile
{
PROC1_INTF1 |= 1u << 27u;
}
inline void clear_PROC1_INTF1_GPIO14_EDGE_HIGH() volatile
{
PROC1_INTF1 &= ~(1u << 27u);
}
inline void toggle_PROC1_INTF1_GPIO14_EDGE_HIGH() volatile
{
PROC1_INTF1 ^= 1u << 27u;
}
inline bool get_PROC1_INTF1_GPIO15_LEVEL_LOW() volatile
{
return PROC1_INTF1 & (1u << 28u);
}
inline void set_PROC1_INTF1_GPIO15_LEVEL_LOW() volatile
{
PROC1_INTF1 |= 1u << 28u;
}
inline void clear_PROC1_INTF1_GPIO15_LEVEL_LOW() volatile
{
PROC1_INTF1 &= ~(1u << 28u);
}
inline void toggle_PROC1_INTF1_GPIO15_LEVEL_LOW() volatile
{
PROC1_INTF1 ^= 1u << 28u;
}
inline bool get_PROC1_INTF1_GPIO15_LEVEL_HIGH() volatile
{
return PROC1_INTF1 & (1u << 29u);
}
inline void set_PROC1_INTF1_GPIO15_LEVEL_HIGH() volatile
{
PROC1_INTF1 |= 1u << 29u;
}
inline void clear_PROC1_INTF1_GPIO15_LEVEL_HIGH() volatile
{
PROC1_INTF1 &= ~(1u << 29u);
}
inline void toggle_PROC1_INTF1_GPIO15_LEVEL_HIGH() volatile
{
PROC1_INTF1 ^= 1u << 29u;
}
inline bool get_PROC1_INTF1_GPIO15_EDGE_LOW() volatile
{
return PROC1_INTF1 & (1u << 30u);
}
inline void set_PROC1_INTF1_GPIO15_EDGE_LOW() volatile
{
PROC1_INTF1 |= 1u << 30u;
}
inline void clear_PROC1_INTF1_GPIO15_EDGE_LOW() volatile
{
PROC1_INTF1 &= ~(1u << 30u);
}
inline void toggle_PROC1_INTF1_GPIO15_EDGE_LOW() volatile
{
PROC1_INTF1 ^= 1u << 30u;
}
inline bool get_PROC1_INTF1_GPIO15_EDGE_HIGH() volatile
{
return PROC1_INTF1 & (1u << 31u);
}
inline void set_PROC1_INTF1_GPIO15_EDGE_HIGH() volatile
{
PROC1_INTF1 |= 1u << 31u;
}
inline void clear_PROC1_INTF1_GPIO15_EDGE_HIGH() volatile
{
PROC1_INTF1 &= ~(1u << 31u);
}
inline void toggle_PROC1_INTF1_GPIO15_EDGE_HIGH() volatile
{
PROC1_INTF1 ^= 1u << 31u;
}
inline void get_PROC1_INTF1(
bool &GPIO8_LEVEL_LOW, bool &GPIO8_LEVEL_HIGH, bool &GPIO8_EDGE_LOW,
bool &GPIO8_EDGE_HIGH, bool &GPIO9_LEVEL_LOW, bool &GPIO9_LEVEL_HIGH,
bool &GPIO9_EDGE_LOW, bool &GPIO9_EDGE_HIGH, bool &GPIO10_LEVEL_LOW,
bool &GPIO10_LEVEL_HIGH, bool &GPIO10_EDGE_LOW, bool &GPIO10_EDGE_HIGH,
bool &GPIO11_LEVEL_LOW, bool &GPIO11_LEVEL_HIGH, bool &GPIO11_EDGE_LOW,
bool &GPIO11_EDGE_HIGH, bool &GPIO12_LEVEL_LOW,
bool &GPIO12_LEVEL_HIGH, bool &GPIO12_EDGE_LOW, bool &GPIO12_EDGE_HIGH,
bool &GPIO13_LEVEL_LOW, bool &GPIO13_LEVEL_HIGH, bool &GPIO13_EDGE_LOW,
bool &GPIO13_EDGE_HIGH, bool &GPIO14_LEVEL_LOW,
bool &GPIO14_LEVEL_HIGH, bool &GPIO14_EDGE_LOW, bool &GPIO14_EDGE_HIGH,
bool &GPIO15_LEVEL_LOW, bool &GPIO15_LEVEL_HIGH, bool &GPIO15_EDGE_LOW,
bool &GPIO15_EDGE_HIGH) volatile
{
uint32_t curr = PROC1_INTF1;
GPIO8_LEVEL_LOW = curr & (1u << 0u);
GPIO8_LEVEL_HIGH = curr & (1u << 1u);
GPIO8_EDGE_LOW = curr & (1u << 2u);
GPIO8_EDGE_HIGH = curr & (1u << 3u);
GPIO9_LEVEL_LOW = curr & (1u << 4u);
GPIO9_LEVEL_HIGH = curr & (1u << 5u);
GPIO9_EDGE_LOW = curr & (1u << 6u);
GPIO9_EDGE_HIGH = curr & (1u << 7u);
GPIO10_LEVEL_LOW = curr & (1u << 8u);
GPIO10_LEVEL_HIGH = curr & (1u << 9u);
GPIO10_EDGE_LOW = curr & (1u << 10u);
GPIO10_EDGE_HIGH = curr & (1u << 11u);
GPIO11_LEVEL_LOW = curr & (1u << 12u);
GPIO11_LEVEL_HIGH = curr & (1u << 13u);
GPIO11_EDGE_LOW = curr & (1u << 14u);
GPIO11_EDGE_HIGH = curr & (1u << 15u);
GPIO12_LEVEL_LOW = curr & (1u << 16u);
GPIO12_LEVEL_HIGH = curr & (1u << 17u);
GPIO12_EDGE_LOW = curr & (1u << 18u);
GPIO12_EDGE_HIGH = curr & (1u << 19u);
GPIO13_LEVEL_LOW = curr & (1u << 20u);
GPIO13_LEVEL_HIGH = curr & (1u << 21u);
GPIO13_EDGE_LOW = curr & (1u << 22u);
GPIO13_EDGE_HIGH = curr & (1u << 23u);
GPIO14_LEVEL_LOW = curr & (1u << 24u);
GPIO14_LEVEL_HIGH = curr & (1u << 25u);
GPIO14_EDGE_LOW = curr & (1u << 26u);
GPIO14_EDGE_HIGH = curr & (1u << 27u);
GPIO15_LEVEL_LOW = curr & (1u << 28u);
GPIO15_LEVEL_HIGH = curr & (1u << 29u);
GPIO15_EDGE_LOW = curr & (1u << 30u);
GPIO15_EDGE_HIGH = curr & (1u << 31u);
}
inline void set_PROC1_INTF1(
bool GPIO8_LEVEL_LOW, bool GPIO8_LEVEL_HIGH, bool GPIO8_EDGE_LOW,
bool GPIO8_EDGE_HIGH, bool GPIO9_LEVEL_LOW, bool GPIO9_LEVEL_HIGH,
bool GPIO9_EDGE_LOW, bool GPIO9_EDGE_HIGH, bool GPIO10_LEVEL_LOW,
bool GPIO10_LEVEL_HIGH, bool GPIO10_EDGE_LOW, bool GPIO10_EDGE_HIGH,
bool GPIO11_LEVEL_LOW, bool GPIO11_LEVEL_HIGH, bool GPIO11_EDGE_LOW,
bool GPIO11_EDGE_HIGH, bool GPIO12_LEVEL_LOW, bool GPIO12_LEVEL_HIGH,
bool GPIO12_EDGE_LOW, bool GPIO12_EDGE_HIGH, bool GPIO13_LEVEL_LOW,
bool GPIO13_LEVEL_HIGH, bool GPIO13_EDGE_LOW, bool GPIO13_EDGE_HIGH,
bool GPIO14_LEVEL_LOW, bool GPIO14_LEVEL_HIGH, bool GPIO14_EDGE_LOW,
bool GPIO14_EDGE_HIGH, bool GPIO15_LEVEL_LOW, bool GPIO15_LEVEL_HIGH,
bool GPIO15_EDGE_LOW, bool GPIO15_EDGE_HIGH) volatile
{
uint32_t curr = PROC1_INTF1;
curr &= ~(0b1u << 0u);
curr |= (GPIO8_LEVEL_LOW & 0b1u) << 0u;
curr &= ~(0b1u << 1u);
curr |= (GPIO8_LEVEL_HIGH & 0b1u) << 1u;
curr &= ~(0b1u << 2u);
curr |= (GPIO8_EDGE_LOW & 0b1u) << 2u;
curr &= ~(0b1u << 3u);
curr |= (GPIO8_EDGE_HIGH & 0b1u) << 3u;
curr &= ~(0b1u << 4u);
curr |= (GPIO9_LEVEL_LOW & 0b1u) << 4u;
curr &= ~(0b1u << 5u);
curr |= (GPIO9_LEVEL_HIGH & 0b1u) << 5u;
curr &= ~(0b1u << 6u);
curr |= (GPIO9_EDGE_LOW & 0b1u) << 6u;
curr &= ~(0b1u << 7u);
curr |= (GPIO9_EDGE_HIGH & 0b1u) << 7u;
curr &= ~(0b1u << 8u);
curr |= (GPIO10_LEVEL_LOW & 0b1u) << 8u;
curr &= ~(0b1u << 9u);
curr |= (GPIO10_LEVEL_HIGH & 0b1u) << 9u;
curr &= ~(0b1u << 10u);
curr |= (GPIO10_EDGE_LOW & 0b1u) << 10u;
curr &= ~(0b1u << 11u);
curr |= (GPIO10_EDGE_HIGH & 0b1u) << 11u;
curr &= ~(0b1u << 12u);
curr |= (GPIO11_LEVEL_LOW & 0b1u) << 12u;
curr &= ~(0b1u << 13u);
curr |= (GPIO11_LEVEL_HIGH & 0b1u) << 13u;
curr &= ~(0b1u << 14u);
curr |= (GPIO11_EDGE_LOW & 0b1u) << 14u;
curr &= ~(0b1u << 15u);
curr |= (GPIO11_EDGE_HIGH & 0b1u) << 15u;
curr &= ~(0b1u << 16u);
curr |= (GPIO12_LEVEL_LOW & 0b1u) << 16u;
curr &= ~(0b1u << 17u);
curr |= (GPIO12_LEVEL_HIGH & 0b1u) << 17u;
curr &= ~(0b1u << 18u);
curr |= (GPIO12_EDGE_LOW & 0b1u) << 18u;
curr &= ~(0b1u << 19u);
curr |= (GPIO12_EDGE_HIGH & 0b1u) << 19u;
curr &= ~(0b1u << 20u);
curr |= (GPIO13_LEVEL_LOW & 0b1u) << 20u;
curr &= ~(0b1u << 21u);
curr |= (GPIO13_LEVEL_HIGH & 0b1u) << 21u;
curr &= ~(0b1u << 22u);
curr |= (GPIO13_EDGE_LOW & 0b1u) << 22u;
curr &= ~(0b1u << 23u);
curr |= (GPIO13_EDGE_HIGH & 0b1u) << 23u;
curr &= ~(0b1u << 24u);
curr |= (GPIO14_LEVEL_LOW & 0b1u) << 24u;
curr &= ~(0b1u << 25u);
curr |= (GPIO14_LEVEL_HIGH & 0b1u) << 25u;
curr &= ~(0b1u << 26u);
curr |= (GPIO14_EDGE_LOW & 0b1u) << 26u;
curr &= ~(0b1u << 27u);
curr |= (GPIO14_EDGE_HIGH & 0b1u) << 27u;
curr &= ~(0b1u << 28u);
curr |= (GPIO15_LEVEL_LOW & 0b1u) << 28u;
curr &= ~(0b1u << 29u);
curr |= (GPIO15_LEVEL_HIGH & 0b1u) << 29u;
curr &= ~(0b1u << 30u);
curr |= (GPIO15_EDGE_LOW & 0b1u) << 30u;
curr &= ~(0b1u << 31u);
curr |= (GPIO15_EDGE_HIGH & 0b1u) << 31u;
PROC1_INTF1 = curr;
}
inline bool get_PROC1_INTF2_GPIO16_LEVEL_LOW() volatile
{
return PROC1_INTF2 & (1u << 0u);
}
inline void set_PROC1_INTF2_GPIO16_LEVEL_LOW() volatile
{
PROC1_INTF2 |= 1u << 0u;
}
inline void clear_PROC1_INTF2_GPIO16_LEVEL_LOW() volatile
{
PROC1_INTF2 &= ~(1u << 0u);
}
inline void toggle_PROC1_INTF2_GPIO16_LEVEL_LOW() volatile
{
PROC1_INTF2 ^= 1u << 0u;
}
inline bool get_PROC1_INTF2_GPIO16_LEVEL_HIGH() volatile
{
return PROC1_INTF2 & (1u << 1u);
}
inline void set_PROC1_INTF2_GPIO16_LEVEL_HIGH() volatile
{
PROC1_INTF2 |= 1u << 1u;
}
inline void clear_PROC1_INTF2_GPIO16_LEVEL_HIGH() volatile
{
PROC1_INTF2 &= ~(1u << 1u);
}
inline void toggle_PROC1_INTF2_GPIO16_LEVEL_HIGH() volatile
{
PROC1_INTF2 ^= 1u << 1u;
}
inline bool get_PROC1_INTF2_GPIO16_EDGE_LOW() volatile
{
return PROC1_INTF2 & (1u << 2u);
}
inline void set_PROC1_INTF2_GPIO16_EDGE_LOW() volatile
{
PROC1_INTF2 |= 1u << 2u;
}
inline void clear_PROC1_INTF2_GPIO16_EDGE_LOW() volatile
{
PROC1_INTF2 &= ~(1u << 2u);
}
inline void toggle_PROC1_INTF2_GPIO16_EDGE_LOW() volatile
{
PROC1_INTF2 ^= 1u << 2u;
}
inline bool get_PROC1_INTF2_GPIO16_EDGE_HIGH() volatile
{
return PROC1_INTF2 & (1u << 3u);
}
inline void set_PROC1_INTF2_GPIO16_EDGE_HIGH() volatile
{
PROC1_INTF2 |= 1u << 3u;
}
inline void clear_PROC1_INTF2_GPIO16_EDGE_HIGH() volatile
{
PROC1_INTF2 &= ~(1u << 3u);
}
inline void toggle_PROC1_INTF2_GPIO16_EDGE_HIGH() volatile
{
PROC1_INTF2 ^= 1u << 3u;
}
inline bool get_PROC1_INTF2_GPIO17_LEVEL_LOW() volatile
{
return PROC1_INTF2 & (1u << 4u);
}
inline void set_PROC1_INTF2_GPIO17_LEVEL_LOW() volatile
{
PROC1_INTF2 |= 1u << 4u;
}
inline void clear_PROC1_INTF2_GPIO17_LEVEL_LOW() volatile
{
PROC1_INTF2 &= ~(1u << 4u);
}
inline void toggle_PROC1_INTF2_GPIO17_LEVEL_LOW() volatile
{
PROC1_INTF2 ^= 1u << 4u;
}
inline bool get_PROC1_INTF2_GPIO17_LEVEL_HIGH() volatile
{
return PROC1_INTF2 & (1u << 5u);
}
inline void set_PROC1_INTF2_GPIO17_LEVEL_HIGH() volatile
{
PROC1_INTF2 |= 1u << 5u;
}
inline void clear_PROC1_INTF2_GPIO17_LEVEL_HIGH() volatile
{
PROC1_INTF2 &= ~(1u << 5u);
}
inline void toggle_PROC1_INTF2_GPIO17_LEVEL_HIGH() volatile
{
PROC1_INTF2 ^= 1u << 5u;
}
inline bool get_PROC1_INTF2_GPIO17_EDGE_LOW() volatile
{
return PROC1_INTF2 & (1u << 6u);
}
inline void set_PROC1_INTF2_GPIO17_EDGE_LOW() volatile
{
PROC1_INTF2 |= 1u << 6u;
}
inline void clear_PROC1_INTF2_GPIO17_EDGE_LOW() volatile
{
PROC1_INTF2 &= ~(1u << 6u);
}
inline void toggle_PROC1_INTF2_GPIO17_EDGE_LOW() volatile
{
PROC1_INTF2 ^= 1u << 6u;
}
inline bool get_PROC1_INTF2_GPIO17_EDGE_HIGH() volatile
{
return PROC1_INTF2 & (1u << 7u);
}
inline void set_PROC1_INTF2_GPIO17_EDGE_HIGH() volatile
{
PROC1_INTF2 |= 1u << 7u;
}
inline void clear_PROC1_INTF2_GPIO17_EDGE_HIGH() volatile
{
PROC1_INTF2 &= ~(1u << 7u);
}
inline void toggle_PROC1_INTF2_GPIO17_EDGE_HIGH() volatile
{
PROC1_INTF2 ^= 1u << 7u;
}
inline bool get_PROC1_INTF2_GPIO18_LEVEL_LOW() volatile
{
return PROC1_INTF2 & (1u << 8u);
}
inline void set_PROC1_INTF2_GPIO18_LEVEL_LOW() volatile
{
PROC1_INTF2 |= 1u << 8u;
}
inline void clear_PROC1_INTF2_GPIO18_LEVEL_LOW() volatile
{
PROC1_INTF2 &= ~(1u << 8u);
}
inline void toggle_PROC1_INTF2_GPIO18_LEVEL_LOW() volatile
{
PROC1_INTF2 ^= 1u << 8u;
}
inline bool get_PROC1_INTF2_GPIO18_LEVEL_HIGH() volatile
{
return PROC1_INTF2 & (1u << 9u);
}
inline void set_PROC1_INTF2_GPIO18_LEVEL_HIGH() volatile
{
PROC1_INTF2 |= 1u << 9u;
}
inline void clear_PROC1_INTF2_GPIO18_LEVEL_HIGH() volatile
{
PROC1_INTF2 &= ~(1u << 9u);
}
inline void toggle_PROC1_INTF2_GPIO18_LEVEL_HIGH() volatile
{
PROC1_INTF2 ^= 1u << 9u;
}
inline bool get_PROC1_INTF2_GPIO18_EDGE_LOW() volatile
{
return PROC1_INTF2 & (1u << 10u);
}
inline void set_PROC1_INTF2_GPIO18_EDGE_LOW() volatile
{
PROC1_INTF2 |= 1u << 10u;
}
inline void clear_PROC1_INTF2_GPIO18_EDGE_LOW() volatile
{
PROC1_INTF2 &= ~(1u << 10u);
}
inline void toggle_PROC1_INTF2_GPIO18_EDGE_LOW() volatile
{
PROC1_INTF2 ^= 1u << 10u;
}
inline bool get_PROC1_INTF2_GPIO18_EDGE_HIGH() volatile
{
return PROC1_INTF2 & (1u << 11u);
}
inline void set_PROC1_INTF2_GPIO18_EDGE_HIGH() volatile
{
PROC1_INTF2 |= 1u << 11u;
}
inline void clear_PROC1_INTF2_GPIO18_EDGE_HIGH() volatile
{
PROC1_INTF2 &= ~(1u << 11u);
}
inline void toggle_PROC1_INTF2_GPIO18_EDGE_HIGH() volatile
{
PROC1_INTF2 ^= 1u << 11u;
}
inline bool get_PROC1_INTF2_GPIO19_LEVEL_LOW() volatile
{
return PROC1_INTF2 & (1u << 12u);
}
inline void set_PROC1_INTF2_GPIO19_LEVEL_LOW() volatile
{
PROC1_INTF2 |= 1u << 12u;
}
inline void clear_PROC1_INTF2_GPIO19_LEVEL_LOW() volatile
{
PROC1_INTF2 &= ~(1u << 12u);
}
inline void toggle_PROC1_INTF2_GPIO19_LEVEL_LOW() volatile
{
PROC1_INTF2 ^= 1u << 12u;
}
inline bool get_PROC1_INTF2_GPIO19_LEVEL_HIGH() volatile
{
return PROC1_INTF2 & (1u << 13u);
}
inline void set_PROC1_INTF2_GPIO19_LEVEL_HIGH() volatile
{
PROC1_INTF2 |= 1u << 13u;
}
inline void clear_PROC1_INTF2_GPIO19_LEVEL_HIGH() volatile
{
PROC1_INTF2 &= ~(1u << 13u);
}
inline void toggle_PROC1_INTF2_GPIO19_LEVEL_HIGH() volatile
{
PROC1_INTF2 ^= 1u << 13u;
}
inline bool get_PROC1_INTF2_GPIO19_EDGE_LOW() volatile
{
return PROC1_INTF2 & (1u << 14u);
}
inline void set_PROC1_INTF2_GPIO19_EDGE_LOW() volatile
{
PROC1_INTF2 |= 1u << 14u;
}
inline void clear_PROC1_INTF2_GPIO19_EDGE_LOW() volatile
{
PROC1_INTF2 &= ~(1u << 14u);
}
inline void toggle_PROC1_INTF2_GPIO19_EDGE_LOW() volatile
{
PROC1_INTF2 ^= 1u << 14u;
}
inline bool get_PROC1_INTF2_GPIO19_EDGE_HIGH() volatile
{
return PROC1_INTF2 & (1u << 15u);
}
inline void set_PROC1_INTF2_GPIO19_EDGE_HIGH() volatile
{
PROC1_INTF2 |= 1u << 15u;
}
inline void clear_PROC1_INTF2_GPIO19_EDGE_HIGH() volatile
{
PROC1_INTF2 &= ~(1u << 15u);
}
inline void toggle_PROC1_INTF2_GPIO19_EDGE_HIGH() volatile
{
PROC1_INTF2 ^= 1u << 15u;
}
inline bool get_PROC1_INTF2_GPIO20_LEVEL_LOW() volatile
{
return PROC1_INTF2 & (1u << 16u);
}
inline void set_PROC1_INTF2_GPIO20_LEVEL_LOW() volatile
{
PROC1_INTF2 |= 1u << 16u;
}
inline void clear_PROC1_INTF2_GPIO20_LEVEL_LOW() volatile
{
PROC1_INTF2 &= ~(1u << 16u);
}
inline void toggle_PROC1_INTF2_GPIO20_LEVEL_LOW() volatile
{
PROC1_INTF2 ^= 1u << 16u;
}
inline bool get_PROC1_INTF2_GPIO20_LEVEL_HIGH() volatile
{
return PROC1_INTF2 & (1u << 17u);
}
inline void set_PROC1_INTF2_GPIO20_LEVEL_HIGH() volatile
{
PROC1_INTF2 |= 1u << 17u;
}
inline void clear_PROC1_INTF2_GPIO20_LEVEL_HIGH() volatile
{
PROC1_INTF2 &= ~(1u << 17u);
}
inline void toggle_PROC1_INTF2_GPIO20_LEVEL_HIGH() volatile
{
PROC1_INTF2 ^= 1u << 17u;
}
inline bool get_PROC1_INTF2_GPIO20_EDGE_LOW() volatile
{
return PROC1_INTF2 & (1u << 18u);
}
inline void set_PROC1_INTF2_GPIO20_EDGE_LOW() volatile
{
PROC1_INTF2 |= 1u << 18u;
}
inline void clear_PROC1_INTF2_GPIO20_EDGE_LOW() volatile
{
PROC1_INTF2 &= ~(1u << 18u);
}
inline void toggle_PROC1_INTF2_GPIO20_EDGE_LOW() volatile
{
PROC1_INTF2 ^= 1u << 18u;
}
inline bool get_PROC1_INTF2_GPIO20_EDGE_HIGH() volatile
{
return PROC1_INTF2 & (1u << 19u);
}
inline void set_PROC1_INTF2_GPIO20_EDGE_HIGH() volatile
{
PROC1_INTF2 |= 1u << 19u;
}
inline void clear_PROC1_INTF2_GPIO20_EDGE_HIGH() volatile
{
PROC1_INTF2 &= ~(1u << 19u);
}
inline void toggle_PROC1_INTF2_GPIO20_EDGE_HIGH() volatile
{
PROC1_INTF2 ^= 1u << 19u;
}
inline bool get_PROC1_INTF2_GPIO21_LEVEL_LOW() volatile
{
return PROC1_INTF2 & (1u << 20u);
}
inline void set_PROC1_INTF2_GPIO21_LEVEL_LOW() volatile
{
PROC1_INTF2 |= 1u << 20u;
}
inline void clear_PROC1_INTF2_GPIO21_LEVEL_LOW() volatile
{
PROC1_INTF2 &= ~(1u << 20u);
}
inline void toggle_PROC1_INTF2_GPIO21_LEVEL_LOW() volatile
{
PROC1_INTF2 ^= 1u << 20u;
}
inline bool get_PROC1_INTF2_GPIO21_LEVEL_HIGH() volatile
{
return PROC1_INTF2 & (1u << 21u);
}
inline void set_PROC1_INTF2_GPIO21_LEVEL_HIGH() volatile
{
PROC1_INTF2 |= 1u << 21u;
}
inline void clear_PROC1_INTF2_GPIO21_LEVEL_HIGH() volatile
{
PROC1_INTF2 &= ~(1u << 21u);
}
inline void toggle_PROC1_INTF2_GPIO21_LEVEL_HIGH() volatile
{
PROC1_INTF2 ^= 1u << 21u;
}
inline bool get_PROC1_INTF2_GPIO21_EDGE_LOW() volatile
{
return PROC1_INTF2 & (1u << 22u);
}
inline void set_PROC1_INTF2_GPIO21_EDGE_LOW() volatile
{
PROC1_INTF2 |= 1u << 22u;
}
inline void clear_PROC1_INTF2_GPIO21_EDGE_LOW() volatile
{
PROC1_INTF2 &= ~(1u << 22u);
}
inline void toggle_PROC1_INTF2_GPIO21_EDGE_LOW() volatile
{
PROC1_INTF2 ^= 1u << 22u;
}
inline bool get_PROC1_INTF2_GPIO21_EDGE_HIGH() volatile
{
return PROC1_INTF2 & (1u << 23u);
}
inline void set_PROC1_INTF2_GPIO21_EDGE_HIGH() volatile
{
PROC1_INTF2 |= 1u << 23u;
}
inline void clear_PROC1_INTF2_GPIO21_EDGE_HIGH() volatile
{
PROC1_INTF2 &= ~(1u << 23u);
}
inline void toggle_PROC1_INTF2_GPIO21_EDGE_HIGH() volatile
{
PROC1_INTF2 ^= 1u << 23u;
}
inline bool get_PROC1_INTF2_GPIO22_LEVEL_LOW() volatile
{
return PROC1_INTF2 & (1u << 24u);
}
inline void set_PROC1_INTF2_GPIO22_LEVEL_LOW() volatile
{
PROC1_INTF2 |= 1u << 24u;
}
inline void clear_PROC1_INTF2_GPIO22_LEVEL_LOW() volatile
{
PROC1_INTF2 &= ~(1u << 24u);
}
inline void toggle_PROC1_INTF2_GPIO22_LEVEL_LOW() volatile
{
PROC1_INTF2 ^= 1u << 24u;
}
inline bool get_PROC1_INTF2_GPIO22_LEVEL_HIGH() volatile
{
return PROC1_INTF2 & (1u << 25u);
}
inline void set_PROC1_INTF2_GPIO22_LEVEL_HIGH() volatile
{
PROC1_INTF2 |= 1u << 25u;
}
inline void clear_PROC1_INTF2_GPIO22_LEVEL_HIGH() volatile
{
PROC1_INTF2 &= ~(1u << 25u);
}
inline void toggle_PROC1_INTF2_GPIO22_LEVEL_HIGH() volatile
{
PROC1_INTF2 ^= 1u << 25u;
}
inline bool get_PROC1_INTF2_GPIO22_EDGE_LOW() volatile
{
return PROC1_INTF2 & (1u << 26u);
}
inline void set_PROC1_INTF2_GPIO22_EDGE_LOW() volatile
{
PROC1_INTF2 |= 1u << 26u;
}
inline void clear_PROC1_INTF2_GPIO22_EDGE_LOW() volatile
{
PROC1_INTF2 &= ~(1u << 26u);
}
inline void toggle_PROC1_INTF2_GPIO22_EDGE_LOW() volatile
{
PROC1_INTF2 ^= 1u << 26u;
}
inline bool get_PROC1_INTF2_GPIO22_EDGE_HIGH() volatile
{
return PROC1_INTF2 & (1u << 27u);
}
inline void set_PROC1_INTF2_GPIO22_EDGE_HIGH() volatile
{
PROC1_INTF2 |= 1u << 27u;
}
inline void clear_PROC1_INTF2_GPIO22_EDGE_HIGH() volatile
{
PROC1_INTF2 &= ~(1u << 27u);
}
inline void toggle_PROC1_INTF2_GPIO22_EDGE_HIGH() volatile
{
PROC1_INTF2 ^= 1u << 27u;
}
inline bool get_PROC1_INTF2_GPIO23_LEVEL_LOW() volatile
{
return PROC1_INTF2 & (1u << 28u);
}
inline void set_PROC1_INTF2_GPIO23_LEVEL_LOW() volatile
{
PROC1_INTF2 |= 1u << 28u;
}
inline void clear_PROC1_INTF2_GPIO23_LEVEL_LOW() volatile
{
PROC1_INTF2 &= ~(1u << 28u);
}
inline void toggle_PROC1_INTF2_GPIO23_LEVEL_LOW() volatile
{
PROC1_INTF2 ^= 1u << 28u;
}
inline bool get_PROC1_INTF2_GPIO23_LEVEL_HIGH() volatile
{
return PROC1_INTF2 & (1u << 29u);
}
inline void set_PROC1_INTF2_GPIO23_LEVEL_HIGH() volatile
{
PROC1_INTF2 |= 1u << 29u;
}
inline void clear_PROC1_INTF2_GPIO23_LEVEL_HIGH() volatile
{
PROC1_INTF2 &= ~(1u << 29u);
}
inline void toggle_PROC1_INTF2_GPIO23_LEVEL_HIGH() volatile
{
PROC1_INTF2 ^= 1u << 29u;
}
inline bool get_PROC1_INTF2_GPIO23_EDGE_LOW() volatile
{
return PROC1_INTF2 & (1u << 30u);
}
inline void set_PROC1_INTF2_GPIO23_EDGE_LOW() volatile
{
PROC1_INTF2 |= 1u << 30u;
}
inline void clear_PROC1_INTF2_GPIO23_EDGE_LOW() volatile
{
PROC1_INTF2 &= ~(1u << 30u);
}
inline void toggle_PROC1_INTF2_GPIO23_EDGE_LOW() volatile
{
PROC1_INTF2 ^= 1u << 30u;
}
inline bool get_PROC1_INTF2_GPIO23_EDGE_HIGH() volatile
{
return PROC1_INTF2 & (1u << 31u);
}
inline void set_PROC1_INTF2_GPIO23_EDGE_HIGH() volatile
{
PROC1_INTF2 |= 1u << 31u;
}
inline void clear_PROC1_INTF2_GPIO23_EDGE_HIGH() volatile
{
PROC1_INTF2 &= ~(1u << 31u);
}
inline void toggle_PROC1_INTF2_GPIO23_EDGE_HIGH() volatile
{
PROC1_INTF2 ^= 1u << 31u;
}
inline void get_PROC1_INTF2(
bool &GPIO16_LEVEL_LOW, bool &GPIO16_LEVEL_HIGH, bool &GPIO16_EDGE_LOW,
bool &GPIO16_EDGE_HIGH, bool &GPIO17_LEVEL_LOW,
bool &GPIO17_LEVEL_HIGH, bool &GPIO17_EDGE_LOW, bool &GPIO17_EDGE_HIGH,
bool &GPIO18_LEVEL_LOW, bool &GPIO18_LEVEL_HIGH, bool &GPIO18_EDGE_LOW,
bool &GPIO18_EDGE_HIGH, bool &GPIO19_LEVEL_LOW,
bool &GPIO19_LEVEL_HIGH, bool &GPIO19_EDGE_LOW, bool &GPIO19_EDGE_HIGH,
bool &GPIO20_LEVEL_LOW, bool &GPIO20_LEVEL_HIGH, bool &GPIO20_EDGE_LOW,
bool &GPIO20_EDGE_HIGH, bool &GPIO21_LEVEL_LOW,
bool &GPIO21_LEVEL_HIGH, bool &GPIO21_EDGE_LOW, bool &GPIO21_EDGE_HIGH,
bool &GPIO22_LEVEL_LOW, bool &GPIO22_LEVEL_HIGH, bool &GPIO22_EDGE_LOW,
bool &GPIO22_EDGE_HIGH, bool &GPIO23_LEVEL_LOW,
bool &GPIO23_LEVEL_HIGH, bool &GPIO23_EDGE_LOW,
bool &GPIO23_EDGE_HIGH) volatile
{
uint32_t curr = PROC1_INTF2;
GPIO16_LEVEL_LOW = curr & (1u << 0u);
GPIO16_LEVEL_HIGH = curr & (1u << 1u);
GPIO16_EDGE_LOW = curr & (1u << 2u);
GPIO16_EDGE_HIGH = curr & (1u << 3u);
GPIO17_LEVEL_LOW = curr & (1u << 4u);
GPIO17_LEVEL_HIGH = curr & (1u << 5u);
GPIO17_EDGE_LOW = curr & (1u << 6u);
GPIO17_EDGE_HIGH = curr & (1u << 7u);
GPIO18_LEVEL_LOW = curr & (1u << 8u);
GPIO18_LEVEL_HIGH = curr & (1u << 9u);
GPIO18_EDGE_LOW = curr & (1u << 10u);
GPIO18_EDGE_HIGH = curr & (1u << 11u);
GPIO19_LEVEL_LOW = curr & (1u << 12u);
GPIO19_LEVEL_HIGH = curr & (1u << 13u);
GPIO19_EDGE_LOW = curr & (1u << 14u);
GPIO19_EDGE_HIGH = curr & (1u << 15u);
GPIO20_LEVEL_LOW = curr & (1u << 16u);
GPIO20_LEVEL_HIGH = curr & (1u << 17u);
GPIO20_EDGE_LOW = curr & (1u << 18u);
GPIO20_EDGE_HIGH = curr & (1u << 19u);
GPIO21_LEVEL_LOW = curr & (1u << 20u);
GPIO21_LEVEL_HIGH = curr & (1u << 21u);
GPIO21_EDGE_LOW = curr & (1u << 22u);
GPIO21_EDGE_HIGH = curr & (1u << 23u);
GPIO22_LEVEL_LOW = curr & (1u << 24u);
GPIO22_LEVEL_HIGH = curr & (1u << 25u);
GPIO22_EDGE_LOW = curr & (1u << 26u);
GPIO22_EDGE_HIGH = curr & (1u << 27u);
GPIO23_LEVEL_LOW = curr & (1u << 28u);
GPIO23_LEVEL_HIGH = curr & (1u << 29u);
GPIO23_EDGE_LOW = curr & (1u << 30u);
GPIO23_EDGE_HIGH = curr & (1u << 31u);
}
inline void set_PROC1_INTF2(
bool GPIO16_LEVEL_LOW, bool GPIO16_LEVEL_HIGH, bool GPIO16_EDGE_LOW,
bool GPIO16_EDGE_HIGH, bool GPIO17_LEVEL_LOW, bool GPIO17_LEVEL_HIGH,
bool GPIO17_EDGE_LOW, bool GPIO17_EDGE_HIGH, bool GPIO18_LEVEL_LOW,
bool GPIO18_LEVEL_HIGH, bool GPIO18_EDGE_LOW, bool GPIO18_EDGE_HIGH,
bool GPIO19_LEVEL_LOW, bool GPIO19_LEVEL_HIGH, bool GPIO19_EDGE_LOW,
bool GPIO19_EDGE_HIGH, bool GPIO20_LEVEL_LOW, bool GPIO20_LEVEL_HIGH,
bool GPIO20_EDGE_LOW, bool GPIO20_EDGE_HIGH, bool GPIO21_LEVEL_LOW,
bool GPIO21_LEVEL_HIGH, bool GPIO21_EDGE_LOW, bool GPIO21_EDGE_HIGH,
bool GPIO22_LEVEL_LOW, bool GPIO22_LEVEL_HIGH, bool GPIO22_EDGE_LOW,
bool GPIO22_EDGE_HIGH, bool GPIO23_LEVEL_LOW, bool GPIO23_LEVEL_HIGH,
bool GPIO23_EDGE_LOW, bool GPIO23_EDGE_HIGH) volatile
{
uint32_t curr = PROC1_INTF2;
curr &= ~(0b1u << 0u);
curr |= (GPIO16_LEVEL_LOW & 0b1u) << 0u;
curr &= ~(0b1u << 1u);
curr |= (GPIO16_LEVEL_HIGH & 0b1u) << 1u;
curr &= ~(0b1u << 2u);
curr |= (GPIO16_EDGE_LOW & 0b1u) << 2u;
curr &= ~(0b1u << 3u);
curr |= (GPIO16_EDGE_HIGH & 0b1u) << 3u;
curr &= ~(0b1u << 4u);
curr |= (GPIO17_LEVEL_LOW & 0b1u) << 4u;
curr &= ~(0b1u << 5u);
curr |= (GPIO17_LEVEL_HIGH & 0b1u) << 5u;
curr &= ~(0b1u << 6u);
curr |= (GPIO17_EDGE_LOW & 0b1u) << 6u;
curr &= ~(0b1u << 7u);
curr |= (GPIO17_EDGE_HIGH & 0b1u) << 7u;
curr &= ~(0b1u << 8u);
curr |= (GPIO18_LEVEL_LOW & 0b1u) << 8u;
curr &= ~(0b1u << 9u);
curr |= (GPIO18_LEVEL_HIGH & 0b1u) << 9u;
curr &= ~(0b1u << 10u);
curr |= (GPIO18_EDGE_LOW & 0b1u) << 10u;
curr &= ~(0b1u << 11u);
curr |= (GPIO18_EDGE_HIGH & 0b1u) << 11u;
curr &= ~(0b1u << 12u);
curr |= (GPIO19_LEVEL_LOW & 0b1u) << 12u;
curr &= ~(0b1u << 13u);
curr |= (GPIO19_LEVEL_HIGH & 0b1u) << 13u;
curr &= ~(0b1u << 14u);
curr |= (GPIO19_EDGE_LOW & 0b1u) << 14u;
curr &= ~(0b1u << 15u);
curr |= (GPIO19_EDGE_HIGH & 0b1u) << 15u;
curr &= ~(0b1u << 16u);
curr |= (GPIO20_LEVEL_LOW & 0b1u) << 16u;
curr &= ~(0b1u << 17u);
curr |= (GPIO20_LEVEL_HIGH & 0b1u) << 17u;
curr &= ~(0b1u << 18u);
curr |= (GPIO20_EDGE_LOW & 0b1u) << 18u;
curr &= ~(0b1u << 19u);
curr |= (GPIO20_EDGE_HIGH & 0b1u) << 19u;
curr &= ~(0b1u << 20u);
curr |= (GPIO21_LEVEL_LOW & 0b1u) << 20u;
curr &= ~(0b1u << 21u);
curr |= (GPIO21_LEVEL_HIGH & 0b1u) << 21u;
curr &= ~(0b1u << 22u);
curr |= (GPIO21_EDGE_LOW & 0b1u) << 22u;
curr &= ~(0b1u << 23u);
curr |= (GPIO21_EDGE_HIGH & 0b1u) << 23u;
curr &= ~(0b1u << 24u);
curr |= (GPIO22_LEVEL_LOW & 0b1u) << 24u;
curr &= ~(0b1u << 25u);
curr |= (GPIO22_LEVEL_HIGH & 0b1u) << 25u;
curr &= ~(0b1u << 26u);
curr |= (GPIO22_EDGE_LOW & 0b1u) << 26u;
curr &= ~(0b1u << 27u);
curr |= (GPIO22_EDGE_HIGH & 0b1u) << 27u;
curr &= ~(0b1u << 28u);
curr |= (GPIO23_LEVEL_LOW & 0b1u) << 28u;
curr &= ~(0b1u << 29u);
curr |= (GPIO23_LEVEL_HIGH & 0b1u) << 29u;
curr &= ~(0b1u << 30u);
curr |= (GPIO23_EDGE_LOW & 0b1u) << 30u;
curr &= ~(0b1u << 31u);
curr |= (GPIO23_EDGE_HIGH & 0b1u) << 31u;
PROC1_INTF2 = curr;
}
inline bool get_PROC1_INTF3_GPIO24_LEVEL_LOW() volatile
{
return PROC1_INTF3 & (1u << 0u);
}
inline void set_PROC1_INTF3_GPIO24_LEVEL_LOW() volatile
{
PROC1_INTF3 |= 1u << 0u;
}
inline void clear_PROC1_INTF3_GPIO24_LEVEL_LOW() volatile
{
PROC1_INTF3 &= ~(1u << 0u);
}
inline void toggle_PROC1_INTF3_GPIO24_LEVEL_LOW() volatile
{
PROC1_INTF3 ^= 1u << 0u;
}
inline bool get_PROC1_INTF3_GPIO24_LEVEL_HIGH() volatile
{
return PROC1_INTF3 & (1u << 1u);
}
inline void set_PROC1_INTF3_GPIO24_LEVEL_HIGH() volatile
{
PROC1_INTF3 |= 1u << 1u;
}
inline void clear_PROC1_INTF3_GPIO24_LEVEL_HIGH() volatile
{
PROC1_INTF3 &= ~(1u << 1u);
}
inline void toggle_PROC1_INTF3_GPIO24_LEVEL_HIGH() volatile
{
PROC1_INTF3 ^= 1u << 1u;
}
inline bool get_PROC1_INTF3_GPIO24_EDGE_LOW() volatile
{
return PROC1_INTF3 & (1u << 2u);
}
inline void set_PROC1_INTF3_GPIO24_EDGE_LOW() volatile
{
PROC1_INTF3 |= 1u << 2u;
}
inline void clear_PROC1_INTF3_GPIO24_EDGE_LOW() volatile
{
PROC1_INTF3 &= ~(1u << 2u);
}
inline void toggle_PROC1_INTF3_GPIO24_EDGE_LOW() volatile
{
PROC1_INTF3 ^= 1u << 2u;
}
inline bool get_PROC1_INTF3_GPIO24_EDGE_HIGH() volatile
{
return PROC1_INTF3 & (1u << 3u);
}
inline void set_PROC1_INTF3_GPIO24_EDGE_HIGH() volatile
{
PROC1_INTF3 |= 1u << 3u;
}
inline void clear_PROC1_INTF3_GPIO24_EDGE_HIGH() volatile
{
PROC1_INTF3 &= ~(1u << 3u);
}
inline void toggle_PROC1_INTF3_GPIO24_EDGE_HIGH() volatile
{
PROC1_INTF3 ^= 1u << 3u;
}
inline bool get_PROC1_INTF3_GPIO25_LEVEL_LOW() volatile
{
return PROC1_INTF3 & (1u << 4u);
}
inline void set_PROC1_INTF3_GPIO25_LEVEL_LOW() volatile
{
PROC1_INTF3 |= 1u << 4u;
}
inline void clear_PROC1_INTF3_GPIO25_LEVEL_LOW() volatile
{
PROC1_INTF3 &= ~(1u << 4u);
}
inline void toggle_PROC1_INTF3_GPIO25_LEVEL_LOW() volatile
{
PROC1_INTF3 ^= 1u << 4u;
}
inline bool get_PROC1_INTF3_GPIO25_LEVEL_HIGH() volatile
{
return PROC1_INTF3 & (1u << 5u);
}
inline void set_PROC1_INTF3_GPIO25_LEVEL_HIGH() volatile
{
PROC1_INTF3 |= 1u << 5u;
}
inline void clear_PROC1_INTF3_GPIO25_LEVEL_HIGH() volatile
{
PROC1_INTF3 &= ~(1u << 5u);
}
inline void toggle_PROC1_INTF3_GPIO25_LEVEL_HIGH() volatile
{
PROC1_INTF3 ^= 1u << 5u;
}
inline bool get_PROC1_INTF3_GPIO25_EDGE_LOW() volatile
{
return PROC1_INTF3 & (1u << 6u);
}
inline void set_PROC1_INTF3_GPIO25_EDGE_LOW() volatile
{
PROC1_INTF3 |= 1u << 6u;
}
inline void clear_PROC1_INTF3_GPIO25_EDGE_LOW() volatile
{
PROC1_INTF3 &= ~(1u << 6u);
}
inline void toggle_PROC1_INTF3_GPIO25_EDGE_LOW() volatile
{
PROC1_INTF3 ^= 1u << 6u;
}
inline bool get_PROC1_INTF3_GPIO25_EDGE_HIGH() volatile
{
return PROC1_INTF3 & (1u << 7u);
}
inline void set_PROC1_INTF3_GPIO25_EDGE_HIGH() volatile
{
PROC1_INTF3 |= 1u << 7u;
}
inline void clear_PROC1_INTF3_GPIO25_EDGE_HIGH() volatile
{
PROC1_INTF3 &= ~(1u << 7u);
}
inline void toggle_PROC1_INTF3_GPIO25_EDGE_HIGH() volatile
{
PROC1_INTF3 ^= 1u << 7u;
}
inline bool get_PROC1_INTF3_GPIO26_LEVEL_LOW() volatile
{
return PROC1_INTF3 & (1u << 8u);
}
inline void set_PROC1_INTF3_GPIO26_LEVEL_LOW() volatile
{
PROC1_INTF3 |= 1u << 8u;
}
inline void clear_PROC1_INTF3_GPIO26_LEVEL_LOW() volatile
{
PROC1_INTF3 &= ~(1u << 8u);
}
inline void toggle_PROC1_INTF3_GPIO26_LEVEL_LOW() volatile
{
PROC1_INTF3 ^= 1u << 8u;
}
inline bool get_PROC1_INTF3_GPIO26_LEVEL_HIGH() volatile
{
return PROC1_INTF3 & (1u << 9u);
}
inline void set_PROC1_INTF3_GPIO26_LEVEL_HIGH() volatile
{
PROC1_INTF3 |= 1u << 9u;
}
inline void clear_PROC1_INTF3_GPIO26_LEVEL_HIGH() volatile
{
PROC1_INTF3 &= ~(1u << 9u);
}
inline void toggle_PROC1_INTF3_GPIO26_LEVEL_HIGH() volatile
{
PROC1_INTF3 ^= 1u << 9u;
}
inline bool get_PROC1_INTF3_GPIO26_EDGE_LOW() volatile
{
return PROC1_INTF3 & (1u << 10u);
}
inline void set_PROC1_INTF3_GPIO26_EDGE_LOW() volatile
{
PROC1_INTF3 |= 1u << 10u;
}
inline void clear_PROC1_INTF3_GPIO26_EDGE_LOW() volatile
{
PROC1_INTF3 &= ~(1u << 10u);
}
inline void toggle_PROC1_INTF3_GPIO26_EDGE_LOW() volatile
{
PROC1_INTF3 ^= 1u << 10u;
}
inline bool get_PROC1_INTF3_GPIO26_EDGE_HIGH() volatile
{
return PROC1_INTF3 & (1u << 11u);
}
inline void set_PROC1_INTF3_GPIO26_EDGE_HIGH() volatile
{
PROC1_INTF3 |= 1u << 11u;
}
inline void clear_PROC1_INTF3_GPIO26_EDGE_HIGH() volatile
{
PROC1_INTF3 &= ~(1u << 11u);
}
inline void toggle_PROC1_INTF3_GPIO26_EDGE_HIGH() volatile
{
PROC1_INTF3 ^= 1u << 11u;
}
inline bool get_PROC1_INTF3_GPIO27_LEVEL_LOW() volatile
{
return PROC1_INTF3 & (1u << 12u);
}
inline void set_PROC1_INTF3_GPIO27_LEVEL_LOW() volatile
{
PROC1_INTF3 |= 1u << 12u;
}
inline void clear_PROC1_INTF3_GPIO27_LEVEL_LOW() volatile
{
PROC1_INTF3 &= ~(1u << 12u);
}
inline void toggle_PROC1_INTF3_GPIO27_LEVEL_LOW() volatile
{
PROC1_INTF3 ^= 1u << 12u;
}
inline bool get_PROC1_INTF3_GPIO27_LEVEL_HIGH() volatile
{
return PROC1_INTF3 & (1u << 13u);
}
inline void set_PROC1_INTF3_GPIO27_LEVEL_HIGH() volatile
{
PROC1_INTF3 |= 1u << 13u;
}
inline void clear_PROC1_INTF3_GPIO27_LEVEL_HIGH() volatile
{
PROC1_INTF3 &= ~(1u << 13u);
}
inline void toggle_PROC1_INTF3_GPIO27_LEVEL_HIGH() volatile
{
PROC1_INTF3 ^= 1u << 13u;
}
inline bool get_PROC1_INTF3_GPIO27_EDGE_LOW() volatile
{
return PROC1_INTF3 & (1u << 14u);
}
inline void set_PROC1_INTF3_GPIO27_EDGE_LOW() volatile
{
PROC1_INTF3 |= 1u << 14u;
}
inline void clear_PROC1_INTF3_GPIO27_EDGE_LOW() volatile
{
PROC1_INTF3 &= ~(1u << 14u);
}
inline void toggle_PROC1_INTF3_GPIO27_EDGE_LOW() volatile
{
PROC1_INTF3 ^= 1u << 14u;
}
inline bool get_PROC1_INTF3_GPIO27_EDGE_HIGH() volatile
{
return PROC1_INTF3 & (1u << 15u);
}
inline void set_PROC1_INTF3_GPIO27_EDGE_HIGH() volatile
{
PROC1_INTF3 |= 1u << 15u;
}
inline void clear_PROC1_INTF3_GPIO27_EDGE_HIGH() volatile
{
PROC1_INTF3 &= ~(1u << 15u);
}
inline void toggle_PROC1_INTF3_GPIO27_EDGE_HIGH() volatile
{
PROC1_INTF3 ^= 1u << 15u;
}
inline bool get_PROC1_INTF3_GPIO28_LEVEL_LOW() volatile
{
return PROC1_INTF3 & (1u << 16u);
}
inline void set_PROC1_INTF3_GPIO28_LEVEL_LOW() volatile
{
PROC1_INTF3 |= 1u << 16u;
}
inline void clear_PROC1_INTF3_GPIO28_LEVEL_LOW() volatile
{
PROC1_INTF3 &= ~(1u << 16u);
}
inline void toggle_PROC1_INTF3_GPIO28_LEVEL_LOW() volatile
{
PROC1_INTF3 ^= 1u << 16u;
}
inline bool get_PROC1_INTF3_GPIO28_LEVEL_HIGH() volatile
{
return PROC1_INTF3 & (1u << 17u);
}
inline void set_PROC1_INTF3_GPIO28_LEVEL_HIGH() volatile
{
PROC1_INTF3 |= 1u << 17u;
}
inline void clear_PROC1_INTF3_GPIO28_LEVEL_HIGH() volatile
{
PROC1_INTF3 &= ~(1u << 17u);
}
inline void toggle_PROC1_INTF3_GPIO28_LEVEL_HIGH() volatile
{
PROC1_INTF3 ^= 1u << 17u;
}
inline bool get_PROC1_INTF3_GPIO28_EDGE_LOW() volatile
{
return PROC1_INTF3 & (1u << 18u);
}
inline void set_PROC1_INTF3_GPIO28_EDGE_LOW() volatile
{
PROC1_INTF3 |= 1u << 18u;
}
inline void clear_PROC1_INTF3_GPIO28_EDGE_LOW() volatile
{
PROC1_INTF3 &= ~(1u << 18u);
}
inline void toggle_PROC1_INTF3_GPIO28_EDGE_LOW() volatile
{
PROC1_INTF3 ^= 1u << 18u;
}
inline bool get_PROC1_INTF3_GPIO28_EDGE_HIGH() volatile
{
return PROC1_INTF3 & (1u << 19u);
}
inline void set_PROC1_INTF3_GPIO28_EDGE_HIGH() volatile
{
PROC1_INTF3 |= 1u << 19u;
}
inline void clear_PROC1_INTF3_GPIO28_EDGE_HIGH() volatile
{
PROC1_INTF3 &= ~(1u << 19u);
}
inline void toggle_PROC1_INTF3_GPIO28_EDGE_HIGH() volatile
{
PROC1_INTF3 ^= 1u << 19u;
}
inline bool get_PROC1_INTF3_GPIO29_LEVEL_LOW() volatile
{
return PROC1_INTF3 & (1u << 20u);
}
inline void set_PROC1_INTF3_GPIO29_LEVEL_LOW() volatile
{
PROC1_INTF3 |= 1u << 20u;
}
inline void clear_PROC1_INTF3_GPIO29_LEVEL_LOW() volatile
{
PROC1_INTF3 &= ~(1u << 20u);
}
inline void toggle_PROC1_INTF3_GPIO29_LEVEL_LOW() volatile
{
PROC1_INTF3 ^= 1u << 20u;
}
inline bool get_PROC1_INTF3_GPIO29_LEVEL_HIGH() volatile
{
return PROC1_INTF3 & (1u << 21u);
}
inline void set_PROC1_INTF3_GPIO29_LEVEL_HIGH() volatile
{
PROC1_INTF3 |= 1u << 21u;
}
inline void clear_PROC1_INTF3_GPIO29_LEVEL_HIGH() volatile
{
PROC1_INTF3 &= ~(1u << 21u);
}
inline void toggle_PROC1_INTF3_GPIO29_LEVEL_HIGH() volatile
{
PROC1_INTF3 ^= 1u << 21u;
}
inline bool get_PROC1_INTF3_GPIO29_EDGE_LOW() volatile
{
return PROC1_INTF3 & (1u << 22u);
}
inline void set_PROC1_INTF3_GPIO29_EDGE_LOW() volatile
{
PROC1_INTF3 |= 1u << 22u;
}
inline void clear_PROC1_INTF3_GPIO29_EDGE_LOW() volatile
{
PROC1_INTF3 &= ~(1u << 22u);
}
inline void toggle_PROC1_INTF3_GPIO29_EDGE_LOW() volatile
{
PROC1_INTF3 ^= 1u << 22u;
}
inline bool get_PROC1_INTF3_GPIO29_EDGE_HIGH() volatile
{
return PROC1_INTF3 & (1u << 23u);
}
inline void set_PROC1_INTF3_GPIO29_EDGE_HIGH() volatile
{
PROC1_INTF3 |= 1u << 23u;
}
inline void clear_PROC1_INTF3_GPIO29_EDGE_HIGH() volatile
{
PROC1_INTF3 &= ~(1u << 23u);
}
inline void toggle_PROC1_INTF3_GPIO29_EDGE_HIGH() volatile
{
PROC1_INTF3 ^= 1u << 23u;
}
inline void get_PROC1_INTF3(bool &GPIO24_LEVEL_LOW,
bool &GPIO24_LEVEL_HIGH, bool &GPIO24_EDGE_LOW,
bool &GPIO24_EDGE_HIGH, bool &GPIO25_LEVEL_LOW,
bool &GPIO25_LEVEL_HIGH, bool &GPIO25_EDGE_LOW,
bool &GPIO25_EDGE_HIGH, bool &GPIO26_LEVEL_LOW,
bool &GPIO26_LEVEL_HIGH, bool &GPIO26_EDGE_LOW,
bool &GPIO26_EDGE_HIGH, bool &GPIO27_LEVEL_LOW,
bool &GPIO27_LEVEL_HIGH, bool &GPIO27_EDGE_LOW,
bool &GPIO27_EDGE_HIGH, bool &GPIO28_LEVEL_LOW,
bool &GPIO28_LEVEL_HIGH, bool &GPIO28_EDGE_LOW,
bool &GPIO28_EDGE_HIGH, bool &GPIO29_LEVEL_LOW,
bool &GPIO29_LEVEL_HIGH, bool &GPIO29_EDGE_LOW,
bool &GPIO29_EDGE_HIGH) volatile
{
uint32_t curr = PROC1_INTF3;
GPIO24_LEVEL_LOW = curr & (1u << 0u);
GPIO24_LEVEL_HIGH = curr & (1u << 1u);
GPIO24_EDGE_LOW = curr & (1u << 2u);
GPIO24_EDGE_HIGH = curr & (1u << 3u);
GPIO25_LEVEL_LOW = curr & (1u << 4u);
GPIO25_LEVEL_HIGH = curr & (1u << 5u);
GPIO25_EDGE_LOW = curr & (1u << 6u);
GPIO25_EDGE_HIGH = curr & (1u << 7u);
GPIO26_LEVEL_LOW = curr & (1u << 8u);
GPIO26_LEVEL_HIGH = curr & (1u << 9u);
GPIO26_EDGE_LOW = curr & (1u << 10u);
GPIO26_EDGE_HIGH = curr & (1u << 11u);
GPIO27_LEVEL_LOW = curr & (1u << 12u);
GPIO27_LEVEL_HIGH = curr & (1u << 13u);
GPIO27_EDGE_LOW = curr & (1u << 14u);
GPIO27_EDGE_HIGH = curr & (1u << 15u);
GPIO28_LEVEL_LOW = curr & (1u << 16u);
GPIO28_LEVEL_HIGH = curr & (1u << 17u);
GPIO28_EDGE_LOW = curr & (1u << 18u);
GPIO28_EDGE_HIGH = curr & (1u << 19u);
GPIO29_LEVEL_LOW = curr & (1u << 20u);
GPIO29_LEVEL_HIGH = curr & (1u << 21u);
GPIO29_EDGE_LOW = curr & (1u << 22u);
GPIO29_EDGE_HIGH = curr & (1u << 23u);
}
inline void set_PROC1_INTF3(
bool GPIO24_LEVEL_LOW, bool GPIO24_LEVEL_HIGH, bool GPIO24_EDGE_LOW,
bool GPIO24_EDGE_HIGH, bool GPIO25_LEVEL_LOW, bool GPIO25_LEVEL_HIGH,
bool GPIO25_EDGE_LOW, bool GPIO25_EDGE_HIGH, bool GPIO26_LEVEL_LOW,
bool GPIO26_LEVEL_HIGH, bool GPIO26_EDGE_LOW, bool GPIO26_EDGE_HIGH,
bool GPIO27_LEVEL_LOW, bool GPIO27_LEVEL_HIGH, bool GPIO27_EDGE_LOW,
bool GPIO27_EDGE_HIGH, bool GPIO28_LEVEL_LOW, bool GPIO28_LEVEL_HIGH,
bool GPIO28_EDGE_LOW, bool GPIO28_EDGE_HIGH, bool GPIO29_LEVEL_LOW,
bool GPIO29_LEVEL_HIGH, bool GPIO29_EDGE_LOW,
bool GPIO29_EDGE_HIGH) volatile
{
uint32_t curr = PROC1_INTF3;
curr &= ~(0b1u << 0u);
curr |= (GPIO24_LEVEL_LOW & 0b1u) << 0u;
curr &= ~(0b1u << 1u);
curr |= (GPIO24_LEVEL_HIGH & 0b1u) << 1u;
curr &= ~(0b1u << 2u);
curr |= (GPIO24_EDGE_LOW & 0b1u) << 2u;
curr &= ~(0b1u << 3u);
curr |= (GPIO24_EDGE_HIGH & 0b1u) << 3u;
curr &= ~(0b1u << 4u);
curr |= (GPIO25_LEVEL_LOW & 0b1u) << 4u;
curr &= ~(0b1u << 5u);
curr |= (GPIO25_LEVEL_HIGH & 0b1u) << 5u;
curr &= ~(0b1u << 6u);
curr |= (GPIO25_EDGE_LOW & 0b1u) << 6u;
curr &= ~(0b1u << 7u);
curr |= (GPIO25_EDGE_HIGH & 0b1u) << 7u;
curr &= ~(0b1u << 8u);
curr |= (GPIO26_LEVEL_LOW & 0b1u) << 8u;
curr &= ~(0b1u << 9u);
curr |= (GPIO26_LEVEL_HIGH & 0b1u) << 9u;
curr &= ~(0b1u << 10u);
curr |= (GPIO26_EDGE_LOW & 0b1u) << 10u;
curr &= ~(0b1u << 11u);
curr |= (GPIO26_EDGE_HIGH & 0b1u) << 11u;
curr &= ~(0b1u << 12u);
curr |= (GPIO27_LEVEL_LOW & 0b1u) << 12u;
curr &= ~(0b1u << 13u);
curr |= (GPIO27_LEVEL_HIGH & 0b1u) << 13u;
curr &= ~(0b1u << 14u);
curr |= (GPIO27_EDGE_LOW & 0b1u) << 14u;
curr &= ~(0b1u << 15u);
curr |= (GPIO27_EDGE_HIGH & 0b1u) << 15u;
curr &= ~(0b1u << 16u);
curr |= (GPIO28_LEVEL_LOW & 0b1u) << 16u;
curr &= ~(0b1u << 17u);
curr |= (GPIO28_LEVEL_HIGH & 0b1u) << 17u;
curr &= ~(0b1u << 18u);
curr |= (GPIO28_EDGE_LOW & 0b1u) << 18u;
curr &= ~(0b1u << 19u);
curr |= (GPIO28_EDGE_HIGH & 0b1u) << 19u;
curr &= ~(0b1u << 20u);
curr |= (GPIO29_LEVEL_LOW & 0b1u) << 20u;
curr &= ~(0b1u << 21u);
curr |= (GPIO29_LEVEL_HIGH & 0b1u) << 21u;
curr &= ~(0b1u << 22u);
curr |= (GPIO29_EDGE_LOW & 0b1u) << 22u;
curr &= ~(0b1u << 23u);
curr |= (GPIO29_EDGE_HIGH & 0b1u) << 23u;
PROC1_INTF3 = curr;
}
inline bool get_PROC1_INTS0_GPIO0_LEVEL_LOW() volatile
{
return PROC1_INTS0 & (1u << 0u);
}
inline bool get_PROC1_INTS0_GPIO0_LEVEL_HIGH() volatile
{
return PROC1_INTS0 & (1u << 1u);
}
inline bool get_PROC1_INTS0_GPIO0_EDGE_LOW() volatile
{
return PROC1_INTS0 & (1u << 2u);
}
inline bool get_PROC1_INTS0_GPIO0_EDGE_HIGH() volatile
{
return PROC1_INTS0 & (1u << 3u);
}
inline bool get_PROC1_INTS0_GPIO1_LEVEL_LOW() volatile
{
return PROC1_INTS0 & (1u << 4u);
}
inline bool get_PROC1_INTS0_GPIO1_LEVEL_HIGH() volatile
{
return PROC1_INTS0 & (1u << 5u);
}
inline bool get_PROC1_INTS0_GPIO1_EDGE_LOW() volatile
{
return PROC1_INTS0 & (1u << 6u);
}
inline bool get_PROC1_INTS0_GPIO1_EDGE_HIGH() volatile
{
return PROC1_INTS0 & (1u << 7u);
}
inline bool get_PROC1_INTS0_GPIO2_LEVEL_LOW() volatile
{
return PROC1_INTS0 & (1u << 8u);
}
inline bool get_PROC1_INTS0_GPIO2_LEVEL_HIGH() volatile
{
return PROC1_INTS0 & (1u << 9u);
}
inline bool get_PROC1_INTS0_GPIO2_EDGE_LOW() volatile
{
return PROC1_INTS0 & (1u << 10u);
}
inline bool get_PROC1_INTS0_GPIO2_EDGE_HIGH() volatile
{
return PROC1_INTS0 & (1u << 11u);
}
inline bool get_PROC1_INTS0_GPIO3_LEVEL_LOW() volatile
{
return PROC1_INTS0 & (1u << 12u);
}
inline bool get_PROC1_INTS0_GPIO3_LEVEL_HIGH() volatile
{
return PROC1_INTS0 & (1u << 13u);
}
inline bool get_PROC1_INTS0_GPIO3_EDGE_LOW() volatile
{
return PROC1_INTS0 & (1u << 14u);
}
inline bool get_PROC1_INTS0_GPIO3_EDGE_HIGH() volatile
{
return PROC1_INTS0 & (1u << 15u);
}
inline bool get_PROC1_INTS0_GPIO4_LEVEL_LOW() volatile
{
return PROC1_INTS0 & (1u << 16u);
}
inline bool get_PROC1_INTS0_GPIO4_LEVEL_HIGH() volatile
{
return PROC1_INTS0 & (1u << 17u);
}
inline bool get_PROC1_INTS0_GPIO4_EDGE_LOW() volatile
{
return PROC1_INTS0 & (1u << 18u);
}
inline bool get_PROC1_INTS0_GPIO4_EDGE_HIGH() volatile
{
return PROC1_INTS0 & (1u << 19u);
}
inline bool get_PROC1_INTS0_GPIO5_LEVEL_LOW() volatile
{
return PROC1_INTS0 & (1u << 20u);
}
inline bool get_PROC1_INTS0_GPIO5_LEVEL_HIGH() volatile
{
return PROC1_INTS0 & (1u << 21u);
}
inline bool get_PROC1_INTS0_GPIO5_EDGE_LOW() volatile
{
return PROC1_INTS0 & (1u << 22u);
}
inline bool get_PROC1_INTS0_GPIO5_EDGE_HIGH() volatile
{
return PROC1_INTS0 & (1u << 23u);
}
inline bool get_PROC1_INTS0_GPIO6_LEVEL_LOW() volatile
{
return PROC1_INTS0 & (1u << 24u);
}
inline bool get_PROC1_INTS0_GPIO6_LEVEL_HIGH() volatile
{
return PROC1_INTS0 & (1u << 25u);
}
inline bool get_PROC1_INTS0_GPIO6_EDGE_LOW() volatile
{
return PROC1_INTS0 & (1u << 26u);
}
inline bool get_PROC1_INTS0_GPIO6_EDGE_HIGH() volatile
{
return PROC1_INTS0 & (1u << 27u);
}
inline bool get_PROC1_INTS0_GPIO7_LEVEL_LOW() volatile
{
return PROC1_INTS0 & (1u << 28u);
}
inline bool get_PROC1_INTS0_GPIO7_LEVEL_HIGH() volatile
{
return PROC1_INTS0 & (1u << 29u);
}
inline bool get_PROC1_INTS0_GPIO7_EDGE_LOW() volatile
{
return PROC1_INTS0 & (1u << 30u);
}
inline bool get_PROC1_INTS0_GPIO7_EDGE_HIGH() volatile
{
return PROC1_INTS0 & (1u << 31u);
}
inline void get_PROC1_INTS0(
bool &GPIO0_LEVEL_LOW, bool &GPIO0_LEVEL_HIGH, bool &GPIO0_EDGE_LOW,
bool &GPIO0_EDGE_HIGH, bool &GPIO1_LEVEL_LOW, bool &GPIO1_LEVEL_HIGH,
bool &GPIO1_EDGE_LOW, bool &GPIO1_EDGE_HIGH, bool &GPIO2_LEVEL_LOW,
bool &GPIO2_LEVEL_HIGH, bool &GPIO2_EDGE_LOW, bool &GPIO2_EDGE_HIGH,
bool &GPIO3_LEVEL_LOW, bool &GPIO3_LEVEL_HIGH, bool &GPIO3_EDGE_LOW,
bool &GPIO3_EDGE_HIGH, bool &GPIO4_LEVEL_LOW, bool &GPIO4_LEVEL_HIGH,
bool &GPIO4_EDGE_LOW, bool &GPIO4_EDGE_HIGH, bool &GPIO5_LEVEL_LOW,
bool &GPIO5_LEVEL_HIGH, bool &GPIO5_EDGE_LOW, bool &GPIO5_EDGE_HIGH,
bool &GPIO6_LEVEL_LOW, bool &GPIO6_LEVEL_HIGH, bool &GPIO6_EDGE_LOW,
bool &GPIO6_EDGE_HIGH, bool &GPIO7_LEVEL_LOW, bool &GPIO7_LEVEL_HIGH,
bool &GPIO7_EDGE_LOW, bool &GPIO7_EDGE_HIGH) volatile
{
uint32_t curr = PROC1_INTS0;
GPIO0_LEVEL_LOW = curr & (1u << 0u);
GPIO0_LEVEL_HIGH = curr & (1u << 1u);
GPIO0_EDGE_LOW = curr & (1u << 2u);
GPIO0_EDGE_HIGH = curr & (1u << 3u);
GPIO1_LEVEL_LOW = curr & (1u << 4u);
GPIO1_LEVEL_HIGH = curr & (1u << 5u);
GPIO1_EDGE_LOW = curr & (1u << 6u);
GPIO1_EDGE_HIGH = curr & (1u << 7u);
GPIO2_LEVEL_LOW = curr & (1u << 8u);
GPIO2_LEVEL_HIGH = curr & (1u << 9u);
GPIO2_EDGE_LOW = curr & (1u << 10u);
GPIO2_EDGE_HIGH = curr & (1u << 11u);
GPIO3_LEVEL_LOW = curr & (1u << 12u);
GPIO3_LEVEL_HIGH = curr & (1u << 13u);
GPIO3_EDGE_LOW = curr & (1u << 14u);
GPIO3_EDGE_HIGH = curr & (1u << 15u);
GPIO4_LEVEL_LOW = curr & (1u << 16u);
GPIO4_LEVEL_HIGH = curr & (1u << 17u);
GPIO4_EDGE_LOW = curr & (1u << 18u);
GPIO4_EDGE_HIGH = curr & (1u << 19u);
GPIO5_LEVEL_LOW = curr & (1u << 20u);
GPIO5_LEVEL_HIGH = curr & (1u << 21u);
GPIO5_EDGE_LOW = curr & (1u << 22u);
GPIO5_EDGE_HIGH = curr & (1u << 23u);
GPIO6_LEVEL_LOW = curr & (1u << 24u);
GPIO6_LEVEL_HIGH = curr & (1u << 25u);
GPIO6_EDGE_LOW = curr & (1u << 26u);
GPIO6_EDGE_HIGH = curr & (1u << 27u);
GPIO7_LEVEL_LOW = curr & (1u << 28u);
GPIO7_LEVEL_HIGH = curr & (1u << 29u);
GPIO7_EDGE_LOW = curr & (1u << 30u);
GPIO7_EDGE_HIGH = curr & (1u << 31u);
}
inline bool get_PROC1_INTS1_GPIO8_LEVEL_LOW() volatile
{
return PROC1_INTS1 & (1u << 0u);
}
inline bool get_PROC1_INTS1_GPIO8_LEVEL_HIGH() volatile
{
return PROC1_INTS1 & (1u << 1u);
}
inline bool get_PROC1_INTS1_GPIO8_EDGE_LOW() volatile
{
return PROC1_INTS1 & (1u << 2u);
}
inline bool get_PROC1_INTS1_GPIO8_EDGE_HIGH() volatile
{
return PROC1_INTS1 & (1u << 3u);
}
inline bool get_PROC1_INTS1_GPIO9_LEVEL_LOW() volatile
{
return PROC1_INTS1 & (1u << 4u);
}
inline bool get_PROC1_INTS1_GPIO9_LEVEL_HIGH() volatile
{
return PROC1_INTS1 & (1u << 5u);
}
inline bool get_PROC1_INTS1_GPIO9_EDGE_LOW() volatile
{
return PROC1_INTS1 & (1u << 6u);
}
inline bool get_PROC1_INTS1_GPIO9_EDGE_HIGH() volatile
{
return PROC1_INTS1 & (1u << 7u);
}
inline bool get_PROC1_INTS1_GPIO10_LEVEL_LOW() volatile
{
return PROC1_INTS1 & (1u << 8u);
}
inline bool get_PROC1_INTS1_GPIO10_LEVEL_HIGH() volatile
{
return PROC1_INTS1 & (1u << 9u);
}
inline bool get_PROC1_INTS1_GPIO10_EDGE_LOW() volatile
{
return PROC1_INTS1 & (1u << 10u);
}
inline bool get_PROC1_INTS1_GPIO10_EDGE_HIGH() volatile
{
return PROC1_INTS1 & (1u << 11u);
}
inline bool get_PROC1_INTS1_GPIO11_LEVEL_LOW() volatile
{
return PROC1_INTS1 & (1u << 12u);
}
inline bool get_PROC1_INTS1_GPIO11_LEVEL_HIGH() volatile
{
return PROC1_INTS1 & (1u << 13u);
}
inline bool get_PROC1_INTS1_GPIO11_EDGE_LOW() volatile
{
return PROC1_INTS1 & (1u << 14u);
}
inline bool get_PROC1_INTS1_GPIO11_EDGE_HIGH() volatile
{
return PROC1_INTS1 & (1u << 15u);
}
inline bool get_PROC1_INTS1_GPIO12_LEVEL_LOW() volatile
{
return PROC1_INTS1 & (1u << 16u);
}
inline bool get_PROC1_INTS1_GPIO12_LEVEL_HIGH() volatile
{
return PROC1_INTS1 & (1u << 17u);
}
inline bool get_PROC1_INTS1_GPIO12_EDGE_LOW() volatile
{
return PROC1_INTS1 & (1u << 18u);
}
inline bool get_PROC1_INTS1_GPIO12_EDGE_HIGH() volatile
{
return PROC1_INTS1 & (1u << 19u);
}
inline bool get_PROC1_INTS1_GPIO13_LEVEL_LOW() volatile
{
return PROC1_INTS1 & (1u << 20u);
}
inline bool get_PROC1_INTS1_GPIO13_LEVEL_HIGH() volatile
{
return PROC1_INTS1 & (1u << 21u);
}
inline bool get_PROC1_INTS1_GPIO13_EDGE_LOW() volatile
{
return PROC1_INTS1 & (1u << 22u);
}
inline bool get_PROC1_INTS1_GPIO13_EDGE_HIGH() volatile
{
return PROC1_INTS1 & (1u << 23u);
}
inline bool get_PROC1_INTS1_GPIO14_LEVEL_LOW() volatile
{
return PROC1_INTS1 & (1u << 24u);
}
inline bool get_PROC1_INTS1_GPIO14_LEVEL_HIGH() volatile
{
return PROC1_INTS1 & (1u << 25u);
}
inline bool get_PROC1_INTS1_GPIO14_EDGE_LOW() volatile
{
return PROC1_INTS1 & (1u << 26u);
}
inline bool get_PROC1_INTS1_GPIO14_EDGE_HIGH() volatile
{
return PROC1_INTS1 & (1u << 27u);
}
inline bool get_PROC1_INTS1_GPIO15_LEVEL_LOW() volatile
{
return PROC1_INTS1 & (1u << 28u);
}
inline bool get_PROC1_INTS1_GPIO15_LEVEL_HIGH() volatile
{
return PROC1_INTS1 & (1u << 29u);
}
inline bool get_PROC1_INTS1_GPIO15_EDGE_LOW() volatile
{
return PROC1_INTS1 & (1u << 30u);
}
inline bool get_PROC1_INTS1_GPIO15_EDGE_HIGH() volatile
{
return PROC1_INTS1 & (1u << 31u);
}
inline void get_PROC1_INTS1(
bool &GPIO8_LEVEL_LOW, bool &GPIO8_LEVEL_HIGH, bool &GPIO8_EDGE_LOW,
bool &GPIO8_EDGE_HIGH, bool &GPIO9_LEVEL_LOW, bool &GPIO9_LEVEL_HIGH,
bool &GPIO9_EDGE_LOW, bool &GPIO9_EDGE_HIGH, bool &GPIO10_LEVEL_LOW,
bool &GPIO10_LEVEL_HIGH, bool &GPIO10_EDGE_LOW, bool &GPIO10_EDGE_HIGH,
bool &GPIO11_LEVEL_LOW, bool &GPIO11_LEVEL_HIGH, bool &GPIO11_EDGE_LOW,
bool &GPIO11_EDGE_HIGH, bool &GPIO12_LEVEL_LOW,
bool &GPIO12_LEVEL_HIGH, bool &GPIO12_EDGE_LOW, bool &GPIO12_EDGE_HIGH,
bool &GPIO13_LEVEL_LOW, bool &GPIO13_LEVEL_HIGH, bool &GPIO13_EDGE_LOW,
bool &GPIO13_EDGE_HIGH, bool &GPIO14_LEVEL_LOW,
bool &GPIO14_LEVEL_HIGH, bool &GPIO14_EDGE_LOW, bool &GPIO14_EDGE_HIGH,
bool &GPIO15_LEVEL_LOW, bool &GPIO15_LEVEL_HIGH, bool &GPIO15_EDGE_LOW,
bool &GPIO15_EDGE_HIGH) volatile
{
uint32_t curr = PROC1_INTS1;
GPIO8_LEVEL_LOW = curr & (1u << 0u);
GPIO8_LEVEL_HIGH = curr & (1u << 1u);
GPIO8_EDGE_LOW = curr & (1u << 2u);
GPIO8_EDGE_HIGH = curr & (1u << 3u);
GPIO9_LEVEL_LOW = curr & (1u << 4u);
GPIO9_LEVEL_HIGH = curr & (1u << 5u);
GPIO9_EDGE_LOW = curr & (1u << 6u);
GPIO9_EDGE_HIGH = curr & (1u << 7u);
GPIO10_LEVEL_LOW = curr & (1u << 8u);
GPIO10_LEVEL_HIGH = curr & (1u << 9u);
GPIO10_EDGE_LOW = curr & (1u << 10u);
GPIO10_EDGE_HIGH = curr & (1u << 11u);
GPIO11_LEVEL_LOW = curr & (1u << 12u);
GPIO11_LEVEL_HIGH = curr & (1u << 13u);
GPIO11_EDGE_LOW = curr & (1u << 14u);
GPIO11_EDGE_HIGH = curr & (1u << 15u);
GPIO12_LEVEL_LOW = curr & (1u << 16u);
GPIO12_LEVEL_HIGH = curr & (1u << 17u);
GPIO12_EDGE_LOW = curr & (1u << 18u);
GPIO12_EDGE_HIGH = curr & (1u << 19u);
GPIO13_LEVEL_LOW = curr & (1u << 20u);
GPIO13_LEVEL_HIGH = curr & (1u << 21u);
GPIO13_EDGE_LOW = curr & (1u << 22u);
GPIO13_EDGE_HIGH = curr & (1u << 23u);
GPIO14_LEVEL_LOW = curr & (1u << 24u);
GPIO14_LEVEL_HIGH = curr & (1u << 25u);
GPIO14_EDGE_LOW = curr & (1u << 26u);
GPIO14_EDGE_HIGH = curr & (1u << 27u);
GPIO15_LEVEL_LOW = curr & (1u << 28u);
GPIO15_LEVEL_HIGH = curr & (1u << 29u);
GPIO15_EDGE_LOW = curr & (1u << 30u);
GPIO15_EDGE_HIGH = curr & (1u << 31u);
}
inline bool get_PROC1_INTS2_GPIO16_LEVEL_LOW() volatile
{
return PROC1_INTS2 & (1u << 0u);
}
inline bool get_PROC1_INTS2_GPIO16_LEVEL_HIGH() volatile
{
return PROC1_INTS2 & (1u << 1u);
}
inline bool get_PROC1_INTS2_GPIO16_EDGE_LOW() volatile
{
return PROC1_INTS2 & (1u << 2u);
}
inline bool get_PROC1_INTS2_GPIO16_EDGE_HIGH() volatile
{
return PROC1_INTS2 & (1u << 3u);
}
inline bool get_PROC1_INTS2_GPIO17_LEVEL_LOW() volatile
{
return PROC1_INTS2 & (1u << 4u);
}
inline bool get_PROC1_INTS2_GPIO17_LEVEL_HIGH() volatile
{
return PROC1_INTS2 & (1u << 5u);
}
inline bool get_PROC1_INTS2_GPIO17_EDGE_LOW() volatile
{
return PROC1_INTS2 & (1u << 6u);
}
inline bool get_PROC1_INTS2_GPIO17_EDGE_HIGH() volatile
{
return PROC1_INTS2 & (1u << 7u);
}
inline bool get_PROC1_INTS2_GPIO18_LEVEL_LOW() volatile
{
return PROC1_INTS2 & (1u << 8u);
}
inline bool get_PROC1_INTS2_GPIO18_LEVEL_HIGH() volatile
{
return PROC1_INTS2 & (1u << 9u);
}
inline bool get_PROC1_INTS2_GPIO18_EDGE_LOW() volatile
{
return PROC1_INTS2 & (1u << 10u);
}
inline bool get_PROC1_INTS2_GPIO18_EDGE_HIGH() volatile
{
return PROC1_INTS2 & (1u << 11u);
}
inline bool get_PROC1_INTS2_GPIO19_LEVEL_LOW() volatile
{
return PROC1_INTS2 & (1u << 12u);
}
inline bool get_PROC1_INTS2_GPIO19_LEVEL_HIGH() volatile
{
return PROC1_INTS2 & (1u << 13u);
}
inline bool get_PROC1_INTS2_GPIO19_EDGE_LOW() volatile
{
return PROC1_INTS2 & (1u << 14u);
}
inline bool get_PROC1_INTS2_GPIO19_EDGE_HIGH() volatile
{
return PROC1_INTS2 & (1u << 15u);
}
inline bool get_PROC1_INTS2_GPIO20_LEVEL_LOW() volatile
{
return PROC1_INTS2 & (1u << 16u);
}
inline bool get_PROC1_INTS2_GPIO20_LEVEL_HIGH() volatile
{
return PROC1_INTS2 & (1u << 17u);
}
inline bool get_PROC1_INTS2_GPIO20_EDGE_LOW() volatile
{
return PROC1_INTS2 & (1u << 18u);
}
inline bool get_PROC1_INTS2_GPIO20_EDGE_HIGH() volatile
{
return PROC1_INTS2 & (1u << 19u);
}
inline bool get_PROC1_INTS2_GPIO21_LEVEL_LOW() volatile
{
return PROC1_INTS2 & (1u << 20u);
}
inline bool get_PROC1_INTS2_GPIO21_LEVEL_HIGH() volatile
{
return PROC1_INTS2 & (1u << 21u);
}
inline bool get_PROC1_INTS2_GPIO21_EDGE_LOW() volatile
{
return PROC1_INTS2 & (1u << 22u);
}
inline bool get_PROC1_INTS2_GPIO21_EDGE_HIGH() volatile
{
return PROC1_INTS2 & (1u << 23u);
}
inline bool get_PROC1_INTS2_GPIO22_LEVEL_LOW() volatile
{
return PROC1_INTS2 & (1u << 24u);
}
inline bool get_PROC1_INTS2_GPIO22_LEVEL_HIGH() volatile
{
return PROC1_INTS2 & (1u << 25u);
}
inline bool get_PROC1_INTS2_GPIO22_EDGE_LOW() volatile
{
return PROC1_INTS2 & (1u << 26u);
}
inline bool get_PROC1_INTS2_GPIO22_EDGE_HIGH() volatile
{
return PROC1_INTS2 & (1u << 27u);
}
inline bool get_PROC1_INTS2_GPIO23_LEVEL_LOW() volatile
{
return PROC1_INTS2 & (1u << 28u);
}
inline bool get_PROC1_INTS2_GPIO23_LEVEL_HIGH() volatile
{
return PROC1_INTS2 & (1u << 29u);
}
inline bool get_PROC1_INTS2_GPIO23_EDGE_LOW() volatile
{
return PROC1_INTS2 & (1u << 30u);
}
inline bool get_PROC1_INTS2_GPIO23_EDGE_HIGH() volatile
{
return PROC1_INTS2 & (1u << 31u);
}
inline void get_PROC1_INTS2(
bool &GPIO16_LEVEL_LOW, bool &GPIO16_LEVEL_HIGH, bool &GPIO16_EDGE_LOW,
bool &GPIO16_EDGE_HIGH, bool &GPIO17_LEVEL_LOW,
bool &GPIO17_LEVEL_HIGH, bool &GPIO17_EDGE_LOW, bool &GPIO17_EDGE_HIGH,
bool &GPIO18_LEVEL_LOW, bool &GPIO18_LEVEL_HIGH, bool &GPIO18_EDGE_LOW,
bool &GPIO18_EDGE_HIGH, bool &GPIO19_LEVEL_LOW,
bool &GPIO19_LEVEL_HIGH, bool &GPIO19_EDGE_LOW, bool &GPIO19_EDGE_HIGH,
bool &GPIO20_LEVEL_LOW, bool &GPIO20_LEVEL_HIGH, bool &GPIO20_EDGE_LOW,
bool &GPIO20_EDGE_HIGH, bool &GPIO21_LEVEL_LOW,
bool &GPIO21_LEVEL_HIGH, bool &GPIO21_EDGE_LOW, bool &GPIO21_EDGE_HIGH,
bool &GPIO22_LEVEL_LOW, bool &GPIO22_LEVEL_HIGH, bool &GPIO22_EDGE_LOW,
bool &GPIO22_EDGE_HIGH, bool &GPIO23_LEVEL_LOW,
bool &GPIO23_LEVEL_HIGH, bool &GPIO23_EDGE_LOW,
bool &GPIO23_EDGE_HIGH) volatile
{
uint32_t curr = PROC1_INTS2;
GPIO16_LEVEL_LOW = curr & (1u << 0u);
GPIO16_LEVEL_HIGH = curr & (1u << 1u);
GPIO16_EDGE_LOW = curr & (1u << 2u);
GPIO16_EDGE_HIGH = curr & (1u << 3u);
GPIO17_LEVEL_LOW = curr & (1u << 4u);
GPIO17_LEVEL_HIGH = curr & (1u << 5u);
GPIO17_EDGE_LOW = curr & (1u << 6u);
GPIO17_EDGE_HIGH = curr & (1u << 7u);
GPIO18_LEVEL_LOW = curr & (1u << 8u);
GPIO18_LEVEL_HIGH = curr & (1u << 9u);
GPIO18_EDGE_LOW = curr & (1u << 10u);
GPIO18_EDGE_HIGH = curr & (1u << 11u);
GPIO19_LEVEL_LOW = curr & (1u << 12u);
GPIO19_LEVEL_HIGH = curr & (1u << 13u);
GPIO19_EDGE_LOW = curr & (1u << 14u);
GPIO19_EDGE_HIGH = curr & (1u << 15u);
GPIO20_LEVEL_LOW = curr & (1u << 16u);
GPIO20_LEVEL_HIGH = curr & (1u << 17u);
GPIO20_EDGE_LOW = curr & (1u << 18u);
GPIO20_EDGE_HIGH = curr & (1u << 19u);
GPIO21_LEVEL_LOW = curr & (1u << 20u);
GPIO21_LEVEL_HIGH = curr & (1u << 21u);
GPIO21_EDGE_LOW = curr & (1u << 22u);
GPIO21_EDGE_HIGH = curr & (1u << 23u);
GPIO22_LEVEL_LOW = curr & (1u << 24u);
GPIO22_LEVEL_HIGH = curr & (1u << 25u);
GPIO22_EDGE_LOW = curr & (1u << 26u);
GPIO22_EDGE_HIGH = curr & (1u << 27u);
GPIO23_LEVEL_LOW = curr & (1u << 28u);
GPIO23_LEVEL_HIGH = curr & (1u << 29u);
GPIO23_EDGE_LOW = curr & (1u << 30u);
GPIO23_EDGE_HIGH = curr & (1u << 31u);
}
inline bool get_PROC1_INTS3_GPIO24_LEVEL_LOW() volatile
{
return PROC1_INTS3 & (1u << 0u);
}
inline bool get_PROC1_INTS3_GPIO24_LEVEL_HIGH() volatile
{
return PROC1_INTS3 & (1u << 1u);
}
inline bool get_PROC1_INTS3_GPIO24_EDGE_LOW() volatile
{
return PROC1_INTS3 & (1u << 2u);
}
inline bool get_PROC1_INTS3_GPIO24_EDGE_HIGH() volatile
{
return PROC1_INTS3 & (1u << 3u);
}
inline bool get_PROC1_INTS3_GPIO25_LEVEL_LOW() volatile
{
return PROC1_INTS3 & (1u << 4u);
}
inline bool get_PROC1_INTS3_GPIO25_LEVEL_HIGH() volatile
{
return PROC1_INTS3 & (1u << 5u);
}
inline bool get_PROC1_INTS3_GPIO25_EDGE_LOW() volatile
{
return PROC1_INTS3 & (1u << 6u);
}
inline bool get_PROC1_INTS3_GPIO25_EDGE_HIGH() volatile
{
return PROC1_INTS3 & (1u << 7u);
}
inline bool get_PROC1_INTS3_GPIO26_LEVEL_LOW() volatile
{
return PROC1_INTS3 & (1u << 8u);
}
inline bool get_PROC1_INTS3_GPIO26_LEVEL_HIGH() volatile
{
return PROC1_INTS3 & (1u << 9u);
}
inline bool get_PROC1_INTS3_GPIO26_EDGE_LOW() volatile
{
return PROC1_INTS3 & (1u << 10u);
}
inline bool get_PROC1_INTS3_GPIO26_EDGE_HIGH() volatile
{
return PROC1_INTS3 & (1u << 11u);
}
inline bool get_PROC1_INTS3_GPIO27_LEVEL_LOW() volatile
{
return PROC1_INTS3 & (1u << 12u);
}
inline bool get_PROC1_INTS3_GPIO27_LEVEL_HIGH() volatile
{
return PROC1_INTS3 & (1u << 13u);
}
inline bool get_PROC1_INTS3_GPIO27_EDGE_LOW() volatile
{
return PROC1_INTS3 & (1u << 14u);
}
inline bool get_PROC1_INTS3_GPIO27_EDGE_HIGH() volatile
{
return PROC1_INTS3 & (1u << 15u);
}
inline bool get_PROC1_INTS3_GPIO28_LEVEL_LOW() volatile
{
return PROC1_INTS3 & (1u << 16u);
}
inline bool get_PROC1_INTS3_GPIO28_LEVEL_HIGH() volatile
{
return PROC1_INTS3 & (1u << 17u);
}
inline bool get_PROC1_INTS3_GPIO28_EDGE_LOW() volatile
{
return PROC1_INTS3 & (1u << 18u);
}
inline bool get_PROC1_INTS3_GPIO28_EDGE_HIGH() volatile
{
return PROC1_INTS3 & (1u << 19u);
}
inline bool get_PROC1_INTS3_GPIO29_LEVEL_LOW() volatile
{
return PROC1_INTS3 & (1u << 20u);
}
inline bool get_PROC1_INTS3_GPIO29_LEVEL_HIGH() volatile
{
return PROC1_INTS3 & (1u << 21u);
}
inline bool get_PROC1_INTS3_GPIO29_EDGE_LOW() volatile
{
return PROC1_INTS3 & (1u << 22u);
}
inline bool get_PROC1_INTS3_GPIO29_EDGE_HIGH() volatile
{
return PROC1_INTS3 & (1u << 23u);
}
inline void get_PROC1_INTS3(bool &GPIO24_LEVEL_LOW,
bool &GPIO24_LEVEL_HIGH, bool &GPIO24_EDGE_LOW,
bool &GPIO24_EDGE_HIGH, bool &GPIO25_LEVEL_LOW,
bool &GPIO25_LEVEL_HIGH, bool &GPIO25_EDGE_LOW,
bool &GPIO25_EDGE_HIGH, bool &GPIO26_LEVEL_LOW,
bool &GPIO26_LEVEL_HIGH, bool &GPIO26_EDGE_LOW,
bool &GPIO26_EDGE_HIGH, bool &GPIO27_LEVEL_LOW,
bool &GPIO27_LEVEL_HIGH, bool &GPIO27_EDGE_LOW,
bool &GPIO27_EDGE_HIGH, bool &GPIO28_LEVEL_LOW,
bool &GPIO28_LEVEL_HIGH, bool &GPIO28_EDGE_LOW,
bool &GPIO28_EDGE_HIGH, bool &GPIO29_LEVEL_LOW,
bool &GPIO29_LEVEL_HIGH, bool &GPIO29_EDGE_LOW,
bool &GPIO29_EDGE_HIGH) volatile
{
uint32_t curr = PROC1_INTS3;
GPIO24_LEVEL_LOW = curr & (1u << 0u);
GPIO24_LEVEL_HIGH = curr & (1u << 1u);
GPIO24_EDGE_LOW = curr & (1u << 2u);
GPIO24_EDGE_HIGH = curr & (1u << 3u);
GPIO25_LEVEL_LOW = curr & (1u << 4u);
GPIO25_LEVEL_HIGH = curr & (1u << 5u);
GPIO25_EDGE_LOW = curr & (1u << 6u);
GPIO25_EDGE_HIGH = curr & (1u << 7u);
GPIO26_LEVEL_LOW = curr & (1u << 8u);
GPIO26_LEVEL_HIGH = curr & (1u << 9u);
GPIO26_EDGE_LOW = curr & (1u << 10u);
GPIO26_EDGE_HIGH = curr & (1u << 11u);
GPIO27_LEVEL_LOW = curr & (1u << 12u);
GPIO27_LEVEL_HIGH = curr & (1u << 13u);
GPIO27_EDGE_LOW = curr & (1u << 14u);
GPIO27_EDGE_HIGH = curr & (1u << 15u);
GPIO28_LEVEL_LOW = curr & (1u << 16u);
GPIO28_LEVEL_HIGH = curr & (1u << 17u);
GPIO28_EDGE_LOW = curr & (1u << 18u);
GPIO28_EDGE_HIGH = curr & (1u << 19u);
GPIO29_LEVEL_LOW = curr & (1u << 20u);
GPIO29_LEVEL_HIGH = curr & (1u << 21u);
GPIO29_EDGE_LOW = curr & (1u << 22u);
GPIO29_EDGE_HIGH = curr & (1u << 23u);
}
inline bool get_DORMANT_WAKE_INTE0_GPIO0_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTE0 & (1u << 0u);
}
inline void set_DORMANT_WAKE_INTE0_GPIO0_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE0 |= 1u << 0u;
}
inline void clear_DORMANT_WAKE_INTE0_GPIO0_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE0 &= ~(1u << 0u);
}
inline void toggle_DORMANT_WAKE_INTE0_GPIO0_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE0 ^= 1u << 0u;
}
inline bool get_DORMANT_WAKE_INTE0_GPIO0_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTE0 & (1u << 1u);
}
inline void set_DORMANT_WAKE_INTE0_GPIO0_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE0 |= 1u << 1u;
}
inline void clear_DORMANT_WAKE_INTE0_GPIO0_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE0 &= ~(1u << 1u);
}
inline void toggle_DORMANT_WAKE_INTE0_GPIO0_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE0 ^= 1u << 1u;
}
inline bool get_DORMANT_WAKE_INTE0_GPIO0_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTE0 & (1u << 2u);
}
inline void set_DORMANT_WAKE_INTE0_GPIO0_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE0 |= 1u << 2u;
}
inline void clear_DORMANT_WAKE_INTE0_GPIO0_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE0 &= ~(1u << 2u);
}
inline void toggle_DORMANT_WAKE_INTE0_GPIO0_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE0 ^= 1u << 2u;
}
inline bool get_DORMANT_WAKE_INTE0_GPIO0_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTE0 & (1u << 3u);
}
inline void set_DORMANT_WAKE_INTE0_GPIO0_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE0 |= 1u << 3u;
}
inline void clear_DORMANT_WAKE_INTE0_GPIO0_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE0 &= ~(1u << 3u);
}
inline void toggle_DORMANT_WAKE_INTE0_GPIO0_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE0 ^= 1u << 3u;
}
inline bool get_DORMANT_WAKE_INTE0_GPIO1_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTE0 & (1u << 4u);
}
inline void set_DORMANT_WAKE_INTE0_GPIO1_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE0 |= 1u << 4u;
}
inline void clear_DORMANT_WAKE_INTE0_GPIO1_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE0 &= ~(1u << 4u);
}
inline void toggle_DORMANT_WAKE_INTE0_GPIO1_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE0 ^= 1u << 4u;
}
inline bool get_DORMANT_WAKE_INTE0_GPIO1_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTE0 & (1u << 5u);
}
inline void set_DORMANT_WAKE_INTE0_GPIO1_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE0 |= 1u << 5u;
}
inline void clear_DORMANT_WAKE_INTE0_GPIO1_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE0 &= ~(1u << 5u);
}
inline void toggle_DORMANT_WAKE_INTE0_GPIO1_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE0 ^= 1u << 5u;
}
inline bool get_DORMANT_WAKE_INTE0_GPIO1_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTE0 & (1u << 6u);
}
inline void set_DORMANT_WAKE_INTE0_GPIO1_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE0 |= 1u << 6u;
}
inline void clear_DORMANT_WAKE_INTE0_GPIO1_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE0 &= ~(1u << 6u);
}
inline void toggle_DORMANT_WAKE_INTE0_GPIO1_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE0 ^= 1u << 6u;
}
inline bool get_DORMANT_WAKE_INTE0_GPIO1_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTE0 & (1u << 7u);
}
inline void set_DORMANT_WAKE_INTE0_GPIO1_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE0 |= 1u << 7u;
}
inline void clear_DORMANT_WAKE_INTE0_GPIO1_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE0 &= ~(1u << 7u);
}
inline void toggle_DORMANT_WAKE_INTE0_GPIO1_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE0 ^= 1u << 7u;
}
inline bool get_DORMANT_WAKE_INTE0_GPIO2_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTE0 & (1u << 8u);
}
inline void set_DORMANT_WAKE_INTE0_GPIO2_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE0 |= 1u << 8u;
}
inline void clear_DORMANT_WAKE_INTE0_GPIO2_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE0 &= ~(1u << 8u);
}
inline void toggle_DORMANT_WAKE_INTE0_GPIO2_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE0 ^= 1u << 8u;
}
inline bool get_DORMANT_WAKE_INTE0_GPIO2_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTE0 & (1u << 9u);
}
inline void set_DORMANT_WAKE_INTE0_GPIO2_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE0 |= 1u << 9u;
}
inline void clear_DORMANT_WAKE_INTE0_GPIO2_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE0 &= ~(1u << 9u);
}
inline void toggle_DORMANT_WAKE_INTE0_GPIO2_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE0 ^= 1u << 9u;
}
inline bool get_DORMANT_WAKE_INTE0_GPIO2_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTE0 & (1u << 10u);
}
inline void set_DORMANT_WAKE_INTE0_GPIO2_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE0 |= 1u << 10u;
}
inline void clear_DORMANT_WAKE_INTE0_GPIO2_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE0 &= ~(1u << 10u);
}
inline void toggle_DORMANT_WAKE_INTE0_GPIO2_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE0 ^= 1u << 10u;
}
inline bool get_DORMANT_WAKE_INTE0_GPIO2_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTE0 & (1u << 11u);
}
inline void set_DORMANT_WAKE_INTE0_GPIO2_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE0 |= 1u << 11u;
}
inline void clear_DORMANT_WAKE_INTE0_GPIO2_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE0 &= ~(1u << 11u);
}
inline void toggle_DORMANT_WAKE_INTE0_GPIO2_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE0 ^= 1u << 11u;
}
inline bool get_DORMANT_WAKE_INTE0_GPIO3_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTE0 & (1u << 12u);
}
inline void set_DORMANT_WAKE_INTE0_GPIO3_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE0 |= 1u << 12u;
}
inline void clear_DORMANT_WAKE_INTE0_GPIO3_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE0 &= ~(1u << 12u);
}
inline void toggle_DORMANT_WAKE_INTE0_GPIO3_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE0 ^= 1u << 12u;
}
inline bool get_DORMANT_WAKE_INTE0_GPIO3_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTE0 & (1u << 13u);
}
inline void set_DORMANT_WAKE_INTE0_GPIO3_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE0 |= 1u << 13u;
}
inline void clear_DORMANT_WAKE_INTE0_GPIO3_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE0 &= ~(1u << 13u);
}
inline void toggle_DORMANT_WAKE_INTE0_GPIO3_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE0 ^= 1u << 13u;
}
inline bool get_DORMANT_WAKE_INTE0_GPIO3_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTE0 & (1u << 14u);
}
inline void set_DORMANT_WAKE_INTE0_GPIO3_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE0 |= 1u << 14u;
}
inline void clear_DORMANT_WAKE_INTE0_GPIO3_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE0 &= ~(1u << 14u);
}
inline void toggle_DORMANT_WAKE_INTE0_GPIO3_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE0 ^= 1u << 14u;
}
inline bool get_DORMANT_WAKE_INTE0_GPIO3_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTE0 & (1u << 15u);
}
inline void set_DORMANT_WAKE_INTE0_GPIO3_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE0 |= 1u << 15u;
}
inline void clear_DORMANT_WAKE_INTE0_GPIO3_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE0 &= ~(1u << 15u);
}
inline void toggle_DORMANT_WAKE_INTE0_GPIO3_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE0 ^= 1u << 15u;
}
inline bool get_DORMANT_WAKE_INTE0_GPIO4_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTE0 & (1u << 16u);
}
inline void set_DORMANT_WAKE_INTE0_GPIO4_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE0 |= 1u << 16u;
}
inline void clear_DORMANT_WAKE_INTE0_GPIO4_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE0 &= ~(1u << 16u);
}
inline void toggle_DORMANT_WAKE_INTE0_GPIO4_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE0 ^= 1u << 16u;
}
inline bool get_DORMANT_WAKE_INTE0_GPIO4_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTE0 & (1u << 17u);
}
inline void set_DORMANT_WAKE_INTE0_GPIO4_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE0 |= 1u << 17u;
}
inline void clear_DORMANT_WAKE_INTE0_GPIO4_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE0 &= ~(1u << 17u);
}
inline void toggle_DORMANT_WAKE_INTE0_GPIO4_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE0 ^= 1u << 17u;
}
inline bool get_DORMANT_WAKE_INTE0_GPIO4_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTE0 & (1u << 18u);
}
inline void set_DORMANT_WAKE_INTE0_GPIO4_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE0 |= 1u << 18u;
}
inline void clear_DORMANT_WAKE_INTE0_GPIO4_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE0 &= ~(1u << 18u);
}
inline void toggle_DORMANT_WAKE_INTE0_GPIO4_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE0 ^= 1u << 18u;
}
inline bool get_DORMANT_WAKE_INTE0_GPIO4_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTE0 & (1u << 19u);
}
inline void set_DORMANT_WAKE_INTE0_GPIO4_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE0 |= 1u << 19u;
}
inline void clear_DORMANT_WAKE_INTE0_GPIO4_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE0 &= ~(1u << 19u);
}
inline void toggle_DORMANT_WAKE_INTE0_GPIO4_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE0 ^= 1u << 19u;
}
inline bool get_DORMANT_WAKE_INTE0_GPIO5_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTE0 & (1u << 20u);
}
inline void set_DORMANT_WAKE_INTE0_GPIO5_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE0 |= 1u << 20u;
}
inline void clear_DORMANT_WAKE_INTE0_GPIO5_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE0 &= ~(1u << 20u);
}
inline void toggle_DORMANT_WAKE_INTE0_GPIO5_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE0 ^= 1u << 20u;
}
inline bool get_DORMANT_WAKE_INTE0_GPIO5_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTE0 & (1u << 21u);
}
inline void set_DORMANT_WAKE_INTE0_GPIO5_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE0 |= 1u << 21u;
}
inline void clear_DORMANT_WAKE_INTE0_GPIO5_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE0 &= ~(1u << 21u);
}
inline void toggle_DORMANT_WAKE_INTE0_GPIO5_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE0 ^= 1u << 21u;
}
inline bool get_DORMANT_WAKE_INTE0_GPIO5_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTE0 & (1u << 22u);
}
inline void set_DORMANT_WAKE_INTE0_GPIO5_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE0 |= 1u << 22u;
}
inline void clear_DORMANT_WAKE_INTE0_GPIO5_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE0 &= ~(1u << 22u);
}
inline void toggle_DORMANT_WAKE_INTE0_GPIO5_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE0 ^= 1u << 22u;
}
inline bool get_DORMANT_WAKE_INTE0_GPIO5_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTE0 & (1u << 23u);
}
inline void set_DORMANT_WAKE_INTE0_GPIO5_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE0 |= 1u << 23u;
}
inline void clear_DORMANT_WAKE_INTE0_GPIO5_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE0 &= ~(1u << 23u);
}
inline void toggle_DORMANT_WAKE_INTE0_GPIO5_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE0 ^= 1u << 23u;
}
inline bool get_DORMANT_WAKE_INTE0_GPIO6_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTE0 & (1u << 24u);
}
inline void set_DORMANT_WAKE_INTE0_GPIO6_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE0 |= 1u << 24u;
}
inline void clear_DORMANT_WAKE_INTE0_GPIO6_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE0 &= ~(1u << 24u);
}
inline void toggle_DORMANT_WAKE_INTE0_GPIO6_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE0 ^= 1u << 24u;
}
inline bool get_DORMANT_WAKE_INTE0_GPIO6_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTE0 & (1u << 25u);
}
inline void set_DORMANT_WAKE_INTE0_GPIO6_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE0 |= 1u << 25u;
}
inline void clear_DORMANT_WAKE_INTE0_GPIO6_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE0 &= ~(1u << 25u);
}
inline void toggle_DORMANT_WAKE_INTE0_GPIO6_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE0 ^= 1u << 25u;
}
inline bool get_DORMANT_WAKE_INTE0_GPIO6_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTE0 & (1u << 26u);
}
inline void set_DORMANT_WAKE_INTE0_GPIO6_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE0 |= 1u << 26u;
}
inline void clear_DORMANT_WAKE_INTE0_GPIO6_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE0 &= ~(1u << 26u);
}
inline void toggle_DORMANT_WAKE_INTE0_GPIO6_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE0 ^= 1u << 26u;
}
inline bool get_DORMANT_WAKE_INTE0_GPIO6_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTE0 & (1u << 27u);
}
inline void set_DORMANT_WAKE_INTE0_GPIO6_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE0 |= 1u << 27u;
}
inline void clear_DORMANT_WAKE_INTE0_GPIO6_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE0 &= ~(1u << 27u);
}
inline void toggle_DORMANT_WAKE_INTE0_GPIO6_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE0 ^= 1u << 27u;
}
inline bool get_DORMANT_WAKE_INTE0_GPIO7_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTE0 & (1u << 28u);
}
inline void set_DORMANT_WAKE_INTE0_GPIO7_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE0 |= 1u << 28u;
}
inline void clear_DORMANT_WAKE_INTE0_GPIO7_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE0 &= ~(1u << 28u);
}
inline void toggle_DORMANT_WAKE_INTE0_GPIO7_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE0 ^= 1u << 28u;
}
inline bool get_DORMANT_WAKE_INTE0_GPIO7_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTE0 & (1u << 29u);
}
inline void set_DORMANT_WAKE_INTE0_GPIO7_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE0 |= 1u << 29u;
}
inline void clear_DORMANT_WAKE_INTE0_GPIO7_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE0 &= ~(1u << 29u);
}
inline void toggle_DORMANT_WAKE_INTE0_GPIO7_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE0 ^= 1u << 29u;
}
inline bool get_DORMANT_WAKE_INTE0_GPIO7_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTE0 & (1u << 30u);
}
inline void set_DORMANT_WAKE_INTE0_GPIO7_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE0 |= 1u << 30u;
}
inline void clear_DORMANT_WAKE_INTE0_GPIO7_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE0 &= ~(1u << 30u);
}
inline void toggle_DORMANT_WAKE_INTE0_GPIO7_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE0 ^= 1u << 30u;
}
inline bool get_DORMANT_WAKE_INTE0_GPIO7_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTE0 & (1u << 31u);
}
inline void set_DORMANT_WAKE_INTE0_GPIO7_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE0 |= 1u << 31u;
}
inline void clear_DORMANT_WAKE_INTE0_GPIO7_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE0 &= ~(1u << 31u);
}
inline void toggle_DORMANT_WAKE_INTE0_GPIO7_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE0 ^= 1u << 31u;
}
inline void get_DORMANT_WAKE_INTE0(
bool &GPIO0_LEVEL_LOW, bool &GPIO0_LEVEL_HIGH, bool &GPIO0_EDGE_LOW,
bool &GPIO0_EDGE_HIGH, bool &GPIO1_LEVEL_LOW, bool &GPIO1_LEVEL_HIGH,
bool &GPIO1_EDGE_LOW, bool &GPIO1_EDGE_HIGH, bool &GPIO2_LEVEL_LOW,
bool &GPIO2_LEVEL_HIGH, bool &GPIO2_EDGE_LOW, bool &GPIO2_EDGE_HIGH,
bool &GPIO3_LEVEL_LOW, bool &GPIO3_LEVEL_HIGH, bool &GPIO3_EDGE_LOW,
bool &GPIO3_EDGE_HIGH, bool &GPIO4_LEVEL_LOW, bool &GPIO4_LEVEL_HIGH,
bool &GPIO4_EDGE_LOW, bool &GPIO4_EDGE_HIGH, bool &GPIO5_LEVEL_LOW,
bool &GPIO5_LEVEL_HIGH, bool &GPIO5_EDGE_LOW, bool &GPIO5_EDGE_HIGH,
bool &GPIO6_LEVEL_LOW, bool &GPIO6_LEVEL_HIGH, bool &GPIO6_EDGE_LOW,
bool &GPIO6_EDGE_HIGH, bool &GPIO7_LEVEL_LOW, bool &GPIO7_LEVEL_HIGH,
bool &GPIO7_EDGE_LOW, bool &GPIO7_EDGE_HIGH) volatile
{
uint32_t curr = DORMANT_WAKE_INTE0;
GPIO0_LEVEL_LOW = curr & (1u << 0u);
GPIO0_LEVEL_HIGH = curr & (1u << 1u);
GPIO0_EDGE_LOW = curr & (1u << 2u);
GPIO0_EDGE_HIGH = curr & (1u << 3u);
GPIO1_LEVEL_LOW = curr & (1u << 4u);
GPIO1_LEVEL_HIGH = curr & (1u << 5u);
GPIO1_EDGE_LOW = curr & (1u << 6u);
GPIO1_EDGE_HIGH = curr & (1u << 7u);
GPIO2_LEVEL_LOW = curr & (1u << 8u);
GPIO2_LEVEL_HIGH = curr & (1u << 9u);
GPIO2_EDGE_LOW = curr & (1u << 10u);
GPIO2_EDGE_HIGH = curr & (1u << 11u);
GPIO3_LEVEL_LOW = curr & (1u << 12u);
GPIO3_LEVEL_HIGH = curr & (1u << 13u);
GPIO3_EDGE_LOW = curr & (1u << 14u);
GPIO3_EDGE_HIGH = curr & (1u << 15u);
GPIO4_LEVEL_LOW = curr & (1u << 16u);
GPIO4_LEVEL_HIGH = curr & (1u << 17u);
GPIO4_EDGE_LOW = curr & (1u << 18u);
GPIO4_EDGE_HIGH = curr & (1u << 19u);
GPIO5_LEVEL_LOW = curr & (1u << 20u);
GPIO5_LEVEL_HIGH = curr & (1u << 21u);
GPIO5_EDGE_LOW = curr & (1u << 22u);
GPIO5_EDGE_HIGH = curr & (1u << 23u);
GPIO6_LEVEL_LOW = curr & (1u << 24u);
GPIO6_LEVEL_HIGH = curr & (1u << 25u);
GPIO6_EDGE_LOW = curr & (1u << 26u);
GPIO6_EDGE_HIGH = curr & (1u << 27u);
GPIO7_LEVEL_LOW = curr & (1u << 28u);
GPIO7_LEVEL_HIGH = curr & (1u << 29u);
GPIO7_EDGE_LOW = curr & (1u << 30u);
GPIO7_EDGE_HIGH = curr & (1u << 31u);
}
inline void set_DORMANT_WAKE_INTE0(
bool GPIO0_LEVEL_LOW, bool GPIO0_LEVEL_HIGH, bool GPIO0_EDGE_LOW,
bool GPIO0_EDGE_HIGH, bool GPIO1_LEVEL_LOW, bool GPIO1_LEVEL_HIGH,
bool GPIO1_EDGE_LOW, bool GPIO1_EDGE_HIGH, bool GPIO2_LEVEL_LOW,
bool GPIO2_LEVEL_HIGH, bool GPIO2_EDGE_LOW, bool GPIO2_EDGE_HIGH,
bool GPIO3_LEVEL_LOW, bool GPIO3_LEVEL_HIGH, bool GPIO3_EDGE_LOW,
bool GPIO3_EDGE_HIGH, bool GPIO4_LEVEL_LOW, bool GPIO4_LEVEL_HIGH,
bool GPIO4_EDGE_LOW, bool GPIO4_EDGE_HIGH, bool GPIO5_LEVEL_LOW,
bool GPIO5_LEVEL_HIGH, bool GPIO5_EDGE_LOW, bool GPIO5_EDGE_HIGH,
bool GPIO6_LEVEL_LOW, bool GPIO6_LEVEL_HIGH, bool GPIO6_EDGE_LOW,
bool GPIO6_EDGE_HIGH, bool GPIO7_LEVEL_LOW, bool GPIO7_LEVEL_HIGH,
bool GPIO7_EDGE_LOW, bool GPIO7_EDGE_HIGH) volatile
{
uint32_t curr = DORMANT_WAKE_INTE0;
curr &= ~(0b1u << 0u);
curr |= (GPIO0_LEVEL_LOW & 0b1u) << 0u;
curr &= ~(0b1u << 1u);
curr |= (GPIO0_LEVEL_HIGH & 0b1u) << 1u;
curr &= ~(0b1u << 2u);
curr |= (GPIO0_EDGE_LOW & 0b1u) << 2u;
curr &= ~(0b1u << 3u);
curr |= (GPIO0_EDGE_HIGH & 0b1u) << 3u;
curr &= ~(0b1u << 4u);
curr |= (GPIO1_LEVEL_LOW & 0b1u) << 4u;
curr &= ~(0b1u << 5u);
curr |= (GPIO1_LEVEL_HIGH & 0b1u) << 5u;
curr &= ~(0b1u << 6u);
curr |= (GPIO1_EDGE_LOW & 0b1u) << 6u;
curr &= ~(0b1u << 7u);
curr |= (GPIO1_EDGE_HIGH & 0b1u) << 7u;
curr &= ~(0b1u << 8u);
curr |= (GPIO2_LEVEL_LOW & 0b1u) << 8u;
curr &= ~(0b1u << 9u);
curr |= (GPIO2_LEVEL_HIGH & 0b1u) << 9u;
curr &= ~(0b1u << 10u);
curr |= (GPIO2_EDGE_LOW & 0b1u) << 10u;
curr &= ~(0b1u << 11u);
curr |= (GPIO2_EDGE_HIGH & 0b1u) << 11u;
curr &= ~(0b1u << 12u);
curr |= (GPIO3_LEVEL_LOW & 0b1u) << 12u;
curr &= ~(0b1u << 13u);
curr |= (GPIO3_LEVEL_HIGH & 0b1u) << 13u;
curr &= ~(0b1u << 14u);
curr |= (GPIO3_EDGE_LOW & 0b1u) << 14u;
curr &= ~(0b1u << 15u);
curr |= (GPIO3_EDGE_HIGH & 0b1u) << 15u;
curr &= ~(0b1u << 16u);
curr |= (GPIO4_LEVEL_LOW & 0b1u) << 16u;
curr &= ~(0b1u << 17u);
curr |= (GPIO4_LEVEL_HIGH & 0b1u) << 17u;
curr &= ~(0b1u << 18u);
curr |= (GPIO4_EDGE_LOW & 0b1u) << 18u;
curr &= ~(0b1u << 19u);
curr |= (GPIO4_EDGE_HIGH & 0b1u) << 19u;
curr &= ~(0b1u << 20u);
curr |= (GPIO5_LEVEL_LOW & 0b1u) << 20u;
curr &= ~(0b1u << 21u);
curr |= (GPIO5_LEVEL_HIGH & 0b1u) << 21u;
curr &= ~(0b1u << 22u);
curr |= (GPIO5_EDGE_LOW & 0b1u) << 22u;
curr &= ~(0b1u << 23u);
curr |= (GPIO5_EDGE_HIGH & 0b1u) << 23u;
curr &= ~(0b1u << 24u);
curr |= (GPIO6_LEVEL_LOW & 0b1u) << 24u;
curr &= ~(0b1u << 25u);
curr |= (GPIO6_LEVEL_HIGH & 0b1u) << 25u;
curr &= ~(0b1u << 26u);
curr |= (GPIO6_EDGE_LOW & 0b1u) << 26u;
curr &= ~(0b1u << 27u);
curr |= (GPIO6_EDGE_HIGH & 0b1u) << 27u;
curr &= ~(0b1u << 28u);
curr |= (GPIO7_LEVEL_LOW & 0b1u) << 28u;
curr &= ~(0b1u << 29u);
curr |= (GPIO7_LEVEL_HIGH & 0b1u) << 29u;
curr &= ~(0b1u << 30u);
curr |= (GPIO7_EDGE_LOW & 0b1u) << 30u;
curr &= ~(0b1u << 31u);
curr |= (GPIO7_EDGE_HIGH & 0b1u) << 31u;
DORMANT_WAKE_INTE0 = curr;
}
inline bool get_DORMANT_WAKE_INTE1_GPIO8_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTE1 & (1u << 0u);
}
inline void set_DORMANT_WAKE_INTE1_GPIO8_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE1 |= 1u << 0u;
}
inline void clear_DORMANT_WAKE_INTE1_GPIO8_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE1 &= ~(1u << 0u);
}
inline void toggle_DORMANT_WAKE_INTE1_GPIO8_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE1 ^= 1u << 0u;
}
inline bool get_DORMANT_WAKE_INTE1_GPIO8_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTE1 & (1u << 1u);
}
inline void set_DORMANT_WAKE_INTE1_GPIO8_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE1 |= 1u << 1u;
}
inline void clear_DORMANT_WAKE_INTE1_GPIO8_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE1 &= ~(1u << 1u);
}
inline void toggle_DORMANT_WAKE_INTE1_GPIO8_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE1 ^= 1u << 1u;
}
inline bool get_DORMANT_WAKE_INTE1_GPIO8_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTE1 & (1u << 2u);
}
inline void set_DORMANT_WAKE_INTE1_GPIO8_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE1 |= 1u << 2u;
}
inline void clear_DORMANT_WAKE_INTE1_GPIO8_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE1 &= ~(1u << 2u);
}
inline void toggle_DORMANT_WAKE_INTE1_GPIO8_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE1 ^= 1u << 2u;
}
inline bool get_DORMANT_WAKE_INTE1_GPIO8_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTE1 & (1u << 3u);
}
inline void set_DORMANT_WAKE_INTE1_GPIO8_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE1 |= 1u << 3u;
}
inline void clear_DORMANT_WAKE_INTE1_GPIO8_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE1 &= ~(1u << 3u);
}
inline void toggle_DORMANT_WAKE_INTE1_GPIO8_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE1 ^= 1u << 3u;
}
inline bool get_DORMANT_WAKE_INTE1_GPIO9_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTE1 & (1u << 4u);
}
inline void set_DORMANT_WAKE_INTE1_GPIO9_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE1 |= 1u << 4u;
}
inline void clear_DORMANT_WAKE_INTE1_GPIO9_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE1 &= ~(1u << 4u);
}
inline void toggle_DORMANT_WAKE_INTE1_GPIO9_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE1 ^= 1u << 4u;
}
inline bool get_DORMANT_WAKE_INTE1_GPIO9_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTE1 & (1u << 5u);
}
inline void set_DORMANT_WAKE_INTE1_GPIO9_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE1 |= 1u << 5u;
}
inline void clear_DORMANT_WAKE_INTE1_GPIO9_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE1 &= ~(1u << 5u);
}
inline void toggle_DORMANT_WAKE_INTE1_GPIO9_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE1 ^= 1u << 5u;
}
inline bool get_DORMANT_WAKE_INTE1_GPIO9_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTE1 & (1u << 6u);
}
inline void set_DORMANT_WAKE_INTE1_GPIO9_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE1 |= 1u << 6u;
}
inline void clear_DORMANT_WAKE_INTE1_GPIO9_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE1 &= ~(1u << 6u);
}
inline void toggle_DORMANT_WAKE_INTE1_GPIO9_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE1 ^= 1u << 6u;
}
inline bool get_DORMANT_WAKE_INTE1_GPIO9_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTE1 & (1u << 7u);
}
inline void set_DORMANT_WAKE_INTE1_GPIO9_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE1 |= 1u << 7u;
}
inline void clear_DORMANT_WAKE_INTE1_GPIO9_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE1 &= ~(1u << 7u);
}
inline void toggle_DORMANT_WAKE_INTE1_GPIO9_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE1 ^= 1u << 7u;
}
inline bool get_DORMANT_WAKE_INTE1_GPIO10_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTE1 & (1u << 8u);
}
inline void set_DORMANT_WAKE_INTE1_GPIO10_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE1 |= 1u << 8u;
}
inline void clear_DORMANT_WAKE_INTE1_GPIO10_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE1 &= ~(1u << 8u);
}
inline void toggle_DORMANT_WAKE_INTE1_GPIO10_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE1 ^= 1u << 8u;
}
inline bool get_DORMANT_WAKE_INTE1_GPIO10_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTE1 & (1u << 9u);
}
inline void set_DORMANT_WAKE_INTE1_GPIO10_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE1 |= 1u << 9u;
}
inline void clear_DORMANT_WAKE_INTE1_GPIO10_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE1 &= ~(1u << 9u);
}
inline void toggle_DORMANT_WAKE_INTE1_GPIO10_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE1 ^= 1u << 9u;
}
inline bool get_DORMANT_WAKE_INTE1_GPIO10_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTE1 & (1u << 10u);
}
inline void set_DORMANT_WAKE_INTE1_GPIO10_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE1 |= 1u << 10u;
}
inline void clear_DORMANT_WAKE_INTE1_GPIO10_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE1 &= ~(1u << 10u);
}
inline void toggle_DORMANT_WAKE_INTE1_GPIO10_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE1 ^= 1u << 10u;
}
inline bool get_DORMANT_WAKE_INTE1_GPIO10_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTE1 & (1u << 11u);
}
inline void set_DORMANT_WAKE_INTE1_GPIO10_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE1 |= 1u << 11u;
}
inline void clear_DORMANT_WAKE_INTE1_GPIO10_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE1 &= ~(1u << 11u);
}
inline void toggle_DORMANT_WAKE_INTE1_GPIO10_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE1 ^= 1u << 11u;
}
inline bool get_DORMANT_WAKE_INTE1_GPIO11_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTE1 & (1u << 12u);
}
inline void set_DORMANT_WAKE_INTE1_GPIO11_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE1 |= 1u << 12u;
}
inline void clear_DORMANT_WAKE_INTE1_GPIO11_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE1 &= ~(1u << 12u);
}
inline void toggle_DORMANT_WAKE_INTE1_GPIO11_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE1 ^= 1u << 12u;
}
inline bool get_DORMANT_WAKE_INTE1_GPIO11_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTE1 & (1u << 13u);
}
inline void set_DORMANT_WAKE_INTE1_GPIO11_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE1 |= 1u << 13u;
}
inline void clear_DORMANT_WAKE_INTE1_GPIO11_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE1 &= ~(1u << 13u);
}
inline void toggle_DORMANT_WAKE_INTE1_GPIO11_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE1 ^= 1u << 13u;
}
inline bool get_DORMANT_WAKE_INTE1_GPIO11_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTE1 & (1u << 14u);
}
inline void set_DORMANT_WAKE_INTE1_GPIO11_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE1 |= 1u << 14u;
}
inline void clear_DORMANT_WAKE_INTE1_GPIO11_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE1 &= ~(1u << 14u);
}
inline void toggle_DORMANT_WAKE_INTE1_GPIO11_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE1 ^= 1u << 14u;
}
inline bool get_DORMANT_WAKE_INTE1_GPIO11_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTE1 & (1u << 15u);
}
inline void set_DORMANT_WAKE_INTE1_GPIO11_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE1 |= 1u << 15u;
}
inline void clear_DORMANT_WAKE_INTE1_GPIO11_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE1 &= ~(1u << 15u);
}
inline void toggle_DORMANT_WAKE_INTE1_GPIO11_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE1 ^= 1u << 15u;
}
inline bool get_DORMANT_WAKE_INTE1_GPIO12_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTE1 & (1u << 16u);
}
inline void set_DORMANT_WAKE_INTE1_GPIO12_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE1 |= 1u << 16u;
}
inline void clear_DORMANT_WAKE_INTE1_GPIO12_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE1 &= ~(1u << 16u);
}
inline void toggle_DORMANT_WAKE_INTE1_GPIO12_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE1 ^= 1u << 16u;
}
inline bool get_DORMANT_WAKE_INTE1_GPIO12_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTE1 & (1u << 17u);
}
inline void set_DORMANT_WAKE_INTE1_GPIO12_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE1 |= 1u << 17u;
}
inline void clear_DORMANT_WAKE_INTE1_GPIO12_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE1 &= ~(1u << 17u);
}
inline void toggle_DORMANT_WAKE_INTE1_GPIO12_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE1 ^= 1u << 17u;
}
inline bool get_DORMANT_WAKE_INTE1_GPIO12_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTE1 & (1u << 18u);
}
inline void set_DORMANT_WAKE_INTE1_GPIO12_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE1 |= 1u << 18u;
}
inline void clear_DORMANT_WAKE_INTE1_GPIO12_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE1 &= ~(1u << 18u);
}
inline void toggle_DORMANT_WAKE_INTE1_GPIO12_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE1 ^= 1u << 18u;
}
inline bool get_DORMANT_WAKE_INTE1_GPIO12_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTE1 & (1u << 19u);
}
inline void set_DORMANT_WAKE_INTE1_GPIO12_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE1 |= 1u << 19u;
}
inline void clear_DORMANT_WAKE_INTE1_GPIO12_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE1 &= ~(1u << 19u);
}
inline void toggle_DORMANT_WAKE_INTE1_GPIO12_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE1 ^= 1u << 19u;
}
inline bool get_DORMANT_WAKE_INTE1_GPIO13_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTE1 & (1u << 20u);
}
inline void set_DORMANT_WAKE_INTE1_GPIO13_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE1 |= 1u << 20u;
}
inline void clear_DORMANT_WAKE_INTE1_GPIO13_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE1 &= ~(1u << 20u);
}
inline void toggle_DORMANT_WAKE_INTE1_GPIO13_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE1 ^= 1u << 20u;
}
inline bool get_DORMANT_WAKE_INTE1_GPIO13_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTE1 & (1u << 21u);
}
inline void set_DORMANT_WAKE_INTE1_GPIO13_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE1 |= 1u << 21u;
}
inline void clear_DORMANT_WAKE_INTE1_GPIO13_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE1 &= ~(1u << 21u);
}
inline void toggle_DORMANT_WAKE_INTE1_GPIO13_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE1 ^= 1u << 21u;
}
inline bool get_DORMANT_WAKE_INTE1_GPIO13_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTE1 & (1u << 22u);
}
inline void set_DORMANT_WAKE_INTE1_GPIO13_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE1 |= 1u << 22u;
}
inline void clear_DORMANT_WAKE_INTE1_GPIO13_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE1 &= ~(1u << 22u);
}
inline void toggle_DORMANT_WAKE_INTE1_GPIO13_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE1 ^= 1u << 22u;
}
inline bool get_DORMANT_WAKE_INTE1_GPIO13_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTE1 & (1u << 23u);
}
inline void set_DORMANT_WAKE_INTE1_GPIO13_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE1 |= 1u << 23u;
}
inline void clear_DORMANT_WAKE_INTE1_GPIO13_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE1 &= ~(1u << 23u);
}
inline void toggle_DORMANT_WAKE_INTE1_GPIO13_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE1 ^= 1u << 23u;
}
inline bool get_DORMANT_WAKE_INTE1_GPIO14_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTE1 & (1u << 24u);
}
inline void set_DORMANT_WAKE_INTE1_GPIO14_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE1 |= 1u << 24u;
}
inline void clear_DORMANT_WAKE_INTE1_GPIO14_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE1 &= ~(1u << 24u);
}
inline void toggle_DORMANT_WAKE_INTE1_GPIO14_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE1 ^= 1u << 24u;
}
inline bool get_DORMANT_WAKE_INTE1_GPIO14_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTE1 & (1u << 25u);
}
inline void set_DORMANT_WAKE_INTE1_GPIO14_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE1 |= 1u << 25u;
}
inline void clear_DORMANT_WAKE_INTE1_GPIO14_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE1 &= ~(1u << 25u);
}
inline void toggle_DORMANT_WAKE_INTE1_GPIO14_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE1 ^= 1u << 25u;
}
inline bool get_DORMANT_WAKE_INTE1_GPIO14_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTE1 & (1u << 26u);
}
inline void set_DORMANT_WAKE_INTE1_GPIO14_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE1 |= 1u << 26u;
}
inline void clear_DORMANT_WAKE_INTE1_GPIO14_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE1 &= ~(1u << 26u);
}
inline void toggle_DORMANT_WAKE_INTE1_GPIO14_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE1 ^= 1u << 26u;
}
inline bool get_DORMANT_WAKE_INTE1_GPIO14_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTE1 & (1u << 27u);
}
inline void set_DORMANT_WAKE_INTE1_GPIO14_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE1 |= 1u << 27u;
}
inline void clear_DORMANT_WAKE_INTE1_GPIO14_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE1 &= ~(1u << 27u);
}
inline void toggle_DORMANT_WAKE_INTE1_GPIO14_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE1 ^= 1u << 27u;
}
inline bool get_DORMANT_WAKE_INTE1_GPIO15_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTE1 & (1u << 28u);
}
inline void set_DORMANT_WAKE_INTE1_GPIO15_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE1 |= 1u << 28u;
}
inline void clear_DORMANT_WAKE_INTE1_GPIO15_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE1 &= ~(1u << 28u);
}
inline void toggle_DORMANT_WAKE_INTE1_GPIO15_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE1 ^= 1u << 28u;
}
inline bool get_DORMANT_WAKE_INTE1_GPIO15_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTE1 & (1u << 29u);
}
inline void set_DORMANT_WAKE_INTE1_GPIO15_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE1 |= 1u << 29u;
}
inline void clear_DORMANT_WAKE_INTE1_GPIO15_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE1 &= ~(1u << 29u);
}
inline void toggle_DORMANT_WAKE_INTE1_GPIO15_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE1 ^= 1u << 29u;
}
inline bool get_DORMANT_WAKE_INTE1_GPIO15_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTE1 & (1u << 30u);
}
inline void set_DORMANT_WAKE_INTE1_GPIO15_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE1 |= 1u << 30u;
}
inline void clear_DORMANT_WAKE_INTE1_GPIO15_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE1 &= ~(1u << 30u);
}
inline void toggle_DORMANT_WAKE_INTE1_GPIO15_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE1 ^= 1u << 30u;
}
inline bool get_DORMANT_WAKE_INTE1_GPIO15_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTE1 & (1u << 31u);
}
inline void set_DORMANT_WAKE_INTE1_GPIO15_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE1 |= 1u << 31u;
}
inline void clear_DORMANT_WAKE_INTE1_GPIO15_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE1 &= ~(1u << 31u);
}
inline void toggle_DORMANT_WAKE_INTE1_GPIO15_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE1 ^= 1u << 31u;
}
inline void get_DORMANT_WAKE_INTE1(
bool &GPIO8_LEVEL_LOW, bool &GPIO8_LEVEL_HIGH, bool &GPIO8_EDGE_LOW,
bool &GPIO8_EDGE_HIGH, bool &GPIO9_LEVEL_LOW, bool &GPIO9_LEVEL_HIGH,
bool &GPIO9_EDGE_LOW, bool &GPIO9_EDGE_HIGH, bool &GPIO10_LEVEL_LOW,
bool &GPIO10_LEVEL_HIGH, bool &GPIO10_EDGE_LOW, bool &GPIO10_EDGE_HIGH,
bool &GPIO11_LEVEL_LOW, bool &GPIO11_LEVEL_HIGH, bool &GPIO11_EDGE_LOW,
bool &GPIO11_EDGE_HIGH, bool &GPIO12_LEVEL_LOW,
bool &GPIO12_LEVEL_HIGH, bool &GPIO12_EDGE_LOW, bool &GPIO12_EDGE_HIGH,
bool &GPIO13_LEVEL_LOW, bool &GPIO13_LEVEL_HIGH, bool &GPIO13_EDGE_LOW,
bool &GPIO13_EDGE_HIGH, bool &GPIO14_LEVEL_LOW,
bool &GPIO14_LEVEL_HIGH, bool &GPIO14_EDGE_LOW, bool &GPIO14_EDGE_HIGH,
bool &GPIO15_LEVEL_LOW, bool &GPIO15_LEVEL_HIGH, bool &GPIO15_EDGE_LOW,
bool &GPIO15_EDGE_HIGH) volatile
{
uint32_t curr = DORMANT_WAKE_INTE1;
GPIO8_LEVEL_LOW = curr & (1u << 0u);
GPIO8_LEVEL_HIGH = curr & (1u << 1u);
GPIO8_EDGE_LOW = curr & (1u << 2u);
GPIO8_EDGE_HIGH = curr & (1u << 3u);
GPIO9_LEVEL_LOW = curr & (1u << 4u);
GPIO9_LEVEL_HIGH = curr & (1u << 5u);
GPIO9_EDGE_LOW = curr & (1u << 6u);
GPIO9_EDGE_HIGH = curr & (1u << 7u);
GPIO10_LEVEL_LOW = curr & (1u << 8u);
GPIO10_LEVEL_HIGH = curr & (1u << 9u);
GPIO10_EDGE_LOW = curr & (1u << 10u);
GPIO10_EDGE_HIGH = curr & (1u << 11u);
GPIO11_LEVEL_LOW = curr & (1u << 12u);
GPIO11_LEVEL_HIGH = curr & (1u << 13u);
GPIO11_EDGE_LOW = curr & (1u << 14u);
GPIO11_EDGE_HIGH = curr & (1u << 15u);
GPIO12_LEVEL_LOW = curr & (1u << 16u);
GPIO12_LEVEL_HIGH = curr & (1u << 17u);
GPIO12_EDGE_LOW = curr & (1u << 18u);
GPIO12_EDGE_HIGH = curr & (1u << 19u);
GPIO13_LEVEL_LOW = curr & (1u << 20u);
GPIO13_LEVEL_HIGH = curr & (1u << 21u);
GPIO13_EDGE_LOW = curr & (1u << 22u);
GPIO13_EDGE_HIGH = curr & (1u << 23u);
GPIO14_LEVEL_LOW = curr & (1u << 24u);
GPIO14_LEVEL_HIGH = curr & (1u << 25u);
GPIO14_EDGE_LOW = curr & (1u << 26u);
GPIO14_EDGE_HIGH = curr & (1u << 27u);
GPIO15_LEVEL_LOW = curr & (1u << 28u);
GPIO15_LEVEL_HIGH = curr & (1u << 29u);
GPIO15_EDGE_LOW = curr & (1u << 30u);
GPIO15_EDGE_HIGH = curr & (1u << 31u);
}
inline void set_DORMANT_WAKE_INTE1(
bool GPIO8_LEVEL_LOW, bool GPIO8_LEVEL_HIGH, bool GPIO8_EDGE_LOW,
bool GPIO8_EDGE_HIGH, bool GPIO9_LEVEL_LOW, bool GPIO9_LEVEL_HIGH,
bool GPIO9_EDGE_LOW, bool GPIO9_EDGE_HIGH, bool GPIO10_LEVEL_LOW,
bool GPIO10_LEVEL_HIGH, bool GPIO10_EDGE_LOW, bool GPIO10_EDGE_HIGH,
bool GPIO11_LEVEL_LOW, bool GPIO11_LEVEL_HIGH, bool GPIO11_EDGE_LOW,
bool GPIO11_EDGE_HIGH, bool GPIO12_LEVEL_LOW, bool GPIO12_LEVEL_HIGH,
bool GPIO12_EDGE_LOW, bool GPIO12_EDGE_HIGH, bool GPIO13_LEVEL_LOW,
bool GPIO13_LEVEL_HIGH, bool GPIO13_EDGE_LOW, bool GPIO13_EDGE_HIGH,
bool GPIO14_LEVEL_LOW, bool GPIO14_LEVEL_HIGH, bool GPIO14_EDGE_LOW,
bool GPIO14_EDGE_HIGH, bool GPIO15_LEVEL_LOW, bool GPIO15_LEVEL_HIGH,
bool GPIO15_EDGE_LOW, bool GPIO15_EDGE_HIGH) volatile
{
uint32_t curr = DORMANT_WAKE_INTE1;
curr &= ~(0b1u << 0u);
curr |= (GPIO8_LEVEL_LOW & 0b1u) << 0u;
curr &= ~(0b1u << 1u);
curr |= (GPIO8_LEVEL_HIGH & 0b1u) << 1u;
curr &= ~(0b1u << 2u);
curr |= (GPIO8_EDGE_LOW & 0b1u) << 2u;
curr &= ~(0b1u << 3u);
curr |= (GPIO8_EDGE_HIGH & 0b1u) << 3u;
curr &= ~(0b1u << 4u);
curr |= (GPIO9_LEVEL_LOW & 0b1u) << 4u;
curr &= ~(0b1u << 5u);
curr |= (GPIO9_LEVEL_HIGH & 0b1u) << 5u;
curr &= ~(0b1u << 6u);
curr |= (GPIO9_EDGE_LOW & 0b1u) << 6u;
curr &= ~(0b1u << 7u);
curr |= (GPIO9_EDGE_HIGH & 0b1u) << 7u;
curr &= ~(0b1u << 8u);
curr |= (GPIO10_LEVEL_LOW & 0b1u) << 8u;
curr &= ~(0b1u << 9u);
curr |= (GPIO10_LEVEL_HIGH & 0b1u) << 9u;
curr &= ~(0b1u << 10u);
curr |= (GPIO10_EDGE_LOW & 0b1u) << 10u;
curr &= ~(0b1u << 11u);
curr |= (GPIO10_EDGE_HIGH & 0b1u) << 11u;
curr &= ~(0b1u << 12u);
curr |= (GPIO11_LEVEL_LOW & 0b1u) << 12u;
curr &= ~(0b1u << 13u);
curr |= (GPIO11_LEVEL_HIGH & 0b1u) << 13u;
curr &= ~(0b1u << 14u);
curr |= (GPIO11_EDGE_LOW & 0b1u) << 14u;
curr &= ~(0b1u << 15u);
curr |= (GPIO11_EDGE_HIGH & 0b1u) << 15u;
curr &= ~(0b1u << 16u);
curr |= (GPIO12_LEVEL_LOW & 0b1u) << 16u;
curr &= ~(0b1u << 17u);
curr |= (GPIO12_LEVEL_HIGH & 0b1u) << 17u;
curr &= ~(0b1u << 18u);
curr |= (GPIO12_EDGE_LOW & 0b1u) << 18u;
curr &= ~(0b1u << 19u);
curr |= (GPIO12_EDGE_HIGH & 0b1u) << 19u;
curr &= ~(0b1u << 20u);
curr |= (GPIO13_LEVEL_LOW & 0b1u) << 20u;
curr &= ~(0b1u << 21u);
curr |= (GPIO13_LEVEL_HIGH & 0b1u) << 21u;
curr &= ~(0b1u << 22u);
curr |= (GPIO13_EDGE_LOW & 0b1u) << 22u;
curr &= ~(0b1u << 23u);
curr |= (GPIO13_EDGE_HIGH & 0b1u) << 23u;
curr &= ~(0b1u << 24u);
curr |= (GPIO14_LEVEL_LOW & 0b1u) << 24u;
curr &= ~(0b1u << 25u);
curr |= (GPIO14_LEVEL_HIGH & 0b1u) << 25u;
curr &= ~(0b1u << 26u);
curr |= (GPIO14_EDGE_LOW & 0b1u) << 26u;
curr &= ~(0b1u << 27u);
curr |= (GPIO14_EDGE_HIGH & 0b1u) << 27u;
curr &= ~(0b1u << 28u);
curr |= (GPIO15_LEVEL_LOW & 0b1u) << 28u;
curr &= ~(0b1u << 29u);
curr |= (GPIO15_LEVEL_HIGH & 0b1u) << 29u;
curr &= ~(0b1u << 30u);
curr |= (GPIO15_EDGE_LOW & 0b1u) << 30u;
curr &= ~(0b1u << 31u);
curr |= (GPIO15_EDGE_HIGH & 0b1u) << 31u;
DORMANT_WAKE_INTE1 = curr;
}
inline bool get_DORMANT_WAKE_INTE2_GPIO16_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTE2 & (1u << 0u);
}
inline void set_DORMANT_WAKE_INTE2_GPIO16_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE2 |= 1u << 0u;
}
inline void clear_DORMANT_WAKE_INTE2_GPIO16_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE2 &= ~(1u << 0u);
}
inline void toggle_DORMANT_WAKE_INTE2_GPIO16_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE2 ^= 1u << 0u;
}
inline bool get_DORMANT_WAKE_INTE2_GPIO16_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTE2 & (1u << 1u);
}
inline void set_DORMANT_WAKE_INTE2_GPIO16_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE2 |= 1u << 1u;
}
inline void clear_DORMANT_WAKE_INTE2_GPIO16_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE2 &= ~(1u << 1u);
}
inline void toggle_DORMANT_WAKE_INTE2_GPIO16_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE2 ^= 1u << 1u;
}
inline bool get_DORMANT_WAKE_INTE2_GPIO16_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTE2 & (1u << 2u);
}
inline void set_DORMANT_WAKE_INTE2_GPIO16_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE2 |= 1u << 2u;
}
inline void clear_DORMANT_WAKE_INTE2_GPIO16_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE2 &= ~(1u << 2u);
}
inline void toggle_DORMANT_WAKE_INTE2_GPIO16_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE2 ^= 1u << 2u;
}
inline bool get_DORMANT_WAKE_INTE2_GPIO16_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTE2 & (1u << 3u);
}
inline void set_DORMANT_WAKE_INTE2_GPIO16_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE2 |= 1u << 3u;
}
inline void clear_DORMANT_WAKE_INTE2_GPIO16_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE2 &= ~(1u << 3u);
}
inline void toggle_DORMANT_WAKE_INTE2_GPIO16_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE2 ^= 1u << 3u;
}
inline bool get_DORMANT_WAKE_INTE2_GPIO17_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTE2 & (1u << 4u);
}
inline void set_DORMANT_WAKE_INTE2_GPIO17_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE2 |= 1u << 4u;
}
inline void clear_DORMANT_WAKE_INTE2_GPIO17_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE2 &= ~(1u << 4u);
}
inline void toggle_DORMANT_WAKE_INTE2_GPIO17_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE2 ^= 1u << 4u;
}
inline bool get_DORMANT_WAKE_INTE2_GPIO17_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTE2 & (1u << 5u);
}
inline void set_DORMANT_WAKE_INTE2_GPIO17_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE2 |= 1u << 5u;
}
inline void clear_DORMANT_WAKE_INTE2_GPIO17_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE2 &= ~(1u << 5u);
}
inline void toggle_DORMANT_WAKE_INTE2_GPIO17_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE2 ^= 1u << 5u;
}
inline bool get_DORMANT_WAKE_INTE2_GPIO17_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTE2 & (1u << 6u);
}
inline void set_DORMANT_WAKE_INTE2_GPIO17_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE2 |= 1u << 6u;
}
inline void clear_DORMANT_WAKE_INTE2_GPIO17_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE2 &= ~(1u << 6u);
}
inline void toggle_DORMANT_WAKE_INTE2_GPIO17_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE2 ^= 1u << 6u;
}
inline bool get_DORMANT_WAKE_INTE2_GPIO17_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTE2 & (1u << 7u);
}
inline void set_DORMANT_WAKE_INTE2_GPIO17_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE2 |= 1u << 7u;
}
inline void clear_DORMANT_WAKE_INTE2_GPIO17_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE2 &= ~(1u << 7u);
}
inline void toggle_DORMANT_WAKE_INTE2_GPIO17_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE2 ^= 1u << 7u;
}
inline bool get_DORMANT_WAKE_INTE2_GPIO18_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTE2 & (1u << 8u);
}
inline void set_DORMANT_WAKE_INTE2_GPIO18_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE2 |= 1u << 8u;
}
inline void clear_DORMANT_WAKE_INTE2_GPIO18_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE2 &= ~(1u << 8u);
}
inline void toggle_DORMANT_WAKE_INTE2_GPIO18_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE2 ^= 1u << 8u;
}
inline bool get_DORMANT_WAKE_INTE2_GPIO18_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTE2 & (1u << 9u);
}
inline void set_DORMANT_WAKE_INTE2_GPIO18_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE2 |= 1u << 9u;
}
inline void clear_DORMANT_WAKE_INTE2_GPIO18_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE2 &= ~(1u << 9u);
}
inline void toggle_DORMANT_WAKE_INTE2_GPIO18_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE2 ^= 1u << 9u;
}
inline bool get_DORMANT_WAKE_INTE2_GPIO18_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTE2 & (1u << 10u);
}
inline void set_DORMANT_WAKE_INTE2_GPIO18_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE2 |= 1u << 10u;
}
inline void clear_DORMANT_WAKE_INTE2_GPIO18_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE2 &= ~(1u << 10u);
}
inline void toggle_DORMANT_WAKE_INTE2_GPIO18_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE2 ^= 1u << 10u;
}
inline bool get_DORMANT_WAKE_INTE2_GPIO18_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTE2 & (1u << 11u);
}
inline void set_DORMANT_WAKE_INTE2_GPIO18_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE2 |= 1u << 11u;
}
inline void clear_DORMANT_WAKE_INTE2_GPIO18_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE2 &= ~(1u << 11u);
}
inline void toggle_DORMANT_WAKE_INTE2_GPIO18_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE2 ^= 1u << 11u;
}
inline bool get_DORMANT_WAKE_INTE2_GPIO19_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTE2 & (1u << 12u);
}
inline void set_DORMANT_WAKE_INTE2_GPIO19_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE2 |= 1u << 12u;
}
inline void clear_DORMANT_WAKE_INTE2_GPIO19_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE2 &= ~(1u << 12u);
}
inline void toggle_DORMANT_WAKE_INTE2_GPIO19_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE2 ^= 1u << 12u;
}
inline bool get_DORMANT_WAKE_INTE2_GPIO19_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTE2 & (1u << 13u);
}
inline void set_DORMANT_WAKE_INTE2_GPIO19_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE2 |= 1u << 13u;
}
inline void clear_DORMANT_WAKE_INTE2_GPIO19_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE2 &= ~(1u << 13u);
}
inline void toggle_DORMANT_WAKE_INTE2_GPIO19_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE2 ^= 1u << 13u;
}
inline bool get_DORMANT_WAKE_INTE2_GPIO19_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTE2 & (1u << 14u);
}
inline void set_DORMANT_WAKE_INTE2_GPIO19_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE2 |= 1u << 14u;
}
inline void clear_DORMANT_WAKE_INTE2_GPIO19_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE2 &= ~(1u << 14u);
}
inline void toggle_DORMANT_WAKE_INTE2_GPIO19_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE2 ^= 1u << 14u;
}
inline bool get_DORMANT_WAKE_INTE2_GPIO19_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTE2 & (1u << 15u);
}
inline void set_DORMANT_WAKE_INTE2_GPIO19_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE2 |= 1u << 15u;
}
inline void clear_DORMANT_WAKE_INTE2_GPIO19_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE2 &= ~(1u << 15u);
}
inline void toggle_DORMANT_WAKE_INTE2_GPIO19_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE2 ^= 1u << 15u;
}
inline bool get_DORMANT_WAKE_INTE2_GPIO20_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTE2 & (1u << 16u);
}
inline void set_DORMANT_WAKE_INTE2_GPIO20_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE2 |= 1u << 16u;
}
inline void clear_DORMANT_WAKE_INTE2_GPIO20_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE2 &= ~(1u << 16u);
}
inline void toggle_DORMANT_WAKE_INTE2_GPIO20_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE2 ^= 1u << 16u;
}
inline bool get_DORMANT_WAKE_INTE2_GPIO20_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTE2 & (1u << 17u);
}
inline void set_DORMANT_WAKE_INTE2_GPIO20_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE2 |= 1u << 17u;
}
inline void clear_DORMANT_WAKE_INTE2_GPIO20_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE2 &= ~(1u << 17u);
}
inline void toggle_DORMANT_WAKE_INTE2_GPIO20_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE2 ^= 1u << 17u;
}
inline bool get_DORMANT_WAKE_INTE2_GPIO20_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTE2 & (1u << 18u);
}
inline void set_DORMANT_WAKE_INTE2_GPIO20_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE2 |= 1u << 18u;
}
inline void clear_DORMANT_WAKE_INTE2_GPIO20_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE2 &= ~(1u << 18u);
}
inline void toggle_DORMANT_WAKE_INTE2_GPIO20_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE2 ^= 1u << 18u;
}
inline bool get_DORMANT_WAKE_INTE2_GPIO20_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTE2 & (1u << 19u);
}
inline void set_DORMANT_WAKE_INTE2_GPIO20_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE2 |= 1u << 19u;
}
inline void clear_DORMANT_WAKE_INTE2_GPIO20_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE2 &= ~(1u << 19u);
}
inline void toggle_DORMANT_WAKE_INTE2_GPIO20_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE2 ^= 1u << 19u;
}
inline bool get_DORMANT_WAKE_INTE2_GPIO21_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTE2 & (1u << 20u);
}
inline void set_DORMANT_WAKE_INTE2_GPIO21_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE2 |= 1u << 20u;
}
inline void clear_DORMANT_WAKE_INTE2_GPIO21_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE2 &= ~(1u << 20u);
}
inline void toggle_DORMANT_WAKE_INTE2_GPIO21_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE2 ^= 1u << 20u;
}
inline bool get_DORMANT_WAKE_INTE2_GPIO21_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTE2 & (1u << 21u);
}
inline void set_DORMANT_WAKE_INTE2_GPIO21_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE2 |= 1u << 21u;
}
inline void clear_DORMANT_WAKE_INTE2_GPIO21_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE2 &= ~(1u << 21u);
}
inline void toggle_DORMANT_WAKE_INTE2_GPIO21_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE2 ^= 1u << 21u;
}
inline bool get_DORMANT_WAKE_INTE2_GPIO21_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTE2 & (1u << 22u);
}
inline void set_DORMANT_WAKE_INTE2_GPIO21_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE2 |= 1u << 22u;
}
inline void clear_DORMANT_WAKE_INTE2_GPIO21_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE2 &= ~(1u << 22u);
}
inline void toggle_DORMANT_WAKE_INTE2_GPIO21_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE2 ^= 1u << 22u;
}
inline bool get_DORMANT_WAKE_INTE2_GPIO21_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTE2 & (1u << 23u);
}
inline void set_DORMANT_WAKE_INTE2_GPIO21_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE2 |= 1u << 23u;
}
inline void clear_DORMANT_WAKE_INTE2_GPIO21_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE2 &= ~(1u << 23u);
}
inline void toggle_DORMANT_WAKE_INTE2_GPIO21_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE2 ^= 1u << 23u;
}
inline bool get_DORMANT_WAKE_INTE2_GPIO22_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTE2 & (1u << 24u);
}
inline void set_DORMANT_WAKE_INTE2_GPIO22_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE2 |= 1u << 24u;
}
inline void clear_DORMANT_WAKE_INTE2_GPIO22_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE2 &= ~(1u << 24u);
}
inline void toggle_DORMANT_WAKE_INTE2_GPIO22_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE2 ^= 1u << 24u;
}
inline bool get_DORMANT_WAKE_INTE2_GPIO22_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTE2 & (1u << 25u);
}
inline void set_DORMANT_WAKE_INTE2_GPIO22_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE2 |= 1u << 25u;
}
inline void clear_DORMANT_WAKE_INTE2_GPIO22_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE2 &= ~(1u << 25u);
}
inline void toggle_DORMANT_WAKE_INTE2_GPIO22_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE2 ^= 1u << 25u;
}
inline bool get_DORMANT_WAKE_INTE2_GPIO22_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTE2 & (1u << 26u);
}
inline void set_DORMANT_WAKE_INTE2_GPIO22_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE2 |= 1u << 26u;
}
inline void clear_DORMANT_WAKE_INTE2_GPIO22_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE2 &= ~(1u << 26u);
}
inline void toggle_DORMANT_WAKE_INTE2_GPIO22_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE2 ^= 1u << 26u;
}
inline bool get_DORMANT_WAKE_INTE2_GPIO22_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTE2 & (1u << 27u);
}
inline void set_DORMANT_WAKE_INTE2_GPIO22_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE2 |= 1u << 27u;
}
inline void clear_DORMANT_WAKE_INTE2_GPIO22_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE2 &= ~(1u << 27u);
}
inline void toggle_DORMANT_WAKE_INTE2_GPIO22_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE2 ^= 1u << 27u;
}
inline bool get_DORMANT_WAKE_INTE2_GPIO23_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTE2 & (1u << 28u);
}
inline void set_DORMANT_WAKE_INTE2_GPIO23_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE2 |= 1u << 28u;
}
inline void clear_DORMANT_WAKE_INTE2_GPIO23_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE2 &= ~(1u << 28u);
}
inline void toggle_DORMANT_WAKE_INTE2_GPIO23_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE2 ^= 1u << 28u;
}
inline bool get_DORMANT_WAKE_INTE2_GPIO23_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTE2 & (1u << 29u);
}
inline void set_DORMANT_WAKE_INTE2_GPIO23_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE2 |= 1u << 29u;
}
inline void clear_DORMANT_WAKE_INTE2_GPIO23_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE2 &= ~(1u << 29u);
}
inline void toggle_DORMANT_WAKE_INTE2_GPIO23_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE2 ^= 1u << 29u;
}
inline bool get_DORMANT_WAKE_INTE2_GPIO23_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTE2 & (1u << 30u);
}
inline void set_DORMANT_WAKE_INTE2_GPIO23_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE2 |= 1u << 30u;
}
inline void clear_DORMANT_WAKE_INTE2_GPIO23_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE2 &= ~(1u << 30u);
}
inline void toggle_DORMANT_WAKE_INTE2_GPIO23_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE2 ^= 1u << 30u;
}
inline bool get_DORMANT_WAKE_INTE2_GPIO23_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTE2 & (1u << 31u);
}
inline void set_DORMANT_WAKE_INTE2_GPIO23_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE2 |= 1u << 31u;
}
inline void clear_DORMANT_WAKE_INTE2_GPIO23_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE2 &= ~(1u << 31u);
}
inline void toggle_DORMANT_WAKE_INTE2_GPIO23_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE2 ^= 1u << 31u;
}
inline void get_DORMANT_WAKE_INTE2(
bool &GPIO16_LEVEL_LOW, bool &GPIO16_LEVEL_HIGH, bool &GPIO16_EDGE_LOW,
bool &GPIO16_EDGE_HIGH, bool &GPIO17_LEVEL_LOW,
bool &GPIO17_LEVEL_HIGH, bool &GPIO17_EDGE_LOW, bool &GPIO17_EDGE_HIGH,
bool &GPIO18_LEVEL_LOW, bool &GPIO18_LEVEL_HIGH, bool &GPIO18_EDGE_LOW,
bool &GPIO18_EDGE_HIGH, bool &GPIO19_LEVEL_LOW,
bool &GPIO19_LEVEL_HIGH, bool &GPIO19_EDGE_LOW, bool &GPIO19_EDGE_HIGH,
bool &GPIO20_LEVEL_LOW, bool &GPIO20_LEVEL_HIGH, bool &GPIO20_EDGE_LOW,
bool &GPIO20_EDGE_HIGH, bool &GPIO21_LEVEL_LOW,
bool &GPIO21_LEVEL_HIGH, bool &GPIO21_EDGE_LOW, bool &GPIO21_EDGE_HIGH,
bool &GPIO22_LEVEL_LOW, bool &GPIO22_LEVEL_HIGH, bool &GPIO22_EDGE_LOW,
bool &GPIO22_EDGE_HIGH, bool &GPIO23_LEVEL_LOW,
bool &GPIO23_LEVEL_HIGH, bool &GPIO23_EDGE_LOW,
bool &GPIO23_EDGE_HIGH) volatile
{
uint32_t curr = DORMANT_WAKE_INTE2;
GPIO16_LEVEL_LOW = curr & (1u << 0u);
GPIO16_LEVEL_HIGH = curr & (1u << 1u);
GPIO16_EDGE_LOW = curr & (1u << 2u);
GPIO16_EDGE_HIGH = curr & (1u << 3u);
GPIO17_LEVEL_LOW = curr & (1u << 4u);
GPIO17_LEVEL_HIGH = curr & (1u << 5u);
GPIO17_EDGE_LOW = curr & (1u << 6u);
GPIO17_EDGE_HIGH = curr & (1u << 7u);
GPIO18_LEVEL_LOW = curr & (1u << 8u);
GPIO18_LEVEL_HIGH = curr & (1u << 9u);
GPIO18_EDGE_LOW = curr & (1u << 10u);
GPIO18_EDGE_HIGH = curr & (1u << 11u);
GPIO19_LEVEL_LOW = curr & (1u << 12u);
GPIO19_LEVEL_HIGH = curr & (1u << 13u);
GPIO19_EDGE_LOW = curr & (1u << 14u);
GPIO19_EDGE_HIGH = curr & (1u << 15u);
GPIO20_LEVEL_LOW = curr & (1u << 16u);
GPIO20_LEVEL_HIGH = curr & (1u << 17u);
GPIO20_EDGE_LOW = curr & (1u << 18u);
GPIO20_EDGE_HIGH = curr & (1u << 19u);
GPIO21_LEVEL_LOW = curr & (1u << 20u);
GPIO21_LEVEL_HIGH = curr & (1u << 21u);
GPIO21_EDGE_LOW = curr & (1u << 22u);
GPIO21_EDGE_HIGH = curr & (1u << 23u);
GPIO22_LEVEL_LOW = curr & (1u << 24u);
GPIO22_LEVEL_HIGH = curr & (1u << 25u);
GPIO22_EDGE_LOW = curr & (1u << 26u);
GPIO22_EDGE_HIGH = curr & (1u << 27u);
GPIO23_LEVEL_LOW = curr & (1u << 28u);
GPIO23_LEVEL_HIGH = curr & (1u << 29u);
GPIO23_EDGE_LOW = curr & (1u << 30u);
GPIO23_EDGE_HIGH = curr & (1u << 31u);
}
inline void set_DORMANT_WAKE_INTE2(
bool GPIO16_LEVEL_LOW, bool GPIO16_LEVEL_HIGH, bool GPIO16_EDGE_LOW,
bool GPIO16_EDGE_HIGH, bool GPIO17_LEVEL_LOW, bool GPIO17_LEVEL_HIGH,
bool GPIO17_EDGE_LOW, bool GPIO17_EDGE_HIGH, bool GPIO18_LEVEL_LOW,
bool GPIO18_LEVEL_HIGH, bool GPIO18_EDGE_LOW, bool GPIO18_EDGE_HIGH,
bool GPIO19_LEVEL_LOW, bool GPIO19_LEVEL_HIGH, bool GPIO19_EDGE_LOW,
bool GPIO19_EDGE_HIGH, bool GPIO20_LEVEL_LOW, bool GPIO20_LEVEL_HIGH,
bool GPIO20_EDGE_LOW, bool GPIO20_EDGE_HIGH, bool GPIO21_LEVEL_LOW,
bool GPIO21_LEVEL_HIGH, bool GPIO21_EDGE_LOW, bool GPIO21_EDGE_HIGH,
bool GPIO22_LEVEL_LOW, bool GPIO22_LEVEL_HIGH, bool GPIO22_EDGE_LOW,
bool GPIO22_EDGE_HIGH, bool GPIO23_LEVEL_LOW, bool GPIO23_LEVEL_HIGH,
bool GPIO23_EDGE_LOW, bool GPIO23_EDGE_HIGH) volatile
{
uint32_t curr = DORMANT_WAKE_INTE2;
curr &= ~(0b1u << 0u);
curr |= (GPIO16_LEVEL_LOW & 0b1u) << 0u;
curr &= ~(0b1u << 1u);
curr |= (GPIO16_LEVEL_HIGH & 0b1u) << 1u;
curr &= ~(0b1u << 2u);
curr |= (GPIO16_EDGE_LOW & 0b1u) << 2u;
curr &= ~(0b1u << 3u);
curr |= (GPIO16_EDGE_HIGH & 0b1u) << 3u;
curr &= ~(0b1u << 4u);
curr |= (GPIO17_LEVEL_LOW & 0b1u) << 4u;
curr &= ~(0b1u << 5u);
curr |= (GPIO17_LEVEL_HIGH & 0b1u) << 5u;
curr &= ~(0b1u << 6u);
curr |= (GPIO17_EDGE_LOW & 0b1u) << 6u;
curr &= ~(0b1u << 7u);
curr |= (GPIO17_EDGE_HIGH & 0b1u) << 7u;
curr &= ~(0b1u << 8u);
curr |= (GPIO18_LEVEL_LOW & 0b1u) << 8u;
curr &= ~(0b1u << 9u);
curr |= (GPIO18_LEVEL_HIGH & 0b1u) << 9u;
curr &= ~(0b1u << 10u);
curr |= (GPIO18_EDGE_LOW & 0b1u) << 10u;
curr &= ~(0b1u << 11u);
curr |= (GPIO18_EDGE_HIGH & 0b1u) << 11u;
curr &= ~(0b1u << 12u);
curr |= (GPIO19_LEVEL_LOW & 0b1u) << 12u;
curr &= ~(0b1u << 13u);
curr |= (GPIO19_LEVEL_HIGH & 0b1u) << 13u;
curr &= ~(0b1u << 14u);
curr |= (GPIO19_EDGE_LOW & 0b1u) << 14u;
curr &= ~(0b1u << 15u);
curr |= (GPIO19_EDGE_HIGH & 0b1u) << 15u;
curr &= ~(0b1u << 16u);
curr |= (GPIO20_LEVEL_LOW & 0b1u) << 16u;
curr &= ~(0b1u << 17u);
curr |= (GPIO20_LEVEL_HIGH & 0b1u) << 17u;
curr &= ~(0b1u << 18u);
curr |= (GPIO20_EDGE_LOW & 0b1u) << 18u;
curr &= ~(0b1u << 19u);
curr |= (GPIO20_EDGE_HIGH & 0b1u) << 19u;
curr &= ~(0b1u << 20u);
curr |= (GPIO21_LEVEL_LOW & 0b1u) << 20u;
curr &= ~(0b1u << 21u);
curr |= (GPIO21_LEVEL_HIGH & 0b1u) << 21u;
curr &= ~(0b1u << 22u);
curr |= (GPIO21_EDGE_LOW & 0b1u) << 22u;
curr &= ~(0b1u << 23u);
curr |= (GPIO21_EDGE_HIGH & 0b1u) << 23u;
curr &= ~(0b1u << 24u);
curr |= (GPIO22_LEVEL_LOW & 0b1u) << 24u;
curr &= ~(0b1u << 25u);
curr |= (GPIO22_LEVEL_HIGH & 0b1u) << 25u;
curr &= ~(0b1u << 26u);
curr |= (GPIO22_EDGE_LOW & 0b1u) << 26u;
curr &= ~(0b1u << 27u);
curr |= (GPIO22_EDGE_HIGH & 0b1u) << 27u;
curr &= ~(0b1u << 28u);
curr |= (GPIO23_LEVEL_LOW & 0b1u) << 28u;
curr &= ~(0b1u << 29u);
curr |= (GPIO23_LEVEL_HIGH & 0b1u) << 29u;
curr &= ~(0b1u << 30u);
curr |= (GPIO23_EDGE_LOW & 0b1u) << 30u;
curr &= ~(0b1u << 31u);
curr |= (GPIO23_EDGE_HIGH & 0b1u) << 31u;
DORMANT_WAKE_INTE2 = curr;
}
inline bool get_DORMANT_WAKE_INTE3_GPIO24_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTE3 & (1u << 0u);
}
inline void set_DORMANT_WAKE_INTE3_GPIO24_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE3 |= 1u << 0u;
}
inline void clear_DORMANT_WAKE_INTE3_GPIO24_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE3 &= ~(1u << 0u);
}
inline void toggle_DORMANT_WAKE_INTE3_GPIO24_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE3 ^= 1u << 0u;
}
inline bool get_DORMANT_WAKE_INTE3_GPIO24_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTE3 & (1u << 1u);
}
inline void set_DORMANT_WAKE_INTE3_GPIO24_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE3 |= 1u << 1u;
}
inline void clear_DORMANT_WAKE_INTE3_GPIO24_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE3 &= ~(1u << 1u);
}
inline void toggle_DORMANT_WAKE_INTE3_GPIO24_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE3 ^= 1u << 1u;
}
inline bool get_DORMANT_WAKE_INTE3_GPIO24_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTE3 & (1u << 2u);
}
inline void set_DORMANT_WAKE_INTE3_GPIO24_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE3 |= 1u << 2u;
}
inline void clear_DORMANT_WAKE_INTE3_GPIO24_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE3 &= ~(1u << 2u);
}
inline void toggle_DORMANT_WAKE_INTE3_GPIO24_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE3 ^= 1u << 2u;
}
inline bool get_DORMANT_WAKE_INTE3_GPIO24_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTE3 & (1u << 3u);
}
inline void set_DORMANT_WAKE_INTE3_GPIO24_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE3 |= 1u << 3u;
}
inline void clear_DORMANT_WAKE_INTE3_GPIO24_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE3 &= ~(1u << 3u);
}
inline void toggle_DORMANT_WAKE_INTE3_GPIO24_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE3 ^= 1u << 3u;
}
inline bool get_DORMANT_WAKE_INTE3_GPIO25_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTE3 & (1u << 4u);
}
inline void set_DORMANT_WAKE_INTE3_GPIO25_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE3 |= 1u << 4u;
}
inline void clear_DORMANT_WAKE_INTE3_GPIO25_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE3 &= ~(1u << 4u);
}
inline void toggle_DORMANT_WAKE_INTE3_GPIO25_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE3 ^= 1u << 4u;
}
inline bool get_DORMANT_WAKE_INTE3_GPIO25_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTE3 & (1u << 5u);
}
inline void set_DORMANT_WAKE_INTE3_GPIO25_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE3 |= 1u << 5u;
}
inline void clear_DORMANT_WAKE_INTE3_GPIO25_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE3 &= ~(1u << 5u);
}
inline void toggle_DORMANT_WAKE_INTE3_GPIO25_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE3 ^= 1u << 5u;
}
inline bool get_DORMANT_WAKE_INTE3_GPIO25_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTE3 & (1u << 6u);
}
inline void set_DORMANT_WAKE_INTE3_GPIO25_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE3 |= 1u << 6u;
}
inline void clear_DORMANT_WAKE_INTE3_GPIO25_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE3 &= ~(1u << 6u);
}
inline void toggle_DORMANT_WAKE_INTE3_GPIO25_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE3 ^= 1u << 6u;
}
inline bool get_DORMANT_WAKE_INTE3_GPIO25_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTE3 & (1u << 7u);
}
inline void set_DORMANT_WAKE_INTE3_GPIO25_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE3 |= 1u << 7u;
}
inline void clear_DORMANT_WAKE_INTE3_GPIO25_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE3 &= ~(1u << 7u);
}
inline void toggle_DORMANT_WAKE_INTE3_GPIO25_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE3 ^= 1u << 7u;
}
inline bool get_DORMANT_WAKE_INTE3_GPIO26_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTE3 & (1u << 8u);
}
inline void set_DORMANT_WAKE_INTE3_GPIO26_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE3 |= 1u << 8u;
}
inline void clear_DORMANT_WAKE_INTE3_GPIO26_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE3 &= ~(1u << 8u);
}
inline void toggle_DORMANT_WAKE_INTE3_GPIO26_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE3 ^= 1u << 8u;
}
inline bool get_DORMANT_WAKE_INTE3_GPIO26_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTE3 & (1u << 9u);
}
inline void set_DORMANT_WAKE_INTE3_GPIO26_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE3 |= 1u << 9u;
}
inline void clear_DORMANT_WAKE_INTE3_GPIO26_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE3 &= ~(1u << 9u);
}
inline void toggle_DORMANT_WAKE_INTE3_GPIO26_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE3 ^= 1u << 9u;
}
inline bool get_DORMANT_WAKE_INTE3_GPIO26_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTE3 & (1u << 10u);
}
inline void set_DORMANT_WAKE_INTE3_GPIO26_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE3 |= 1u << 10u;
}
inline void clear_DORMANT_WAKE_INTE3_GPIO26_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE3 &= ~(1u << 10u);
}
inline void toggle_DORMANT_WAKE_INTE3_GPIO26_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE3 ^= 1u << 10u;
}
inline bool get_DORMANT_WAKE_INTE3_GPIO26_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTE3 & (1u << 11u);
}
inline void set_DORMANT_WAKE_INTE3_GPIO26_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE3 |= 1u << 11u;
}
inline void clear_DORMANT_WAKE_INTE3_GPIO26_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE3 &= ~(1u << 11u);
}
inline void toggle_DORMANT_WAKE_INTE3_GPIO26_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE3 ^= 1u << 11u;
}
inline bool get_DORMANT_WAKE_INTE3_GPIO27_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTE3 & (1u << 12u);
}
inline void set_DORMANT_WAKE_INTE3_GPIO27_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE3 |= 1u << 12u;
}
inline void clear_DORMANT_WAKE_INTE3_GPIO27_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE3 &= ~(1u << 12u);
}
inline void toggle_DORMANT_WAKE_INTE3_GPIO27_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE3 ^= 1u << 12u;
}
inline bool get_DORMANT_WAKE_INTE3_GPIO27_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTE3 & (1u << 13u);
}
inline void set_DORMANT_WAKE_INTE3_GPIO27_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE3 |= 1u << 13u;
}
inline void clear_DORMANT_WAKE_INTE3_GPIO27_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE3 &= ~(1u << 13u);
}
inline void toggle_DORMANT_WAKE_INTE3_GPIO27_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE3 ^= 1u << 13u;
}
inline bool get_DORMANT_WAKE_INTE3_GPIO27_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTE3 & (1u << 14u);
}
inline void set_DORMANT_WAKE_INTE3_GPIO27_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE3 |= 1u << 14u;
}
inline void clear_DORMANT_WAKE_INTE3_GPIO27_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE3 &= ~(1u << 14u);
}
inline void toggle_DORMANT_WAKE_INTE3_GPIO27_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE3 ^= 1u << 14u;
}
inline bool get_DORMANT_WAKE_INTE3_GPIO27_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTE3 & (1u << 15u);
}
inline void set_DORMANT_WAKE_INTE3_GPIO27_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE3 |= 1u << 15u;
}
inline void clear_DORMANT_WAKE_INTE3_GPIO27_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE3 &= ~(1u << 15u);
}
inline void toggle_DORMANT_WAKE_INTE3_GPIO27_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE3 ^= 1u << 15u;
}
inline bool get_DORMANT_WAKE_INTE3_GPIO28_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTE3 & (1u << 16u);
}
inline void set_DORMANT_WAKE_INTE3_GPIO28_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE3 |= 1u << 16u;
}
inline void clear_DORMANT_WAKE_INTE3_GPIO28_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE3 &= ~(1u << 16u);
}
inline void toggle_DORMANT_WAKE_INTE3_GPIO28_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE3 ^= 1u << 16u;
}
inline bool get_DORMANT_WAKE_INTE3_GPIO28_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTE3 & (1u << 17u);
}
inline void set_DORMANT_WAKE_INTE3_GPIO28_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE3 |= 1u << 17u;
}
inline void clear_DORMANT_WAKE_INTE3_GPIO28_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE3 &= ~(1u << 17u);
}
inline void toggle_DORMANT_WAKE_INTE3_GPIO28_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE3 ^= 1u << 17u;
}
inline bool get_DORMANT_WAKE_INTE3_GPIO28_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTE3 & (1u << 18u);
}
inline void set_DORMANT_WAKE_INTE3_GPIO28_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE3 |= 1u << 18u;
}
inline void clear_DORMANT_WAKE_INTE3_GPIO28_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE3 &= ~(1u << 18u);
}
inline void toggle_DORMANT_WAKE_INTE3_GPIO28_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE3 ^= 1u << 18u;
}
inline bool get_DORMANT_WAKE_INTE3_GPIO28_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTE3 & (1u << 19u);
}
inline void set_DORMANT_WAKE_INTE3_GPIO28_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE3 |= 1u << 19u;
}
inline void clear_DORMANT_WAKE_INTE3_GPIO28_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE3 &= ~(1u << 19u);
}
inline void toggle_DORMANT_WAKE_INTE3_GPIO28_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE3 ^= 1u << 19u;
}
inline bool get_DORMANT_WAKE_INTE3_GPIO29_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTE3 & (1u << 20u);
}
inline void set_DORMANT_WAKE_INTE3_GPIO29_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE3 |= 1u << 20u;
}
inline void clear_DORMANT_WAKE_INTE3_GPIO29_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE3 &= ~(1u << 20u);
}
inline void toggle_DORMANT_WAKE_INTE3_GPIO29_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTE3 ^= 1u << 20u;
}
inline bool get_DORMANT_WAKE_INTE3_GPIO29_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTE3 & (1u << 21u);
}
inline void set_DORMANT_WAKE_INTE3_GPIO29_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE3 |= 1u << 21u;
}
inline void clear_DORMANT_WAKE_INTE3_GPIO29_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE3 &= ~(1u << 21u);
}
inline void toggle_DORMANT_WAKE_INTE3_GPIO29_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTE3 ^= 1u << 21u;
}
inline bool get_DORMANT_WAKE_INTE3_GPIO29_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTE3 & (1u << 22u);
}
inline void set_DORMANT_WAKE_INTE3_GPIO29_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE3 |= 1u << 22u;
}
inline void clear_DORMANT_WAKE_INTE3_GPIO29_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE3 &= ~(1u << 22u);
}
inline void toggle_DORMANT_WAKE_INTE3_GPIO29_EDGE_LOW() volatile
{
DORMANT_WAKE_INTE3 ^= 1u << 22u;
}
inline bool get_DORMANT_WAKE_INTE3_GPIO29_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTE3 & (1u << 23u);
}
inline void set_DORMANT_WAKE_INTE3_GPIO29_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE3 |= 1u << 23u;
}
inline void clear_DORMANT_WAKE_INTE3_GPIO29_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE3 &= ~(1u << 23u);
}
inline void toggle_DORMANT_WAKE_INTE3_GPIO29_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTE3 ^= 1u << 23u;
}
inline void get_DORMANT_WAKE_INTE3(
bool &GPIO24_LEVEL_LOW, bool &GPIO24_LEVEL_HIGH, bool &GPIO24_EDGE_LOW,
bool &GPIO24_EDGE_HIGH, bool &GPIO25_LEVEL_LOW,
bool &GPIO25_LEVEL_HIGH, bool &GPIO25_EDGE_LOW, bool &GPIO25_EDGE_HIGH,
bool &GPIO26_LEVEL_LOW, bool &GPIO26_LEVEL_HIGH, bool &GPIO26_EDGE_LOW,
bool &GPIO26_EDGE_HIGH, bool &GPIO27_LEVEL_LOW,
bool &GPIO27_LEVEL_HIGH, bool &GPIO27_EDGE_LOW, bool &GPIO27_EDGE_HIGH,
bool &GPIO28_LEVEL_LOW, bool &GPIO28_LEVEL_HIGH, bool &GPIO28_EDGE_LOW,
bool &GPIO28_EDGE_HIGH, bool &GPIO29_LEVEL_LOW,
bool &GPIO29_LEVEL_HIGH, bool &GPIO29_EDGE_LOW,
bool &GPIO29_EDGE_HIGH) volatile
{
uint32_t curr = DORMANT_WAKE_INTE3;
GPIO24_LEVEL_LOW = curr & (1u << 0u);
GPIO24_LEVEL_HIGH = curr & (1u << 1u);
GPIO24_EDGE_LOW = curr & (1u << 2u);
GPIO24_EDGE_HIGH = curr & (1u << 3u);
GPIO25_LEVEL_LOW = curr & (1u << 4u);
GPIO25_LEVEL_HIGH = curr & (1u << 5u);
GPIO25_EDGE_LOW = curr & (1u << 6u);
GPIO25_EDGE_HIGH = curr & (1u << 7u);
GPIO26_LEVEL_LOW = curr & (1u << 8u);
GPIO26_LEVEL_HIGH = curr & (1u << 9u);
GPIO26_EDGE_LOW = curr & (1u << 10u);
GPIO26_EDGE_HIGH = curr & (1u << 11u);
GPIO27_LEVEL_LOW = curr & (1u << 12u);
GPIO27_LEVEL_HIGH = curr & (1u << 13u);
GPIO27_EDGE_LOW = curr & (1u << 14u);
GPIO27_EDGE_HIGH = curr & (1u << 15u);
GPIO28_LEVEL_LOW = curr & (1u << 16u);
GPIO28_LEVEL_HIGH = curr & (1u << 17u);
GPIO28_EDGE_LOW = curr & (1u << 18u);
GPIO28_EDGE_HIGH = curr & (1u << 19u);
GPIO29_LEVEL_LOW = curr & (1u << 20u);
GPIO29_LEVEL_HIGH = curr & (1u << 21u);
GPIO29_EDGE_LOW = curr & (1u << 22u);
GPIO29_EDGE_HIGH = curr & (1u << 23u);
}
inline void set_DORMANT_WAKE_INTE3(
bool GPIO24_LEVEL_LOW, bool GPIO24_LEVEL_HIGH, bool GPIO24_EDGE_LOW,
bool GPIO24_EDGE_HIGH, bool GPIO25_LEVEL_LOW, bool GPIO25_LEVEL_HIGH,
bool GPIO25_EDGE_LOW, bool GPIO25_EDGE_HIGH, bool GPIO26_LEVEL_LOW,
bool GPIO26_LEVEL_HIGH, bool GPIO26_EDGE_LOW, bool GPIO26_EDGE_HIGH,
bool GPIO27_LEVEL_LOW, bool GPIO27_LEVEL_HIGH, bool GPIO27_EDGE_LOW,
bool GPIO27_EDGE_HIGH, bool GPIO28_LEVEL_LOW, bool GPIO28_LEVEL_HIGH,
bool GPIO28_EDGE_LOW, bool GPIO28_EDGE_HIGH, bool GPIO29_LEVEL_LOW,
bool GPIO29_LEVEL_HIGH, bool GPIO29_EDGE_LOW,
bool GPIO29_EDGE_HIGH) volatile
{
uint32_t curr = DORMANT_WAKE_INTE3;
curr &= ~(0b1u << 0u);
curr |= (GPIO24_LEVEL_LOW & 0b1u) << 0u;
curr &= ~(0b1u << 1u);
curr |= (GPIO24_LEVEL_HIGH & 0b1u) << 1u;
curr &= ~(0b1u << 2u);
curr |= (GPIO24_EDGE_LOW & 0b1u) << 2u;
curr &= ~(0b1u << 3u);
curr |= (GPIO24_EDGE_HIGH & 0b1u) << 3u;
curr &= ~(0b1u << 4u);
curr |= (GPIO25_LEVEL_LOW & 0b1u) << 4u;
curr &= ~(0b1u << 5u);
curr |= (GPIO25_LEVEL_HIGH & 0b1u) << 5u;
curr &= ~(0b1u << 6u);
curr |= (GPIO25_EDGE_LOW & 0b1u) << 6u;
curr &= ~(0b1u << 7u);
curr |= (GPIO25_EDGE_HIGH & 0b1u) << 7u;
curr &= ~(0b1u << 8u);
curr |= (GPIO26_LEVEL_LOW & 0b1u) << 8u;
curr &= ~(0b1u << 9u);
curr |= (GPIO26_LEVEL_HIGH & 0b1u) << 9u;
curr &= ~(0b1u << 10u);
curr |= (GPIO26_EDGE_LOW & 0b1u) << 10u;
curr &= ~(0b1u << 11u);
curr |= (GPIO26_EDGE_HIGH & 0b1u) << 11u;
curr &= ~(0b1u << 12u);
curr |= (GPIO27_LEVEL_LOW & 0b1u) << 12u;
curr &= ~(0b1u << 13u);
curr |= (GPIO27_LEVEL_HIGH & 0b1u) << 13u;
curr &= ~(0b1u << 14u);
curr |= (GPIO27_EDGE_LOW & 0b1u) << 14u;
curr &= ~(0b1u << 15u);
curr |= (GPIO27_EDGE_HIGH & 0b1u) << 15u;
curr &= ~(0b1u << 16u);
curr |= (GPIO28_LEVEL_LOW & 0b1u) << 16u;
curr &= ~(0b1u << 17u);
curr |= (GPIO28_LEVEL_HIGH & 0b1u) << 17u;
curr &= ~(0b1u << 18u);
curr |= (GPIO28_EDGE_LOW & 0b1u) << 18u;
curr &= ~(0b1u << 19u);
curr |= (GPIO28_EDGE_HIGH & 0b1u) << 19u;
curr &= ~(0b1u << 20u);
curr |= (GPIO29_LEVEL_LOW & 0b1u) << 20u;
curr &= ~(0b1u << 21u);
curr |= (GPIO29_LEVEL_HIGH & 0b1u) << 21u;
curr &= ~(0b1u << 22u);
curr |= (GPIO29_EDGE_LOW & 0b1u) << 22u;
curr &= ~(0b1u << 23u);
curr |= (GPIO29_EDGE_HIGH & 0b1u) << 23u;
DORMANT_WAKE_INTE3 = curr;
}
inline bool get_DORMANT_WAKE_INTF0_GPIO0_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTF0 & (1u << 0u);
}
inline void set_DORMANT_WAKE_INTF0_GPIO0_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF0 |= 1u << 0u;
}
inline void clear_DORMANT_WAKE_INTF0_GPIO0_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF0 &= ~(1u << 0u);
}
inline void toggle_DORMANT_WAKE_INTF0_GPIO0_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF0 ^= 1u << 0u;
}
inline bool get_DORMANT_WAKE_INTF0_GPIO0_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTF0 & (1u << 1u);
}
inline void set_DORMANT_WAKE_INTF0_GPIO0_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF0 |= 1u << 1u;
}
inline void clear_DORMANT_WAKE_INTF0_GPIO0_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF0 &= ~(1u << 1u);
}
inline void toggle_DORMANT_WAKE_INTF0_GPIO0_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF0 ^= 1u << 1u;
}
inline bool get_DORMANT_WAKE_INTF0_GPIO0_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTF0 & (1u << 2u);
}
inline void set_DORMANT_WAKE_INTF0_GPIO0_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF0 |= 1u << 2u;
}
inline void clear_DORMANT_WAKE_INTF0_GPIO0_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF0 &= ~(1u << 2u);
}
inline void toggle_DORMANT_WAKE_INTF0_GPIO0_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF0 ^= 1u << 2u;
}
inline bool get_DORMANT_WAKE_INTF0_GPIO0_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTF0 & (1u << 3u);
}
inline void set_DORMANT_WAKE_INTF0_GPIO0_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF0 |= 1u << 3u;
}
inline void clear_DORMANT_WAKE_INTF0_GPIO0_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF0 &= ~(1u << 3u);
}
inline void toggle_DORMANT_WAKE_INTF0_GPIO0_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF0 ^= 1u << 3u;
}
inline bool get_DORMANT_WAKE_INTF0_GPIO1_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTF0 & (1u << 4u);
}
inline void set_DORMANT_WAKE_INTF0_GPIO1_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF0 |= 1u << 4u;
}
inline void clear_DORMANT_WAKE_INTF0_GPIO1_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF0 &= ~(1u << 4u);
}
inline void toggle_DORMANT_WAKE_INTF0_GPIO1_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF0 ^= 1u << 4u;
}
inline bool get_DORMANT_WAKE_INTF0_GPIO1_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTF0 & (1u << 5u);
}
inline void set_DORMANT_WAKE_INTF0_GPIO1_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF0 |= 1u << 5u;
}
inline void clear_DORMANT_WAKE_INTF0_GPIO1_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF0 &= ~(1u << 5u);
}
inline void toggle_DORMANT_WAKE_INTF0_GPIO1_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF0 ^= 1u << 5u;
}
inline bool get_DORMANT_WAKE_INTF0_GPIO1_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTF0 & (1u << 6u);
}
inline void set_DORMANT_WAKE_INTF0_GPIO1_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF0 |= 1u << 6u;
}
inline void clear_DORMANT_WAKE_INTF0_GPIO1_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF0 &= ~(1u << 6u);
}
inline void toggle_DORMANT_WAKE_INTF0_GPIO1_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF0 ^= 1u << 6u;
}
inline bool get_DORMANT_WAKE_INTF0_GPIO1_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTF0 & (1u << 7u);
}
inline void set_DORMANT_WAKE_INTF0_GPIO1_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF0 |= 1u << 7u;
}
inline void clear_DORMANT_WAKE_INTF0_GPIO1_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF0 &= ~(1u << 7u);
}
inline void toggle_DORMANT_WAKE_INTF0_GPIO1_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF0 ^= 1u << 7u;
}
inline bool get_DORMANT_WAKE_INTF0_GPIO2_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTF0 & (1u << 8u);
}
inline void set_DORMANT_WAKE_INTF0_GPIO2_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF0 |= 1u << 8u;
}
inline void clear_DORMANT_WAKE_INTF0_GPIO2_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF0 &= ~(1u << 8u);
}
inline void toggle_DORMANT_WAKE_INTF0_GPIO2_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF0 ^= 1u << 8u;
}
inline bool get_DORMANT_WAKE_INTF0_GPIO2_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTF0 & (1u << 9u);
}
inline void set_DORMANT_WAKE_INTF0_GPIO2_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF0 |= 1u << 9u;
}
inline void clear_DORMANT_WAKE_INTF0_GPIO2_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF0 &= ~(1u << 9u);
}
inline void toggle_DORMANT_WAKE_INTF0_GPIO2_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF0 ^= 1u << 9u;
}
inline bool get_DORMANT_WAKE_INTF0_GPIO2_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTF0 & (1u << 10u);
}
inline void set_DORMANT_WAKE_INTF0_GPIO2_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF0 |= 1u << 10u;
}
inline void clear_DORMANT_WAKE_INTF0_GPIO2_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF0 &= ~(1u << 10u);
}
inline void toggle_DORMANT_WAKE_INTF0_GPIO2_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF0 ^= 1u << 10u;
}
inline bool get_DORMANT_WAKE_INTF0_GPIO2_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTF0 & (1u << 11u);
}
inline void set_DORMANT_WAKE_INTF0_GPIO2_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF0 |= 1u << 11u;
}
inline void clear_DORMANT_WAKE_INTF0_GPIO2_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF0 &= ~(1u << 11u);
}
inline void toggle_DORMANT_WAKE_INTF0_GPIO2_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF0 ^= 1u << 11u;
}
inline bool get_DORMANT_WAKE_INTF0_GPIO3_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTF0 & (1u << 12u);
}
inline void set_DORMANT_WAKE_INTF0_GPIO3_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF0 |= 1u << 12u;
}
inline void clear_DORMANT_WAKE_INTF0_GPIO3_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF0 &= ~(1u << 12u);
}
inline void toggle_DORMANT_WAKE_INTF0_GPIO3_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF0 ^= 1u << 12u;
}
inline bool get_DORMANT_WAKE_INTF0_GPIO3_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTF0 & (1u << 13u);
}
inline void set_DORMANT_WAKE_INTF0_GPIO3_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF0 |= 1u << 13u;
}
inline void clear_DORMANT_WAKE_INTF0_GPIO3_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF0 &= ~(1u << 13u);
}
inline void toggle_DORMANT_WAKE_INTF0_GPIO3_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF0 ^= 1u << 13u;
}
inline bool get_DORMANT_WAKE_INTF0_GPIO3_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTF0 & (1u << 14u);
}
inline void set_DORMANT_WAKE_INTF0_GPIO3_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF0 |= 1u << 14u;
}
inline void clear_DORMANT_WAKE_INTF0_GPIO3_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF0 &= ~(1u << 14u);
}
inline void toggle_DORMANT_WAKE_INTF0_GPIO3_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF0 ^= 1u << 14u;
}
inline bool get_DORMANT_WAKE_INTF0_GPIO3_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTF0 & (1u << 15u);
}
inline void set_DORMANT_WAKE_INTF0_GPIO3_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF0 |= 1u << 15u;
}
inline void clear_DORMANT_WAKE_INTF0_GPIO3_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF0 &= ~(1u << 15u);
}
inline void toggle_DORMANT_WAKE_INTF0_GPIO3_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF0 ^= 1u << 15u;
}
inline bool get_DORMANT_WAKE_INTF0_GPIO4_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTF0 & (1u << 16u);
}
inline void set_DORMANT_WAKE_INTF0_GPIO4_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF0 |= 1u << 16u;
}
inline void clear_DORMANT_WAKE_INTF0_GPIO4_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF0 &= ~(1u << 16u);
}
inline void toggle_DORMANT_WAKE_INTF0_GPIO4_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF0 ^= 1u << 16u;
}
inline bool get_DORMANT_WAKE_INTF0_GPIO4_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTF0 & (1u << 17u);
}
inline void set_DORMANT_WAKE_INTF0_GPIO4_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF0 |= 1u << 17u;
}
inline void clear_DORMANT_WAKE_INTF0_GPIO4_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF0 &= ~(1u << 17u);
}
inline void toggle_DORMANT_WAKE_INTF0_GPIO4_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF0 ^= 1u << 17u;
}
inline bool get_DORMANT_WAKE_INTF0_GPIO4_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTF0 & (1u << 18u);
}
inline void set_DORMANT_WAKE_INTF0_GPIO4_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF0 |= 1u << 18u;
}
inline void clear_DORMANT_WAKE_INTF0_GPIO4_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF0 &= ~(1u << 18u);
}
inline void toggle_DORMANT_WAKE_INTF0_GPIO4_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF0 ^= 1u << 18u;
}
inline bool get_DORMANT_WAKE_INTF0_GPIO4_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTF0 & (1u << 19u);
}
inline void set_DORMANT_WAKE_INTF0_GPIO4_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF0 |= 1u << 19u;
}
inline void clear_DORMANT_WAKE_INTF0_GPIO4_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF0 &= ~(1u << 19u);
}
inline void toggle_DORMANT_WAKE_INTF0_GPIO4_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF0 ^= 1u << 19u;
}
inline bool get_DORMANT_WAKE_INTF0_GPIO5_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTF0 & (1u << 20u);
}
inline void set_DORMANT_WAKE_INTF0_GPIO5_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF0 |= 1u << 20u;
}
inline void clear_DORMANT_WAKE_INTF0_GPIO5_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF0 &= ~(1u << 20u);
}
inline void toggle_DORMANT_WAKE_INTF0_GPIO5_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF0 ^= 1u << 20u;
}
inline bool get_DORMANT_WAKE_INTF0_GPIO5_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTF0 & (1u << 21u);
}
inline void set_DORMANT_WAKE_INTF0_GPIO5_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF0 |= 1u << 21u;
}
inline void clear_DORMANT_WAKE_INTF0_GPIO5_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF0 &= ~(1u << 21u);
}
inline void toggle_DORMANT_WAKE_INTF0_GPIO5_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF0 ^= 1u << 21u;
}
inline bool get_DORMANT_WAKE_INTF0_GPIO5_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTF0 & (1u << 22u);
}
inline void set_DORMANT_WAKE_INTF0_GPIO5_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF0 |= 1u << 22u;
}
inline void clear_DORMANT_WAKE_INTF0_GPIO5_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF0 &= ~(1u << 22u);
}
inline void toggle_DORMANT_WAKE_INTF0_GPIO5_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF0 ^= 1u << 22u;
}
inline bool get_DORMANT_WAKE_INTF0_GPIO5_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTF0 & (1u << 23u);
}
inline void set_DORMANT_WAKE_INTF0_GPIO5_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF0 |= 1u << 23u;
}
inline void clear_DORMANT_WAKE_INTF0_GPIO5_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF0 &= ~(1u << 23u);
}
inline void toggle_DORMANT_WAKE_INTF0_GPIO5_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF0 ^= 1u << 23u;
}
inline bool get_DORMANT_WAKE_INTF0_GPIO6_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTF0 & (1u << 24u);
}
inline void set_DORMANT_WAKE_INTF0_GPIO6_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF0 |= 1u << 24u;
}
inline void clear_DORMANT_WAKE_INTF0_GPIO6_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF0 &= ~(1u << 24u);
}
inline void toggle_DORMANT_WAKE_INTF0_GPIO6_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF0 ^= 1u << 24u;
}
inline bool get_DORMANT_WAKE_INTF0_GPIO6_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTF0 & (1u << 25u);
}
inline void set_DORMANT_WAKE_INTF0_GPIO6_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF0 |= 1u << 25u;
}
inline void clear_DORMANT_WAKE_INTF0_GPIO6_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF0 &= ~(1u << 25u);
}
inline void toggle_DORMANT_WAKE_INTF0_GPIO6_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF0 ^= 1u << 25u;
}
inline bool get_DORMANT_WAKE_INTF0_GPIO6_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTF0 & (1u << 26u);
}
inline void set_DORMANT_WAKE_INTF0_GPIO6_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF0 |= 1u << 26u;
}
inline void clear_DORMANT_WAKE_INTF0_GPIO6_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF0 &= ~(1u << 26u);
}
inline void toggle_DORMANT_WAKE_INTF0_GPIO6_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF0 ^= 1u << 26u;
}
inline bool get_DORMANT_WAKE_INTF0_GPIO6_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTF0 & (1u << 27u);
}
inline void set_DORMANT_WAKE_INTF0_GPIO6_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF0 |= 1u << 27u;
}
inline void clear_DORMANT_WAKE_INTF0_GPIO6_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF0 &= ~(1u << 27u);
}
inline void toggle_DORMANT_WAKE_INTF0_GPIO6_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF0 ^= 1u << 27u;
}
inline bool get_DORMANT_WAKE_INTF0_GPIO7_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTF0 & (1u << 28u);
}
inline void set_DORMANT_WAKE_INTF0_GPIO7_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF0 |= 1u << 28u;
}
inline void clear_DORMANT_WAKE_INTF0_GPIO7_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF0 &= ~(1u << 28u);
}
inline void toggle_DORMANT_WAKE_INTF0_GPIO7_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF0 ^= 1u << 28u;
}
inline bool get_DORMANT_WAKE_INTF0_GPIO7_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTF0 & (1u << 29u);
}
inline void set_DORMANT_WAKE_INTF0_GPIO7_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF0 |= 1u << 29u;
}
inline void clear_DORMANT_WAKE_INTF0_GPIO7_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF0 &= ~(1u << 29u);
}
inline void toggle_DORMANT_WAKE_INTF0_GPIO7_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF0 ^= 1u << 29u;
}
inline bool get_DORMANT_WAKE_INTF0_GPIO7_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTF0 & (1u << 30u);
}
inline void set_DORMANT_WAKE_INTF0_GPIO7_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF0 |= 1u << 30u;
}
inline void clear_DORMANT_WAKE_INTF0_GPIO7_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF0 &= ~(1u << 30u);
}
inline void toggle_DORMANT_WAKE_INTF0_GPIO7_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF0 ^= 1u << 30u;
}
inline bool get_DORMANT_WAKE_INTF0_GPIO7_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTF0 & (1u << 31u);
}
inline void set_DORMANT_WAKE_INTF0_GPIO7_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF0 |= 1u << 31u;
}
inline void clear_DORMANT_WAKE_INTF0_GPIO7_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF0 &= ~(1u << 31u);
}
inline void toggle_DORMANT_WAKE_INTF0_GPIO7_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF0 ^= 1u << 31u;
}
inline void get_DORMANT_WAKE_INTF0(
bool &GPIO0_LEVEL_LOW, bool &GPIO0_LEVEL_HIGH, bool &GPIO0_EDGE_LOW,
bool &GPIO0_EDGE_HIGH, bool &GPIO1_LEVEL_LOW, bool &GPIO1_LEVEL_HIGH,
bool &GPIO1_EDGE_LOW, bool &GPIO1_EDGE_HIGH, bool &GPIO2_LEVEL_LOW,
bool &GPIO2_LEVEL_HIGH, bool &GPIO2_EDGE_LOW, bool &GPIO2_EDGE_HIGH,
bool &GPIO3_LEVEL_LOW, bool &GPIO3_LEVEL_HIGH, bool &GPIO3_EDGE_LOW,
bool &GPIO3_EDGE_HIGH, bool &GPIO4_LEVEL_LOW, bool &GPIO4_LEVEL_HIGH,
bool &GPIO4_EDGE_LOW, bool &GPIO4_EDGE_HIGH, bool &GPIO5_LEVEL_LOW,
bool &GPIO5_LEVEL_HIGH, bool &GPIO5_EDGE_LOW, bool &GPIO5_EDGE_HIGH,
bool &GPIO6_LEVEL_LOW, bool &GPIO6_LEVEL_HIGH, bool &GPIO6_EDGE_LOW,
bool &GPIO6_EDGE_HIGH, bool &GPIO7_LEVEL_LOW, bool &GPIO7_LEVEL_HIGH,
bool &GPIO7_EDGE_LOW, bool &GPIO7_EDGE_HIGH) volatile
{
uint32_t curr = DORMANT_WAKE_INTF0;
GPIO0_LEVEL_LOW = curr & (1u << 0u);
GPIO0_LEVEL_HIGH = curr & (1u << 1u);
GPIO0_EDGE_LOW = curr & (1u << 2u);
GPIO0_EDGE_HIGH = curr & (1u << 3u);
GPIO1_LEVEL_LOW = curr & (1u << 4u);
GPIO1_LEVEL_HIGH = curr & (1u << 5u);
GPIO1_EDGE_LOW = curr & (1u << 6u);
GPIO1_EDGE_HIGH = curr & (1u << 7u);
GPIO2_LEVEL_LOW = curr & (1u << 8u);
GPIO2_LEVEL_HIGH = curr & (1u << 9u);
GPIO2_EDGE_LOW = curr & (1u << 10u);
GPIO2_EDGE_HIGH = curr & (1u << 11u);
GPIO3_LEVEL_LOW = curr & (1u << 12u);
GPIO3_LEVEL_HIGH = curr & (1u << 13u);
GPIO3_EDGE_LOW = curr & (1u << 14u);
GPIO3_EDGE_HIGH = curr & (1u << 15u);
GPIO4_LEVEL_LOW = curr & (1u << 16u);
GPIO4_LEVEL_HIGH = curr & (1u << 17u);
GPIO4_EDGE_LOW = curr & (1u << 18u);
GPIO4_EDGE_HIGH = curr & (1u << 19u);
GPIO5_LEVEL_LOW = curr & (1u << 20u);
GPIO5_LEVEL_HIGH = curr & (1u << 21u);
GPIO5_EDGE_LOW = curr & (1u << 22u);
GPIO5_EDGE_HIGH = curr & (1u << 23u);
GPIO6_LEVEL_LOW = curr & (1u << 24u);
GPIO6_LEVEL_HIGH = curr & (1u << 25u);
GPIO6_EDGE_LOW = curr & (1u << 26u);
GPIO6_EDGE_HIGH = curr & (1u << 27u);
GPIO7_LEVEL_LOW = curr & (1u << 28u);
GPIO7_LEVEL_HIGH = curr & (1u << 29u);
GPIO7_EDGE_LOW = curr & (1u << 30u);
GPIO7_EDGE_HIGH = curr & (1u << 31u);
}
inline void set_DORMANT_WAKE_INTF0(
bool GPIO0_LEVEL_LOW, bool GPIO0_LEVEL_HIGH, bool GPIO0_EDGE_LOW,
bool GPIO0_EDGE_HIGH, bool GPIO1_LEVEL_LOW, bool GPIO1_LEVEL_HIGH,
bool GPIO1_EDGE_LOW, bool GPIO1_EDGE_HIGH, bool GPIO2_LEVEL_LOW,
bool GPIO2_LEVEL_HIGH, bool GPIO2_EDGE_LOW, bool GPIO2_EDGE_HIGH,
bool GPIO3_LEVEL_LOW, bool GPIO3_LEVEL_HIGH, bool GPIO3_EDGE_LOW,
bool GPIO3_EDGE_HIGH, bool GPIO4_LEVEL_LOW, bool GPIO4_LEVEL_HIGH,
bool GPIO4_EDGE_LOW, bool GPIO4_EDGE_HIGH, bool GPIO5_LEVEL_LOW,
bool GPIO5_LEVEL_HIGH, bool GPIO5_EDGE_LOW, bool GPIO5_EDGE_HIGH,
bool GPIO6_LEVEL_LOW, bool GPIO6_LEVEL_HIGH, bool GPIO6_EDGE_LOW,
bool GPIO6_EDGE_HIGH, bool GPIO7_LEVEL_LOW, bool GPIO7_LEVEL_HIGH,
bool GPIO7_EDGE_LOW, bool GPIO7_EDGE_HIGH) volatile
{
uint32_t curr = DORMANT_WAKE_INTF0;
curr &= ~(0b1u << 0u);
curr |= (GPIO0_LEVEL_LOW & 0b1u) << 0u;
curr &= ~(0b1u << 1u);
curr |= (GPIO0_LEVEL_HIGH & 0b1u) << 1u;
curr &= ~(0b1u << 2u);
curr |= (GPIO0_EDGE_LOW & 0b1u) << 2u;
curr &= ~(0b1u << 3u);
curr |= (GPIO0_EDGE_HIGH & 0b1u) << 3u;
curr &= ~(0b1u << 4u);
curr |= (GPIO1_LEVEL_LOW & 0b1u) << 4u;
curr &= ~(0b1u << 5u);
curr |= (GPIO1_LEVEL_HIGH & 0b1u) << 5u;
curr &= ~(0b1u << 6u);
curr |= (GPIO1_EDGE_LOW & 0b1u) << 6u;
curr &= ~(0b1u << 7u);
curr |= (GPIO1_EDGE_HIGH & 0b1u) << 7u;
curr &= ~(0b1u << 8u);
curr |= (GPIO2_LEVEL_LOW & 0b1u) << 8u;
curr &= ~(0b1u << 9u);
curr |= (GPIO2_LEVEL_HIGH & 0b1u) << 9u;
curr &= ~(0b1u << 10u);
curr |= (GPIO2_EDGE_LOW & 0b1u) << 10u;
curr &= ~(0b1u << 11u);
curr |= (GPIO2_EDGE_HIGH & 0b1u) << 11u;
curr &= ~(0b1u << 12u);
curr |= (GPIO3_LEVEL_LOW & 0b1u) << 12u;
curr &= ~(0b1u << 13u);
curr |= (GPIO3_LEVEL_HIGH & 0b1u) << 13u;
curr &= ~(0b1u << 14u);
curr |= (GPIO3_EDGE_LOW & 0b1u) << 14u;
curr &= ~(0b1u << 15u);
curr |= (GPIO3_EDGE_HIGH & 0b1u) << 15u;
curr &= ~(0b1u << 16u);
curr |= (GPIO4_LEVEL_LOW & 0b1u) << 16u;
curr &= ~(0b1u << 17u);
curr |= (GPIO4_LEVEL_HIGH & 0b1u) << 17u;
curr &= ~(0b1u << 18u);
curr |= (GPIO4_EDGE_LOW & 0b1u) << 18u;
curr &= ~(0b1u << 19u);
curr |= (GPIO4_EDGE_HIGH & 0b1u) << 19u;
curr &= ~(0b1u << 20u);
curr |= (GPIO5_LEVEL_LOW & 0b1u) << 20u;
curr &= ~(0b1u << 21u);
curr |= (GPIO5_LEVEL_HIGH & 0b1u) << 21u;
curr &= ~(0b1u << 22u);
curr |= (GPIO5_EDGE_LOW & 0b1u) << 22u;
curr &= ~(0b1u << 23u);
curr |= (GPIO5_EDGE_HIGH & 0b1u) << 23u;
curr &= ~(0b1u << 24u);
curr |= (GPIO6_LEVEL_LOW & 0b1u) << 24u;
curr &= ~(0b1u << 25u);
curr |= (GPIO6_LEVEL_HIGH & 0b1u) << 25u;
curr &= ~(0b1u << 26u);
curr |= (GPIO6_EDGE_LOW & 0b1u) << 26u;
curr &= ~(0b1u << 27u);
curr |= (GPIO6_EDGE_HIGH & 0b1u) << 27u;
curr &= ~(0b1u << 28u);
curr |= (GPIO7_LEVEL_LOW & 0b1u) << 28u;
curr &= ~(0b1u << 29u);
curr |= (GPIO7_LEVEL_HIGH & 0b1u) << 29u;
curr &= ~(0b1u << 30u);
curr |= (GPIO7_EDGE_LOW & 0b1u) << 30u;
curr &= ~(0b1u << 31u);
curr |= (GPIO7_EDGE_HIGH & 0b1u) << 31u;
DORMANT_WAKE_INTF0 = curr;
}
inline bool get_DORMANT_WAKE_INTF1_GPIO8_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTF1 & (1u << 0u);
}
inline void set_DORMANT_WAKE_INTF1_GPIO8_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF1 |= 1u << 0u;
}
inline void clear_DORMANT_WAKE_INTF1_GPIO8_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF1 &= ~(1u << 0u);
}
inline void toggle_DORMANT_WAKE_INTF1_GPIO8_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF1 ^= 1u << 0u;
}
inline bool get_DORMANT_WAKE_INTF1_GPIO8_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTF1 & (1u << 1u);
}
inline void set_DORMANT_WAKE_INTF1_GPIO8_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF1 |= 1u << 1u;
}
inline void clear_DORMANT_WAKE_INTF1_GPIO8_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF1 &= ~(1u << 1u);
}
inline void toggle_DORMANT_WAKE_INTF1_GPIO8_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF1 ^= 1u << 1u;
}
inline bool get_DORMANT_WAKE_INTF1_GPIO8_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTF1 & (1u << 2u);
}
inline void set_DORMANT_WAKE_INTF1_GPIO8_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF1 |= 1u << 2u;
}
inline void clear_DORMANT_WAKE_INTF1_GPIO8_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF1 &= ~(1u << 2u);
}
inline void toggle_DORMANT_WAKE_INTF1_GPIO8_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF1 ^= 1u << 2u;
}
inline bool get_DORMANT_WAKE_INTF1_GPIO8_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTF1 & (1u << 3u);
}
inline void set_DORMANT_WAKE_INTF1_GPIO8_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF1 |= 1u << 3u;
}
inline void clear_DORMANT_WAKE_INTF1_GPIO8_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF1 &= ~(1u << 3u);
}
inline void toggle_DORMANT_WAKE_INTF1_GPIO8_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF1 ^= 1u << 3u;
}
inline bool get_DORMANT_WAKE_INTF1_GPIO9_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTF1 & (1u << 4u);
}
inline void set_DORMANT_WAKE_INTF1_GPIO9_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF1 |= 1u << 4u;
}
inline void clear_DORMANT_WAKE_INTF1_GPIO9_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF1 &= ~(1u << 4u);
}
inline void toggle_DORMANT_WAKE_INTF1_GPIO9_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF1 ^= 1u << 4u;
}
inline bool get_DORMANT_WAKE_INTF1_GPIO9_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTF1 & (1u << 5u);
}
inline void set_DORMANT_WAKE_INTF1_GPIO9_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF1 |= 1u << 5u;
}
inline void clear_DORMANT_WAKE_INTF1_GPIO9_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF1 &= ~(1u << 5u);
}
inline void toggle_DORMANT_WAKE_INTF1_GPIO9_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF1 ^= 1u << 5u;
}
inline bool get_DORMANT_WAKE_INTF1_GPIO9_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTF1 & (1u << 6u);
}
inline void set_DORMANT_WAKE_INTF1_GPIO9_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF1 |= 1u << 6u;
}
inline void clear_DORMANT_WAKE_INTF1_GPIO9_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF1 &= ~(1u << 6u);
}
inline void toggle_DORMANT_WAKE_INTF1_GPIO9_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF1 ^= 1u << 6u;
}
inline bool get_DORMANT_WAKE_INTF1_GPIO9_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTF1 & (1u << 7u);
}
inline void set_DORMANT_WAKE_INTF1_GPIO9_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF1 |= 1u << 7u;
}
inline void clear_DORMANT_WAKE_INTF1_GPIO9_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF1 &= ~(1u << 7u);
}
inline void toggle_DORMANT_WAKE_INTF1_GPIO9_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF1 ^= 1u << 7u;
}
inline bool get_DORMANT_WAKE_INTF1_GPIO10_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTF1 & (1u << 8u);
}
inline void set_DORMANT_WAKE_INTF1_GPIO10_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF1 |= 1u << 8u;
}
inline void clear_DORMANT_WAKE_INTF1_GPIO10_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF1 &= ~(1u << 8u);
}
inline void toggle_DORMANT_WAKE_INTF1_GPIO10_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF1 ^= 1u << 8u;
}
inline bool get_DORMANT_WAKE_INTF1_GPIO10_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTF1 & (1u << 9u);
}
inline void set_DORMANT_WAKE_INTF1_GPIO10_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF1 |= 1u << 9u;
}
inline void clear_DORMANT_WAKE_INTF1_GPIO10_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF1 &= ~(1u << 9u);
}
inline void toggle_DORMANT_WAKE_INTF1_GPIO10_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF1 ^= 1u << 9u;
}
inline bool get_DORMANT_WAKE_INTF1_GPIO10_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTF1 & (1u << 10u);
}
inline void set_DORMANT_WAKE_INTF1_GPIO10_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF1 |= 1u << 10u;
}
inline void clear_DORMANT_WAKE_INTF1_GPIO10_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF1 &= ~(1u << 10u);
}
inline void toggle_DORMANT_WAKE_INTF1_GPIO10_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF1 ^= 1u << 10u;
}
inline bool get_DORMANT_WAKE_INTF1_GPIO10_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTF1 & (1u << 11u);
}
inline void set_DORMANT_WAKE_INTF1_GPIO10_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF1 |= 1u << 11u;
}
inline void clear_DORMANT_WAKE_INTF1_GPIO10_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF1 &= ~(1u << 11u);
}
inline void toggle_DORMANT_WAKE_INTF1_GPIO10_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF1 ^= 1u << 11u;
}
inline bool get_DORMANT_WAKE_INTF1_GPIO11_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTF1 & (1u << 12u);
}
inline void set_DORMANT_WAKE_INTF1_GPIO11_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF1 |= 1u << 12u;
}
inline void clear_DORMANT_WAKE_INTF1_GPIO11_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF1 &= ~(1u << 12u);
}
inline void toggle_DORMANT_WAKE_INTF1_GPIO11_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF1 ^= 1u << 12u;
}
inline bool get_DORMANT_WAKE_INTF1_GPIO11_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTF1 & (1u << 13u);
}
inline void set_DORMANT_WAKE_INTF1_GPIO11_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF1 |= 1u << 13u;
}
inline void clear_DORMANT_WAKE_INTF1_GPIO11_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF1 &= ~(1u << 13u);
}
inline void toggle_DORMANT_WAKE_INTF1_GPIO11_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF1 ^= 1u << 13u;
}
inline bool get_DORMANT_WAKE_INTF1_GPIO11_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTF1 & (1u << 14u);
}
inline void set_DORMANT_WAKE_INTF1_GPIO11_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF1 |= 1u << 14u;
}
inline void clear_DORMANT_WAKE_INTF1_GPIO11_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF1 &= ~(1u << 14u);
}
inline void toggle_DORMANT_WAKE_INTF1_GPIO11_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF1 ^= 1u << 14u;
}
inline bool get_DORMANT_WAKE_INTF1_GPIO11_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTF1 & (1u << 15u);
}
inline void set_DORMANT_WAKE_INTF1_GPIO11_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF1 |= 1u << 15u;
}
inline void clear_DORMANT_WAKE_INTF1_GPIO11_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF1 &= ~(1u << 15u);
}
inline void toggle_DORMANT_WAKE_INTF1_GPIO11_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF1 ^= 1u << 15u;
}
inline bool get_DORMANT_WAKE_INTF1_GPIO12_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTF1 & (1u << 16u);
}
inline void set_DORMANT_WAKE_INTF1_GPIO12_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF1 |= 1u << 16u;
}
inline void clear_DORMANT_WAKE_INTF1_GPIO12_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF1 &= ~(1u << 16u);
}
inline void toggle_DORMANT_WAKE_INTF1_GPIO12_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF1 ^= 1u << 16u;
}
inline bool get_DORMANT_WAKE_INTF1_GPIO12_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTF1 & (1u << 17u);
}
inline void set_DORMANT_WAKE_INTF1_GPIO12_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF1 |= 1u << 17u;
}
inline void clear_DORMANT_WAKE_INTF1_GPIO12_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF1 &= ~(1u << 17u);
}
inline void toggle_DORMANT_WAKE_INTF1_GPIO12_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF1 ^= 1u << 17u;
}
inline bool get_DORMANT_WAKE_INTF1_GPIO12_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTF1 & (1u << 18u);
}
inline void set_DORMANT_WAKE_INTF1_GPIO12_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF1 |= 1u << 18u;
}
inline void clear_DORMANT_WAKE_INTF1_GPIO12_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF1 &= ~(1u << 18u);
}
inline void toggle_DORMANT_WAKE_INTF1_GPIO12_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF1 ^= 1u << 18u;
}
inline bool get_DORMANT_WAKE_INTF1_GPIO12_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTF1 & (1u << 19u);
}
inline void set_DORMANT_WAKE_INTF1_GPIO12_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF1 |= 1u << 19u;
}
inline void clear_DORMANT_WAKE_INTF1_GPIO12_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF1 &= ~(1u << 19u);
}
inline void toggle_DORMANT_WAKE_INTF1_GPIO12_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF1 ^= 1u << 19u;
}
inline bool get_DORMANT_WAKE_INTF1_GPIO13_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTF1 & (1u << 20u);
}
inline void set_DORMANT_WAKE_INTF1_GPIO13_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF1 |= 1u << 20u;
}
inline void clear_DORMANT_WAKE_INTF1_GPIO13_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF1 &= ~(1u << 20u);
}
inline void toggle_DORMANT_WAKE_INTF1_GPIO13_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF1 ^= 1u << 20u;
}
inline bool get_DORMANT_WAKE_INTF1_GPIO13_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTF1 & (1u << 21u);
}
inline void set_DORMANT_WAKE_INTF1_GPIO13_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF1 |= 1u << 21u;
}
inline void clear_DORMANT_WAKE_INTF1_GPIO13_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF1 &= ~(1u << 21u);
}
inline void toggle_DORMANT_WAKE_INTF1_GPIO13_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF1 ^= 1u << 21u;
}
inline bool get_DORMANT_WAKE_INTF1_GPIO13_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTF1 & (1u << 22u);
}
inline void set_DORMANT_WAKE_INTF1_GPIO13_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF1 |= 1u << 22u;
}
inline void clear_DORMANT_WAKE_INTF1_GPIO13_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF1 &= ~(1u << 22u);
}
inline void toggle_DORMANT_WAKE_INTF1_GPIO13_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF1 ^= 1u << 22u;
}
inline bool get_DORMANT_WAKE_INTF1_GPIO13_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTF1 & (1u << 23u);
}
inline void set_DORMANT_WAKE_INTF1_GPIO13_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF1 |= 1u << 23u;
}
inline void clear_DORMANT_WAKE_INTF1_GPIO13_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF1 &= ~(1u << 23u);
}
inline void toggle_DORMANT_WAKE_INTF1_GPIO13_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF1 ^= 1u << 23u;
}
inline bool get_DORMANT_WAKE_INTF1_GPIO14_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTF1 & (1u << 24u);
}
inline void set_DORMANT_WAKE_INTF1_GPIO14_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF1 |= 1u << 24u;
}
inline void clear_DORMANT_WAKE_INTF1_GPIO14_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF1 &= ~(1u << 24u);
}
inline void toggle_DORMANT_WAKE_INTF1_GPIO14_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF1 ^= 1u << 24u;
}
inline bool get_DORMANT_WAKE_INTF1_GPIO14_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTF1 & (1u << 25u);
}
inline void set_DORMANT_WAKE_INTF1_GPIO14_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF1 |= 1u << 25u;
}
inline void clear_DORMANT_WAKE_INTF1_GPIO14_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF1 &= ~(1u << 25u);
}
inline void toggle_DORMANT_WAKE_INTF1_GPIO14_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF1 ^= 1u << 25u;
}
inline bool get_DORMANT_WAKE_INTF1_GPIO14_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTF1 & (1u << 26u);
}
inline void set_DORMANT_WAKE_INTF1_GPIO14_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF1 |= 1u << 26u;
}
inline void clear_DORMANT_WAKE_INTF1_GPIO14_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF1 &= ~(1u << 26u);
}
inline void toggle_DORMANT_WAKE_INTF1_GPIO14_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF1 ^= 1u << 26u;
}
inline bool get_DORMANT_WAKE_INTF1_GPIO14_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTF1 & (1u << 27u);
}
inline void set_DORMANT_WAKE_INTF1_GPIO14_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF1 |= 1u << 27u;
}
inline void clear_DORMANT_WAKE_INTF1_GPIO14_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF1 &= ~(1u << 27u);
}
inline void toggle_DORMANT_WAKE_INTF1_GPIO14_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF1 ^= 1u << 27u;
}
inline bool get_DORMANT_WAKE_INTF1_GPIO15_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTF1 & (1u << 28u);
}
inline void set_DORMANT_WAKE_INTF1_GPIO15_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF1 |= 1u << 28u;
}
inline void clear_DORMANT_WAKE_INTF1_GPIO15_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF1 &= ~(1u << 28u);
}
inline void toggle_DORMANT_WAKE_INTF1_GPIO15_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF1 ^= 1u << 28u;
}
inline bool get_DORMANT_WAKE_INTF1_GPIO15_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTF1 & (1u << 29u);
}
inline void set_DORMANT_WAKE_INTF1_GPIO15_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF1 |= 1u << 29u;
}
inline void clear_DORMANT_WAKE_INTF1_GPIO15_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF1 &= ~(1u << 29u);
}
inline void toggle_DORMANT_WAKE_INTF1_GPIO15_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF1 ^= 1u << 29u;
}
inline bool get_DORMANT_WAKE_INTF1_GPIO15_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTF1 & (1u << 30u);
}
inline void set_DORMANT_WAKE_INTF1_GPIO15_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF1 |= 1u << 30u;
}
inline void clear_DORMANT_WAKE_INTF1_GPIO15_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF1 &= ~(1u << 30u);
}
inline void toggle_DORMANT_WAKE_INTF1_GPIO15_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF1 ^= 1u << 30u;
}
inline bool get_DORMANT_WAKE_INTF1_GPIO15_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTF1 & (1u << 31u);
}
inline void set_DORMANT_WAKE_INTF1_GPIO15_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF1 |= 1u << 31u;
}
inline void clear_DORMANT_WAKE_INTF1_GPIO15_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF1 &= ~(1u << 31u);
}
inline void toggle_DORMANT_WAKE_INTF1_GPIO15_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF1 ^= 1u << 31u;
}
inline void get_DORMANT_WAKE_INTF1(
bool &GPIO8_LEVEL_LOW, bool &GPIO8_LEVEL_HIGH, bool &GPIO8_EDGE_LOW,
bool &GPIO8_EDGE_HIGH, bool &GPIO9_LEVEL_LOW, bool &GPIO9_LEVEL_HIGH,
bool &GPIO9_EDGE_LOW, bool &GPIO9_EDGE_HIGH, bool &GPIO10_LEVEL_LOW,
bool &GPIO10_LEVEL_HIGH, bool &GPIO10_EDGE_LOW, bool &GPIO10_EDGE_HIGH,
bool &GPIO11_LEVEL_LOW, bool &GPIO11_LEVEL_HIGH, bool &GPIO11_EDGE_LOW,
bool &GPIO11_EDGE_HIGH, bool &GPIO12_LEVEL_LOW,
bool &GPIO12_LEVEL_HIGH, bool &GPIO12_EDGE_LOW, bool &GPIO12_EDGE_HIGH,
bool &GPIO13_LEVEL_LOW, bool &GPIO13_LEVEL_HIGH, bool &GPIO13_EDGE_LOW,
bool &GPIO13_EDGE_HIGH, bool &GPIO14_LEVEL_LOW,
bool &GPIO14_LEVEL_HIGH, bool &GPIO14_EDGE_LOW, bool &GPIO14_EDGE_HIGH,
bool &GPIO15_LEVEL_LOW, bool &GPIO15_LEVEL_HIGH, bool &GPIO15_EDGE_LOW,
bool &GPIO15_EDGE_HIGH) volatile
{
uint32_t curr = DORMANT_WAKE_INTF1;
GPIO8_LEVEL_LOW = curr & (1u << 0u);
GPIO8_LEVEL_HIGH = curr & (1u << 1u);
GPIO8_EDGE_LOW = curr & (1u << 2u);
GPIO8_EDGE_HIGH = curr & (1u << 3u);
GPIO9_LEVEL_LOW = curr & (1u << 4u);
GPIO9_LEVEL_HIGH = curr & (1u << 5u);
GPIO9_EDGE_LOW = curr & (1u << 6u);
GPIO9_EDGE_HIGH = curr & (1u << 7u);
GPIO10_LEVEL_LOW = curr & (1u << 8u);
GPIO10_LEVEL_HIGH = curr & (1u << 9u);
GPIO10_EDGE_LOW = curr & (1u << 10u);
GPIO10_EDGE_HIGH = curr & (1u << 11u);
GPIO11_LEVEL_LOW = curr & (1u << 12u);
GPIO11_LEVEL_HIGH = curr & (1u << 13u);
GPIO11_EDGE_LOW = curr & (1u << 14u);
GPIO11_EDGE_HIGH = curr & (1u << 15u);
GPIO12_LEVEL_LOW = curr & (1u << 16u);
GPIO12_LEVEL_HIGH = curr & (1u << 17u);
GPIO12_EDGE_LOW = curr & (1u << 18u);
GPIO12_EDGE_HIGH = curr & (1u << 19u);
GPIO13_LEVEL_LOW = curr & (1u << 20u);
GPIO13_LEVEL_HIGH = curr & (1u << 21u);
GPIO13_EDGE_LOW = curr & (1u << 22u);
GPIO13_EDGE_HIGH = curr & (1u << 23u);
GPIO14_LEVEL_LOW = curr & (1u << 24u);
GPIO14_LEVEL_HIGH = curr & (1u << 25u);
GPIO14_EDGE_LOW = curr & (1u << 26u);
GPIO14_EDGE_HIGH = curr & (1u << 27u);
GPIO15_LEVEL_LOW = curr & (1u << 28u);
GPIO15_LEVEL_HIGH = curr & (1u << 29u);
GPIO15_EDGE_LOW = curr & (1u << 30u);
GPIO15_EDGE_HIGH = curr & (1u << 31u);
}
inline void set_DORMANT_WAKE_INTF1(
bool GPIO8_LEVEL_LOW, bool GPIO8_LEVEL_HIGH, bool GPIO8_EDGE_LOW,
bool GPIO8_EDGE_HIGH, bool GPIO9_LEVEL_LOW, bool GPIO9_LEVEL_HIGH,
bool GPIO9_EDGE_LOW, bool GPIO9_EDGE_HIGH, bool GPIO10_LEVEL_LOW,
bool GPIO10_LEVEL_HIGH, bool GPIO10_EDGE_LOW, bool GPIO10_EDGE_HIGH,
bool GPIO11_LEVEL_LOW, bool GPIO11_LEVEL_HIGH, bool GPIO11_EDGE_LOW,
bool GPIO11_EDGE_HIGH, bool GPIO12_LEVEL_LOW, bool GPIO12_LEVEL_HIGH,
bool GPIO12_EDGE_LOW, bool GPIO12_EDGE_HIGH, bool GPIO13_LEVEL_LOW,
bool GPIO13_LEVEL_HIGH, bool GPIO13_EDGE_LOW, bool GPIO13_EDGE_HIGH,
bool GPIO14_LEVEL_LOW, bool GPIO14_LEVEL_HIGH, bool GPIO14_EDGE_LOW,
bool GPIO14_EDGE_HIGH, bool GPIO15_LEVEL_LOW, bool GPIO15_LEVEL_HIGH,
bool GPIO15_EDGE_LOW, bool GPIO15_EDGE_HIGH) volatile
{
uint32_t curr = DORMANT_WAKE_INTF1;
curr &= ~(0b1u << 0u);
curr |= (GPIO8_LEVEL_LOW & 0b1u) << 0u;
curr &= ~(0b1u << 1u);
curr |= (GPIO8_LEVEL_HIGH & 0b1u) << 1u;
curr &= ~(0b1u << 2u);
curr |= (GPIO8_EDGE_LOW & 0b1u) << 2u;
curr &= ~(0b1u << 3u);
curr |= (GPIO8_EDGE_HIGH & 0b1u) << 3u;
curr &= ~(0b1u << 4u);
curr |= (GPIO9_LEVEL_LOW & 0b1u) << 4u;
curr &= ~(0b1u << 5u);
curr |= (GPIO9_LEVEL_HIGH & 0b1u) << 5u;
curr &= ~(0b1u << 6u);
curr |= (GPIO9_EDGE_LOW & 0b1u) << 6u;
curr &= ~(0b1u << 7u);
curr |= (GPIO9_EDGE_HIGH & 0b1u) << 7u;
curr &= ~(0b1u << 8u);
curr |= (GPIO10_LEVEL_LOW & 0b1u) << 8u;
curr &= ~(0b1u << 9u);
curr |= (GPIO10_LEVEL_HIGH & 0b1u) << 9u;
curr &= ~(0b1u << 10u);
curr |= (GPIO10_EDGE_LOW & 0b1u) << 10u;
curr &= ~(0b1u << 11u);
curr |= (GPIO10_EDGE_HIGH & 0b1u) << 11u;
curr &= ~(0b1u << 12u);
curr |= (GPIO11_LEVEL_LOW & 0b1u) << 12u;
curr &= ~(0b1u << 13u);
curr |= (GPIO11_LEVEL_HIGH & 0b1u) << 13u;
curr &= ~(0b1u << 14u);
curr |= (GPIO11_EDGE_LOW & 0b1u) << 14u;
curr &= ~(0b1u << 15u);
curr |= (GPIO11_EDGE_HIGH & 0b1u) << 15u;
curr &= ~(0b1u << 16u);
curr |= (GPIO12_LEVEL_LOW & 0b1u) << 16u;
curr &= ~(0b1u << 17u);
curr |= (GPIO12_LEVEL_HIGH & 0b1u) << 17u;
curr &= ~(0b1u << 18u);
curr |= (GPIO12_EDGE_LOW & 0b1u) << 18u;
curr &= ~(0b1u << 19u);
curr |= (GPIO12_EDGE_HIGH & 0b1u) << 19u;
curr &= ~(0b1u << 20u);
curr |= (GPIO13_LEVEL_LOW & 0b1u) << 20u;
curr &= ~(0b1u << 21u);
curr |= (GPIO13_LEVEL_HIGH & 0b1u) << 21u;
curr &= ~(0b1u << 22u);
curr |= (GPIO13_EDGE_LOW & 0b1u) << 22u;
curr &= ~(0b1u << 23u);
curr |= (GPIO13_EDGE_HIGH & 0b1u) << 23u;
curr &= ~(0b1u << 24u);
curr |= (GPIO14_LEVEL_LOW & 0b1u) << 24u;
curr &= ~(0b1u << 25u);
curr |= (GPIO14_LEVEL_HIGH & 0b1u) << 25u;
curr &= ~(0b1u << 26u);
curr |= (GPIO14_EDGE_LOW & 0b1u) << 26u;
curr &= ~(0b1u << 27u);
curr |= (GPIO14_EDGE_HIGH & 0b1u) << 27u;
curr &= ~(0b1u << 28u);
curr |= (GPIO15_LEVEL_LOW & 0b1u) << 28u;
curr &= ~(0b1u << 29u);
curr |= (GPIO15_LEVEL_HIGH & 0b1u) << 29u;
curr &= ~(0b1u << 30u);
curr |= (GPIO15_EDGE_LOW & 0b1u) << 30u;
curr &= ~(0b1u << 31u);
curr |= (GPIO15_EDGE_HIGH & 0b1u) << 31u;
DORMANT_WAKE_INTF1 = curr;
}
inline bool get_DORMANT_WAKE_INTF2_GPIO16_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTF2 & (1u << 0u);
}
inline void set_DORMANT_WAKE_INTF2_GPIO16_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF2 |= 1u << 0u;
}
inline void clear_DORMANT_WAKE_INTF2_GPIO16_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF2 &= ~(1u << 0u);
}
inline void toggle_DORMANT_WAKE_INTF2_GPIO16_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF2 ^= 1u << 0u;
}
inline bool get_DORMANT_WAKE_INTF2_GPIO16_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTF2 & (1u << 1u);
}
inline void set_DORMANT_WAKE_INTF2_GPIO16_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF2 |= 1u << 1u;
}
inline void clear_DORMANT_WAKE_INTF2_GPIO16_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF2 &= ~(1u << 1u);
}
inline void toggle_DORMANT_WAKE_INTF2_GPIO16_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF2 ^= 1u << 1u;
}
inline bool get_DORMANT_WAKE_INTF2_GPIO16_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTF2 & (1u << 2u);
}
inline void set_DORMANT_WAKE_INTF2_GPIO16_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF2 |= 1u << 2u;
}
inline void clear_DORMANT_WAKE_INTF2_GPIO16_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF2 &= ~(1u << 2u);
}
inline void toggle_DORMANT_WAKE_INTF2_GPIO16_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF2 ^= 1u << 2u;
}
inline bool get_DORMANT_WAKE_INTF2_GPIO16_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTF2 & (1u << 3u);
}
inline void set_DORMANT_WAKE_INTF2_GPIO16_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF2 |= 1u << 3u;
}
inline void clear_DORMANT_WAKE_INTF2_GPIO16_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF2 &= ~(1u << 3u);
}
inline void toggle_DORMANT_WAKE_INTF2_GPIO16_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF2 ^= 1u << 3u;
}
inline bool get_DORMANT_WAKE_INTF2_GPIO17_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTF2 & (1u << 4u);
}
inline void set_DORMANT_WAKE_INTF2_GPIO17_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF2 |= 1u << 4u;
}
inline void clear_DORMANT_WAKE_INTF2_GPIO17_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF2 &= ~(1u << 4u);
}
inline void toggle_DORMANT_WAKE_INTF2_GPIO17_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF2 ^= 1u << 4u;
}
inline bool get_DORMANT_WAKE_INTF2_GPIO17_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTF2 & (1u << 5u);
}
inline void set_DORMANT_WAKE_INTF2_GPIO17_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF2 |= 1u << 5u;
}
inline void clear_DORMANT_WAKE_INTF2_GPIO17_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF2 &= ~(1u << 5u);
}
inline void toggle_DORMANT_WAKE_INTF2_GPIO17_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF2 ^= 1u << 5u;
}
inline bool get_DORMANT_WAKE_INTF2_GPIO17_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTF2 & (1u << 6u);
}
inline void set_DORMANT_WAKE_INTF2_GPIO17_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF2 |= 1u << 6u;
}
inline void clear_DORMANT_WAKE_INTF2_GPIO17_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF2 &= ~(1u << 6u);
}
inline void toggle_DORMANT_WAKE_INTF2_GPIO17_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF2 ^= 1u << 6u;
}
inline bool get_DORMANT_WAKE_INTF2_GPIO17_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTF2 & (1u << 7u);
}
inline void set_DORMANT_WAKE_INTF2_GPIO17_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF2 |= 1u << 7u;
}
inline void clear_DORMANT_WAKE_INTF2_GPIO17_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF2 &= ~(1u << 7u);
}
inline void toggle_DORMANT_WAKE_INTF2_GPIO17_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF2 ^= 1u << 7u;
}
inline bool get_DORMANT_WAKE_INTF2_GPIO18_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTF2 & (1u << 8u);
}
inline void set_DORMANT_WAKE_INTF2_GPIO18_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF2 |= 1u << 8u;
}
inline void clear_DORMANT_WAKE_INTF2_GPIO18_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF2 &= ~(1u << 8u);
}
inline void toggle_DORMANT_WAKE_INTF2_GPIO18_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF2 ^= 1u << 8u;
}
inline bool get_DORMANT_WAKE_INTF2_GPIO18_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTF2 & (1u << 9u);
}
inline void set_DORMANT_WAKE_INTF2_GPIO18_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF2 |= 1u << 9u;
}
inline void clear_DORMANT_WAKE_INTF2_GPIO18_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF2 &= ~(1u << 9u);
}
inline void toggle_DORMANT_WAKE_INTF2_GPIO18_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF2 ^= 1u << 9u;
}
inline bool get_DORMANT_WAKE_INTF2_GPIO18_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTF2 & (1u << 10u);
}
inline void set_DORMANT_WAKE_INTF2_GPIO18_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF2 |= 1u << 10u;
}
inline void clear_DORMANT_WAKE_INTF2_GPIO18_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF2 &= ~(1u << 10u);
}
inline void toggle_DORMANT_WAKE_INTF2_GPIO18_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF2 ^= 1u << 10u;
}
inline bool get_DORMANT_WAKE_INTF2_GPIO18_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTF2 & (1u << 11u);
}
inline void set_DORMANT_WAKE_INTF2_GPIO18_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF2 |= 1u << 11u;
}
inline void clear_DORMANT_WAKE_INTF2_GPIO18_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF2 &= ~(1u << 11u);
}
inline void toggle_DORMANT_WAKE_INTF2_GPIO18_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF2 ^= 1u << 11u;
}
inline bool get_DORMANT_WAKE_INTF2_GPIO19_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTF2 & (1u << 12u);
}
inline void set_DORMANT_WAKE_INTF2_GPIO19_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF2 |= 1u << 12u;
}
inline void clear_DORMANT_WAKE_INTF2_GPIO19_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF2 &= ~(1u << 12u);
}
inline void toggle_DORMANT_WAKE_INTF2_GPIO19_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF2 ^= 1u << 12u;
}
inline bool get_DORMANT_WAKE_INTF2_GPIO19_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTF2 & (1u << 13u);
}
inline void set_DORMANT_WAKE_INTF2_GPIO19_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF2 |= 1u << 13u;
}
inline void clear_DORMANT_WAKE_INTF2_GPIO19_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF2 &= ~(1u << 13u);
}
inline void toggle_DORMANT_WAKE_INTF2_GPIO19_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF2 ^= 1u << 13u;
}
inline bool get_DORMANT_WAKE_INTF2_GPIO19_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTF2 & (1u << 14u);
}
inline void set_DORMANT_WAKE_INTF2_GPIO19_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF2 |= 1u << 14u;
}
inline void clear_DORMANT_WAKE_INTF2_GPIO19_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF2 &= ~(1u << 14u);
}
inline void toggle_DORMANT_WAKE_INTF2_GPIO19_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF2 ^= 1u << 14u;
}
inline bool get_DORMANT_WAKE_INTF2_GPIO19_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTF2 & (1u << 15u);
}
inline void set_DORMANT_WAKE_INTF2_GPIO19_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF2 |= 1u << 15u;
}
inline void clear_DORMANT_WAKE_INTF2_GPIO19_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF2 &= ~(1u << 15u);
}
inline void toggle_DORMANT_WAKE_INTF2_GPIO19_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF2 ^= 1u << 15u;
}
inline bool get_DORMANT_WAKE_INTF2_GPIO20_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTF2 & (1u << 16u);
}
inline void set_DORMANT_WAKE_INTF2_GPIO20_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF2 |= 1u << 16u;
}
inline void clear_DORMANT_WAKE_INTF2_GPIO20_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF2 &= ~(1u << 16u);
}
inline void toggle_DORMANT_WAKE_INTF2_GPIO20_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF2 ^= 1u << 16u;
}
inline bool get_DORMANT_WAKE_INTF2_GPIO20_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTF2 & (1u << 17u);
}
inline void set_DORMANT_WAKE_INTF2_GPIO20_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF2 |= 1u << 17u;
}
inline void clear_DORMANT_WAKE_INTF2_GPIO20_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF2 &= ~(1u << 17u);
}
inline void toggle_DORMANT_WAKE_INTF2_GPIO20_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF2 ^= 1u << 17u;
}
inline bool get_DORMANT_WAKE_INTF2_GPIO20_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTF2 & (1u << 18u);
}
inline void set_DORMANT_WAKE_INTF2_GPIO20_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF2 |= 1u << 18u;
}
inline void clear_DORMANT_WAKE_INTF2_GPIO20_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF2 &= ~(1u << 18u);
}
inline void toggle_DORMANT_WAKE_INTF2_GPIO20_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF2 ^= 1u << 18u;
}
inline bool get_DORMANT_WAKE_INTF2_GPIO20_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTF2 & (1u << 19u);
}
inline void set_DORMANT_WAKE_INTF2_GPIO20_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF2 |= 1u << 19u;
}
inline void clear_DORMANT_WAKE_INTF2_GPIO20_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF2 &= ~(1u << 19u);
}
inline void toggle_DORMANT_WAKE_INTF2_GPIO20_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF2 ^= 1u << 19u;
}
inline bool get_DORMANT_WAKE_INTF2_GPIO21_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTF2 & (1u << 20u);
}
inline void set_DORMANT_WAKE_INTF2_GPIO21_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF2 |= 1u << 20u;
}
inline void clear_DORMANT_WAKE_INTF2_GPIO21_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF2 &= ~(1u << 20u);
}
inline void toggle_DORMANT_WAKE_INTF2_GPIO21_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF2 ^= 1u << 20u;
}
inline bool get_DORMANT_WAKE_INTF2_GPIO21_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTF2 & (1u << 21u);
}
inline void set_DORMANT_WAKE_INTF2_GPIO21_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF2 |= 1u << 21u;
}
inline void clear_DORMANT_WAKE_INTF2_GPIO21_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF2 &= ~(1u << 21u);
}
inline void toggle_DORMANT_WAKE_INTF2_GPIO21_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF2 ^= 1u << 21u;
}
inline bool get_DORMANT_WAKE_INTF2_GPIO21_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTF2 & (1u << 22u);
}
inline void set_DORMANT_WAKE_INTF2_GPIO21_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF2 |= 1u << 22u;
}
inline void clear_DORMANT_WAKE_INTF2_GPIO21_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF2 &= ~(1u << 22u);
}
inline void toggle_DORMANT_WAKE_INTF2_GPIO21_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF2 ^= 1u << 22u;
}
inline bool get_DORMANT_WAKE_INTF2_GPIO21_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTF2 & (1u << 23u);
}
inline void set_DORMANT_WAKE_INTF2_GPIO21_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF2 |= 1u << 23u;
}
inline void clear_DORMANT_WAKE_INTF2_GPIO21_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF2 &= ~(1u << 23u);
}
inline void toggle_DORMANT_WAKE_INTF2_GPIO21_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF2 ^= 1u << 23u;
}
inline bool get_DORMANT_WAKE_INTF2_GPIO22_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTF2 & (1u << 24u);
}
inline void set_DORMANT_WAKE_INTF2_GPIO22_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF2 |= 1u << 24u;
}
inline void clear_DORMANT_WAKE_INTF2_GPIO22_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF2 &= ~(1u << 24u);
}
inline void toggle_DORMANT_WAKE_INTF2_GPIO22_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF2 ^= 1u << 24u;
}
inline bool get_DORMANT_WAKE_INTF2_GPIO22_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTF2 & (1u << 25u);
}
inline void set_DORMANT_WAKE_INTF2_GPIO22_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF2 |= 1u << 25u;
}
inline void clear_DORMANT_WAKE_INTF2_GPIO22_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF2 &= ~(1u << 25u);
}
inline void toggle_DORMANT_WAKE_INTF2_GPIO22_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF2 ^= 1u << 25u;
}
inline bool get_DORMANT_WAKE_INTF2_GPIO22_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTF2 & (1u << 26u);
}
inline void set_DORMANT_WAKE_INTF2_GPIO22_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF2 |= 1u << 26u;
}
inline void clear_DORMANT_WAKE_INTF2_GPIO22_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF2 &= ~(1u << 26u);
}
inline void toggle_DORMANT_WAKE_INTF2_GPIO22_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF2 ^= 1u << 26u;
}
inline bool get_DORMANT_WAKE_INTF2_GPIO22_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTF2 & (1u << 27u);
}
inline void set_DORMANT_WAKE_INTF2_GPIO22_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF2 |= 1u << 27u;
}
inline void clear_DORMANT_WAKE_INTF2_GPIO22_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF2 &= ~(1u << 27u);
}
inline void toggle_DORMANT_WAKE_INTF2_GPIO22_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF2 ^= 1u << 27u;
}
inline bool get_DORMANT_WAKE_INTF2_GPIO23_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTF2 & (1u << 28u);
}
inline void set_DORMANT_WAKE_INTF2_GPIO23_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF2 |= 1u << 28u;
}
inline void clear_DORMANT_WAKE_INTF2_GPIO23_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF2 &= ~(1u << 28u);
}
inline void toggle_DORMANT_WAKE_INTF2_GPIO23_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF2 ^= 1u << 28u;
}
inline bool get_DORMANT_WAKE_INTF2_GPIO23_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTF2 & (1u << 29u);
}
inline void set_DORMANT_WAKE_INTF2_GPIO23_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF2 |= 1u << 29u;
}
inline void clear_DORMANT_WAKE_INTF2_GPIO23_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF2 &= ~(1u << 29u);
}
inline void toggle_DORMANT_WAKE_INTF2_GPIO23_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF2 ^= 1u << 29u;
}
inline bool get_DORMANT_WAKE_INTF2_GPIO23_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTF2 & (1u << 30u);
}
inline void set_DORMANT_WAKE_INTF2_GPIO23_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF2 |= 1u << 30u;
}
inline void clear_DORMANT_WAKE_INTF2_GPIO23_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF2 &= ~(1u << 30u);
}
inline void toggle_DORMANT_WAKE_INTF2_GPIO23_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF2 ^= 1u << 30u;
}
inline bool get_DORMANT_WAKE_INTF2_GPIO23_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTF2 & (1u << 31u);
}
inline void set_DORMANT_WAKE_INTF2_GPIO23_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF2 |= 1u << 31u;
}
inline void clear_DORMANT_WAKE_INTF2_GPIO23_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF2 &= ~(1u << 31u);
}
inline void toggle_DORMANT_WAKE_INTF2_GPIO23_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF2 ^= 1u << 31u;
}
inline void get_DORMANT_WAKE_INTF2(
bool &GPIO16_LEVEL_LOW, bool &GPIO16_LEVEL_HIGH, bool &GPIO16_EDGE_LOW,
bool &GPIO16_EDGE_HIGH, bool &GPIO17_LEVEL_LOW,
bool &GPIO17_LEVEL_HIGH, bool &GPIO17_EDGE_LOW, bool &GPIO17_EDGE_HIGH,
bool &GPIO18_LEVEL_LOW, bool &GPIO18_LEVEL_HIGH, bool &GPIO18_EDGE_LOW,
bool &GPIO18_EDGE_HIGH, bool &GPIO19_LEVEL_LOW,
bool &GPIO19_LEVEL_HIGH, bool &GPIO19_EDGE_LOW, bool &GPIO19_EDGE_HIGH,
bool &GPIO20_LEVEL_LOW, bool &GPIO20_LEVEL_HIGH, bool &GPIO20_EDGE_LOW,
bool &GPIO20_EDGE_HIGH, bool &GPIO21_LEVEL_LOW,
bool &GPIO21_LEVEL_HIGH, bool &GPIO21_EDGE_LOW, bool &GPIO21_EDGE_HIGH,
bool &GPIO22_LEVEL_LOW, bool &GPIO22_LEVEL_HIGH, bool &GPIO22_EDGE_LOW,
bool &GPIO22_EDGE_HIGH, bool &GPIO23_LEVEL_LOW,
bool &GPIO23_LEVEL_HIGH, bool &GPIO23_EDGE_LOW,
bool &GPIO23_EDGE_HIGH) volatile
{
uint32_t curr = DORMANT_WAKE_INTF2;
GPIO16_LEVEL_LOW = curr & (1u << 0u);
GPIO16_LEVEL_HIGH = curr & (1u << 1u);
GPIO16_EDGE_LOW = curr & (1u << 2u);
GPIO16_EDGE_HIGH = curr & (1u << 3u);
GPIO17_LEVEL_LOW = curr & (1u << 4u);
GPIO17_LEVEL_HIGH = curr & (1u << 5u);
GPIO17_EDGE_LOW = curr & (1u << 6u);
GPIO17_EDGE_HIGH = curr & (1u << 7u);
GPIO18_LEVEL_LOW = curr & (1u << 8u);
GPIO18_LEVEL_HIGH = curr & (1u << 9u);
GPIO18_EDGE_LOW = curr & (1u << 10u);
GPIO18_EDGE_HIGH = curr & (1u << 11u);
GPIO19_LEVEL_LOW = curr & (1u << 12u);
GPIO19_LEVEL_HIGH = curr & (1u << 13u);
GPIO19_EDGE_LOW = curr & (1u << 14u);
GPIO19_EDGE_HIGH = curr & (1u << 15u);
GPIO20_LEVEL_LOW = curr & (1u << 16u);
GPIO20_LEVEL_HIGH = curr & (1u << 17u);
GPIO20_EDGE_LOW = curr & (1u << 18u);
GPIO20_EDGE_HIGH = curr & (1u << 19u);
GPIO21_LEVEL_LOW = curr & (1u << 20u);
GPIO21_LEVEL_HIGH = curr & (1u << 21u);
GPIO21_EDGE_LOW = curr & (1u << 22u);
GPIO21_EDGE_HIGH = curr & (1u << 23u);
GPIO22_LEVEL_LOW = curr & (1u << 24u);
GPIO22_LEVEL_HIGH = curr & (1u << 25u);
GPIO22_EDGE_LOW = curr & (1u << 26u);
GPIO22_EDGE_HIGH = curr & (1u << 27u);
GPIO23_LEVEL_LOW = curr & (1u << 28u);
GPIO23_LEVEL_HIGH = curr & (1u << 29u);
GPIO23_EDGE_LOW = curr & (1u << 30u);
GPIO23_EDGE_HIGH = curr & (1u << 31u);
}
inline void set_DORMANT_WAKE_INTF2(
bool GPIO16_LEVEL_LOW, bool GPIO16_LEVEL_HIGH, bool GPIO16_EDGE_LOW,
bool GPIO16_EDGE_HIGH, bool GPIO17_LEVEL_LOW, bool GPIO17_LEVEL_HIGH,
bool GPIO17_EDGE_LOW, bool GPIO17_EDGE_HIGH, bool GPIO18_LEVEL_LOW,
bool GPIO18_LEVEL_HIGH, bool GPIO18_EDGE_LOW, bool GPIO18_EDGE_HIGH,
bool GPIO19_LEVEL_LOW, bool GPIO19_LEVEL_HIGH, bool GPIO19_EDGE_LOW,
bool GPIO19_EDGE_HIGH, bool GPIO20_LEVEL_LOW, bool GPIO20_LEVEL_HIGH,
bool GPIO20_EDGE_LOW, bool GPIO20_EDGE_HIGH, bool GPIO21_LEVEL_LOW,
bool GPIO21_LEVEL_HIGH, bool GPIO21_EDGE_LOW, bool GPIO21_EDGE_HIGH,
bool GPIO22_LEVEL_LOW, bool GPIO22_LEVEL_HIGH, bool GPIO22_EDGE_LOW,
bool GPIO22_EDGE_HIGH, bool GPIO23_LEVEL_LOW, bool GPIO23_LEVEL_HIGH,
bool GPIO23_EDGE_LOW, bool GPIO23_EDGE_HIGH) volatile
{
uint32_t curr = DORMANT_WAKE_INTF2;
curr &= ~(0b1u << 0u);
curr |= (GPIO16_LEVEL_LOW & 0b1u) << 0u;
curr &= ~(0b1u << 1u);
curr |= (GPIO16_LEVEL_HIGH & 0b1u) << 1u;
curr &= ~(0b1u << 2u);
curr |= (GPIO16_EDGE_LOW & 0b1u) << 2u;
curr &= ~(0b1u << 3u);
curr |= (GPIO16_EDGE_HIGH & 0b1u) << 3u;
curr &= ~(0b1u << 4u);
curr |= (GPIO17_LEVEL_LOW & 0b1u) << 4u;
curr &= ~(0b1u << 5u);
curr |= (GPIO17_LEVEL_HIGH & 0b1u) << 5u;
curr &= ~(0b1u << 6u);
curr |= (GPIO17_EDGE_LOW & 0b1u) << 6u;
curr &= ~(0b1u << 7u);
curr |= (GPIO17_EDGE_HIGH & 0b1u) << 7u;
curr &= ~(0b1u << 8u);
curr |= (GPIO18_LEVEL_LOW & 0b1u) << 8u;
curr &= ~(0b1u << 9u);
curr |= (GPIO18_LEVEL_HIGH & 0b1u) << 9u;
curr &= ~(0b1u << 10u);
curr |= (GPIO18_EDGE_LOW & 0b1u) << 10u;
curr &= ~(0b1u << 11u);
curr |= (GPIO18_EDGE_HIGH & 0b1u) << 11u;
curr &= ~(0b1u << 12u);
curr |= (GPIO19_LEVEL_LOW & 0b1u) << 12u;
curr &= ~(0b1u << 13u);
curr |= (GPIO19_LEVEL_HIGH & 0b1u) << 13u;
curr &= ~(0b1u << 14u);
curr |= (GPIO19_EDGE_LOW & 0b1u) << 14u;
curr &= ~(0b1u << 15u);
curr |= (GPIO19_EDGE_HIGH & 0b1u) << 15u;
curr &= ~(0b1u << 16u);
curr |= (GPIO20_LEVEL_LOW & 0b1u) << 16u;
curr &= ~(0b1u << 17u);
curr |= (GPIO20_LEVEL_HIGH & 0b1u) << 17u;
curr &= ~(0b1u << 18u);
curr |= (GPIO20_EDGE_LOW & 0b1u) << 18u;
curr &= ~(0b1u << 19u);
curr |= (GPIO20_EDGE_HIGH & 0b1u) << 19u;
curr &= ~(0b1u << 20u);
curr |= (GPIO21_LEVEL_LOW & 0b1u) << 20u;
curr &= ~(0b1u << 21u);
curr |= (GPIO21_LEVEL_HIGH & 0b1u) << 21u;
curr &= ~(0b1u << 22u);
curr |= (GPIO21_EDGE_LOW & 0b1u) << 22u;
curr &= ~(0b1u << 23u);
curr |= (GPIO21_EDGE_HIGH & 0b1u) << 23u;
curr &= ~(0b1u << 24u);
curr |= (GPIO22_LEVEL_LOW & 0b1u) << 24u;
curr &= ~(0b1u << 25u);
curr |= (GPIO22_LEVEL_HIGH & 0b1u) << 25u;
curr &= ~(0b1u << 26u);
curr |= (GPIO22_EDGE_LOW & 0b1u) << 26u;
curr &= ~(0b1u << 27u);
curr |= (GPIO22_EDGE_HIGH & 0b1u) << 27u;
curr &= ~(0b1u << 28u);
curr |= (GPIO23_LEVEL_LOW & 0b1u) << 28u;
curr &= ~(0b1u << 29u);
curr |= (GPIO23_LEVEL_HIGH & 0b1u) << 29u;
curr &= ~(0b1u << 30u);
curr |= (GPIO23_EDGE_LOW & 0b1u) << 30u;
curr &= ~(0b1u << 31u);
curr |= (GPIO23_EDGE_HIGH & 0b1u) << 31u;
DORMANT_WAKE_INTF2 = curr;
}
inline bool get_DORMANT_WAKE_INTF3_GPIO24_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTF3 & (1u << 0u);
}
inline void set_DORMANT_WAKE_INTF3_GPIO24_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF3 |= 1u << 0u;
}
inline void clear_DORMANT_WAKE_INTF3_GPIO24_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF3 &= ~(1u << 0u);
}
inline void toggle_DORMANT_WAKE_INTF3_GPIO24_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF3 ^= 1u << 0u;
}
inline bool get_DORMANT_WAKE_INTF3_GPIO24_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTF3 & (1u << 1u);
}
inline void set_DORMANT_WAKE_INTF3_GPIO24_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF3 |= 1u << 1u;
}
inline void clear_DORMANT_WAKE_INTF3_GPIO24_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF3 &= ~(1u << 1u);
}
inline void toggle_DORMANT_WAKE_INTF3_GPIO24_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF3 ^= 1u << 1u;
}
inline bool get_DORMANT_WAKE_INTF3_GPIO24_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTF3 & (1u << 2u);
}
inline void set_DORMANT_WAKE_INTF3_GPIO24_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF3 |= 1u << 2u;
}
inline void clear_DORMANT_WAKE_INTF3_GPIO24_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF3 &= ~(1u << 2u);
}
inline void toggle_DORMANT_WAKE_INTF3_GPIO24_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF3 ^= 1u << 2u;
}
inline bool get_DORMANT_WAKE_INTF3_GPIO24_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTF3 & (1u << 3u);
}
inline void set_DORMANT_WAKE_INTF3_GPIO24_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF3 |= 1u << 3u;
}
inline void clear_DORMANT_WAKE_INTF3_GPIO24_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF3 &= ~(1u << 3u);
}
inline void toggle_DORMANT_WAKE_INTF3_GPIO24_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF3 ^= 1u << 3u;
}
inline bool get_DORMANT_WAKE_INTF3_GPIO25_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTF3 & (1u << 4u);
}
inline void set_DORMANT_WAKE_INTF3_GPIO25_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF3 |= 1u << 4u;
}
inline void clear_DORMANT_WAKE_INTF3_GPIO25_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF3 &= ~(1u << 4u);
}
inline void toggle_DORMANT_WAKE_INTF3_GPIO25_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF3 ^= 1u << 4u;
}
inline bool get_DORMANT_WAKE_INTF3_GPIO25_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTF3 & (1u << 5u);
}
inline void set_DORMANT_WAKE_INTF3_GPIO25_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF3 |= 1u << 5u;
}
inline void clear_DORMANT_WAKE_INTF3_GPIO25_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF3 &= ~(1u << 5u);
}
inline void toggle_DORMANT_WAKE_INTF3_GPIO25_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF3 ^= 1u << 5u;
}
inline bool get_DORMANT_WAKE_INTF3_GPIO25_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTF3 & (1u << 6u);
}
inline void set_DORMANT_WAKE_INTF3_GPIO25_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF3 |= 1u << 6u;
}
inline void clear_DORMANT_WAKE_INTF3_GPIO25_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF3 &= ~(1u << 6u);
}
inline void toggle_DORMANT_WAKE_INTF3_GPIO25_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF3 ^= 1u << 6u;
}
inline bool get_DORMANT_WAKE_INTF3_GPIO25_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTF3 & (1u << 7u);
}
inline void set_DORMANT_WAKE_INTF3_GPIO25_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF3 |= 1u << 7u;
}
inline void clear_DORMANT_WAKE_INTF3_GPIO25_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF3 &= ~(1u << 7u);
}
inline void toggle_DORMANT_WAKE_INTF3_GPIO25_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF3 ^= 1u << 7u;
}
inline bool get_DORMANT_WAKE_INTF3_GPIO26_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTF3 & (1u << 8u);
}
inline void set_DORMANT_WAKE_INTF3_GPIO26_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF3 |= 1u << 8u;
}
inline void clear_DORMANT_WAKE_INTF3_GPIO26_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF3 &= ~(1u << 8u);
}
inline void toggle_DORMANT_WAKE_INTF3_GPIO26_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF3 ^= 1u << 8u;
}
inline bool get_DORMANT_WAKE_INTF3_GPIO26_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTF3 & (1u << 9u);
}
inline void set_DORMANT_WAKE_INTF3_GPIO26_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF3 |= 1u << 9u;
}
inline void clear_DORMANT_WAKE_INTF3_GPIO26_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF3 &= ~(1u << 9u);
}
inline void toggle_DORMANT_WAKE_INTF3_GPIO26_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF3 ^= 1u << 9u;
}
inline bool get_DORMANT_WAKE_INTF3_GPIO26_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTF3 & (1u << 10u);
}
inline void set_DORMANT_WAKE_INTF3_GPIO26_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF3 |= 1u << 10u;
}
inline void clear_DORMANT_WAKE_INTF3_GPIO26_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF3 &= ~(1u << 10u);
}
inline void toggle_DORMANT_WAKE_INTF3_GPIO26_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF3 ^= 1u << 10u;
}
inline bool get_DORMANT_WAKE_INTF3_GPIO26_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTF3 & (1u << 11u);
}
inline void set_DORMANT_WAKE_INTF3_GPIO26_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF3 |= 1u << 11u;
}
inline void clear_DORMANT_WAKE_INTF3_GPIO26_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF3 &= ~(1u << 11u);
}
inline void toggle_DORMANT_WAKE_INTF3_GPIO26_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF3 ^= 1u << 11u;
}
inline bool get_DORMANT_WAKE_INTF3_GPIO27_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTF3 & (1u << 12u);
}
inline void set_DORMANT_WAKE_INTF3_GPIO27_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF3 |= 1u << 12u;
}
inline void clear_DORMANT_WAKE_INTF3_GPIO27_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF3 &= ~(1u << 12u);
}
inline void toggle_DORMANT_WAKE_INTF3_GPIO27_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF3 ^= 1u << 12u;
}
inline bool get_DORMANT_WAKE_INTF3_GPIO27_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTF3 & (1u << 13u);
}
inline void set_DORMANT_WAKE_INTF3_GPIO27_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF3 |= 1u << 13u;
}
inline void clear_DORMANT_WAKE_INTF3_GPIO27_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF3 &= ~(1u << 13u);
}
inline void toggle_DORMANT_WAKE_INTF3_GPIO27_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF3 ^= 1u << 13u;
}
inline bool get_DORMANT_WAKE_INTF3_GPIO27_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTF3 & (1u << 14u);
}
inline void set_DORMANT_WAKE_INTF3_GPIO27_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF3 |= 1u << 14u;
}
inline void clear_DORMANT_WAKE_INTF3_GPIO27_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF3 &= ~(1u << 14u);
}
inline void toggle_DORMANT_WAKE_INTF3_GPIO27_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF3 ^= 1u << 14u;
}
inline bool get_DORMANT_WAKE_INTF3_GPIO27_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTF3 & (1u << 15u);
}
inline void set_DORMANT_WAKE_INTF3_GPIO27_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF3 |= 1u << 15u;
}
inline void clear_DORMANT_WAKE_INTF3_GPIO27_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF3 &= ~(1u << 15u);
}
inline void toggle_DORMANT_WAKE_INTF3_GPIO27_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF3 ^= 1u << 15u;
}
inline bool get_DORMANT_WAKE_INTF3_GPIO28_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTF3 & (1u << 16u);
}
inline void set_DORMANT_WAKE_INTF3_GPIO28_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF3 |= 1u << 16u;
}
inline void clear_DORMANT_WAKE_INTF3_GPIO28_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF3 &= ~(1u << 16u);
}
inline void toggle_DORMANT_WAKE_INTF3_GPIO28_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF3 ^= 1u << 16u;
}
inline bool get_DORMANT_WAKE_INTF3_GPIO28_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTF3 & (1u << 17u);
}
inline void set_DORMANT_WAKE_INTF3_GPIO28_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF3 |= 1u << 17u;
}
inline void clear_DORMANT_WAKE_INTF3_GPIO28_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF3 &= ~(1u << 17u);
}
inline void toggle_DORMANT_WAKE_INTF3_GPIO28_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF3 ^= 1u << 17u;
}
inline bool get_DORMANT_WAKE_INTF3_GPIO28_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTF3 & (1u << 18u);
}
inline void set_DORMANT_WAKE_INTF3_GPIO28_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF3 |= 1u << 18u;
}
inline void clear_DORMANT_WAKE_INTF3_GPIO28_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF3 &= ~(1u << 18u);
}
inline void toggle_DORMANT_WAKE_INTF3_GPIO28_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF3 ^= 1u << 18u;
}
inline bool get_DORMANT_WAKE_INTF3_GPIO28_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTF3 & (1u << 19u);
}
inline void set_DORMANT_WAKE_INTF3_GPIO28_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF3 |= 1u << 19u;
}
inline void clear_DORMANT_WAKE_INTF3_GPIO28_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF3 &= ~(1u << 19u);
}
inline void toggle_DORMANT_WAKE_INTF3_GPIO28_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF3 ^= 1u << 19u;
}
inline bool get_DORMANT_WAKE_INTF3_GPIO29_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTF3 & (1u << 20u);
}
inline void set_DORMANT_WAKE_INTF3_GPIO29_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF3 |= 1u << 20u;
}
inline void clear_DORMANT_WAKE_INTF3_GPIO29_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF3 &= ~(1u << 20u);
}
inline void toggle_DORMANT_WAKE_INTF3_GPIO29_LEVEL_LOW() volatile
{
DORMANT_WAKE_INTF3 ^= 1u << 20u;
}
inline bool get_DORMANT_WAKE_INTF3_GPIO29_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTF3 & (1u << 21u);
}
inline void set_DORMANT_WAKE_INTF3_GPIO29_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF3 |= 1u << 21u;
}
inline void clear_DORMANT_WAKE_INTF3_GPIO29_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF3 &= ~(1u << 21u);
}
inline void toggle_DORMANT_WAKE_INTF3_GPIO29_LEVEL_HIGH() volatile
{
DORMANT_WAKE_INTF3 ^= 1u << 21u;
}
inline bool get_DORMANT_WAKE_INTF3_GPIO29_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTF3 & (1u << 22u);
}
inline void set_DORMANT_WAKE_INTF3_GPIO29_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF3 |= 1u << 22u;
}
inline void clear_DORMANT_WAKE_INTF3_GPIO29_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF3 &= ~(1u << 22u);
}
inline void toggle_DORMANT_WAKE_INTF3_GPIO29_EDGE_LOW() volatile
{
DORMANT_WAKE_INTF3 ^= 1u << 22u;
}
inline bool get_DORMANT_WAKE_INTF3_GPIO29_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTF3 & (1u << 23u);
}
inline void set_DORMANT_WAKE_INTF3_GPIO29_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF3 |= 1u << 23u;
}
inline void clear_DORMANT_WAKE_INTF3_GPIO29_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF3 &= ~(1u << 23u);
}
inline void toggle_DORMANT_WAKE_INTF3_GPIO29_EDGE_HIGH() volatile
{
DORMANT_WAKE_INTF3 ^= 1u << 23u;
}
inline void get_DORMANT_WAKE_INTF3(
bool &GPIO24_LEVEL_LOW, bool &GPIO24_LEVEL_HIGH, bool &GPIO24_EDGE_LOW,
bool &GPIO24_EDGE_HIGH, bool &GPIO25_LEVEL_LOW,
bool &GPIO25_LEVEL_HIGH, bool &GPIO25_EDGE_LOW, bool &GPIO25_EDGE_HIGH,
bool &GPIO26_LEVEL_LOW, bool &GPIO26_LEVEL_HIGH, bool &GPIO26_EDGE_LOW,
bool &GPIO26_EDGE_HIGH, bool &GPIO27_LEVEL_LOW,
bool &GPIO27_LEVEL_HIGH, bool &GPIO27_EDGE_LOW, bool &GPIO27_EDGE_HIGH,
bool &GPIO28_LEVEL_LOW, bool &GPIO28_LEVEL_HIGH, bool &GPIO28_EDGE_LOW,
bool &GPIO28_EDGE_HIGH, bool &GPIO29_LEVEL_LOW,
bool &GPIO29_LEVEL_HIGH, bool &GPIO29_EDGE_LOW,
bool &GPIO29_EDGE_HIGH) volatile
{
uint32_t curr = DORMANT_WAKE_INTF3;
GPIO24_LEVEL_LOW = curr & (1u << 0u);
GPIO24_LEVEL_HIGH = curr & (1u << 1u);
GPIO24_EDGE_LOW = curr & (1u << 2u);
GPIO24_EDGE_HIGH = curr & (1u << 3u);
GPIO25_LEVEL_LOW = curr & (1u << 4u);
GPIO25_LEVEL_HIGH = curr & (1u << 5u);
GPIO25_EDGE_LOW = curr & (1u << 6u);
GPIO25_EDGE_HIGH = curr & (1u << 7u);
GPIO26_LEVEL_LOW = curr & (1u << 8u);
GPIO26_LEVEL_HIGH = curr & (1u << 9u);
GPIO26_EDGE_LOW = curr & (1u << 10u);
GPIO26_EDGE_HIGH = curr & (1u << 11u);
GPIO27_LEVEL_LOW = curr & (1u << 12u);
GPIO27_LEVEL_HIGH = curr & (1u << 13u);
GPIO27_EDGE_LOW = curr & (1u << 14u);
GPIO27_EDGE_HIGH = curr & (1u << 15u);
GPIO28_LEVEL_LOW = curr & (1u << 16u);
GPIO28_LEVEL_HIGH = curr & (1u << 17u);
GPIO28_EDGE_LOW = curr & (1u << 18u);
GPIO28_EDGE_HIGH = curr & (1u << 19u);
GPIO29_LEVEL_LOW = curr & (1u << 20u);
GPIO29_LEVEL_HIGH = curr & (1u << 21u);
GPIO29_EDGE_LOW = curr & (1u << 22u);
GPIO29_EDGE_HIGH = curr & (1u << 23u);
}
inline void set_DORMANT_WAKE_INTF3(
bool GPIO24_LEVEL_LOW, bool GPIO24_LEVEL_HIGH, bool GPIO24_EDGE_LOW,
bool GPIO24_EDGE_HIGH, bool GPIO25_LEVEL_LOW, bool GPIO25_LEVEL_HIGH,
bool GPIO25_EDGE_LOW, bool GPIO25_EDGE_HIGH, bool GPIO26_LEVEL_LOW,
bool GPIO26_LEVEL_HIGH, bool GPIO26_EDGE_LOW, bool GPIO26_EDGE_HIGH,
bool GPIO27_LEVEL_LOW, bool GPIO27_LEVEL_HIGH, bool GPIO27_EDGE_LOW,
bool GPIO27_EDGE_HIGH, bool GPIO28_LEVEL_LOW, bool GPIO28_LEVEL_HIGH,
bool GPIO28_EDGE_LOW, bool GPIO28_EDGE_HIGH, bool GPIO29_LEVEL_LOW,
bool GPIO29_LEVEL_HIGH, bool GPIO29_EDGE_LOW,
bool GPIO29_EDGE_HIGH) volatile
{
uint32_t curr = DORMANT_WAKE_INTF3;
curr &= ~(0b1u << 0u);
curr |= (GPIO24_LEVEL_LOW & 0b1u) << 0u;
curr &= ~(0b1u << 1u);
curr |= (GPIO24_LEVEL_HIGH & 0b1u) << 1u;
curr &= ~(0b1u << 2u);
curr |= (GPIO24_EDGE_LOW & 0b1u) << 2u;
curr &= ~(0b1u << 3u);
curr |= (GPIO24_EDGE_HIGH & 0b1u) << 3u;
curr &= ~(0b1u << 4u);
curr |= (GPIO25_LEVEL_LOW & 0b1u) << 4u;
curr &= ~(0b1u << 5u);
curr |= (GPIO25_LEVEL_HIGH & 0b1u) << 5u;
curr &= ~(0b1u << 6u);
curr |= (GPIO25_EDGE_LOW & 0b1u) << 6u;
curr &= ~(0b1u << 7u);
curr |= (GPIO25_EDGE_HIGH & 0b1u) << 7u;
curr &= ~(0b1u << 8u);
curr |= (GPIO26_LEVEL_LOW & 0b1u) << 8u;
curr &= ~(0b1u << 9u);
curr |= (GPIO26_LEVEL_HIGH & 0b1u) << 9u;
curr &= ~(0b1u << 10u);
curr |= (GPIO26_EDGE_LOW & 0b1u) << 10u;
curr &= ~(0b1u << 11u);
curr |= (GPIO26_EDGE_HIGH & 0b1u) << 11u;
curr &= ~(0b1u << 12u);
curr |= (GPIO27_LEVEL_LOW & 0b1u) << 12u;
curr &= ~(0b1u << 13u);
curr |= (GPIO27_LEVEL_HIGH & 0b1u) << 13u;
curr &= ~(0b1u << 14u);
curr |= (GPIO27_EDGE_LOW & 0b1u) << 14u;
curr &= ~(0b1u << 15u);
curr |= (GPIO27_EDGE_HIGH & 0b1u) << 15u;
curr &= ~(0b1u << 16u);
curr |= (GPIO28_LEVEL_LOW & 0b1u) << 16u;
curr &= ~(0b1u << 17u);
curr |= (GPIO28_LEVEL_HIGH & 0b1u) << 17u;
curr &= ~(0b1u << 18u);
curr |= (GPIO28_EDGE_LOW & 0b1u) << 18u;
curr &= ~(0b1u << 19u);
curr |= (GPIO28_EDGE_HIGH & 0b1u) << 19u;
curr &= ~(0b1u << 20u);
curr |= (GPIO29_LEVEL_LOW & 0b1u) << 20u;
curr &= ~(0b1u << 21u);
curr |= (GPIO29_LEVEL_HIGH & 0b1u) << 21u;
curr &= ~(0b1u << 22u);
curr |= (GPIO29_EDGE_LOW & 0b1u) << 22u;
curr &= ~(0b1u << 23u);
curr |= (GPIO29_EDGE_HIGH & 0b1u) << 23u;
DORMANT_WAKE_INTF3 = curr;
}
inline bool get_DORMANT_WAKE_INTS0_GPIO0_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTS0 & (1u << 0u);
}
inline bool get_DORMANT_WAKE_INTS0_GPIO0_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTS0 & (1u << 1u);
}
inline bool get_DORMANT_WAKE_INTS0_GPIO0_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTS0 & (1u << 2u);
}
inline bool get_DORMANT_WAKE_INTS0_GPIO0_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTS0 & (1u << 3u);
}
inline bool get_DORMANT_WAKE_INTS0_GPIO1_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTS0 & (1u << 4u);
}
inline bool get_DORMANT_WAKE_INTS0_GPIO1_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTS0 & (1u << 5u);
}
inline bool get_DORMANT_WAKE_INTS0_GPIO1_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTS0 & (1u << 6u);
}
inline bool get_DORMANT_WAKE_INTS0_GPIO1_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTS0 & (1u << 7u);
}
inline bool get_DORMANT_WAKE_INTS0_GPIO2_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTS0 & (1u << 8u);
}
inline bool get_DORMANT_WAKE_INTS0_GPIO2_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTS0 & (1u << 9u);
}
inline bool get_DORMANT_WAKE_INTS0_GPIO2_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTS0 & (1u << 10u);
}
inline bool get_DORMANT_WAKE_INTS0_GPIO2_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTS0 & (1u << 11u);
}
inline bool get_DORMANT_WAKE_INTS0_GPIO3_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTS0 & (1u << 12u);
}
inline bool get_DORMANT_WAKE_INTS0_GPIO3_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTS0 & (1u << 13u);
}
inline bool get_DORMANT_WAKE_INTS0_GPIO3_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTS0 & (1u << 14u);
}
inline bool get_DORMANT_WAKE_INTS0_GPIO3_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTS0 & (1u << 15u);
}
inline bool get_DORMANT_WAKE_INTS0_GPIO4_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTS0 & (1u << 16u);
}
inline bool get_DORMANT_WAKE_INTS0_GPIO4_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTS0 & (1u << 17u);
}
inline bool get_DORMANT_WAKE_INTS0_GPIO4_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTS0 & (1u << 18u);
}
inline bool get_DORMANT_WAKE_INTS0_GPIO4_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTS0 & (1u << 19u);
}
inline bool get_DORMANT_WAKE_INTS0_GPIO5_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTS0 & (1u << 20u);
}
inline bool get_DORMANT_WAKE_INTS0_GPIO5_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTS0 & (1u << 21u);
}
inline bool get_DORMANT_WAKE_INTS0_GPIO5_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTS0 & (1u << 22u);
}
inline bool get_DORMANT_WAKE_INTS0_GPIO5_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTS0 & (1u << 23u);
}
inline bool get_DORMANT_WAKE_INTS0_GPIO6_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTS0 & (1u << 24u);
}
inline bool get_DORMANT_WAKE_INTS0_GPIO6_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTS0 & (1u << 25u);
}
inline bool get_DORMANT_WAKE_INTS0_GPIO6_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTS0 & (1u << 26u);
}
inline bool get_DORMANT_WAKE_INTS0_GPIO6_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTS0 & (1u << 27u);
}
inline bool get_DORMANT_WAKE_INTS0_GPIO7_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTS0 & (1u << 28u);
}
inline bool get_DORMANT_WAKE_INTS0_GPIO7_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTS0 & (1u << 29u);
}
inline bool get_DORMANT_WAKE_INTS0_GPIO7_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTS0 & (1u << 30u);
}
inline bool get_DORMANT_WAKE_INTS0_GPIO7_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTS0 & (1u << 31u);
}
inline void get_DORMANT_WAKE_INTS0(
bool &GPIO0_LEVEL_LOW, bool &GPIO0_LEVEL_HIGH, bool &GPIO0_EDGE_LOW,
bool &GPIO0_EDGE_HIGH, bool &GPIO1_LEVEL_LOW, bool &GPIO1_LEVEL_HIGH,
bool &GPIO1_EDGE_LOW, bool &GPIO1_EDGE_HIGH, bool &GPIO2_LEVEL_LOW,
bool &GPIO2_LEVEL_HIGH, bool &GPIO2_EDGE_LOW, bool &GPIO2_EDGE_HIGH,
bool &GPIO3_LEVEL_LOW, bool &GPIO3_LEVEL_HIGH, bool &GPIO3_EDGE_LOW,
bool &GPIO3_EDGE_HIGH, bool &GPIO4_LEVEL_LOW, bool &GPIO4_LEVEL_HIGH,
bool &GPIO4_EDGE_LOW, bool &GPIO4_EDGE_HIGH, bool &GPIO5_LEVEL_LOW,
bool &GPIO5_LEVEL_HIGH, bool &GPIO5_EDGE_LOW, bool &GPIO5_EDGE_HIGH,
bool &GPIO6_LEVEL_LOW, bool &GPIO6_LEVEL_HIGH, bool &GPIO6_EDGE_LOW,
bool &GPIO6_EDGE_HIGH, bool &GPIO7_LEVEL_LOW, bool &GPIO7_LEVEL_HIGH,
bool &GPIO7_EDGE_LOW, bool &GPIO7_EDGE_HIGH) volatile
{
uint32_t curr = DORMANT_WAKE_INTS0;
GPIO0_LEVEL_LOW = curr & (1u << 0u);
GPIO0_LEVEL_HIGH = curr & (1u << 1u);
GPIO0_EDGE_LOW = curr & (1u << 2u);
GPIO0_EDGE_HIGH = curr & (1u << 3u);
GPIO1_LEVEL_LOW = curr & (1u << 4u);
GPIO1_LEVEL_HIGH = curr & (1u << 5u);
GPIO1_EDGE_LOW = curr & (1u << 6u);
GPIO1_EDGE_HIGH = curr & (1u << 7u);
GPIO2_LEVEL_LOW = curr & (1u << 8u);
GPIO2_LEVEL_HIGH = curr & (1u << 9u);
GPIO2_EDGE_LOW = curr & (1u << 10u);
GPIO2_EDGE_HIGH = curr & (1u << 11u);
GPIO3_LEVEL_LOW = curr & (1u << 12u);
GPIO3_LEVEL_HIGH = curr & (1u << 13u);
GPIO3_EDGE_LOW = curr & (1u << 14u);
GPIO3_EDGE_HIGH = curr & (1u << 15u);
GPIO4_LEVEL_LOW = curr & (1u << 16u);
GPIO4_LEVEL_HIGH = curr & (1u << 17u);
GPIO4_EDGE_LOW = curr & (1u << 18u);
GPIO4_EDGE_HIGH = curr & (1u << 19u);
GPIO5_LEVEL_LOW = curr & (1u << 20u);
GPIO5_LEVEL_HIGH = curr & (1u << 21u);
GPIO5_EDGE_LOW = curr & (1u << 22u);
GPIO5_EDGE_HIGH = curr & (1u << 23u);
GPIO6_LEVEL_LOW = curr & (1u << 24u);
GPIO6_LEVEL_HIGH = curr & (1u << 25u);
GPIO6_EDGE_LOW = curr & (1u << 26u);
GPIO6_EDGE_HIGH = curr & (1u << 27u);
GPIO7_LEVEL_LOW = curr & (1u << 28u);
GPIO7_LEVEL_HIGH = curr & (1u << 29u);
GPIO7_EDGE_LOW = curr & (1u << 30u);
GPIO7_EDGE_HIGH = curr & (1u << 31u);
}
inline bool get_DORMANT_WAKE_INTS1_GPIO8_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTS1 & (1u << 0u);
}
inline bool get_DORMANT_WAKE_INTS1_GPIO8_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTS1 & (1u << 1u);
}
inline bool get_DORMANT_WAKE_INTS1_GPIO8_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTS1 & (1u << 2u);
}
inline bool get_DORMANT_WAKE_INTS1_GPIO8_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTS1 & (1u << 3u);
}
inline bool get_DORMANT_WAKE_INTS1_GPIO9_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTS1 & (1u << 4u);
}
inline bool get_DORMANT_WAKE_INTS1_GPIO9_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTS1 & (1u << 5u);
}
inline bool get_DORMANT_WAKE_INTS1_GPIO9_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTS1 & (1u << 6u);
}
inline bool get_DORMANT_WAKE_INTS1_GPIO9_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTS1 & (1u << 7u);
}
inline bool get_DORMANT_WAKE_INTS1_GPIO10_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTS1 & (1u << 8u);
}
inline bool get_DORMANT_WAKE_INTS1_GPIO10_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTS1 & (1u << 9u);
}
inline bool get_DORMANT_WAKE_INTS1_GPIO10_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTS1 & (1u << 10u);
}
inline bool get_DORMANT_WAKE_INTS1_GPIO10_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTS1 & (1u << 11u);
}
inline bool get_DORMANT_WAKE_INTS1_GPIO11_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTS1 & (1u << 12u);
}
inline bool get_DORMANT_WAKE_INTS1_GPIO11_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTS1 & (1u << 13u);
}
inline bool get_DORMANT_WAKE_INTS1_GPIO11_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTS1 & (1u << 14u);
}
inline bool get_DORMANT_WAKE_INTS1_GPIO11_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTS1 & (1u << 15u);
}
inline bool get_DORMANT_WAKE_INTS1_GPIO12_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTS1 & (1u << 16u);
}
inline bool get_DORMANT_WAKE_INTS1_GPIO12_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTS1 & (1u << 17u);
}
inline bool get_DORMANT_WAKE_INTS1_GPIO12_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTS1 & (1u << 18u);
}
inline bool get_DORMANT_WAKE_INTS1_GPIO12_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTS1 & (1u << 19u);
}
inline bool get_DORMANT_WAKE_INTS1_GPIO13_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTS1 & (1u << 20u);
}
inline bool get_DORMANT_WAKE_INTS1_GPIO13_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTS1 & (1u << 21u);
}
inline bool get_DORMANT_WAKE_INTS1_GPIO13_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTS1 & (1u << 22u);
}
inline bool get_DORMANT_WAKE_INTS1_GPIO13_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTS1 & (1u << 23u);
}
inline bool get_DORMANT_WAKE_INTS1_GPIO14_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTS1 & (1u << 24u);
}
inline bool get_DORMANT_WAKE_INTS1_GPIO14_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTS1 & (1u << 25u);
}
inline bool get_DORMANT_WAKE_INTS1_GPIO14_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTS1 & (1u << 26u);
}
inline bool get_DORMANT_WAKE_INTS1_GPIO14_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTS1 & (1u << 27u);
}
inline bool get_DORMANT_WAKE_INTS1_GPIO15_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTS1 & (1u << 28u);
}
inline bool get_DORMANT_WAKE_INTS1_GPIO15_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTS1 & (1u << 29u);
}
inline bool get_DORMANT_WAKE_INTS1_GPIO15_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTS1 & (1u << 30u);
}
inline bool get_DORMANT_WAKE_INTS1_GPIO15_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTS1 & (1u << 31u);
}
inline void get_DORMANT_WAKE_INTS1(
bool &GPIO8_LEVEL_LOW, bool &GPIO8_LEVEL_HIGH, bool &GPIO8_EDGE_LOW,
bool &GPIO8_EDGE_HIGH, bool &GPIO9_LEVEL_LOW, bool &GPIO9_LEVEL_HIGH,
bool &GPIO9_EDGE_LOW, bool &GPIO9_EDGE_HIGH, bool &GPIO10_LEVEL_LOW,
bool &GPIO10_LEVEL_HIGH, bool &GPIO10_EDGE_LOW, bool &GPIO10_EDGE_HIGH,
bool &GPIO11_LEVEL_LOW, bool &GPIO11_LEVEL_HIGH, bool &GPIO11_EDGE_LOW,
bool &GPIO11_EDGE_HIGH, bool &GPIO12_LEVEL_LOW,
bool &GPIO12_LEVEL_HIGH, bool &GPIO12_EDGE_LOW, bool &GPIO12_EDGE_HIGH,
bool &GPIO13_LEVEL_LOW, bool &GPIO13_LEVEL_HIGH, bool &GPIO13_EDGE_LOW,
bool &GPIO13_EDGE_HIGH, bool &GPIO14_LEVEL_LOW,
bool &GPIO14_LEVEL_HIGH, bool &GPIO14_EDGE_LOW, bool &GPIO14_EDGE_HIGH,
bool &GPIO15_LEVEL_LOW, bool &GPIO15_LEVEL_HIGH, bool &GPIO15_EDGE_LOW,
bool &GPIO15_EDGE_HIGH) volatile
{
uint32_t curr = DORMANT_WAKE_INTS1;
GPIO8_LEVEL_LOW = curr & (1u << 0u);
GPIO8_LEVEL_HIGH = curr & (1u << 1u);
GPIO8_EDGE_LOW = curr & (1u << 2u);
GPIO8_EDGE_HIGH = curr & (1u << 3u);
GPIO9_LEVEL_LOW = curr & (1u << 4u);
GPIO9_LEVEL_HIGH = curr & (1u << 5u);
GPIO9_EDGE_LOW = curr & (1u << 6u);
GPIO9_EDGE_HIGH = curr & (1u << 7u);
GPIO10_LEVEL_LOW = curr & (1u << 8u);
GPIO10_LEVEL_HIGH = curr & (1u << 9u);
GPIO10_EDGE_LOW = curr & (1u << 10u);
GPIO10_EDGE_HIGH = curr & (1u << 11u);
GPIO11_LEVEL_LOW = curr & (1u << 12u);
GPIO11_LEVEL_HIGH = curr & (1u << 13u);
GPIO11_EDGE_LOW = curr & (1u << 14u);
GPIO11_EDGE_HIGH = curr & (1u << 15u);
GPIO12_LEVEL_LOW = curr & (1u << 16u);
GPIO12_LEVEL_HIGH = curr & (1u << 17u);
GPIO12_EDGE_LOW = curr & (1u << 18u);
GPIO12_EDGE_HIGH = curr & (1u << 19u);
GPIO13_LEVEL_LOW = curr & (1u << 20u);
GPIO13_LEVEL_HIGH = curr & (1u << 21u);
GPIO13_EDGE_LOW = curr & (1u << 22u);
GPIO13_EDGE_HIGH = curr & (1u << 23u);
GPIO14_LEVEL_LOW = curr & (1u << 24u);
GPIO14_LEVEL_HIGH = curr & (1u << 25u);
GPIO14_EDGE_LOW = curr & (1u << 26u);
GPIO14_EDGE_HIGH = curr & (1u << 27u);
GPIO15_LEVEL_LOW = curr & (1u << 28u);
GPIO15_LEVEL_HIGH = curr & (1u << 29u);
GPIO15_EDGE_LOW = curr & (1u << 30u);
GPIO15_EDGE_HIGH = curr & (1u << 31u);
}
inline bool get_DORMANT_WAKE_INTS2_GPIO16_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTS2 & (1u << 0u);
}
inline bool get_DORMANT_WAKE_INTS2_GPIO16_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTS2 & (1u << 1u);
}
inline bool get_DORMANT_WAKE_INTS2_GPIO16_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTS2 & (1u << 2u);
}
inline bool get_DORMANT_WAKE_INTS2_GPIO16_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTS2 & (1u << 3u);
}
inline bool get_DORMANT_WAKE_INTS2_GPIO17_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTS2 & (1u << 4u);
}
inline bool get_DORMANT_WAKE_INTS2_GPIO17_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTS2 & (1u << 5u);
}
inline bool get_DORMANT_WAKE_INTS2_GPIO17_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTS2 & (1u << 6u);
}
inline bool get_DORMANT_WAKE_INTS2_GPIO17_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTS2 & (1u << 7u);
}
inline bool get_DORMANT_WAKE_INTS2_GPIO18_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTS2 & (1u << 8u);
}
inline bool get_DORMANT_WAKE_INTS2_GPIO18_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTS2 & (1u << 9u);
}
inline bool get_DORMANT_WAKE_INTS2_GPIO18_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTS2 & (1u << 10u);
}
inline bool get_DORMANT_WAKE_INTS2_GPIO18_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTS2 & (1u << 11u);
}
inline bool get_DORMANT_WAKE_INTS2_GPIO19_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTS2 & (1u << 12u);
}
inline bool get_DORMANT_WAKE_INTS2_GPIO19_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTS2 & (1u << 13u);
}
inline bool get_DORMANT_WAKE_INTS2_GPIO19_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTS2 & (1u << 14u);
}
inline bool get_DORMANT_WAKE_INTS2_GPIO19_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTS2 & (1u << 15u);
}
inline bool get_DORMANT_WAKE_INTS2_GPIO20_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTS2 & (1u << 16u);
}
inline bool get_DORMANT_WAKE_INTS2_GPIO20_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTS2 & (1u << 17u);
}
inline bool get_DORMANT_WAKE_INTS2_GPIO20_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTS2 & (1u << 18u);
}
inline bool get_DORMANT_WAKE_INTS2_GPIO20_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTS2 & (1u << 19u);
}
inline bool get_DORMANT_WAKE_INTS2_GPIO21_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTS2 & (1u << 20u);
}
inline bool get_DORMANT_WAKE_INTS2_GPIO21_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTS2 & (1u << 21u);
}
inline bool get_DORMANT_WAKE_INTS2_GPIO21_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTS2 & (1u << 22u);
}
inline bool get_DORMANT_WAKE_INTS2_GPIO21_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTS2 & (1u << 23u);
}
inline bool get_DORMANT_WAKE_INTS2_GPIO22_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTS2 & (1u << 24u);
}
inline bool get_DORMANT_WAKE_INTS2_GPIO22_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTS2 & (1u << 25u);
}
inline bool get_DORMANT_WAKE_INTS2_GPIO22_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTS2 & (1u << 26u);
}
inline bool get_DORMANT_WAKE_INTS2_GPIO22_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTS2 & (1u << 27u);
}
inline bool get_DORMANT_WAKE_INTS2_GPIO23_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTS2 & (1u << 28u);
}
inline bool get_DORMANT_WAKE_INTS2_GPIO23_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTS2 & (1u << 29u);
}
inline bool get_DORMANT_WAKE_INTS2_GPIO23_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTS2 & (1u << 30u);
}
inline bool get_DORMANT_WAKE_INTS2_GPIO23_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTS2 & (1u << 31u);
}
inline void get_DORMANT_WAKE_INTS2(
bool &GPIO16_LEVEL_LOW, bool &GPIO16_LEVEL_HIGH, bool &GPIO16_EDGE_LOW,
bool &GPIO16_EDGE_HIGH, bool &GPIO17_LEVEL_LOW,
bool &GPIO17_LEVEL_HIGH, bool &GPIO17_EDGE_LOW, bool &GPIO17_EDGE_HIGH,
bool &GPIO18_LEVEL_LOW, bool &GPIO18_LEVEL_HIGH, bool &GPIO18_EDGE_LOW,
bool &GPIO18_EDGE_HIGH, bool &GPIO19_LEVEL_LOW,
bool &GPIO19_LEVEL_HIGH, bool &GPIO19_EDGE_LOW, bool &GPIO19_EDGE_HIGH,
bool &GPIO20_LEVEL_LOW, bool &GPIO20_LEVEL_HIGH, bool &GPIO20_EDGE_LOW,
bool &GPIO20_EDGE_HIGH, bool &GPIO21_LEVEL_LOW,
bool &GPIO21_LEVEL_HIGH, bool &GPIO21_EDGE_LOW, bool &GPIO21_EDGE_HIGH,
bool &GPIO22_LEVEL_LOW, bool &GPIO22_LEVEL_HIGH, bool &GPIO22_EDGE_LOW,
bool &GPIO22_EDGE_HIGH, bool &GPIO23_LEVEL_LOW,
bool &GPIO23_LEVEL_HIGH, bool &GPIO23_EDGE_LOW,
bool &GPIO23_EDGE_HIGH) volatile
{
uint32_t curr = DORMANT_WAKE_INTS2;
GPIO16_LEVEL_LOW = curr & (1u << 0u);
GPIO16_LEVEL_HIGH = curr & (1u << 1u);
GPIO16_EDGE_LOW = curr & (1u << 2u);
GPIO16_EDGE_HIGH = curr & (1u << 3u);
GPIO17_LEVEL_LOW = curr & (1u << 4u);
GPIO17_LEVEL_HIGH = curr & (1u << 5u);
GPIO17_EDGE_LOW = curr & (1u << 6u);
GPIO17_EDGE_HIGH = curr & (1u << 7u);
GPIO18_LEVEL_LOW = curr & (1u << 8u);
GPIO18_LEVEL_HIGH = curr & (1u << 9u);
GPIO18_EDGE_LOW = curr & (1u << 10u);
GPIO18_EDGE_HIGH = curr & (1u << 11u);
GPIO19_LEVEL_LOW = curr & (1u << 12u);
GPIO19_LEVEL_HIGH = curr & (1u << 13u);
GPIO19_EDGE_LOW = curr & (1u << 14u);
GPIO19_EDGE_HIGH = curr & (1u << 15u);
GPIO20_LEVEL_LOW = curr & (1u << 16u);
GPIO20_LEVEL_HIGH = curr & (1u << 17u);
GPIO20_EDGE_LOW = curr & (1u << 18u);
GPIO20_EDGE_HIGH = curr & (1u << 19u);
GPIO21_LEVEL_LOW = curr & (1u << 20u);
GPIO21_LEVEL_HIGH = curr & (1u << 21u);
GPIO21_EDGE_LOW = curr & (1u << 22u);
GPIO21_EDGE_HIGH = curr & (1u << 23u);
GPIO22_LEVEL_LOW = curr & (1u << 24u);
GPIO22_LEVEL_HIGH = curr & (1u << 25u);
GPIO22_EDGE_LOW = curr & (1u << 26u);
GPIO22_EDGE_HIGH = curr & (1u << 27u);
GPIO23_LEVEL_LOW = curr & (1u << 28u);
GPIO23_LEVEL_HIGH = curr & (1u << 29u);
GPIO23_EDGE_LOW = curr & (1u << 30u);
GPIO23_EDGE_HIGH = curr & (1u << 31u);
}
inline bool get_DORMANT_WAKE_INTS3_GPIO24_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTS3 & (1u << 0u);
}
inline bool get_DORMANT_WAKE_INTS3_GPIO24_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTS3 & (1u << 1u);
}
inline bool get_DORMANT_WAKE_INTS3_GPIO24_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTS3 & (1u << 2u);
}
inline bool get_DORMANT_WAKE_INTS3_GPIO24_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTS3 & (1u << 3u);
}
inline bool get_DORMANT_WAKE_INTS3_GPIO25_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTS3 & (1u << 4u);
}
inline bool get_DORMANT_WAKE_INTS3_GPIO25_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTS3 & (1u << 5u);
}
inline bool get_DORMANT_WAKE_INTS3_GPIO25_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTS3 & (1u << 6u);
}
inline bool get_DORMANT_WAKE_INTS3_GPIO25_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTS3 & (1u << 7u);
}
inline bool get_DORMANT_WAKE_INTS3_GPIO26_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTS3 & (1u << 8u);
}
inline bool get_DORMANT_WAKE_INTS3_GPIO26_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTS3 & (1u << 9u);
}
inline bool get_DORMANT_WAKE_INTS3_GPIO26_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTS3 & (1u << 10u);
}
inline bool get_DORMANT_WAKE_INTS3_GPIO26_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTS3 & (1u << 11u);
}
inline bool get_DORMANT_WAKE_INTS3_GPIO27_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTS3 & (1u << 12u);
}
inline bool get_DORMANT_WAKE_INTS3_GPIO27_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTS3 & (1u << 13u);
}
inline bool get_DORMANT_WAKE_INTS3_GPIO27_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTS3 & (1u << 14u);
}
inline bool get_DORMANT_WAKE_INTS3_GPIO27_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTS3 & (1u << 15u);
}
inline bool get_DORMANT_WAKE_INTS3_GPIO28_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTS3 & (1u << 16u);
}
inline bool get_DORMANT_WAKE_INTS3_GPIO28_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTS3 & (1u << 17u);
}
inline bool get_DORMANT_WAKE_INTS3_GPIO28_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTS3 & (1u << 18u);
}
inline bool get_DORMANT_WAKE_INTS3_GPIO28_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTS3 & (1u << 19u);
}
inline bool get_DORMANT_WAKE_INTS3_GPIO29_LEVEL_LOW() volatile
{
return DORMANT_WAKE_INTS3 & (1u << 20u);
}
inline bool get_DORMANT_WAKE_INTS3_GPIO29_LEVEL_HIGH() volatile
{
return DORMANT_WAKE_INTS3 & (1u << 21u);
}
inline bool get_DORMANT_WAKE_INTS3_GPIO29_EDGE_LOW() volatile
{
return DORMANT_WAKE_INTS3 & (1u << 22u);
}
inline bool get_DORMANT_WAKE_INTS3_GPIO29_EDGE_HIGH() volatile
{
return DORMANT_WAKE_INTS3 & (1u << 23u);
}
inline void get_DORMANT_WAKE_INTS3(
bool &GPIO24_LEVEL_LOW, bool &GPIO24_LEVEL_HIGH, bool &GPIO24_EDGE_LOW,
bool &GPIO24_EDGE_HIGH, bool &GPIO25_LEVEL_LOW,
bool &GPIO25_LEVEL_HIGH, bool &GPIO25_EDGE_LOW, bool &GPIO25_EDGE_HIGH,
bool &GPIO26_LEVEL_LOW, bool &GPIO26_LEVEL_HIGH, bool &GPIO26_EDGE_LOW,
bool &GPIO26_EDGE_HIGH, bool &GPIO27_LEVEL_LOW,
bool &GPIO27_LEVEL_HIGH, bool &GPIO27_EDGE_LOW, bool &GPIO27_EDGE_HIGH,
bool &GPIO28_LEVEL_LOW, bool &GPIO28_LEVEL_HIGH, bool &GPIO28_EDGE_LOW,
bool &GPIO28_EDGE_HIGH, bool &GPIO29_LEVEL_LOW,
bool &GPIO29_LEVEL_HIGH, bool &GPIO29_EDGE_LOW,
bool &GPIO29_EDGE_HIGH) volatile
{
uint32_t curr = DORMANT_WAKE_INTS3;
GPIO24_LEVEL_LOW = curr & (1u << 0u);
GPIO24_LEVEL_HIGH = curr & (1u << 1u);
GPIO24_EDGE_LOW = curr & (1u << 2u);
GPIO24_EDGE_HIGH = curr & (1u << 3u);
GPIO25_LEVEL_LOW = curr & (1u << 4u);
GPIO25_LEVEL_HIGH = curr & (1u << 5u);
GPIO25_EDGE_LOW = curr & (1u << 6u);
GPIO25_EDGE_HIGH = curr & (1u << 7u);
GPIO26_LEVEL_LOW = curr & (1u << 8u);
GPIO26_LEVEL_HIGH = curr & (1u << 9u);
GPIO26_EDGE_LOW = curr & (1u << 10u);
GPIO26_EDGE_HIGH = curr & (1u << 11u);
GPIO27_LEVEL_LOW = curr & (1u << 12u);
GPIO27_LEVEL_HIGH = curr & (1u << 13u);
GPIO27_EDGE_LOW = curr & (1u << 14u);
GPIO27_EDGE_HIGH = curr & (1u << 15u);
GPIO28_LEVEL_LOW = curr & (1u << 16u);
GPIO28_LEVEL_HIGH = curr & (1u << 17u);
GPIO28_EDGE_LOW = curr & (1u << 18u);
GPIO28_EDGE_HIGH = curr & (1u << 19u);
GPIO29_LEVEL_LOW = curr & (1u << 20u);
GPIO29_LEVEL_HIGH = curr & (1u << 21u);
GPIO29_EDGE_LOW = curr & (1u << 22u);
GPIO29_EDGE_HIGH = curr & (1u << 23u);
}
};
static_assert(sizeof(io_bank0) == io_bank0::size);
static volatile io_bank0 *const IO_BANK0 =
reinterpret_cast<io_bank0 *>(0x40014000);
}; // namespace RP2040