Program Listing for File spi.h

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#pragma once
#ifndef RP2040_STRUCTS_SPI_H
#define RP2040_STRUCTS_SPI_H

#include "../ifgen/common.h"

namespace RP2040
{

struct spi
{
    /* Constant attributes. */
    static constexpr struct_id_t id = 21;
    static constexpr std::size_t size = 4096;
    /* Fields. */
    uint32_t
        SSPCR0;
    uint32_t
        SSPCR1;
    uint32_t SSPDR;
    const uint32_t SSPSR =
        {};
    uint32_t SSPCPSR;
    uint32_t SSPIMSC;
    const uint32_t SSPRIS = {};
    const uint32_t SSPMIS = {};
    uint32_t SSPICR;
    uint32_t SSPDMACR;
    static constexpr std::size_t reserved_padding0_length = 1006;
    const uint32_t reserved_padding0[reserved_padding0_length] = {};
    const uint32_t SSPPERIPHID0 =
        {};
    const uint32_t SSPPERIPHID1 =
        {};
    const uint32_t SSPPERIPHID2 =
        {};
    const uint32_t SSPPERIPHID3 =
        {};
    const uint32_t SSPPCELLID0 =
        {};
    const uint32_t SSPPCELLID1 =
        {};
    const uint32_t SSPPCELLID2 =
        {};
    const uint32_t SSPPCELLID3 =
        {};
    /* Methods. */

    inline uint8_t get_SSPCR0_DSS() volatile
    {
        return SSPCR0 & 0xfu;
    }

    inline void set_SSPCR0_DSS(uint8_t value) volatile
    {
        uint32_t curr = SSPCR0;

        curr &= ~(0xfu);
        curr |= (value & 0xfu);

        SSPCR0 = curr;
    }

    inline uint8_t get_SSPCR0_FRF() volatile
    {
        return (SSPCR0 >> 4u) & 0b11u;
    }

    inline void set_SSPCR0_FRF(uint8_t value) volatile
    {
        uint32_t curr = SSPCR0;

        curr &= ~(0b11u << 4u);
        curr |= (value & 0b11u) << 4u;

        SSPCR0 = curr;
    }

    inline bool get_SSPCR0_SPO() volatile
    {
        return SSPCR0 & (1u << 6u);
    }

    inline void set_SSPCR0_SPO() volatile
    {
        SSPCR0 |= 1u << 6u;
    }

    inline void clear_SSPCR0_SPO() volatile
    {
        SSPCR0 &= ~(1u << 6u);
    }

    inline void toggle_SSPCR0_SPO() volatile
    {
        SSPCR0 ^= 1u << 6u;
    }

    inline bool get_SSPCR0_SPH() volatile
    {
        return SSPCR0 & (1u << 7u);
    }

    inline void set_SSPCR0_SPH() volatile
    {
        SSPCR0 |= 1u << 7u;
    }

    inline void clear_SSPCR0_SPH() volatile
    {
        SSPCR0 &= ~(1u << 7u);
    }

    inline void toggle_SSPCR0_SPH() volatile
    {
        SSPCR0 ^= 1u << 7u;
    }

    inline uint8_t get_SSPCR0_SCR() volatile
    {
        return (SSPCR0 >> 8u) & 0xffu;
    }

    inline void set_SSPCR0_SCR(uint8_t value) volatile
    {
        uint32_t curr = SSPCR0;

        curr &= ~(0xffu << 8u);
        curr |= (value & 0xffu) << 8u;

        SSPCR0 = curr;
    }

    inline void get_SSPCR0(uint8_t &DSS, uint8_t &FRF, bool &SPO, bool &SPH,
                           uint8_t &SCR) volatile
    {
        uint32_t curr = SSPCR0;

        DSS = curr & 0xfu;
        FRF = (curr >> 4u) & 0b11u;
        SPO = curr & (1u << 6u);
        SPH = curr & (1u << 7u);
        SCR = (curr >> 8u) & 0xffu;
    }

    inline void set_SSPCR0(uint8_t DSS, uint8_t FRF, bool SPO, bool SPH,
                           uint8_t SCR) volatile
    {
        uint32_t curr = SSPCR0;

        curr &= ~(0xfu);
        curr |= (DSS & 0xfu);
        curr &= ~(0b11u << 4u);
        curr |= (FRF & 0b11u) << 4u;
        curr &= ~(0b1u << 6u);
        curr |= (SPO & 0b1u) << 6u;
        curr &= ~(0b1u << 7u);
        curr |= (SPH & 0b1u) << 7u;
        curr &= ~(0xffu << 8u);
        curr |= (SCR & 0xffu) << 8u;

        SSPCR0 = curr;
    }

    inline bool get_SSPCR1_LBM() volatile
    {
        return SSPCR1 & 1u;
    }

    inline void set_SSPCR1_LBM() volatile
    {
        SSPCR1 |= 1u;
    }

    inline void clear_SSPCR1_LBM() volatile
    {
        SSPCR1 &= ~(1u);
    }

    inline void toggle_SSPCR1_LBM() volatile
    {
        SSPCR1 ^= 1u;
    }

    inline bool get_SSPCR1_SSE() volatile
    {
        return SSPCR1 & (1u << 1u);
    }

    inline void set_SSPCR1_SSE() volatile
    {
        SSPCR1 |= 1u << 1u;
    }

    inline void clear_SSPCR1_SSE() volatile
    {
        SSPCR1 &= ~(1u << 1u);
    }

    inline void toggle_SSPCR1_SSE() volatile
    {
        SSPCR1 ^= 1u << 1u;
    }

    inline bool get_SSPCR1_MS() volatile
    {
        return SSPCR1 & (1u << 2u);
    }

    inline void set_SSPCR1_MS() volatile
    {
        SSPCR1 |= 1u << 2u;
    }

    inline void clear_SSPCR1_MS() volatile
    {
        SSPCR1 &= ~(1u << 2u);
    }

    inline void toggle_SSPCR1_MS() volatile
    {
        SSPCR1 ^= 1u << 2u;
    }

    inline bool get_SSPCR1_SOD() volatile
    {
        return SSPCR1 & (1u << 3u);
    }

    inline void set_SSPCR1_SOD() volatile
    {
        SSPCR1 |= 1u << 3u;
    }

    inline void clear_SSPCR1_SOD() volatile
    {
        SSPCR1 &= ~(1u << 3u);
    }

    inline void toggle_SSPCR1_SOD() volatile
    {
        SSPCR1 ^= 1u << 3u;
    }

    inline void get_SSPCR1(bool &LBM, bool &SSE, bool &MS, bool &SOD) volatile
    {
        uint32_t curr = SSPCR1;

        LBM = curr & 1u;
        SSE = curr & (1u << 1u);
        MS = curr & (1u << 2u);
        SOD = curr & (1u << 3u);
    }

    inline void set_SSPCR1(bool LBM, bool SSE, bool MS, bool SOD) volatile
    {
        uint32_t curr = SSPCR1;

        curr &= ~(0b1u);
        curr |= (LBM & 0b1u);
        curr &= ~(0b1u << 1u);
        curr |= (SSE & 0b1u) << 1u;
        curr &= ~(0b1u << 2u);
        curr |= (MS & 0b1u) << 2u;
        curr &= ~(0b1u << 3u);
        curr |= (SOD & 0b1u) << 3u;

        SSPCR1 = curr;
    }

    inline uint16_t get_SSPDR() volatile
    {
        return SSPDR & 0xffffu;
    }

    inline void set_SSPDR(uint16_t value) volatile
    {
        uint32_t curr = SSPDR;

        curr &= ~(0xffffu);
        curr |= (value & 0xffffu);

        SSPDR = curr;
    }

    inline bool get_SSPSR_TFE() volatile
    {
        return SSPSR & 1u;
    }

    inline bool get_SSPSR_TNF() volatile
    {
        return SSPSR & (1u << 1u);
    }

    inline bool get_SSPSR_RNE() volatile
    {
        return SSPSR & (1u << 2u);
    }

    inline bool get_SSPSR_RFF() volatile
    {
        return SSPSR & (1u << 3u);
    }

    inline bool get_SSPSR_BSY() volatile
    {
        return SSPSR & (1u << 4u);
    }

    inline void get_SSPSR(bool &TFE, bool &TNF, bool &RNE, bool &RFF,
                          bool &BSY) volatile
    {
        uint32_t curr = SSPSR;

        TFE = curr & 1u;
        TNF = curr & (1u << 1u);
        RNE = curr & (1u << 2u);
        RFF = curr & (1u << 3u);
        BSY = curr & (1u << 4u);
    }

    inline uint8_t get_SSPCPSR() volatile
    {
        return SSPCPSR & 0xffu;
    }

    inline void set_SSPCPSR(uint8_t value) volatile
    {
        uint32_t curr = SSPCPSR;

        curr &= ~(0xffu);
        curr |= (value & 0xffu);

        SSPCPSR = curr;
    }

    inline bool get_SSPIMSC_RORIM() volatile
    {
        return SSPIMSC & 1u;
    }

    inline void set_SSPIMSC_RORIM() volatile
    {
        SSPIMSC |= 1u;
    }

    inline void clear_SSPIMSC_RORIM() volatile
    {
        SSPIMSC &= ~(1u);
    }

    inline void toggle_SSPIMSC_RORIM() volatile
    {
        SSPIMSC ^= 1u;
    }

    inline bool get_SSPIMSC_RTIM() volatile
    {
        return SSPIMSC & (1u << 1u);
    }

    inline void set_SSPIMSC_RTIM() volatile
    {
        SSPIMSC |= 1u << 1u;
    }

    inline void clear_SSPIMSC_RTIM() volatile
    {
        SSPIMSC &= ~(1u << 1u);
    }

    inline void toggle_SSPIMSC_RTIM() volatile
    {
        SSPIMSC ^= 1u << 1u;
    }

    inline bool get_SSPIMSC_RXIM() volatile
    {
        return SSPIMSC & (1u << 2u);
    }

    inline void set_SSPIMSC_RXIM() volatile
    {
        SSPIMSC |= 1u << 2u;
    }

    inline void clear_SSPIMSC_RXIM() volatile
    {
        SSPIMSC &= ~(1u << 2u);
    }

    inline void toggle_SSPIMSC_RXIM() volatile
    {
        SSPIMSC ^= 1u << 2u;
    }

    inline bool get_SSPIMSC_TXIM() volatile
    {
        return SSPIMSC & (1u << 3u);
    }

    inline void set_SSPIMSC_TXIM() volatile
    {
        SSPIMSC |= 1u << 3u;
    }

    inline void clear_SSPIMSC_TXIM() volatile
    {
        SSPIMSC &= ~(1u << 3u);
    }

    inline void toggle_SSPIMSC_TXIM() volatile
    {
        SSPIMSC ^= 1u << 3u;
    }

    inline void get_SSPIMSC(bool &RORIM, bool &RTIM, bool &RXIM,
                            bool &TXIM) volatile
    {
        uint32_t curr = SSPIMSC;

        RORIM = curr & 1u;
        RTIM = curr & (1u << 1u);
        RXIM = curr & (1u << 2u);
        TXIM = curr & (1u << 3u);
    }

    inline void set_SSPIMSC(bool RORIM, bool RTIM, bool RXIM,
                            bool TXIM) volatile
    {
        uint32_t curr = SSPIMSC;

        curr &= ~(0b1u);
        curr |= (RORIM & 0b1u);
        curr &= ~(0b1u << 1u);
        curr |= (RTIM & 0b1u) << 1u;
        curr &= ~(0b1u << 2u);
        curr |= (RXIM & 0b1u) << 2u;
        curr &= ~(0b1u << 3u);
        curr |= (TXIM & 0b1u) << 3u;

        SSPIMSC = curr;
    }

    inline bool get_SSPRIS_RORRIS() volatile
    {
        return SSPRIS & 1u;
    }

    inline bool get_SSPRIS_RTRIS() volatile
    {
        return SSPRIS & (1u << 1u);
    }

    inline bool get_SSPRIS_RXRIS() volatile
    {
        return SSPRIS & (1u << 2u);
    }

    inline bool get_SSPRIS_TXRIS() volatile
    {
        return SSPRIS & (1u << 3u);
    }

    inline void get_SSPRIS(bool &RORRIS, bool &RTRIS, bool &RXRIS,
                           bool &TXRIS) volatile
    {
        uint32_t curr = SSPRIS;

        RORRIS = curr & 1u;
        RTRIS = curr & (1u << 1u);
        RXRIS = curr & (1u << 2u);
        TXRIS = curr & (1u << 3u);
    }

    inline bool get_SSPMIS_RORMIS() volatile
    {
        return SSPMIS & 1u;
    }

    inline bool get_SSPMIS_RTMIS() volatile
    {
        return SSPMIS & (1u << 1u);
    }

    inline bool get_SSPMIS_RXMIS() volatile
    {
        return SSPMIS & (1u << 2u);
    }

    inline bool get_SSPMIS_TXMIS() volatile
    {
        return SSPMIS & (1u << 3u);
    }

    inline void get_SSPMIS(bool &RORMIS, bool &RTMIS, bool &RXMIS,
                           bool &TXMIS) volatile
    {
        uint32_t curr = SSPMIS;

        RORMIS = curr & 1u;
        RTMIS = curr & (1u << 1u);
        RXMIS = curr & (1u << 2u);
        TXMIS = curr & (1u << 3u);
    }

    inline bool get_SSPICR_RORIC() volatile
    {
        return SSPICR & 1u;
    }

    inline void set_SSPICR_RORIC() volatile
    {
        SSPICR |= 1u;
    }

    inline void clear_SSPICR_RORIC() volatile
    {
        SSPICR &= ~(1u);
    }

    inline void toggle_SSPICR_RORIC() volatile
    {
        SSPICR ^= 1u;
    }

    inline bool get_SSPICR_RTIC() volatile
    {
        return SSPICR & (1u << 1u);
    }

    inline void set_SSPICR_RTIC() volatile
    {
        SSPICR |= 1u << 1u;
    }

    inline void clear_SSPICR_RTIC() volatile
    {
        SSPICR &= ~(1u << 1u);
    }

    inline void toggle_SSPICR_RTIC() volatile
    {
        SSPICR ^= 1u << 1u;
    }

    inline void get_SSPICR(bool &RORIC, bool &RTIC) volatile
    {
        uint32_t curr = SSPICR;

        RORIC = curr & 1u;
        RTIC = curr & (1u << 1u);
    }

    inline void set_SSPICR(bool RORIC, bool RTIC) volatile
    {
        uint32_t curr = SSPICR;

        curr &= ~(0b1u);
        curr |= (RORIC & 0b1u);
        curr &= ~(0b1u << 1u);
        curr |= (RTIC & 0b1u) << 1u;

        SSPICR = curr;
    }

    inline bool get_SSPDMACR_RXDMAE() volatile
    {
        return SSPDMACR & 1u;
    }

    inline void set_SSPDMACR_RXDMAE() volatile
    {
        SSPDMACR |= 1u;
    }

    inline void clear_SSPDMACR_RXDMAE() volatile
    {
        SSPDMACR &= ~(1u);
    }

    inline void toggle_SSPDMACR_RXDMAE() volatile
    {
        SSPDMACR ^= 1u;
    }

    inline bool get_SSPDMACR_TXDMAE() volatile
    {
        return SSPDMACR & (1u << 1u);
    }

    inline void set_SSPDMACR_TXDMAE() volatile
    {
        SSPDMACR |= 1u << 1u;
    }

    inline void clear_SSPDMACR_TXDMAE() volatile
    {
        SSPDMACR &= ~(1u << 1u);
    }

    inline void toggle_SSPDMACR_TXDMAE() volatile
    {
        SSPDMACR ^= 1u << 1u;
    }

    inline void get_SSPDMACR(bool &RXDMAE, bool &TXDMAE) volatile
    {
        uint32_t curr = SSPDMACR;

        RXDMAE = curr & 1u;
        TXDMAE = curr & (1u << 1u);
    }

    inline void set_SSPDMACR(bool RXDMAE, bool TXDMAE) volatile
    {
        uint32_t curr = SSPDMACR;

        curr &= ~(0b1u);
        curr |= (RXDMAE & 0b1u);
        curr &= ~(0b1u << 1u);
        curr |= (TXDMAE & 0b1u) << 1u;

        SSPDMACR = curr;
    }

    inline uint8_t get_SSPPERIPHID0() volatile
    {
        return SSPPERIPHID0 & 0xffu;
    }

    inline uint8_t get_SSPPERIPHID1_PARTNUMBER1() volatile
    {
        return SSPPERIPHID1 & 0xfu;
    }

    inline uint8_t get_SSPPERIPHID1_DESIGNER0() volatile
    {
        return (SSPPERIPHID1 >> 4u) & 0xfu;
    }

    inline void get_SSPPERIPHID1(uint8_t &PARTNUMBER1,
                                 uint8_t &DESIGNER0) volatile
    {
        uint32_t curr = SSPPERIPHID1;

        PARTNUMBER1 = curr & 0xfu;
        DESIGNER0 = (curr >> 4u) & 0xfu;
    }

    inline uint8_t get_SSPPERIPHID2_DESIGNER1() volatile
    {
        return SSPPERIPHID2 & 0xfu;
    }

    inline uint8_t get_SSPPERIPHID2_REVISION() volatile
    {
        return (SSPPERIPHID2 >> 4u) & 0xfu;
    }

    inline void get_SSPPERIPHID2(uint8_t &DESIGNER1,
                                 uint8_t &REVISION) volatile
    {
        uint32_t curr = SSPPERIPHID2;

        DESIGNER1 = curr & 0xfu;
        REVISION = (curr >> 4u) & 0xfu;
    }

    inline uint8_t get_SSPPERIPHID3() volatile
    {
        return SSPPERIPHID3 & 0xffu;
    }

    inline uint8_t get_SSPPCELLID0() volatile
    {
        return SSPPCELLID0 & 0xffu;
    }

    inline uint8_t get_SSPPCELLID1() volatile
    {
        return SSPPCELLID1 & 0xffu;
    }

    inline uint8_t get_SSPPCELLID2() volatile
    {
        return SSPPCELLID2 & 0xffu;
    }

    inline uint8_t get_SSPPCELLID3() volatile
    {
        return SSPPCELLID3 & 0xffu;
    }
};

static_assert(sizeof(spi) == spi::size);
static_assert(ifgen_struct<spi>);

static volatile spi *const SPI0 = reinterpret_cast<spi *>(0x4003c000);

static volatile spi *const SPI1 = reinterpret_cast<spi *>(0x40040000);

}; // namespace RP2040

#endif